NXP's driver library for LPC17xx, ported to mbed's online compiler. Not tested! I had to fix a lot of warings and found a couple of pretty obvious bugs, so the chances are there are more. Original: http://ics.nxp.com/support/documents/microcontrollers/zip/lpc17xx.cmsis.driver.library.zip
source/lpc17xx_nvic.c@0:1063a091a062, 2010-02-17 (annotated)
- Committer:
- igorsk
- Date:
- Wed Feb 17 16:22:39 2010 +0000
- Revision:
- 0:1063a091a062
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
igorsk | 0:1063a091a062 | 1 | /** |
igorsk | 0:1063a091a062 | 2 | * @file : lpc17xx_nvic.c |
igorsk | 0:1063a091a062 | 3 | * @brief : Contains all expansion functions support for |
igorsk | 0:1063a091a062 | 4 | * NVIC firmware library on LPC17xx. The main |
igorsk | 0:1063a091a062 | 5 | * NVIC functions are defined in core_cm3.h |
igorsk | 0:1063a091a062 | 6 | * @version : 1.0 |
igorsk | 0:1063a091a062 | 7 | * @date : 18. Mar. 2009 |
igorsk | 0:1063a091a062 | 8 | * @author : HieuNguyen |
igorsk | 0:1063a091a062 | 9 | ************************************************************************** |
igorsk | 0:1063a091a062 | 10 | * Software that is described herein is for illustrative purposes only |
igorsk | 0:1063a091a062 | 11 | * which provides customers with programming information regarding the |
igorsk | 0:1063a091a062 | 12 | * products. This software is supplied "AS IS" without any warranties. |
igorsk | 0:1063a091a062 | 13 | * NXP Semiconductors assumes no responsibility or liability for the |
igorsk | 0:1063a091a062 | 14 | * use of the software, conveys no license or title under any patent, |
igorsk | 0:1063a091a062 | 15 | * copyright, or mask work right to the product. NXP Semiconductors |
igorsk | 0:1063a091a062 | 16 | * reserves the right to make changes in the software without |
igorsk | 0:1063a091a062 | 17 | * notification. NXP Semiconductors also make no representation or |
igorsk | 0:1063a091a062 | 18 | * warranty that such application will be suitable for the specified |
igorsk | 0:1063a091a062 | 19 | * use without further testing or modification. |
igorsk | 0:1063a091a062 | 20 | **********************************************************************/ |
igorsk | 0:1063a091a062 | 21 | |
igorsk | 0:1063a091a062 | 22 | /* Peripheral group ----------------------------------------------------------- */ |
igorsk | 0:1063a091a062 | 23 | /** @addtogroup NVIC |
igorsk | 0:1063a091a062 | 24 | * @{ |
igorsk | 0:1063a091a062 | 25 | */ |
igorsk | 0:1063a091a062 | 26 | |
igorsk | 0:1063a091a062 | 27 | /* Includes ------------------------------------------------------------------- */ |
igorsk | 0:1063a091a062 | 28 | #include "lpc17xx_nvic.h" |
igorsk | 0:1063a091a062 | 29 | |
igorsk | 0:1063a091a062 | 30 | |
igorsk | 0:1063a091a062 | 31 | /* Private Macros ------------------------------------------------------------- */ |
igorsk | 0:1063a091a062 | 32 | /** @addtogroup NVIC_Private_Macros |
igorsk | 0:1063a091a062 | 33 | * @{ |
igorsk | 0:1063a091a062 | 34 | */ |
igorsk | 0:1063a091a062 | 35 | |
igorsk | 0:1063a091a062 | 36 | /* Vector table offset bit mask */ |
igorsk | 0:1063a091a062 | 37 | #define NVIC_VTOR_MASK 0x3FFFFF80 |
igorsk | 0:1063a091a062 | 38 | |
igorsk | 0:1063a091a062 | 39 | /** |
igorsk | 0:1063a091a062 | 40 | * @} |
igorsk | 0:1063a091a062 | 41 | */ |
igorsk | 0:1063a091a062 | 42 | |
igorsk | 0:1063a091a062 | 43 | |
igorsk | 0:1063a091a062 | 44 | /* Public Functions ----------------------------------------------------------- */ |
igorsk | 0:1063a091a062 | 45 | /** @addtogroup NVIC_Public_Functions |
igorsk | 0:1063a091a062 | 46 | * @{ |
igorsk | 0:1063a091a062 | 47 | */ |
igorsk | 0:1063a091a062 | 48 | |
igorsk | 0:1063a091a062 | 49 | |
igorsk | 0:1063a091a062 | 50 | /*****************************************************************************//** |
igorsk | 0:1063a091a062 | 51 | * @brief De-initializes the NVIC peripheral registers to their default |
igorsk | 0:1063a091a062 | 52 | * reset values. |
igorsk | 0:1063a091a062 | 53 | * @param None |
igorsk | 0:1063a091a062 | 54 | * @return None |
igorsk | 0:1063a091a062 | 55 | * |
igorsk | 0:1063a091a062 | 56 | * These following NVIC peripheral registers will be de-initialized: |
igorsk | 0:1063a091a062 | 57 | * - Disable Interrupt (32 IRQ interrupt sources that matched with LPC17xx) |
igorsk | 0:1063a091a062 | 58 | * - Clear all Pending Interrupts (32 IRQ interrupt source that matched with LPC17xx) |
igorsk | 0:1063a091a062 | 59 | * - Clear all Interrupt Priorities (32 IRQ interrupt source that matched with LPC17xx) |
igorsk | 0:1063a091a062 | 60 | *******************************************************************************/ |
igorsk | 0:1063a091a062 | 61 | void NVIC_DeInit(void) |
igorsk | 0:1063a091a062 | 62 | { |
igorsk | 0:1063a091a062 | 63 | uint8_t tmp; |
igorsk | 0:1063a091a062 | 64 | |
igorsk | 0:1063a091a062 | 65 | /* Disable all interrupts */ |
igorsk | 0:1063a091a062 | 66 | NVIC->ICER[0] = 0xFFFFFFFF; |
igorsk | 0:1063a091a062 | 67 | NVIC->ICER[1] = 0x00000001; |
igorsk | 0:1063a091a062 | 68 | /* Clear all pending interrupts */ |
igorsk | 0:1063a091a062 | 69 | NVIC->ICPR[0] = 0xFFFFFFFF; |
igorsk | 0:1063a091a062 | 70 | NVIC->ICPR[1] = 0x00000001; |
igorsk | 0:1063a091a062 | 71 | |
igorsk | 0:1063a091a062 | 72 | /* Clear all interrupt priority */ |
igorsk | 0:1063a091a062 | 73 | for (tmp = 0; tmp < 32; tmp++) { |
igorsk | 0:1063a091a062 | 74 | NVIC->IP[tmp] = 0x00; |
igorsk | 0:1063a091a062 | 75 | } |
igorsk | 0:1063a091a062 | 76 | } |
igorsk | 0:1063a091a062 | 77 | |
igorsk | 0:1063a091a062 | 78 | /*****************************************************************************//** |
igorsk | 0:1063a091a062 | 79 | * @brief De-initializes the SCB peripheral registers to their default |
igorsk | 0:1063a091a062 | 80 | * reset values. |
igorsk | 0:1063a091a062 | 81 | * @param none |
igorsk | 0:1063a091a062 | 82 | * @return none |
igorsk | 0:1063a091a062 | 83 | * |
igorsk | 0:1063a091a062 | 84 | * These following SCB NVIC peripheral registers will be de-initialized: |
igorsk | 0:1063a091a062 | 85 | * - Interrupt Control State register |
igorsk | 0:1063a091a062 | 86 | * - Interrupt Vector Table Offset register |
igorsk | 0:1063a091a062 | 87 | * - Application Interrupt/Reset Control register |
igorsk | 0:1063a091a062 | 88 | * - System Control register |
igorsk | 0:1063a091a062 | 89 | * - Configuration Control register |
igorsk | 0:1063a091a062 | 90 | * - System Handlers Priority Registers |
igorsk | 0:1063a091a062 | 91 | * - System Handler Control and State Register |
igorsk | 0:1063a091a062 | 92 | * - Configurable Fault Status Register |
igorsk | 0:1063a091a062 | 93 | * - Hard Fault Status Register |
igorsk | 0:1063a091a062 | 94 | * - Debug Fault Status Register |
igorsk | 0:1063a091a062 | 95 | *******************************************************************************/ |
igorsk | 0:1063a091a062 | 96 | void NVIC_SCBDeInit(void) |
igorsk | 0:1063a091a062 | 97 | { |
igorsk | 0:1063a091a062 | 98 | uint8_t tmp; |
igorsk | 0:1063a091a062 | 99 | |
igorsk | 0:1063a091a062 | 100 | SCB->ICSR = 0x0A000000; |
igorsk | 0:1063a091a062 | 101 | SCB->VTOR = 0x00000000; |
igorsk | 0:1063a091a062 | 102 | SCB->AIRCR = 0x05FA0000; |
igorsk | 0:1063a091a062 | 103 | SCB->SCR = 0x00000000; |
igorsk | 0:1063a091a062 | 104 | SCB->CCR = 0x00000000; |
igorsk | 0:1063a091a062 | 105 | |
igorsk | 0:1063a091a062 | 106 | for (tmp = 0; tmp < 32; tmp++) { |
igorsk | 0:1063a091a062 | 107 | SCB->SHP[tmp] = 0x00; |
igorsk | 0:1063a091a062 | 108 | } |
igorsk | 0:1063a091a062 | 109 | |
igorsk | 0:1063a091a062 | 110 | SCB->SHCSR = 0x00000000; |
igorsk | 0:1063a091a062 | 111 | SCB->CFSR = 0xFFFFFFFF; |
igorsk | 0:1063a091a062 | 112 | SCB->HFSR = 0xFFFFFFFF; |
igorsk | 0:1063a091a062 | 113 | SCB->DFSR = 0xFFFFFFFF; |
igorsk | 0:1063a091a062 | 114 | } |
igorsk | 0:1063a091a062 | 115 | |
igorsk | 0:1063a091a062 | 116 | |
igorsk | 0:1063a091a062 | 117 | /*****************************************************************************//** |
igorsk | 0:1063a091a062 | 118 | * @brief Set Vector Table Offset value |
igorsk | 0:1063a091a062 | 119 | * @param offset Offset value |
igorsk | 0:1063a091a062 | 120 | * @return None |
igorsk | 0:1063a091a062 | 121 | *******************************************************************************/ |
igorsk | 0:1063a091a062 | 122 | void NVIC_SetVTOR(uint32_t offset) |
igorsk | 0:1063a091a062 | 123 | { |
igorsk | 0:1063a091a062 | 124 | SCB->VTOR = (offset & NVIC_VTOR_MASK); |
igorsk | 0:1063a091a062 | 125 | } |
igorsk | 0:1063a091a062 | 126 | |
igorsk | 0:1063a091a062 | 127 | /** |
igorsk | 0:1063a091a062 | 128 | * @} |
igorsk | 0:1063a091a062 | 129 | */ |
igorsk | 0:1063a091a062 | 130 | |
igorsk | 0:1063a091a062 | 131 | /** |
igorsk | 0:1063a091a062 | 132 | * @} |
igorsk | 0:1063a091a062 | 133 | */ |
igorsk | 0:1063a091a062 | 134 | |
igorsk | 0:1063a091a062 | 135 | /* --------------------------------- End Of File ------------------------------ */ |