iforce2d Chris / Mbed 2 deprecated ubxDistanceMeter

Displays distance to start location on OLED screen.

Dependencies:   mbed

u8g_com_atmega_sw_spi.c@0:972874f31c98, 2018-03-07 (annotated)

Committer:
iforce2d
Date:
Wed Mar 07 12:49:14 2018 +0000
Revision:
0:972874f31c98
First commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
iforce2d 0:972874f31c98 1 /*
iforce2d 0:972874f31c98 2
iforce2d 0:972874f31c98 3 u8g_com_atmega_sw_spi.c
iforce2d 0:972874f31c98 4
iforce2d 0:972874f31c98 5 Universal 8bit Graphics Library
iforce2d 0:972874f31c98 6
iforce2d 0:972874f31c98 7 Copyright (c) 2012, olikraus@gmail.com
iforce2d 0:972874f31c98 8 All rights reserved.
iforce2d 0:972874f31c98 9
iforce2d 0:972874f31c98 10 Redistribution and use in source and binary forms, with or without modification,
iforce2d 0:972874f31c98 11 are permitted provided that the following conditions are met:
iforce2d 0:972874f31c98 12
iforce2d 0:972874f31c98 13 * Redistributions of source code must retain the above copyright notice, this list
iforce2d 0:972874f31c98 14 of conditions and the following disclaimer.
iforce2d 0:972874f31c98 15
iforce2d 0:972874f31c98 16 * Redistributions in binary form must reproduce the above copyright notice, this
iforce2d 0:972874f31c98 17 list of conditions and the following disclaimer in the documentation and/or other
iforce2d 0:972874f31c98 18 materials provided with the distribution.
iforce2d 0:972874f31c98 19
iforce2d 0:972874f31c98 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
iforce2d 0:972874f31c98 21 CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
iforce2d 0:972874f31c98 22 INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
iforce2d 0:972874f31c98 23 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
iforce2d 0:972874f31c98 24 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
iforce2d 0:972874f31c98 25 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
iforce2d 0:972874f31c98 26 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
iforce2d 0:972874f31c98 27 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
iforce2d 0:972874f31c98 28 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
iforce2d 0:972874f31c98 29 CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
iforce2d 0:972874f31c98 30 STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
iforce2d 0:972874f31c98 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
iforce2d 0:972874f31c98 32 ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
iforce2d 0:972874f31c98 33
iforce2d 0:972874f31c98 34
iforce2d 0:972874f31c98 35 */
iforce2d 0:972874f31c98 36
iforce2d 0:972874f31c98 37 #include "u8g.h"
iforce2d 0:972874f31c98 38
iforce2d 0:972874f31c98 39 #if defined(__AVR__)
iforce2d 0:972874f31c98 40
iforce2d 0:972874f31c98 41 static void u8g_atmega_sw_spi_shift_out(u8g_t *u8g, uint8_t val) U8G_NOINLINE;
iforce2d 0:972874f31c98 42 static void u8g_atmega_sw_spi_shift_out(u8g_t *u8g, uint8_t val)
iforce2d 0:972874f31c98 43 {
iforce2d 0:972874f31c98 44 uint8_t i = 8;
iforce2d 0:972874f31c98 45 do
iforce2d 0:972874f31c98 46 {
iforce2d 0:972874f31c98 47 u8g_SetPILevel(u8g, U8G_PI_MOSI, val & 128 );
iforce2d 0:972874f31c98 48 val <<= 1;
iforce2d 0:972874f31c98 49 u8g_SetPILevel(u8g, U8G_PI_SCK, 1 );
iforce2d 0:972874f31c98 50 u8g_MicroDelay(); /* 15 Aug 2012: added for high speed uC */
iforce2d 0:972874f31c98 51 u8g_SetPILevel(u8g, U8G_PI_SCK, 0 );
iforce2d 0:972874f31c98 52 u8g_MicroDelay(); /* 15 Aug 2012: added for high speed uC */
iforce2d 0:972874f31c98 53 i--;
iforce2d 0:972874f31c98 54 } while( i != 0 );
iforce2d 0:972874f31c98 55 }
iforce2d 0:972874f31c98 56
iforce2d 0:972874f31c98 57 uint8_t u8g_com_atmega_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr)
iforce2d 0:972874f31c98 58 {
iforce2d 0:972874f31c98 59 switch(msg)
iforce2d 0:972874f31c98 60 {
iforce2d 0:972874f31c98 61 case U8G_COM_MSG_INIT:
iforce2d 0:972874f31c98 62 u8g_SetPIOutput(u8g, U8G_PI_SCK);
iforce2d 0:972874f31c98 63 u8g_SetPIOutput(u8g, U8G_PI_MOSI);
iforce2d 0:972874f31c98 64 u8g_SetPIOutput(u8g, U8G_PI_A0);
iforce2d 0:972874f31c98 65 u8g_SetPIOutput(u8g, U8G_PI_CS);
iforce2d 0:972874f31c98 66 u8g_SetPIOutput(u8g, U8G_PI_RESET);
iforce2d 0:972874f31c98 67
iforce2d 0:972874f31c98 68 u8g_SetPILevel(u8g, U8G_PI_SCK, 0 );
iforce2d 0:972874f31c98 69 u8g_SetPILevel(u8g, U8G_PI_MOSI, 0 );
iforce2d 0:972874f31c98 70 u8g_SetPILevel(u8g, U8G_PI_CS, 1 );
iforce2d 0:972874f31c98 71 u8g_SetPILevel(u8g, U8G_PI_A0, 0);
iforce2d 0:972874f31c98 72 break;
iforce2d 0:972874f31c98 73
iforce2d 0:972874f31c98 74 case U8G_COM_MSG_STOP:
iforce2d 0:972874f31c98 75 break;
iforce2d 0:972874f31c98 76
iforce2d 0:972874f31c98 77 case U8G_COM_MSG_ADDRESS: /* define cmd (arg_val = 0) or data mode (arg_val = 1) */
iforce2d 0:972874f31c98 78 u8g_SetPILevel(u8g, U8G_PI_A0, arg_val);
iforce2d 0:972874f31c98 79 break;
iforce2d 0:972874f31c98 80
iforce2d 0:972874f31c98 81 case U8G_COM_MSG_CHIP_SELECT:
iforce2d 0:972874f31c98 82
iforce2d 0:972874f31c98 83 if ( arg_val == 0 )
iforce2d 0:972874f31c98 84 {
iforce2d 0:972874f31c98 85 /* disable */
iforce2d 0:972874f31c98 86 u8g_SetPILevel(u8g, U8G_PI_CS, 1);
iforce2d 0:972874f31c98 87 }
iforce2d 0:972874f31c98 88 else
iforce2d 0:972874f31c98 89 {
iforce2d 0:972874f31c98 90 u8g_SetPILevel(u8g, U8G_PI_SCK, 0 );
iforce2d 0:972874f31c98 91 /* enable */
iforce2d 0:972874f31c98 92 u8g_SetPILevel(u8g, U8G_PI_CS, 0); /* CS = 0 (low active) */
iforce2d 0:972874f31c98 93 }
iforce2d 0:972874f31c98 94 break;
iforce2d 0:972874f31c98 95
iforce2d 0:972874f31c98 96 case U8G_COM_MSG_RESET:
iforce2d 0:972874f31c98 97 u8g_SetPILevel(u8g, U8G_PI_RESET, arg_val);
iforce2d 0:972874f31c98 98 break;
iforce2d 0:972874f31c98 99
iforce2d 0:972874f31c98 100
iforce2d 0:972874f31c98 101 case U8G_COM_MSG_WRITE_BYTE:
iforce2d 0:972874f31c98 102 u8g_atmega_sw_spi_shift_out(u8g, arg_val);
iforce2d 0:972874f31c98 103 break;
iforce2d 0:972874f31c98 104
iforce2d 0:972874f31c98 105 case U8G_COM_MSG_WRITE_SEQ:
iforce2d 0:972874f31c98 106 {
iforce2d 0:972874f31c98 107 register uint8_t *ptr = arg_ptr;
iforce2d 0:972874f31c98 108 while( arg_val > 0 )
iforce2d 0:972874f31c98 109 {
iforce2d 0:972874f31c98 110 u8g_atmega_sw_spi_shift_out(u8g, *ptr++);
iforce2d 0:972874f31c98 111 arg_val--;
iforce2d 0:972874f31c98 112 }
iforce2d 0:972874f31c98 113 }
iforce2d 0:972874f31c98 114 break;
iforce2d 0:972874f31c98 115
iforce2d 0:972874f31c98 116 case U8G_COM_MSG_WRITE_SEQ_P:
iforce2d 0:972874f31c98 117 {
iforce2d 0:972874f31c98 118 register uint8_t *ptr = arg_ptr;
iforce2d 0:972874f31c98 119 while( arg_val > 0 )
iforce2d 0:972874f31c98 120 {
iforce2d 0:972874f31c98 121 u8g_atmega_sw_spi_shift_out(u8g, u8g_pgm_read(ptr));
iforce2d 0:972874f31c98 122 ptr++;
iforce2d 0:972874f31c98 123 arg_val--;
iforce2d 0:972874f31c98 124 }
iforce2d 0:972874f31c98 125 }
iforce2d 0:972874f31c98 126 break;
iforce2d 0:972874f31c98 127 }
iforce2d 0:972874f31c98 128 return 1;
iforce2d 0:972874f31c98 129 }
iforce2d 0:972874f31c98 130
iforce2d 0:972874f31c98 131 #else
iforce2d 0:972874f31c98 132
iforce2d 0:972874f31c98 133
iforce2d 0:972874f31c98 134 uint8_t u8g_com_atmega_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr)
iforce2d 0:972874f31c98 135 {
iforce2d 0:972874f31c98 136 return 1;
iforce2d 0:972874f31c98 137 }
iforce2d 0:972874f31c98 138
iforce2d 0:972874f31c98 139
iforce2d 0:972874f31c98 140 #endif
iforce2d 0:972874f31c98 141
iforce2d 0:972874f31c98 142