mbed library sources: Modified to operate FRDM-KL25Z at 48MHz from internal 32kHz oscillator (nothing else changed).
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The only file that changed is: mbed-src-FLL48/targets/cmsis/TARGET_Freescale/TARGET_KL25Z/system_MKL25Z4.h
Diff: targets/hal/TARGET_Freescale/TARGET_KL05Z/rtc_api.c
- Revision:
- 20:4263a77256ae
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/targets/hal/TARGET_Freescale/TARGET_KL05Z/rtc_api.c Tue Sep 10 15:14:19 2013 +0300 @@ -0,0 +1,84 @@ +/* mbed Microcontroller Library + * Copyright (c) 2006-2013 ARM Limited + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include "rtc_api.h" + +static void init(void) { + // enable RTC clock + SIM->SCGC6 |= SIM_SCGC6_RTC_MASK; + + // select OSC32 as RTC clock source + SIM->SOPT1 &= ~SIM_SOPT1_OSC32KSEL_MASK; + +} + +void rtc_init(void) { + uint32_t i; + init(); + + //Configure the TSR. default value: 1 + RTC->TSR = 1; + + RTC->CR |= RTC_CR_OSCE_MASK; + + //delay for OSCE stabilization + for(i=0; i<0x1000; i++) __NOP(); + + // enable counter + RTC->SR |= RTC_SR_TCE_MASK; +} + +void rtc_free(void) { + // [TODO] +} + + +int rtc_isenabled(void) { + // even if the RTC module is enabled, + // as we use RTC_CLKIN and an external clock, + // we need to reconfigure the pins. That is why we + // call init() if the rtc is enabled + + // if RTC not enabled return 0 + SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK; + SIM->SCGC6 |= SIM_SCGC6_RTC_MASK; + if ((RTC->SR & RTC_SR_TCE_MASK) == 0) { + return 0; + } + + init(); + return 1; +} + +time_t rtc_read(void) { + return RTC->TSR; +} + +void rtc_write(time_t t) { + // disable counter + RTC->SR &= ~RTC_SR_TCE_MASK; + + // we do not write 0 into TSR + // to avoid invalid time + if (t == 0) { + t = 1; + } + + // write seconds + RTC->TSR = t; + + // re-enable counter + RTC->SR |= RTC_SR_TCE_MASK; +}