RTOS enabled i2c-driver based on the official i2c-C-api.

Dependencies:   mbed-rtos

Fork of mbed-RtosI2cDriver by Helmut Schmücker

I2cRtosDriver

Overview

  • Based on RTOS
    • Less busy wait waste of CPU cycles
    • ... but some waste of CPU cycles by context switches
    • Frees up to 80% of CPU resources
  • Fixes the bug described in https://mbed.org/forum/bugs-suggestions/topic/4128/
  • Spends minimal time in interrupt context
  • Supports I2C Master and Slave mode
  • Interface compatible to official I2C lib
  • Supports LPC1768 and LPC11U24.
  • Reuses parts of the official I2C implementation
  • The test and example programs work quite well and the results look promising. But this is by no means a thoroughly regression tested library. There might be some surprises left.
  • If you want to avoid the RTOS overhead MODI2C might be a better choice.

Usage

  • In existing projects simply replace in the I2C interface class declaration the official type by one of the adapters I2CMasterRtos or I2CSlaveRtos described below. The behavior should be the same.
  • You can also use the I2CDriver interface directly.
  • You can create several instances of I2CMasterRtos, I2CSlaveRtos and I2CDriver. The interface classes are lightweight and work in parallel.
  • See also the tests/examples in I2CDriverTest01.h - I2CDriverTest05.h
  • The I2CDriver class is the central interface
    • I2CDriver provides a "fat" API for I2C master and slave access
    • It supports on the fly changes between master and slave mode.
    • All requests are blocking. Other threads might do their work while the calling thread waits for the i2c requests to be completed.
    • It ensures mutual exclusive access to the I2C HW.
      • This is realized by a static RTOS mutex for each I2C channel. The mutex is taken by the calling thread on any call of an I2CDriver-function.
      • Thus accesses are prioritized automatically by the priority of the calling user threads.
      • Once having access to the interface the requests are performed with high priority and cannot be interrupted by other threads.
      • Optionally the interface can be locked manually. Useful if one wants to perform a sequence of commands without interruption.
  • I2CMasterRtos and I2CSlaveRtos provide an interface compatible to the official mbed I2C interface. Additionally
    • the constructors provide parameters for defining the frequency and the slave address
    • I2CMasterRtos provides a function to read data from a given slave register
    • In contrast to the original interface the I2CSlaveRtos::receive() function is blocking, i.e it returns, when the master sends a request to the listening slave. There is no need to poll the receive status in a loop. Optionally a timeout value can be passed to the function.
    • The stop function provides a timeout mechanism and returns the status. Thus if someone on the bus inhibits the creation of a stop condition by keeping the scl or the sda line low the mbed master won't get freezed.
    • The interface adapters are implemented as object adapters, i.e they hold an I2CDriver-instance, to which they forward the user requests by simple inline functions. The overhead is negligible.

Design

The i2c read and write sequences have been realized in an interrupt service routine. The communicaton between the calling thread and the ISR is realized by a simple static transfer struct and a semaphore ... see i2cRtos_api.c
The start and stop functions still use the busy wait approach. They are not entered that frequently and usually they take less than 12µs at 100kHz bus speed. At 400kHz even less time is consumed. Thus there wouldn't be much benefit if one triggers the whole interrupt/task wait/switch sequence for that short period of time.

Performance

The following performance data have been measured with the small test applications in I2CDriverTest01.h and I2CDriverTest04.h . In these applications a high priority thread, triggered at a rate of 1kHz, reads on each trigger a data packet of given size with given I2C bus speed from a SRF08 ultra sonic ranger or a MPU6050 accelerometer/gyro. At the same time the main thread - running at a lower priority - counts in an endless loop adjacent increments of the mbed's µs-ticker API and calculates a duty cycle from this. These duty cycle measurements are shown in the table below together with the time measured for one read sequence (write address+register; write address and read x byte of data). The measurements have been performed with the ISR/RTOS approach used by this driver and with the busy wait approach used by the official mbed I2C implementation. The i2c implementation can be selected via #define PREFIX in I2CDriver.cpp.

  • The time for one read cycle is almost the same for both approaches
  • At full load the duty cycle of the low priority thread drops almost to zero for the busy wait approach, whereas with the RTOS/ISR enabled driver it stays at 80%-90% on the LPC1768 and above 65% on the LPC11U24.
  • => Especially at low bus speeds and/or high data transfer loads the driver is able to free a significant amount of CPU time.
LPC17681byte/ms4byte/ms6byte/ms1byte/ms6byte/ms12byte/ms25byte/ms
SRF08@ 100kHz@ 100kHz@ 100kHz@ 400kHz@ 400kHz@ 400kHz@ 400kHz
rtos/ISRDC[%]91.791.090.593.391.990.386.8
t[µs]421714910141314518961
busy waitDC[%]57.127.78.185.868.748.23.8
t[µs]415710907128299503949
LPC17681byte/ms4byte/ms7byte/ms1byte/ms6byte/ms12byte/ms36byte/ms
MPU6050@ 100kHz@ 100kHz@ 100kHz@ 400kHz@ 400kHz@ 400kHz@ 400kHz
rtos/ISRDC[%]91.590.789.393.091.690.084.2
t[µs]415687959133254398977
busy waitDC[%]57.730.53.386.574.359.71.2
t[µs]408681953121243392974
LPC11U241byte/ms6byte/ms1byte/ms6byte/ms23byte/ms
SRF08@ 100kHz@ 100kHz@ 400kHz@ 400kHz@ 400kHz
rtos/ISRDC[%]79.277.581.178.771.4
t[µs]474975199374978
busy waitDC[%]51.82.480.5633.3
t[µs]442937156332928
LPC11U241byte/ms6byte/ms1byte/ms6byte/ms32byte/ms
MPU6050@ 100kHz@ 100kHz@ 400kHz@ 400kHz@ 400kHz
rtos/ISRDC[%]79.176.881.078.667.1
t[µs]466922188316985
busy waitDC[%]52.87.281.769.87.4
t[µs]433893143268895
Committer:
humlet
Date:
Sun Apr 14 21:42:22 2013 +0000
Revision:
2:514105beb343
Parent:
1:90455d5bdd8c
Child:
3:967dde37e712
seems to work

Who changed what in which revision?

UserRevisionLine numberNew contents of line
humlet 0:13c962fecb13 1 #ifndef I2CDRIVER_H
humlet 0:13c962fecb13 2 #define I2CDRIVER_H
humlet 0:13c962fecb13 3
humlet 0:13c962fecb13 4 #include "stdint.h"
humlet 0:13c962fecb13 5
humlet 0:13c962fecb13 6 #include "I2C.h"
humlet 0:13c962fecb13 7
humlet 0:13c962fecb13 8 #include "Thread.h"
humlet 0:13c962fecb13 9 #include "Semaphore.h"
humlet 0:13c962fecb13 10 #include "Mutex.h"
humlet 0:13c962fecb13 11
humlet 0:13c962fecb13 12 namespace mbed
humlet 0:13c962fecb13 13 {
humlet 0:13c962fecb13 14
humlet 0:13c962fecb13 15 class I2CDriver : protected I2C
humlet 0:13c962fecb13 16 {
humlet 0:13c962fecb13 17 public:
humlet 0:13c962fecb13 18 using I2C::RxStatus;
humlet 0:13c962fecb13 19 using I2C::Acknowledge;
humlet 0:13c962fecb13 20 using I2C::frequency;
humlet 0:13c962fecb13 21
humlet 0:13c962fecb13 22 /** Create an I2C Master interface, connected to the specified pins
humlet 0:13c962fecb13 23 *
humlet 0:13c962fecb13 24 * @param sda I2C data line pin
humlet 0:13c962fecb13 25 * @param scl I2C clock line pin
humlet 0:13c962fecb13 26 */
humlet 0:13c962fecb13 27 I2CDriver(PinName sda, PinName scl);
humlet 0:13c962fecb13 28
humlet 0:13c962fecb13 29 /** Read from an I2C slave
humlet 0:13c962fecb13 30 *
humlet 0:13c962fecb13 31 * Performs a complete read transaction. The bottom bit of
humlet 0:13c962fecb13 32 * the address is forced to 1 to indicate a read.
humlet 0:13c962fecb13 33 *
humlet 0:13c962fecb13 34 * @param address 8-bit I2C slave address [ addr | 1 ]
humlet 0:13c962fecb13 35 * @param data Pointer to the byte-array to read data in to
humlet 0:13c962fecb13 36 * @param length Number of bytes to read
humlet 0:13c962fecb13 37 * @param repeated Repeated start, true - don't send stop at end
humlet 0:13c962fecb13 38 *
humlet 0:13c962fecb13 39 * @returns
humlet 0:13c962fecb13 40 * 0 on success (ack),
humlet 0:13c962fecb13 41 * non-0 on failure (nack)
humlet 0:13c962fecb13 42 */
humlet 0:13c962fecb13 43 int read(int address, char *data, int length, bool repeated = false);
humlet 0:13c962fecb13 44
humlet 1:90455d5bdd8c 45 int read(int address, uint8_t regist, char *data, int length, bool repeated = false);
humlet 1:90455d5bdd8c 46
humlet 0:13c962fecb13 47 /** Read a single byte from the I2C bus
humlet 0:13c962fecb13 48 *
humlet 0:13c962fecb13 49 * @param ack indicates if the byte is to be acknowledged (1 = acknowledge)
humlet 0:13c962fecb13 50 *
humlet 0:13c962fecb13 51 * @returns
humlet 0:13c962fecb13 52 * the byte read
humlet 0:13c962fecb13 53 */
humlet 0:13c962fecb13 54 int read(int ack);
humlet 0:13c962fecb13 55
humlet 0:13c962fecb13 56 /** Write to an I2C slave
humlet 0:13c962fecb13 57 *
humlet 0:13c962fecb13 58 * Performs a complete write transaction. The bottom bit of
humlet 0:13c962fecb13 59 * the address is forced to 0 to indicate a write.
humlet 0:13c962fecb13 60 *
humlet 0:13c962fecb13 61 * @param address 8-bit I2C slave address [ addr | 0 ]
humlet 0:13c962fecb13 62 * @param data Pointer to the byte-array data to send
humlet 0:13c962fecb13 63 * @param length Number of bytes to send
humlet 0:13c962fecb13 64 * @param repeated Repeated start, true - do not send stop at end
humlet 0:13c962fecb13 65 *
humlet 0:13c962fecb13 66 * @returns
humlet 0:13c962fecb13 67 * 0 on success (ack),
humlet 0:13c962fecb13 68 * non-0 on failure (nack)
humlet 0:13c962fecb13 69 */
humlet 0:13c962fecb13 70 int write(int address, const char *data, int length, bool repeated = false);
humlet 0:13c962fecb13 71
humlet 0:13c962fecb13 72 /** Write single byte out on the I2C bus
humlet 0:13c962fecb13 73 *
humlet 0:13c962fecb13 74 * @param data data to write out on bus
humlet 0:13c962fecb13 75 *
humlet 0:13c962fecb13 76 * @returns
humlet 0:13c962fecb13 77 * '1' if an ACK was received,
humlet 0:13c962fecb13 78 * '0' otherwise
humlet 0:13c962fecb13 79 */
humlet 0:13c962fecb13 80 int write(int data);
humlet 0:13c962fecb13 81
humlet 0:13c962fecb13 82 /// Creates a start condition on the I2C bus
humlet 0:13c962fecb13 83 void start(void);
humlet 0:13c962fecb13 84
humlet 0:13c962fecb13 85 ///Creates a stop condition on the I2C bus
humlet 0:13c962fecb13 86 void stop(void);
humlet 0:13c962fecb13 87
humlet 0:13c962fecb13 88 /// Wait until the i2c driver becomes available.
humlet 2:514105beb343 89 void lock() {
humlet 0:13c962fecb13 90 // if one and the same thread can lock twice, but then it needs also to unlock twice.
humlet 0:13c962fecb13 91 // exactly what we need here
humlet 1:90455d5bdd8c 92 m_channel->mutex.lock(osWaitForever);
humlet 0:13c962fecb13 93 }
humlet 0:13c962fecb13 94
humlet 0:13c962fecb13 95 /// Unlock the driver that has previously been locked by the same thread
humlet 2:514105beb343 96 void unlock() {
humlet 1:90455d5bdd8c 97 m_channel->mutex.unlock();
humlet 0:13c962fecb13 98 }
humlet 0:13c962fecb13 99
humlet 0:13c962fecb13 100
humlet 0:13c962fecb13 101 protected:
humlet 0:13c962fecb13 102
humlet 0:13c962fecb13 103 enum Command {
humlet 0:13c962fecb13 104 START,
humlet 0:13c962fecb13 105 STOP,
humlet 0:13c962fecb13 106 WRITE_BYTE,
humlet 0:13c962fecb13 107 WRITE,
humlet 0:13c962fecb13 108 READ_BYTE,
humlet 0:13c962fecb13 109 READ,
humlet 0:13c962fecb13 110 READ_FROM_REGISTER
humlet 1:90455d5bdd8c 111 };
humlet 0:13c962fecb13 112
humlet 0:13c962fecb13 113 struct Transfer {
humlet 1:90455d5bdd8c 114 osThreadId caller;
humlet 0:13c962fecb13 115 Command cmd;
humlet 0:13c962fecb13 116 int freq;
humlet 0:13c962fecb13 117 int adr;
humlet 1:90455d5bdd8c 118 uint8_t reg;
humlet 0:13c962fecb13 119 char* dta;
humlet 1:90455d5bdd8c 120 const char* wdta;
humlet 0:13c962fecb13 121 int len;
humlet 1:90455d5bdd8c 122 int ack;
humlet 0:13c962fecb13 123 bool rep;
humlet 1:90455d5bdd8c 124 int ret;
humlet 1:90455d5bdd8c 125 };
humlet 0:13c962fecb13 126
humlet 0:13c962fecb13 127 struct Channel {
humlet 1:90455d5bdd8c 128 volatile osThreadId driver;
humlet 1:90455d5bdd8c 129 rtos::Mutex mutex;
humlet 1:90455d5bdd8c 130 volatile Transfer transfer;
humlet 1:90455d5bdd8c 131 volatile int freq;
humlet 1:90455d5bdd8c 132 };
humlet 0:13c962fecb13 133
humlet 1:90455d5bdd8c 134 static const PinName c_sdas[2];
humlet 1:90455d5bdd8c 135 static const PinName c_scls[2];
humlet 0:13c962fecb13 136
humlet 2:514105beb343 137 static Channel* s_channels[2];
humlet 0:13c962fecb13 138
humlet 2:514105beb343 139 Channel* m_channel;
humlet 0:13c962fecb13 140
humlet 0:13c962fecb13 141 static void channel_0_ISR();
humlet 0:13c962fecb13 142 static void channel_1_ISR();
humlet 0:13c962fecb13 143
humlet 1:90455d5bdd8c 144 static void threadFun(void const *args);
humlet 0:13c962fecb13 145
humlet 0:13c962fecb13 146 void sendNwait();
humlet 0:13c962fecb13 147
humlet 1:90455d5bdd8c 148 };
humlet 0:13c962fecb13 149 }
humlet 0:13c962fecb13 150 #endif