Mbed library for ENC28J60 Ethernet modules. Full support for TCP/IP and UDP Server, Client and HTTP server (webserver). DHCP and DNS is included.

Dependents:   mBuino_ENC28_MQTT Nucleo_Web_ENC28J60 Nucleo_Web_ENC28J60_ADC Serial_over_Ethernet ... more

Library for ENC28J60 Ethernet modules.

/media/uploads/hudakz/enc28j60_module01.jpg

Ported to mbed from Norbert Truchsess's UIPEthernet library for Arduino. Thank you Norbert!

  • Full support for persistent (streaming) TCP/IP and UDP connections Client and Server each, ARP, ICMP, DHCP and DNS.
  • Works with both Mbed OS 2 and Mbed OS 5.

Usage:

  • Import the library into your project.
  • Add #include "UipEthernet.h" to main.cpp
  • Create one instance of the UipEthernet class initialized with the MAC address you'd like to use and SPI pins of the connected Mbed board.

Example programs:

Import programWebSwitch_ENC28J60

HTTP Server serving a simple webpage which enables to remotely turn a digital output on/off. Compile, download, run and type 'IP_address/secret/' (don't forget the last '/') into your web browser and hit ENTER.

Import programHTTPServer_Echo_ENC28J60

A simple HTTP server echoing received requests. Ethernet connection is over an ENC28J60 board. Usage: Type the server's IP address into you web browser and hit <ENTER>.

Import programTcpServer_ENC28J60

Simple TCP/IP Server using the UIPEthernet library for ENC28J60 Ethernet boards.

Import programTcpClient_ENC28J60

Simple TCP/IP Client using the UIPEthernet library for ENC28J60 Ethernet boards.

Import programUdpServer_ENC28J60

Simple UDP Server using the UIPEthernet library for ENC28J60 Ethernet boards.

Import programUdpClient_ENC28J60

Simple UDP Client using the UIPEthernet library for ENC28J60 Ethernet boards.

Import programMQTT_Hello_ENC28J60

MQTT Client example program. Ethernet connection is via an ENC28J60 module.

Committer:
hudakz
Date:
Thu Jul 23 15:30:54 2020 +0000
Revision:
18:8d5738a6646e
Parent:
16:269f652b4d0b
Mbed library for ENC28J60 Ethernet modules.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
hudakz 9:a156d3de5647 1 /*
hudakz 9:a156d3de5647 2 Enc28J60Network.cpp
hudakz 9:a156d3de5647 3 UIPEthernet network driver for Microchip ENC28J60 Ethernet Interface.
hudakz 9:a156d3de5647 4
hudakz 9:a156d3de5647 5 Copyright (c) 2013 Norbert Truchsess <norbert.truchsess@t-online.de>
hudakz 9:a156d3de5647 6 All rights reserved.
hudakz 9:a156d3de5647 7
hudakz 9:a156d3de5647 8 based on enc28j60.c file from the AVRlib library by Pascal Stang.
hudakz 9:a156d3de5647 9 For AVRlib See http://www.procyonengineering.com/
hudakz 9:a156d3de5647 10
hudakz 9:a156d3de5647 11 Modified (ported to mbed) by Zoltan Hudak <hudakz@inbox.com>
hudakz 9:a156d3de5647 12
hudakz 9:a156d3de5647 13 This program is free software: you can redistribute it and/or modify
hudakz 9:a156d3de5647 14 it under the terms of the GNU General Public License as published by
hudakz 9:a156d3de5647 15 the Free Software Foundation, either version 3 of the License, or
hudakz 9:a156d3de5647 16 (at your option) any later version.
hudakz 9:a156d3de5647 17
hudakz 9:a156d3de5647 18 This program is distributed in the hope that it will be useful,
hudakz 9:a156d3de5647 19 but WITHOUT ANY WARRANTY; without even the implied warranty of
hudakz 9:a156d3de5647 20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
hudakz 9:a156d3de5647 21 GNU General Public License for more details.
hudakz 9:a156d3de5647 22
hudakz 9:a156d3de5647 23 You should have received a copy of the GNU General Public License
hudakz 9:a156d3de5647 24 along with this program. If not, see <http://www.gnu.org/licenses/>.
hudakz 9:a156d3de5647 25 */
hudakz 11:647d53d146f1 26 #include "Enc28j60Eth.h"
hudakz 9:a156d3de5647 27 #include "mbed.h"
hudakz 16:269f652b4d0b 28 #include "mbed_version.h"
hudakz 9:a156d3de5647 29
hudakz 9:a156d3de5647 30 extern "C"
hudakz 9:a156d3de5647 31 {
hudakz 9:a156d3de5647 32 #include "enc28j60.h"
hudakz 9:a156d3de5647 33 #include "uip.h"
hudakz 9:a156d3de5647 34 }
hudakz 9:a156d3de5647 35
hudakz 9:a156d3de5647 36 // Static member initialization
hudakz 11:647d53d146f1 37 uint16_t Enc28j60Eth::nextPacketPtr;
hudakz 11:647d53d146f1 38 uint8_t Enc28j60Eth::bank = 0xff;
hudakz 11:647d53d146f1 39 struct memblock Enc28j60Eth::receivePkt;
hudakz 9:a156d3de5647 40
hudakz 9:a156d3de5647 41 /**
hudakz 9:a156d3de5647 42 * @brief
hudakz 9:a156d3de5647 43 * @note
hudakz 9:a156d3de5647 44 * @param
hudakz 9:a156d3de5647 45 * @retval
hudakz 9:a156d3de5647 46 */
hudakz 11:647d53d146f1 47 Enc28j60Eth::Enc28j60Eth(PinName mosi, PinName miso, PinName sclk, PinName cs) :
hudakz 9:a156d3de5647 48 MemPool(),
hudakz 9:a156d3de5647 49 _spi(mosi, miso, sclk),
hudakz 9:a156d3de5647 50 _cs(cs)
hudakz 9:a156d3de5647 51 { }
hudakz 9:a156d3de5647 52
hudakz 9:a156d3de5647 53 /**
hudakz 9:a156d3de5647 54 * @brief
hudakz 9:a156d3de5647 55 * @note
hudakz 9:a156d3de5647 56 * @param
hudakz 9:a156d3de5647 57 * @retval
hudakz 9:a156d3de5647 58 */
hudakz 11:647d53d146f1 59 void Enc28j60Eth::init(uint8_t* macaddr)
hudakz 9:a156d3de5647 60 {
hudakz 15:53715cc81c63 61 MemPool::init(); // 1 byte in between RX_STOP_INIT and pool to allow prepending of controlbyte
hudakz 15:53715cc81c63 62
hudakz 9:a156d3de5647 63 // initialize SPI interface
hudakz 15:53715cc81c63 64 _cs = 1;
hudakz 9:a156d3de5647 65 _spi.format(8, 0); // 8-bit, mode 0
hudakz 15:53715cc81c63 66 _spi.frequency(10000000); // 10 Mbit/s
hudakz 16:269f652b4d0b 67 #if MBED_MAJOR_VERSION == 2
hudakz 16:269f652b4d0b 68 wait_ms(100);
hudakz 16:269f652b4d0b 69 #else
hudakz 16:269f652b4d0b 70 thread_sleep_for(100);
hudakz 16:269f652b4d0b 71 #endif
hudakz 9:a156d3de5647 72
hudakz 9:a156d3de5647 73 // perform system reset
hudakz 9:a156d3de5647 74 writeOp(ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET);
hudakz 9:a156d3de5647 75
hudakz 9:a156d3de5647 76 // check CLKRDY bit to see if reset is complete
hudakz 15:53715cc81c63 77 // while(!(readReg(ESTAT) & ESTAT_CLKRDY));
hudakz 15:53715cc81c63 78 // The CLKRDY does not work. See Rev. B4 Silicon Errata point.
hudakz 15:53715cc81c63 79 // Just wait.
hudakz 16:269f652b4d0b 80 #if MBED_MAJOR_VERSION == 2
hudakz 9:a156d3de5647 81 wait_ms(50);
hudakz 16:269f652b4d0b 82 #else
hudakz 16:269f652b4d0b 83 thread_sleep_for(50);
hudakz 16:269f652b4d0b 84 #endif
hudakz 9:a156d3de5647 85
hudakz 9:a156d3de5647 86 // do bank 0 stuff
hudakz 9:a156d3de5647 87 // initialize receive buffer
hudakz 9:a156d3de5647 88 // 16-bit transfers, must write low byte first
hudakz 9:a156d3de5647 89 // set receive buffer start address
hudakz 9:a156d3de5647 90 nextPacketPtr = RXSTART_INIT;
hudakz 9:a156d3de5647 91
hudakz 9:a156d3de5647 92 // Rx start
hudakz 9:a156d3de5647 93 writeRegPair(ERXSTL, RXSTART_INIT);
hudakz 9:a156d3de5647 94
hudakz 9:a156d3de5647 95 // set receive pointer address
hudakz 9:a156d3de5647 96 writeRegPair(ERXRDPTL, RXSTART_INIT);
hudakz 9:a156d3de5647 97
hudakz 9:a156d3de5647 98 // RX end
hudakz 11:647d53d146f1 99 writeRegPair(ERXNDL, RXEND_INIT);
hudakz 9:a156d3de5647 100
hudakz 11:647d53d146f1 101 //All memory which is not used by the receive buffer is considered the transmission buffer.
hudakz 11:647d53d146f1 102 // No explicit action is required to initialize the transmission buffer.
hudakz 9:a156d3de5647 103 // TX start
hudakz 9:a156d3de5647 104 //writeRegPair(ETXSTL, TXSTART_INIT);
hudakz 9:a156d3de5647 105 // TX end
hudakz 11:647d53d146f1 106 //writeRegPair(ETXNDL, TXEND_INIT);
hudakz 15:53715cc81c63 107 // However, he host controller should leave at least seven bytes between each
hudakz 15:53715cc81c63 108 // packet and the beginning of the receive buffer.
hudakz 11:647d53d146f1 109
hudakz 9:a156d3de5647 110 // do bank 1 stuff, packet filter:
hudakz 9:a156d3de5647 111 // For broadcast packets we allow only ARP packtets
hudakz 9:a156d3de5647 112 // All other packets should be unicast only for our mac (MAADR)
hudakz 9:a156d3de5647 113 //
hudakz 15:53715cc81c63 114 // The pattern to match is therefore
hudakz 9:a156d3de5647 115 // Type ETH.DST
hudakz 9:a156d3de5647 116 // ARP BROADCAST
hudakz 9:a156d3de5647 117 // 06 08 -- ff ff ff ff ff ff -> ip checksum for theses bytes=f7f9
hudakz 9:a156d3de5647 118 // in binary these poitions are:11 0000 0011 1111
hudakz 9:a156d3de5647 119 // This is hex 303F->EPMM0=0x3f,EPMM1=0x30
hudakz 9:a156d3de5647 120 //TODO define specific pattern to receive dhcp-broadcast packages instead of setting ERFCON_BCEN!
hudakz 9:a156d3de5647 121 writeReg(ERXFCON, ERXFCON_UCEN | ERXFCON_CRCEN | ERXFCON_PMEN | ERXFCON_BCEN);
hudakz 9:a156d3de5647 122 writeRegPair(EPMM0, 0x303f);
hudakz 9:a156d3de5647 123 writeRegPair(EPMCSL, 0xf7f9);
hudakz 9:a156d3de5647 124
hudakz 9:a156d3de5647 125 //
hudakz 9:a156d3de5647 126 //
hudakz 11:647d53d146f1 127 // do bank 2 stuff,
hudakz 9:a156d3de5647 128 // enable MAC receive
hudakz 9:a156d3de5647 129 // and bring MAC out of reset (writes 0x00 to MACON2)
hudakz 9:a156d3de5647 130 writeRegPair(MACON1, MACON1_MARXEN | MACON1_TXPAUS | MACON1_RXPAUS);
hudakz 9:a156d3de5647 131
hudakz 9:a156d3de5647 132 // enable automatic padding to 60bytes and CRC operations
hudakz 9:a156d3de5647 133 writeOp(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0 | MACON3_TXCRCEN | MACON3_FRMLNEN);
hudakz 9:a156d3de5647 134
hudakz 9:a156d3de5647 135 // set inter-frame gap (non-back-to-back)
hudakz 9:a156d3de5647 136 writeRegPair(MAIPGL, 0x0C12);
hudakz 9:a156d3de5647 137
hudakz 9:a156d3de5647 138 // set inter-frame gap (back-to-back)
hudakz 9:a156d3de5647 139 writeReg(MABBIPG, 0x12);
hudakz 9:a156d3de5647 140
hudakz 9:a156d3de5647 141 // Set the maximum packet size which the controller will accept
hudakz 9:a156d3de5647 142 // Do not send packets longer than MAX_FRAMELEN:
hudakz 9:a156d3de5647 143 writeRegPair(MAMXFLL, MAX_FRAMELEN);
hudakz 9:a156d3de5647 144
hudakz 9:a156d3de5647 145 // do bank 3 stuff
hudakz 9:a156d3de5647 146 // write MAC address
hudakz 9:a156d3de5647 147 // NOTE: MAC address in ENC28J60 is byte-backward
hudakz 9:a156d3de5647 148 writeReg(MAADR5, macaddr[0]);
hudakz 9:a156d3de5647 149 writeReg(MAADR4, macaddr[1]);
hudakz 9:a156d3de5647 150 writeReg(MAADR3, macaddr[2]);
hudakz 9:a156d3de5647 151 writeReg(MAADR2, macaddr[3]);
hudakz 9:a156d3de5647 152 writeReg(MAADR1, macaddr[4]);
hudakz 9:a156d3de5647 153 writeReg(MAADR0, macaddr[5]);
hudakz 9:a156d3de5647 154
hudakz 9:a156d3de5647 155 // no loopback of transmitted frames
hudakz 9:a156d3de5647 156 phyWrite(PHCON2, PHCON2_HDLDIS);
hudakz 9:a156d3de5647 157
hudakz 9:a156d3de5647 158 // switch to bank 0
hudakz 9:a156d3de5647 159 setBank(ECON1);
hudakz 9:a156d3de5647 160
hudakz 9:a156d3de5647 161 // enable interrutps
hudakz 9:a156d3de5647 162 writeOp(ENC28J60_BIT_FIELD_SET, EIE, EIE_INTIE | EIE_PKTIE);
hudakz 9:a156d3de5647 163
hudakz 9:a156d3de5647 164 // enable packet reception
hudakz 9:a156d3de5647 165 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
hudakz 9:a156d3de5647 166
hudakz 9:a156d3de5647 167 //Configure leds
hudakz 9:a156d3de5647 168 phyWrite(PHLCON, 0x476);
hudakz 9:a156d3de5647 169 }
hudakz 9:a156d3de5647 170
hudakz 9:a156d3de5647 171 /**
hudakz 9:a156d3de5647 172 * @brief
hudakz 9:a156d3de5647 173 * @note
hudakz 9:a156d3de5647 174 * @param
hudakz 9:a156d3de5647 175 * @retval
hudakz 9:a156d3de5647 176 */
hudakz 11:647d53d146f1 177 memhandle Enc28j60Eth::receivePacket()
hudakz 9:a156d3de5647 178 {
hudakz 9:a156d3de5647 179 uint8_t rxstat;
hudakz 9:a156d3de5647 180 uint16_t len;
hudakz 9:a156d3de5647 181 // check if a packet has been received and buffered
hudakz 9:a156d3de5647 182 //if( !(readReg(EIR) & EIR_PKTIF) ){
hudakz 9:a156d3de5647 183 // The above does not work. See Rev. B4 Silicon Errata point 6.
hudakz 9:a156d3de5647 184 if (readReg(EPKTCNT) != 0) {
hudakz 9:a156d3de5647 185 uint16_t readPtr = nextPacketPtr +
hudakz 11:647d53d146f1 186 6 > RXEND_INIT ? nextPacketPtr +
hudakz 9:a156d3de5647 187 6 -
hudakz 11:647d53d146f1 188 RXEND_INIT +
hudakz 9:a156d3de5647 189 RXSTART_INIT : nextPacketPtr +
hudakz 9:a156d3de5647 190 6;
hudakz 9:a156d3de5647 191 // Set the read pointer to the start of the received packet
hudakz 9:a156d3de5647 192 writeRegPair(ERDPTL, nextPacketPtr);
hudakz 9:a156d3de5647 193
hudakz 9:a156d3de5647 194 // read the next packet pointer
hudakz 9:a156d3de5647 195 nextPacketPtr = readOp(ENC28J60_READ_BUF_MEM, 0);
hudakz 9:a156d3de5647 196 nextPacketPtr |= readOp(ENC28J60_READ_BUF_MEM, 0) << 8;
hudakz 9:a156d3de5647 197
hudakz 9:a156d3de5647 198 // read the packet length (see datasheet page 43)
hudakz 9:a156d3de5647 199 len = readOp(ENC28J60_READ_BUF_MEM, 0);
hudakz 9:a156d3de5647 200 len |= readOp(ENC28J60_READ_BUF_MEM, 0) << 8;
hudakz 9:a156d3de5647 201 len -= 4; //remove the CRC count
hudakz 9:a156d3de5647 202 // read the receive status (see datasheet page 43)
hudakz 9:a156d3de5647 203 rxstat = readOp(ENC28J60_READ_BUF_MEM, 0);
hudakz 9:a156d3de5647 204
hudakz 9:a156d3de5647 205 //rxstat |= readOp(ENC28J60_READ_BUF_MEM, 0) << 8;
hudakz 9:a156d3de5647 206 #ifdef ENC28J60DEBUG
hudakz 9:a156d3de5647 207 printf
hudakz 9:a156d3de5647 208 (
hudakz 9:a156d3de5647 209 "receivePacket [%d-%d], next: %d, stat: %d, count: %d -> ",
hudakz 9:a156d3de5647 210 readPtr,
hudakz 11:647d53d146f1 211 (readPtr + len) % (RXEND_INIT + 1),
hudakz 9:a156d3de5647 212 nextPacketPtr,
hudakz 9:a156d3de5647 213 rxstat,
hudakz 9:a156d3de5647 214 readReg(EPKTCNT)
hudakz 9:a156d3de5647 215 );
hudakz 9:a156d3de5647 216 (rxstat & 0x80) != 0 ? printf("OK") : printf("failed");
hudakz 9:a156d3de5647 217 printf("\r\n");
hudakz 9:a156d3de5647 218 #endif
hudakz 9:a156d3de5647 219 // decrement the packet counter indicate we are done with this packet
hudakz 9:a156d3de5647 220
hudakz 9:a156d3de5647 221 writeOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PKTDEC);
hudakz 9:a156d3de5647 222
hudakz 9:a156d3de5647 223 // check CRC and symbol errors (see datasheet page 44, table 7-3):
hudakz 9:a156d3de5647 224 // The ERXFCON.CRCEN is set by default. Normally we should not
hudakz 9:a156d3de5647 225 // need to check this.
hudakz 9:a156d3de5647 226 if ((rxstat & 0x80) != 0) {
hudakz 9:a156d3de5647 227 receivePkt.begin = readPtr;
hudakz 9:a156d3de5647 228 receivePkt.size = len;
hudakz 9:a156d3de5647 229 return UIP_RECEIVEBUFFERHANDLE;
hudakz 9:a156d3de5647 230 }
hudakz 9:a156d3de5647 231
hudakz 9:a156d3de5647 232 // Move the RX read pointer to the start of the next received packet
hudakz 9:a156d3de5647 233 // This frees the memory we just read out
hudakz 9:a156d3de5647 234 setERXRDPT();
hudakz 9:a156d3de5647 235 }
hudakz 9:a156d3de5647 236
hudakz 9:a156d3de5647 237 return(NOBLOCK);
hudakz 9:a156d3de5647 238 }
hudakz 9:a156d3de5647 239
hudakz 9:a156d3de5647 240 /**
hudakz 9:a156d3de5647 241 * @brief
hudakz 9:a156d3de5647 242 * @note
hudakz 9:a156d3de5647 243 * @param
hudakz 9:a156d3de5647 244 * @retval
hudakz 9:a156d3de5647 245 */
hudakz 11:647d53d146f1 246 void Enc28j60Eth::setERXRDPT()
hudakz 9:a156d3de5647 247 {
hudakz 11:647d53d146f1 248 writeRegPair(ERXRDPTL, nextPacketPtr == RXSTART_INIT ? RXEND_INIT : nextPacketPtr - 1);
hudakz 9:a156d3de5647 249 }
hudakz 9:a156d3de5647 250
hudakz 9:a156d3de5647 251 /**
hudakz 9:a156d3de5647 252 * @brief
hudakz 9:a156d3de5647 253 * @note
hudakz 9:a156d3de5647 254 * @param
hudakz 9:a156d3de5647 255 * @retval
hudakz 9:a156d3de5647 256 */
hudakz 14:7648334eb41b 257 size_t Enc28j60Eth::blockSize(memhandle handle)
hudakz 9:a156d3de5647 258 {
hudakz 9:a156d3de5647 259 return handle == NOBLOCK ? 0 : handle == UIP_RECEIVEBUFFERHANDLE ? receivePkt.size : blocks[handle].size;
hudakz 9:a156d3de5647 260 }
hudakz 9:a156d3de5647 261
hudakz 9:a156d3de5647 262 /**
hudakz 9:a156d3de5647 263 * @brief
hudakz 9:a156d3de5647 264 * @note
hudakz 9:a156d3de5647 265 * @param
hudakz 9:a156d3de5647 266 * @retval
hudakz 9:a156d3de5647 267 */
hudakz 11:647d53d146f1 268 void Enc28j60Eth::sendPacket(memhandle handle)
hudakz 9:a156d3de5647 269 {
hudakz 9:a156d3de5647 270 memblock* packet = &blocks[handle];
hudakz 9:a156d3de5647 271 uint16_t start = packet->begin - 1;
hudakz 9:a156d3de5647 272 uint16_t end = start + packet->size;
hudakz 9:a156d3de5647 273
hudakz 9:a156d3de5647 274 // backup data at control-byte position
hudakz 9:a156d3de5647 275 uint8_t data = readByte(start);
hudakz 9:a156d3de5647 276 // write control-byte (if not 0 anyway)
hudakz 9:a156d3de5647 277 if (data)
hudakz 9:a156d3de5647 278 writeByte(start, 0);
hudakz 9:a156d3de5647 279
hudakz 9:a156d3de5647 280 #ifdef ENC28J60DEBUG
hudakz 9:a156d3de5647 281 printf("sendPacket(%d) [%d-%d]: ", handle, start, end);
hudakz 9:a156d3de5647 282 for (uint16_t i = start; i <= end; i++) {
hudakz 9:a156d3de5647 283 printf("%d ", readByte(i));
hudakz 9:a156d3de5647 284 }
hudakz 9:a156d3de5647 285
hudakz 9:a156d3de5647 286 printf("\r\n");
hudakz 9:a156d3de5647 287 #endif
hudakz 9:a156d3de5647 288 // TX start
hudakz 9:a156d3de5647 289
hudakz 9:a156d3de5647 290 writeRegPair(ETXSTL, start);
hudakz 9:a156d3de5647 291
hudakz 9:a156d3de5647 292 // Set the TXND pointer to correspond to the packet size given
hudakz 9:a156d3de5647 293 writeRegPair(ETXNDL, end);
hudakz 9:a156d3de5647 294
hudakz 9:a156d3de5647 295 // send the contents of the transmit buffer onto the network
hudakz 9:a156d3de5647 296 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_TXRTS);
hudakz 9:a156d3de5647 297
hudakz 9:a156d3de5647 298 // Reset the transmit logic problem. See Rev. B4 Silicon Errata point 12.
hudakz 9:a156d3de5647 299 if ((readReg(EIR) & EIR_TXERIF)) {
hudakz 9:a156d3de5647 300 writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_TXRTS);
hudakz 9:a156d3de5647 301 }
hudakz 9:a156d3de5647 302
hudakz 9:a156d3de5647 303 //restore data on control-byte position
hudakz 9:a156d3de5647 304 if (data)
hudakz 9:a156d3de5647 305 writeByte(start, data);
hudakz 9:a156d3de5647 306 }
hudakz 9:a156d3de5647 307
hudakz 9:a156d3de5647 308 /**
hudakz 9:a156d3de5647 309 * @brief
hudakz 9:a156d3de5647 310 * @note
hudakz 9:a156d3de5647 311 * @param
hudakz 9:a156d3de5647 312 * @retval
hudakz 9:a156d3de5647 313 */
hudakz 11:647d53d146f1 314 uint16_t Enc28j60Eth::setReadPtr(memhandle handle, memaddress position, uint16_t len)
hudakz 9:a156d3de5647 315 {
hudakz 9:a156d3de5647 316 memblock* packet = handle == UIP_RECEIVEBUFFERHANDLE ? &receivePkt : &blocks[handle];
hudakz 9:a156d3de5647 317 memaddress start = handle == UIP_RECEIVEBUFFERHANDLE &&
hudakz 9:a156d3de5647 318 packet->begin +
hudakz 11:647d53d146f1 319 position > RXEND_INIT ? packet->begin +
hudakz 9:a156d3de5647 320 position -
hudakz 11:647d53d146f1 321 RXEND_INIT +
hudakz 9:a156d3de5647 322 RXSTART_INIT : packet->begin +
hudakz 9:a156d3de5647 323 position;
hudakz 9:a156d3de5647 324
hudakz 9:a156d3de5647 325 writeRegPair(ERDPTL, start);
hudakz 9:a156d3de5647 326
hudakz 9:a156d3de5647 327 if (len > packet->size - position)
hudakz 9:a156d3de5647 328 len = packet->size - position;
hudakz 9:a156d3de5647 329 return len;
hudakz 9:a156d3de5647 330 }
hudakz 9:a156d3de5647 331
hudakz 9:a156d3de5647 332 /**
hudakz 9:a156d3de5647 333 * @brief
hudakz 9:a156d3de5647 334 * @note
hudakz 9:a156d3de5647 335 * @param
hudakz 9:a156d3de5647 336 * @retval
hudakz 9:a156d3de5647 337 */
hudakz 11:647d53d146f1 338 uint16_t Enc28j60Eth::readPacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len)
hudakz 9:a156d3de5647 339 {
hudakz 9:a156d3de5647 340 len = setReadPtr(handle, position, len);
hudakz 9:a156d3de5647 341 readBuffer(len, buffer);
hudakz 9:a156d3de5647 342 return len;
hudakz 9:a156d3de5647 343 }
hudakz 9:a156d3de5647 344
hudakz 9:a156d3de5647 345 /**
hudakz 9:a156d3de5647 346 * @brief
hudakz 9:a156d3de5647 347 * @note
hudakz 9:a156d3de5647 348 * @param
hudakz 9:a156d3de5647 349 * @retval
hudakz 9:a156d3de5647 350 */
hudakz 11:647d53d146f1 351 uint16_t Enc28j60Eth::writePacket(memhandle handle, memaddress position, uint8_t* buffer, uint16_t len)
hudakz 9:a156d3de5647 352 {
hudakz 9:a156d3de5647 353 memblock* packet = &blocks[handle];
hudakz 9:a156d3de5647 354 uint16_t start = packet->begin + position;
hudakz 9:a156d3de5647 355
hudakz 9:a156d3de5647 356 writeRegPair(EWRPTL, start);
hudakz 9:a156d3de5647 357
hudakz 9:a156d3de5647 358 if (len > packet->size - position)
hudakz 9:a156d3de5647 359 len = packet->size - position;
hudakz 9:a156d3de5647 360 writeBuffer(len, buffer);
hudakz 9:a156d3de5647 361 return len;
hudakz 9:a156d3de5647 362 }
hudakz 9:a156d3de5647 363
hudakz 9:a156d3de5647 364 /**
hudakz 9:a156d3de5647 365 * @brief
hudakz 9:a156d3de5647 366 * @note
hudakz 9:a156d3de5647 367 * @param
hudakz 9:a156d3de5647 368 * @retval
hudakz 9:a156d3de5647 369 */
hudakz 11:647d53d146f1 370 uint8_t Enc28j60Eth::readByte(uint16_t addr)
hudakz 9:a156d3de5647 371 {
hudakz 9:a156d3de5647 372 uint8_t result;
hudakz 9:a156d3de5647 373
hudakz 9:a156d3de5647 374 writeRegPair(ERDPTL, addr);
hudakz 9:a156d3de5647 375
hudakz 9:a156d3de5647 376 _cs = 0;
hudakz 9:a156d3de5647 377
hudakz 9:a156d3de5647 378 // issue read command
hudakz 9:a156d3de5647 379 _spi.write(ENC28J60_READ_BUF_MEM);
hudakz 9:a156d3de5647 380
hudakz 9:a156d3de5647 381 // read data
hudakz 9:a156d3de5647 382 result = _spi.write(0x00);
hudakz 15:53715cc81c63 383
hudakz 9:a156d3de5647 384 _cs = 1;
hudakz 15:53715cc81c63 385
hudakz 9:a156d3de5647 386 return(result);
hudakz 9:a156d3de5647 387 }
hudakz 9:a156d3de5647 388
hudakz 9:a156d3de5647 389 /**
hudakz 9:a156d3de5647 390 * @brief
hudakz 9:a156d3de5647 391 * @note
hudakz 9:a156d3de5647 392 * @param
hudakz 9:a156d3de5647 393 * @retval
hudakz 9:a156d3de5647 394 */
hudakz 11:647d53d146f1 395 void Enc28j60Eth::writeByte(uint16_t addr, uint8_t data)
hudakz 9:a156d3de5647 396 {
hudakz 9:a156d3de5647 397 writeRegPair(EWRPTL, addr);
hudakz 9:a156d3de5647 398
hudakz 9:a156d3de5647 399 _cs = 0;
hudakz 9:a156d3de5647 400
hudakz 9:a156d3de5647 401 // issue write command
hudakz 9:a156d3de5647 402 _spi.write(ENC28J60_WRITE_BUF_MEM);
hudakz 9:a156d3de5647 403
hudakz 9:a156d3de5647 404 // write data
hudakz 9:a156d3de5647 405 _spi.write(data);
hudakz 15:53715cc81c63 406
hudakz 9:a156d3de5647 407 _cs = 1;
hudakz 9:a156d3de5647 408 }
hudakz 9:a156d3de5647 409
hudakz 9:a156d3de5647 410 /**
hudakz 9:a156d3de5647 411 * @brief
hudakz 9:a156d3de5647 412 * @note
hudakz 9:a156d3de5647 413 * @param
hudakz 9:a156d3de5647 414 * @retval
hudakz 9:a156d3de5647 415 */
hudakz 11:647d53d146f1 416 void Enc28j60Eth::copyPacket
hudakz 9:a156d3de5647 417 (
hudakz 9:a156d3de5647 418 memhandle dest_pkt,
hudakz 9:a156d3de5647 419 memaddress dest_pos,
hudakz 9:a156d3de5647 420 memhandle src_pkt,
hudakz 9:a156d3de5647 421 memaddress src_pos,
hudakz 9:a156d3de5647 422 uint16_t len
hudakz 9:a156d3de5647 423 )
hudakz 9:a156d3de5647 424 {
hudakz 9:a156d3de5647 425 memblock* dest = &blocks[dest_pkt];
hudakz 9:a156d3de5647 426 memblock* src = src_pkt == UIP_RECEIVEBUFFERHANDLE ? &receivePkt : &blocks[src_pkt];
hudakz 9:a156d3de5647 427 memaddress start = src_pkt == UIP_RECEIVEBUFFERHANDLE &&
hudakz 9:a156d3de5647 428 src->begin +
hudakz 11:647d53d146f1 429 src_pos > RXEND_INIT ? src->begin +
hudakz 9:a156d3de5647 430 src_pos -
hudakz 11:647d53d146f1 431 RXEND_INIT +
hudakz 9:a156d3de5647 432 RXSTART_INIT : src->begin +
hudakz 9:a156d3de5647 433 src_pos;
hudakz 9:a156d3de5647 434 enc28j60_mempool_block_move_callback(dest->begin + dest_pos, start, len);
hudakz 9:a156d3de5647 435
hudakz 9:a156d3de5647 436 // Move the RX read pointer to the start of the next received packet
hudakz 9:a156d3de5647 437 // This frees the memory we just read out
hudakz 11:647d53d146f1 438 //setERXRDPT();
hudakz 9:a156d3de5647 439 }
hudakz 9:a156d3de5647 440
hudakz 9:a156d3de5647 441 /**
hudakz 9:a156d3de5647 442 * @brief
hudakz 9:a156d3de5647 443 * @note
hudakz 9:a156d3de5647 444 * @param
hudakz 9:a156d3de5647 445 * @retval
hudakz 9:a156d3de5647 446 */
hudakz 11:647d53d146f1 447 void Enc28j60Eth::freePacket()
hudakz 9:a156d3de5647 448 {
hudakz 9:a156d3de5647 449 setERXRDPT();
hudakz 9:a156d3de5647 450 }
hudakz 9:a156d3de5647 451
hudakz 9:a156d3de5647 452 /**
hudakz 9:a156d3de5647 453 * @brief
hudakz 9:a156d3de5647 454 * @note
hudakz 9:a156d3de5647 455 * @param
hudakz 9:a156d3de5647 456 * @retval
hudakz 9:a156d3de5647 457 */
hudakz 11:647d53d146f1 458 uint8_t Enc28j60Eth::readOp(uint8_t op, uint8_t address)
hudakz 9:a156d3de5647 459 {
hudakz 9:a156d3de5647 460 uint8_t result;
hudakz 9:a156d3de5647 461
hudakz 9:a156d3de5647 462 _cs = 0;
hudakz 9:a156d3de5647 463
hudakz 9:a156d3de5647 464 // issue read command
hudakz 9:a156d3de5647 465 _spi.write(op | (address & ADDR_MASK));
hudakz 9:a156d3de5647 466
hudakz 9:a156d3de5647 467 // read data
hudakz 9:a156d3de5647 468 result = _spi.write(0x00);
hudakz 9:a156d3de5647 469
hudakz 9:a156d3de5647 470 // do dummy read if needed (for mac and mii, see datasheet page 29)
hudakz 9:a156d3de5647 471 if (address & 0x80)
hudakz 9:a156d3de5647 472 result = _spi.write(0x00);
hudakz 9:a156d3de5647 473
hudakz 9:a156d3de5647 474 _cs = 1;
hudakz 9:a156d3de5647 475 return(result);
hudakz 9:a156d3de5647 476 }
hudakz 9:a156d3de5647 477
hudakz 9:a156d3de5647 478 /**
hudakz 9:a156d3de5647 479 * @brief
hudakz 9:a156d3de5647 480 * @note
hudakz 9:a156d3de5647 481 * @param
hudakz 9:a156d3de5647 482 * @retval
hudakz 9:a156d3de5647 483 */
hudakz 11:647d53d146f1 484 void Enc28j60Eth::writeOp(uint8_t op, uint8_t address, uint8_t data)
hudakz 9:a156d3de5647 485 {
hudakz 9:a156d3de5647 486 _cs = 0;
hudakz 9:a156d3de5647 487
hudakz 9:a156d3de5647 488 // issue write command
hudakz 9:a156d3de5647 489 _spi.write(op | (address & ADDR_MASK));
hudakz 9:a156d3de5647 490
hudakz 9:a156d3de5647 491 // write data
hudakz 9:a156d3de5647 492 _spi.write(data);
hudakz 15:53715cc81c63 493
hudakz 9:a156d3de5647 494 _cs = 1;
hudakz 9:a156d3de5647 495 }
hudakz 9:a156d3de5647 496
hudakz 9:a156d3de5647 497 /**
hudakz 9:a156d3de5647 498 * @brief
hudakz 9:a156d3de5647 499 * @note
hudakz 9:a156d3de5647 500 * @param
hudakz 9:a156d3de5647 501 * @retval
hudakz 9:a156d3de5647 502 */
hudakz 11:647d53d146f1 503 void Enc28j60Eth::readBuffer(uint16_t len, uint8_t* data)
hudakz 9:a156d3de5647 504 {
hudakz 9:a156d3de5647 505 _cs = 0;
hudakz 9:a156d3de5647 506
hudakz 9:a156d3de5647 507 // issue read command
hudakz 9:a156d3de5647 508 _spi.write(ENC28J60_READ_BUF_MEM);
hudakz 15:53715cc81c63 509
hudakz 15:53715cc81c63 510 // read data
hudakz 9:a156d3de5647 511 while (len) {
hudakz 9:a156d3de5647 512 len--;
hudakz 9:a156d3de5647 513 *data = _spi.write(0x00);
hudakz 9:a156d3de5647 514 data++;
hudakz 9:a156d3de5647 515 }
hudakz 9:a156d3de5647 516
hudakz 9:a156d3de5647 517 *data = '\0';
hudakz 15:53715cc81c63 518
hudakz 9:a156d3de5647 519 _cs = 1;
hudakz 9:a156d3de5647 520 }
hudakz 9:a156d3de5647 521
hudakz 9:a156d3de5647 522 /**
hudakz 9:a156d3de5647 523 * @brief
hudakz 9:a156d3de5647 524 * @note
hudakz 9:a156d3de5647 525 * @param
hudakz 9:a156d3de5647 526 * @retval
hudakz 9:a156d3de5647 527 */
hudakz 11:647d53d146f1 528 void Enc28j60Eth::writeBuffer(uint16_t len, uint8_t* data)
hudakz 9:a156d3de5647 529 {
hudakz 9:a156d3de5647 530 _cs = 0;
hudakz 9:a156d3de5647 531
hudakz 9:a156d3de5647 532 // issue write command
hudakz 9:a156d3de5647 533 _spi.write(ENC28J60_WRITE_BUF_MEM);
hudakz 15:53715cc81c63 534
hudakz 15:53715cc81c63 535 // write data
hudakz 9:a156d3de5647 536 while (len) {
hudakz 9:a156d3de5647 537 len--;
hudakz 9:a156d3de5647 538 _spi.write(*data);
hudakz 9:a156d3de5647 539 data++;
hudakz 9:a156d3de5647 540 }
hudakz 9:a156d3de5647 541
hudakz 9:a156d3de5647 542 _cs = 1;
hudakz 9:a156d3de5647 543 }
hudakz 9:a156d3de5647 544
hudakz 9:a156d3de5647 545 /**
hudakz 9:a156d3de5647 546 * @brief
hudakz 9:a156d3de5647 547 * @note
hudakz 9:a156d3de5647 548 * @param
hudakz 9:a156d3de5647 549 * @retval
hudakz 9:a156d3de5647 550 */
hudakz 11:647d53d146f1 551 void Enc28j60Eth::setBank(uint8_t address)
hudakz 9:a156d3de5647 552 {
hudakz 9:a156d3de5647 553 // set the bank (if needed)
hudakz 9:a156d3de5647 554 if ((address & BANK_MASK) != bank) {
hudakz 9:a156d3de5647 555 // set the bank
hudakz 9:a156d3de5647 556 writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, (ECON1_BSEL1 | ECON1_BSEL0));
hudakz 9:a156d3de5647 557 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, (address & BANK_MASK) >> 5);
hudakz 9:a156d3de5647 558 bank = (address & BANK_MASK);
hudakz 9:a156d3de5647 559 }
hudakz 9:a156d3de5647 560 }
hudakz 9:a156d3de5647 561
hudakz 9:a156d3de5647 562 /**
hudakz 9:a156d3de5647 563 * @brief
hudakz 9:a156d3de5647 564 * @note
hudakz 9:a156d3de5647 565 * @param
hudakz 9:a156d3de5647 566 * @retval
hudakz 9:a156d3de5647 567 */
hudakz 11:647d53d146f1 568 uint8_t Enc28j60Eth::readReg(uint8_t address)
hudakz 9:a156d3de5647 569 {
hudakz 9:a156d3de5647 570 // set the bank
hudakz 9:a156d3de5647 571 setBank(address);
hudakz 9:a156d3de5647 572
hudakz 9:a156d3de5647 573 // do the read
hudakz 9:a156d3de5647 574 return readOp(ENC28J60_READ_CTRL_REG, address);
hudakz 9:a156d3de5647 575 }
hudakz 9:a156d3de5647 576
hudakz 9:a156d3de5647 577 /**
hudakz 9:a156d3de5647 578 * @brief
hudakz 9:a156d3de5647 579 * @note
hudakz 9:a156d3de5647 580 * @param
hudakz 9:a156d3de5647 581 * @retval
hudakz 9:a156d3de5647 582 */
hudakz 11:647d53d146f1 583 void Enc28j60Eth::writeReg(uint8_t address, uint8_t data)
hudakz 9:a156d3de5647 584 {
hudakz 9:a156d3de5647 585 // set the bank
hudakz 9:a156d3de5647 586 setBank(address);
hudakz 9:a156d3de5647 587
hudakz 9:a156d3de5647 588 // do the write
hudakz 9:a156d3de5647 589 writeOp(ENC28J60_WRITE_CTRL_REG, address, data);
hudakz 9:a156d3de5647 590 }
hudakz 9:a156d3de5647 591
hudakz 9:a156d3de5647 592 /**
hudakz 9:a156d3de5647 593 * @brief
hudakz 9:a156d3de5647 594 * @note
hudakz 9:a156d3de5647 595 * @param
hudakz 9:a156d3de5647 596 * @retval
hudakz 9:a156d3de5647 597 */
hudakz 11:647d53d146f1 598 void Enc28j60Eth::writeRegPair(uint8_t address, uint16_t data)
hudakz 9:a156d3de5647 599 {
hudakz 9:a156d3de5647 600 // set the bank
hudakz 9:a156d3de5647 601 setBank(address);
hudakz 9:a156d3de5647 602
hudakz 9:a156d3de5647 603 // do the write
hudakz 9:a156d3de5647 604 writeOp(ENC28J60_WRITE_CTRL_REG, address, (data & 0xFF));
hudakz 9:a156d3de5647 605 writeOp(ENC28J60_WRITE_CTRL_REG, address + 1, (data) >> 8);
hudakz 9:a156d3de5647 606 }
hudakz 9:a156d3de5647 607
hudakz 9:a156d3de5647 608 /**
hudakz 9:a156d3de5647 609 * @brief
hudakz 9:a156d3de5647 610 * @note
hudakz 9:a156d3de5647 611 * @param
hudakz 9:a156d3de5647 612 * @retval
hudakz 9:a156d3de5647 613 */
hudakz 11:647d53d146f1 614 void Enc28j60Eth::phyWrite(uint8_t address, uint16_t data)
hudakz 9:a156d3de5647 615 {
hudakz 9:a156d3de5647 616 // set the PHY register address
hudakz 9:a156d3de5647 617 writeReg(MIREGADR, address);
hudakz 9:a156d3de5647 618
hudakz 9:a156d3de5647 619 // write the PHY data
hudakz 9:a156d3de5647 620 writeRegPair(MIWRL, data);
hudakz 9:a156d3de5647 621
hudakz 9:a156d3de5647 622 // wait until the PHY write completes
hudakz 9:a156d3de5647 623 while (readReg(MISTAT) & MISTAT_BUSY) {
hudakz 9:a156d3de5647 624 wait_us(15);
hudakz 9:a156d3de5647 625 }
hudakz 9:a156d3de5647 626 }
hudakz 9:a156d3de5647 627
hudakz 9:a156d3de5647 628 /**
hudakz 9:a156d3de5647 629 * @brief
hudakz 9:a156d3de5647 630 * @note
hudakz 9:a156d3de5647 631 * @param
hudakz 9:a156d3de5647 632 * @retval
hudakz 9:a156d3de5647 633 */
hudakz 11:647d53d146f1 634 uint16_t Enc28j60Eth::phyRead(uint8_t address)
hudakz 9:a156d3de5647 635 {
hudakz 9:a156d3de5647 636 writeReg(MIREGADR, address);
hudakz 9:a156d3de5647 637 writeReg(MICMD, MICMD_MIIRD);
hudakz 9:a156d3de5647 638
hudakz 9:a156d3de5647 639 // wait until the PHY read completes
hudakz 9:a156d3de5647 640 while (readReg(MISTAT) & MISTAT_BUSY) {
hudakz 9:a156d3de5647 641 wait_us(15);
hudakz 9:a156d3de5647 642 } //and MIRDH
hudakz 9:a156d3de5647 643
hudakz 9:a156d3de5647 644 writeReg(MICMD, 0);
hudakz 9:a156d3de5647 645 return(readReg(MIRDL) | readReg(MIRDH) << 8);
hudakz 9:a156d3de5647 646 }
hudakz 9:a156d3de5647 647
hudakz 9:a156d3de5647 648 /**
hudakz 9:a156d3de5647 649 * @brief
hudakz 9:a156d3de5647 650 * @note
hudakz 9:a156d3de5647 651 * @param
hudakz 9:a156d3de5647 652 * @retval
hudakz 9:a156d3de5647 653 */
hudakz 11:647d53d146f1 654 void Enc28j60Eth::clkout(uint8_t clk)
hudakz 9:a156d3de5647 655 {
hudakz 9:a156d3de5647 656 //setup clkout: 2 is 12.5MHz:
hudakz 9:a156d3de5647 657 writeReg(ECOCON, clk & 0x7);
hudakz 9:a156d3de5647 658 }
hudakz 9:a156d3de5647 659
hudakz 9:a156d3de5647 660 // read the revision of the chip:
hudakz 11:647d53d146f1 661 uint8_t Enc28j60Eth::getrev()
hudakz 9:a156d3de5647 662 {
hudakz 9:a156d3de5647 663 return(readReg(EREVID));
hudakz 9:a156d3de5647 664 }
hudakz 9:a156d3de5647 665
hudakz 9:a156d3de5647 666 /**
hudakz 9:a156d3de5647 667 * @brief
hudakz 9:a156d3de5647 668 * @note
hudakz 9:a156d3de5647 669 * @param
hudakz 9:a156d3de5647 670 * @retval
hudakz 9:a156d3de5647 671 */
hudakz 11:647d53d146f1 672 uint16_t Enc28j60Eth::chksum(uint16_t sum, memhandle handle, memaddress pos, uint16_t len)
hudakz 9:a156d3de5647 673 {
hudakz 9:a156d3de5647 674 uint8_t spdr;
hudakz 9:a156d3de5647 675 uint16_t t;
hudakz 9:a156d3de5647 676 uint16_t i;
hudakz 9:a156d3de5647 677
hudakz 9:a156d3de5647 678 len = setReadPtr(handle, pos, len) - 1;
hudakz 9:a156d3de5647 679 _cs = 0;
hudakz 9:a156d3de5647 680
hudakz 9:a156d3de5647 681 // issue read command
hudakz 9:a156d3de5647 682 spdr = _spi.write(ENC28J60_READ_BUF_MEM);
hudakz 9:a156d3de5647 683 for (i = 0; i < len; i += 2) {
hudakz 9:a156d3de5647 684 // read data
hudakz 9:a156d3de5647 685 spdr = _spi.write(0x00);
hudakz 9:a156d3de5647 686 t = spdr << 8;
hudakz 9:a156d3de5647 687 spdr = _spi.write(0x00);
hudakz 9:a156d3de5647 688 t += spdr;
hudakz 9:a156d3de5647 689 sum += t;
hudakz 9:a156d3de5647 690 if (sum < t) {
hudakz 9:a156d3de5647 691 sum++; /* carry */
hudakz 9:a156d3de5647 692 }
hudakz 9:a156d3de5647 693 }
hudakz 9:a156d3de5647 694
hudakz 9:a156d3de5647 695 if (i == len) {
hudakz 9:a156d3de5647 696 spdr = _spi.write(0x00);
hudakz 9:a156d3de5647 697 t = (spdr << 8) + 0;
hudakz 9:a156d3de5647 698 sum += t;
hudakz 9:a156d3de5647 699 if (sum < t) {
hudakz 9:a156d3de5647 700 sum++; /* carry */
hudakz 9:a156d3de5647 701 }
hudakz 9:a156d3de5647 702 }
hudakz 9:a156d3de5647 703
hudakz 9:a156d3de5647 704 _cs = 1;
hudakz 9:a156d3de5647 705
hudakz 9:a156d3de5647 706 /* Return sum in host byte order. */
hudakz 9:a156d3de5647 707 return sum;
hudakz 9:a156d3de5647 708 }
hudakz 9:a156d3de5647 709
hudakz 9:a156d3de5647 710 /**
hudakz 9:a156d3de5647 711 * @brief
hudakz 9:a156d3de5647 712 * @note
hudakz 9:a156d3de5647 713 * @param
hudakz 9:a156d3de5647 714 * @retval
hudakz 9:a156d3de5647 715 */
hudakz 11:647d53d146f1 716 void Enc28j60Eth::powerOff()
hudakz 9:a156d3de5647 717 {
hudakz 9:a156d3de5647 718 writeOp(ENC28J60_BIT_FIELD_CLR, ECON1, ECON1_RXEN);
hudakz 16:269f652b4d0b 719 #if MBED_MAJOR_VERSION == 2
hudakz 9:a156d3de5647 720 wait_ms(50);
hudakz 16:269f652b4d0b 721 #else
hudakz 16:269f652b4d0b 722 thread_sleep_for(50);
hudakz 16:269f652b4d0b 723 #endif
hudakz 9:a156d3de5647 724 writeOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_VRPS);
hudakz 16:269f652b4d0b 725 #if MBED_MAJOR_VERSION == 2
hudakz 9:a156d3de5647 726 wait_ms(50);
hudakz 16:269f652b4d0b 727 #else
hudakz 16:269f652b4d0b 728 thread_sleep_for(50);
hudakz 16:269f652b4d0b 729 #endif
hudakz 9:a156d3de5647 730 writeOp(ENC28J60_BIT_FIELD_SET, ECON2, ECON2_PWRSV);
hudakz 9:a156d3de5647 731 }
hudakz 9:a156d3de5647 732
hudakz 9:a156d3de5647 733 /**
hudakz 9:a156d3de5647 734 * @brief
hudakz 9:a156d3de5647 735 * @note
hudakz 9:a156d3de5647 736 * @param
hudakz 9:a156d3de5647 737 * @retval
hudakz 9:a156d3de5647 738 */
hudakz 11:647d53d146f1 739 void Enc28j60Eth::powerOn()
hudakz 9:a156d3de5647 740 {
hudakz 9:a156d3de5647 741 writeOp(ENC28J60_BIT_FIELD_CLR, ECON2, ECON2_PWRSV);
hudakz 16:269f652b4d0b 742 #if MBED_MAJOR_VERSION == 2
hudakz 9:a156d3de5647 743 wait_ms(50);
hudakz 16:269f652b4d0b 744 #else
hudakz 16:269f652b4d0b 745 thread_sleep_for(50);
hudakz 16:269f652b4d0b 746 #endif
hudakz 9:a156d3de5647 747 writeOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
hudakz 16:269f652b4d0b 748 #if MBED_MAJOR_VERSION == 2
hudakz 9:a156d3de5647 749 wait_ms(50);
hudakz 16:269f652b4d0b 750 #else
hudakz 16:269f652b4d0b 751 thread_sleep_for(50);
hudakz 16:269f652b4d0b 752 #endif
hudakz 9:a156d3de5647 753 }
hudakz 9:a156d3de5647 754
hudakz 9:a156d3de5647 755 /**
hudakz 9:a156d3de5647 756 * @brief
hudakz 9:a156d3de5647 757 * @note
hudakz 9:a156d3de5647 758 * @param
hudakz 9:a156d3de5647 759 * @retval
hudakz 9:a156d3de5647 760 */
hudakz 11:647d53d146f1 761 bool Enc28j60Eth::linkStatus()
hudakz 9:a156d3de5647 762 {
hudakz 9:a156d3de5647 763 return(phyRead(PHSTAT2) & 0x0400) > 0;
hudakz 9:a156d3de5647 764 }