hisyam fs / Mbed 2 deprecated Test_all

tes ir atas semua

Dependencies:   mbed ADS1115 StepperMotor SRF05 TPA81new

AMG8833/AMG8833.h@42:3b682b7d0388, 2019-02-11 (annotated)

Committer:
hisyamfs
Date:
Mon Feb 11 12:49:36 2019 +0000
Revision:
42:3b682b7d0388
Ganti TPA81 dengan AMG8833

Who changed what in which revision?

UserRevisionLine numberNew contents of line
hisyamfs 42:3b682b7d0388 1 #ifndef LIB_ADAFRUIT_AMG88XX_H
hisyamfs 42:3b682b7d0388 2 #define LIB_ADAFRUIT_AMG88XX_H
hisyamfs 42:3b682b7d0388 3
hisyamfs 42:3b682b7d0388 4 #include "mbed.h"
hisyamfs 42:3b682b7d0388 5
hisyamfs 42:3b682b7d0388 6 /*=========================================================================
hisyamfs 42:3b682b7d0388 7 I2C ADDRESS/BITS
hisyamfs 42:3b682b7d0388 8 -----------------------------------------------------------------------*/
hisyamfs 42:3b682b7d0388 9 #define AMG88xx_ADDRESS (0x69 << 1)
hisyamfs 42:3b682b7d0388 10 /*=========================================================================*/
hisyamfs 42:3b682b7d0388 11
hisyamfs 42:3b682b7d0388 12 /*=========================================================================
hisyamfs 42:3b682b7d0388 13 REGISTERS
hisyamfs 42:3b682b7d0388 14 -----------------------------------------------------------------------*/
hisyamfs 42:3b682b7d0388 15 enum
hisyamfs 42:3b682b7d0388 16 {
hisyamfs 42:3b682b7d0388 17 AMG88xx_PCTL = 0x00,
hisyamfs 42:3b682b7d0388 18 AMG88xx_RST = 0x01,
hisyamfs 42:3b682b7d0388 19 AMG88xx_FPSC = 0x02,
hisyamfs 42:3b682b7d0388 20 AMG88xx_INTC = 0x03,
hisyamfs 42:3b682b7d0388 21 AMG88xx_STAT = 0x04,
hisyamfs 42:3b682b7d0388 22 AMG88xx_SCLR = 0x05,
hisyamfs 42:3b682b7d0388 23 //0x06 reserved
hisyamfs 42:3b682b7d0388 24 AMG88xx_AVE = 0x07,
hisyamfs 42:3b682b7d0388 25 AMG88xx_INTHL = 0x08,
hisyamfs 42:3b682b7d0388 26 AMG88xx_INTHH = 0x09,
hisyamfs 42:3b682b7d0388 27 AMG88xx_INTLL = 0x0A,
hisyamfs 42:3b682b7d0388 28 AMG88xx_INTLH = 0x0B,
hisyamfs 42:3b682b7d0388 29 AMG88xx_IHYSL = 0x0C,
hisyamfs 42:3b682b7d0388 30 AMG88xx_IHYSH = 0x0D,
hisyamfs 42:3b682b7d0388 31 AMG88xx_TTHL = 0x0E,
hisyamfs 42:3b682b7d0388 32 AMG88xx_TTHH = 0x0F,
hisyamfs 42:3b682b7d0388 33 AMG88xx_INT_OFFSET = 0x010,
hisyamfs 42:3b682b7d0388 34 AMG88xx_PIXEL_OFFSET = 0x80
hisyamfs 42:3b682b7d0388 35 };
hisyamfs 42:3b682b7d0388 36
hisyamfs 42:3b682b7d0388 37 enum power_modes{
hisyamfs 42:3b682b7d0388 38 AMG88xx_NORMAL_MODE = 0x00,
hisyamfs 42:3b682b7d0388 39 AMG88xx_SLEEP_MODE = 0x01,
hisyamfs 42:3b682b7d0388 40 AMG88xx_STAND_BY_60 = 0x20,
hisyamfs 42:3b682b7d0388 41 AMG88xx_STAND_BY_10 = 0x21
hisyamfs 42:3b682b7d0388 42 };
hisyamfs 42:3b682b7d0388 43
hisyamfs 42:3b682b7d0388 44 enum sw_resets {
hisyamfs 42:3b682b7d0388 45 AMG88xx_FLAG_RESET = 0x30,
hisyamfs 42:3b682b7d0388 46 AMG88xx_INITIAL_RESET = 0x3F
hisyamfs 42:3b682b7d0388 47 };
hisyamfs 42:3b682b7d0388 48
hisyamfs 42:3b682b7d0388 49 enum frame_rates {
hisyamfs 42:3b682b7d0388 50 AMG88xx_FPS_10 = 0x00,
hisyamfs 42:3b682b7d0388 51 AMG88xx_FPS_1 = 0x01
hisyamfs 42:3b682b7d0388 52 };
hisyamfs 42:3b682b7d0388 53
hisyamfs 42:3b682b7d0388 54 enum int_enables{
hisyamfs 42:3b682b7d0388 55 AMG88xx_INT_DISABLED = 0x00,
hisyamfs 42:3b682b7d0388 56 AMG88xx_INT_ENABLED = 0x01
hisyamfs 42:3b682b7d0388 57 };
hisyamfs 42:3b682b7d0388 58
hisyamfs 42:3b682b7d0388 59 enum int_modes {
hisyamfs 42:3b682b7d0388 60 AMG88xx_DIFFERENCE = 0x00,
hisyamfs 42:3b682b7d0388 61 AMG88xx_ABSOLUTE_VALUE = 0x01
hisyamfs 42:3b682b7d0388 62 };
hisyamfs 42:3b682b7d0388 63
hisyamfs 42:3b682b7d0388 64 /*=========================================================================*/
hisyamfs 42:3b682b7d0388 65
hisyamfs 42:3b682b7d0388 66 #define AMG88xx_PIXEL_ARRAY_SIZE 64
hisyamfs 42:3b682b7d0388 67 #define AMG88xx_PIXEL_TEMP_CONVERSION .25
hisyamfs 42:3b682b7d0388 68 #define AMG88xx_THERMISTOR_CONVERSION .0625
hisyamfs 42:3b682b7d0388 69
hisyamfs 42:3b682b7d0388 70 /**************************************************************************/
hisyamfs 42:3b682b7d0388 71 /*!
hisyamfs 42:3b682b7d0388 72 @brief Class that stores state and functions for interacting with AMG88xx IR sensor chips
hisyamfs 42:3b682b7d0388 73 */
hisyamfs 42:3b682b7d0388 74 /**************************************************************************/
hisyamfs 42:3b682b7d0388 75 class Adafruit_AMG88xx {
hisyamfs 42:3b682b7d0388 76 public:
hisyamfs 42:3b682b7d0388 77 //constructors
hisyamfs 42:3b682b7d0388 78 Adafruit_AMG88xx(PinName sda, PinName scl);
hisyamfs 42:3b682b7d0388 79
hisyamfs 42:3b682b7d0388 80 int begin(char addr = AMG88xx_ADDRESS);
hisyamfs 42:3b682b7d0388 81
hisyamfs 42:3b682b7d0388 82 void readPixels(float *buf, uint8_t size = AMG88xx_PIXEL_ARRAY_SIZE);
hisyamfs 42:3b682b7d0388 83 float readThermistor();
hisyamfs 42:3b682b7d0388 84
hisyamfs 42:3b682b7d0388 85 void setMovingAverageMode(int mode);
hisyamfs 42:3b682b7d0388 86
hisyamfs 42:3b682b7d0388 87 void enableInterrupt();
hisyamfs 42:3b682b7d0388 88 void disableInterrupt();
hisyamfs 42:3b682b7d0388 89 void setInterruptMode(uint8_t mode);
hisyamfs 42:3b682b7d0388 90 void getInterrupt(uint8_t *buf, uint8_t size = 8);
hisyamfs 42:3b682b7d0388 91 void clearInterrupt();
hisyamfs 42:3b682b7d0388 92
hisyamfs 42:3b682b7d0388 93 //this will automatically set hysteresis to 95% of the high value
hisyamfs 42:3b682b7d0388 94 void setInterruptLevels(float high, float low);
hisyamfs 42:3b682b7d0388 95
hisyamfs 42:3b682b7d0388 96 //this will manually set hysteresis
hisyamfs 42:3b682b7d0388 97 void setInterruptLevels(float high, float low, float hysteresis);
hisyamfs 42:3b682b7d0388 98
hisyamfs 42:3b682b7d0388 99 private:
hisyamfs 42:3b682b7d0388 100 char _i2caddr;
hisyamfs 42:3b682b7d0388 101
hisyamfs 42:3b682b7d0388 102 I2C _i2c;
hisyamfs 42:3b682b7d0388 103
hisyamfs 42:3b682b7d0388 104 void write8(uint8_t reg, uint8_t value);
hisyamfs 42:3b682b7d0388 105 void write16(uint8_t reg, uint16_t value);
hisyamfs 42:3b682b7d0388 106 uint8_t read8(uint8_t reg);
hisyamfs 42:3b682b7d0388 107
hisyamfs 42:3b682b7d0388 108 int read(uint8_t reg, uint8_t *buf, uint8_t num);
hisyamfs 42:3b682b7d0388 109 int write(uint8_t reg, uint8_t *buf, uint8_t num);
hisyamfs 42:3b682b7d0388 110 void _i2c_init();
hisyamfs 42:3b682b7d0388 111
hisyamfs 42:3b682b7d0388 112 float signedMag12ToFloat(uint16_t val);
hisyamfs 42:3b682b7d0388 113 float int12ToFloat(uint16_t val);
hisyamfs 42:3b682b7d0388 114
hisyamfs 42:3b682b7d0388 115 int constrain(int value, int min, int max);
hisyamfs 42:3b682b7d0388 116 int min(int val1, int val2);
hisyamfs 42:3b682b7d0388 117 int max(int val1, int val2);
hisyamfs 42:3b682b7d0388 118
hisyamfs 42:3b682b7d0388 119 uint8_t min(uint8_t val1, uint8_t val2);
hisyamfs 42:3b682b7d0388 120 uint8_t max(uint8_t val1, uint8_t val2);
hisyamfs 42:3b682b7d0388 121
hisyamfs 42:3b682b7d0388 122 // The power control register
hisyamfs 42:3b682b7d0388 123 struct pctl {
hisyamfs 42:3b682b7d0388 124 // 0x00 = Normal Mode
hisyamfs 42:3b682b7d0388 125 // 0x01 = Sleep Mode
hisyamfs 42:3b682b7d0388 126 // 0x20 = Stand-by mode (60 sec intermittence)
hisyamfs 42:3b682b7d0388 127 // 0x21 = Stand-by mode (10 sec intermittence)
hisyamfs 42:3b682b7d0388 128
hisyamfs 42:3b682b7d0388 129 uint8_t PCTL : 8;
hisyamfs 42:3b682b7d0388 130
hisyamfs 42:3b682b7d0388 131 uint8_t get() {
hisyamfs 42:3b682b7d0388 132 return PCTL;
hisyamfs 42:3b682b7d0388 133 }
hisyamfs 42:3b682b7d0388 134 };
hisyamfs 42:3b682b7d0388 135 pctl _pctl;
hisyamfs 42:3b682b7d0388 136
hisyamfs 42:3b682b7d0388 137 //reset register
hisyamfs 42:3b682b7d0388 138 struct rst {
hisyamfs 42:3b682b7d0388 139 //0x30 = flag reset (all clear status reg 0x04, interrupt flag and interrupt table)
hisyamfs 42:3b682b7d0388 140 //0x3F = initial reset (brings flag reset and returns to initial setting)
hisyamfs 42:3b682b7d0388 141
hisyamfs 42:3b682b7d0388 142 uint8_t RST : 8;
hisyamfs 42:3b682b7d0388 143
hisyamfs 42:3b682b7d0388 144 uint8_t get() {
hisyamfs 42:3b682b7d0388 145 return RST;
hisyamfs 42:3b682b7d0388 146 }
hisyamfs 42:3b682b7d0388 147 };
hisyamfs 42:3b682b7d0388 148 rst _rst;
hisyamfs 42:3b682b7d0388 149
hisyamfs 42:3b682b7d0388 150 //frame rate register
hisyamfs 42:3b682b7d0388 151 struct fpsc {
hisyamfs 42:3b682b7d0388 152
hisyamfs 42:3b682b7d0388 153 //0 = 10FPS
hisyamfs 42:3b682b7d0388 154 //1 = 1FPS
hisyamfs 42:3b682b7d0388 155 uint8_t FPS : 1;
hisyamfs 42:3b682b7d0388 156
hisyamfs 42:3b682b7d0388 157 uint8_t get() {
hisyamfs 42:3b682b7d0388 158 return FPS & 0x01;
hisyamfs 42:3b682b7d0388 159 }
hisyamfs 42:3b682b7d0388 160 };
hisyamfs 42:3b682b7d0388 161 fpsc _fpsc;
hisyamfs 42:3b682b7d0388 162
hisyamfs 42:3b682b7d0388 163 //interrupt control register
hisyamfs 42:3b682b7d0388 164 struct intc {
hisyamfs 42:3b682b7d0388 165
hisyamfs 42:3b682b7d0388 166 // 0 = INT output reactive (Hi-Z)
hisyamfs 42:3b682b7d0388 167 // 1 = INT output active
hisyamfs 42:3b682b7d0388 168 uint8_t INTEN : 1;
hisyamfs 42:3b682b7d0388 169
hisyamfs 42:3b682b7d0388 170 // 0 = Difference interrupt mode
hisyamfs 42:3b682b7d0388 171 // 1 = absolute value interrupt mode
hisyamfs 42:3b682b7d0388 172 uint8_t INTMOD : 1;
hisyamfs 42:3b682b7d0388 173
hisyamfs 42:3b682b7d0388 174 uint8_t get(){
hisyamfs 42:3b682b7d0388 175 return (INTMOD << 1 | INTEN) & 0x03;
hisyamfs 42:3b682b7d0388 176 }
hisyamfs 42:3b682b7d0388 177 };
hisyamfs 42:3b682b7d0388 178 intc _intc;
hisyamfs 42:3b682b7d0388 179
hisyamfs 42:3b682b7d0388 180 //status register
hisyamfs 42:3b682b7d0388 181 struct stat {
hisyamfs 42:3b682b7d0388 182 uint8_t unused : 1;
hisyamfs 42:3b682b7d0388 183 //interrupt outbreak (val of interrupt table reg)
hisyamfs 42:3b682b7d0388 184 uint8_t INTF : 1;
hisyamfs 42:3b682b7d0388 185
hisyamfs 42:3b682b7d0388 186 //temperature output overflow (val of temperature reg)
hisyamfs 42:3b682b7d0388 187 uint8_t OVF_IRS : 1;
hisyamfs 42:3b682b7d0388 188
hisyamfs 42:3b682b7d0388 189 //thermistor temperature output overflow (value of thermistor)
hisyamfs 42:3b682b7d0388 190 uint8_t OVF_THS : 1;
hisyamfs 42:3b682b7d0388 191
hisyamfs 42:3b682b7d0388 192 uint8_t get(){
hisyamfs 42:3b682b7d0388 193 return ( (OVF_THS << 3) | (OVF_IRS << 2) | (INTF << 1) ) & 0x0E;
hisyamfs 42:3b682b7d0388 194 }
hisyamfs 42:3b682b7d0388 195 };
hisyamfs 42:3b682b7d0388 196 stat _stat;
hisyamfs 42:3b682b7d0388 197
hisyamfs 42:3b682b7d0388 198 //status clear register
hisyamfs 42:3b682b7d0388 199 //write to clear overflow flag and interrupt flag
hisyamfs 42:3b682b7d0388 200 //after writing automatically turns to 0x00
hisyamfs 42:3b682b7d0388 201 struct sclr {
hisyamfs 42:3b682b7d0388 202 uint8_t unused : 1;
hisyamfs 42:3b682b7d0388 203 //interrupt flag clear
hisyamfs 42:3b682b7d0388 204 uint8_t INTCLR : 1;
hisyamfs 42:3b682b7d0388 205 //temp output overflow flag clear
hisyamfs 42:3b682b7d0388 206 uint8_t OVS_CLR : 1;
hisyamfs 42:3b682b7d0388 207 //thermistor temp output overflow flag clear
hisyamfs 42:3b682b7d0388 208 uint8_t OVT_CLR : 1;
hisyamfs 42:3b682b7d0388 209
hisyamfs 42:3b682b7d0388 210 uint8_t get(){
hisyamfs 42:3b682b7d0388 211 return ((OVT_CLR << 3) | (OVS_CLR << 2) | (INTCLR << 1)) & 0x0E;
hisyamfs 42:3b682b7d0388 212 }
hisyamfs 42:3b682b7d0388 213 };
hisyamfs 42:3b682b7d0388 214 sclr _sclr;
hisyamfs 42:3b682b7d0388 215
hisyamfs 42:3b682b7d0388 216 //average register
hisyamfs 42:3b682b7d0388 217 //for setting moving average output mode
hisyamfs 42:3b682b7d0388 218 struct ave {
hisyamfs 42:3b682b7d0388 219 uint8_t unused : 5;
hisyamfs 42:3b682b7d0388 220 //1 = twice moving average mode
hisyamfs 42:3b682b7d0388 221 uint8_t MAMOD : 1;
hisyamfs 42:3b682b7d0388 222
hisyamfs 42:3b682b7d0388 223 uint8_t get(){
hisyamfs 42:3b682b7d0388 224 return (MAMOD << 5);
hisyamfs 42:3b682b7d0388 225 }
hisyamfs 42:3b682b7d0388 226 };
hisyamfs 42:3b682b7d0388 227 struct ave _ave;
hisyamfs 42:3b682b7d0388 228
hisyamfs 42:3b682b7d0388 229 //interrupt level registers
hisyamfs 42:3b682b7d0388 230 //for setting upper / lower limit hysteresis on interrupt level
hisyamfs 42:3b682b7d0388 231
hisyamfs 42:3b682b7d0388 232 //interrupt level upper limit setting. Interrupt output
hisyamfs 42:3b682b7d0388 233 // and interrupt pixel table are set when value exceeds set value
hisyamfs 42:3b682b7d0388 234 struct inthl {
hisyamfs 42:3b682b7d0388 235 uint8_t INT_LVL_H : 8;
hisyamfs 42:3b682b7d0388 236
hisyamfs 42:3b682b7d0388 237 uint8_t get(){
hisyamfs 42:3b682b7d0388 238 return INT_LVL_H;
hisyamfs 42:3b682b7d0388 239 }
hisyamfs 42:3b682b7d0388 240 };
hisyamfs 42:3b682b7d0388 241 struct inthl _inthl;
hisyamfs 42:3b682b7d0388 242
hisyamfs 42:3b682b7d0388 243 struct inthh {
hisyamfs 42:3b682b7d0388 244 uint8_t INT_LVL_H : 4;
hisyamfs 42:3b682b7d0388 245
hisyamfs 42:3b682b7d0388 246 uint8_t get(){
hisyamfs 42:3b682b7d0388 247 return INT_LVL_H;
hisyamfs 42:3b682b7d0388 248 }
hisyamfs 42:3b682b7d0388 249 };
hisyamfs 42:3b682b7d0388 250 struct inthh _inthh;
hisyamfs 42:3b682b7d0388 251
hisyamfs 42:3b682b7d0388 252 //interrupt level lower limit. Interrupt output
hisyamfs 42:3b682b7d0388 253 //and interrupt pixel table are set when value is lower than set value
hisyamfs 42:3b682b7d0388 254 struct intll {
hisyamfs 42:3b682b7d0388 255 uint8_t INT_LVL_L : 8;
hisyamfs 42:3b682b7d0388 256
hisyamfs 42:3b682b7d0388 257 uint8_t get(){
hisyamfs 42:3b682b7d0388 258 return INT_LVL_L;
hisyamfs 42:3b682b7d0388 259 }
hisyamfs 42:3b682b7d0388 260 };
hisyamfs 42:3b682b7d0388 261 struct intll _intll;
hisyamfs 42:3b682b7d0388 262
hisyamfs 42:3b682b7d0388 263 struct intlh {
hisyamfs 42:3b682b7d0388 264 uint8_t INT_LVL_L : 4;
hisyamfs 42:3b682b7d0388 265
hisyamfs 42:3b682b7d0388 266 uint8_t get(){
hisyamfs 42:3b682b7d0388 267 return (INT_LVL_L & 0xF);
hisyamfs 42:3b682b7d0388 268 }
hisyamfs 42:3b682b7d0388 269 };
hisyamfs 42:3b682b7d0388 270 struct intlh _intlh;
hisyamfs 42:3b682b7d0388 271
hisyamfs 42:3b682b7d0388 272 //setting of interrupt hysteresis level when interrupt is generated.
hisyamfs 42:3b682b7d0388 273 //should not be higher than interrupt level
hisyamfs 42:3b682b7d0388 274 struct ihysl {
hisyamfs 42:3b682b7d0388 275 uint8_t INT_HYS : 8;
hisyamfs 42:3b682b7d0388 276
hisyamfs 42:3b682b7d0388 277 uint8_t get(){
hisyamfs 42:3b682b7d0388 278 return INT_HYS;
hisyamfs 42:3b682b7d0388 279 }
hisyamfs 42:3b682b7d0388 280 };
hisyamfs 42:3b682b7d0388 281 struct ihysl _ihysl;
hisyamfs 42:3b682b7d0388 282
hisyamfs 42:3b682b7d0388 283 struct ihysh {
hisyamfs 42:3b682b7d0388 284 uint8_t INT_HYS : 4;
hisyamfs 42:3b682b7d0388 285
hisyamfs 42:3b682b7d0388 286 uint8_t get(){
hisyamfs 42:3b682b7d0388 287 return (INT_HYS & 0xF);
hisyamfs 42:3b682b7d0388 288 }
hisyamfs 42:3b682b7d0388 289 };
hisyamfs 42:3b682b7d0388 290 struct ihysh _ihysh;
hisyamfs 42:3b682b7d0388 291
hisyamfs 42:3b682b7d0388 292 //thermistor register
hisyamfs 42:3b682b7d0388 293 //SIGNED MAGNITUDE FORMAT
hisyamfs 42:3b682b7d0388 294 struct tthl {
hisyamfs 42:3b682b7d0388 295 uint8_t TEMP : 8;
hisyamfs 42:3b682b7d0388 296
hisyamfs 42:3b682b7d0388 297 uint8_t get(){
hisyamfs 42:3b682b7d0388 298 return TEMP;
hisyamfs 42:3b682b7d0388 299 }
hisyamfs 42:3b682b7d0388 300 };
hisyamfs 42:3b682b7d0388 301 struct tthl _tthl;
hisyamfs 42:3b682b7d0388 302
hisyamfs 42:3b682b7d0388 303 struct tthh {
hisyamfs 42:3b682b7d0388 304 uint8_t TEMP : 3;
hisyamfs 42:3b682b7d0388 305 uint8_t SIGN : 1;
hisyamfs 42:3b682b7d0388 306
hisyamfs 42:3b682b7d0388 307 uint8_t get(){
hisyamfs 42:3b682b7d0388 308 return ( (SIGN << 3) | TEMP) & 0xF;
hisyamfs 42:3b682b7d0388 309 }
hisyamfs 42:3b682b7d0388 310 };
hisyamfs 42:3b682b7d0388 311 struct tthh _tthh;
hisyamfs 42:3b682b7d0388 312
hisyamfs 42:3b682b7d0388 313 //temperature registers 0x80 - 0xFF
hisyamfs 42:3b682b7d0388 314 /*
hisyamfs 42:3b682b7d0388 315 //read to indicate temperature data per 1 pixel
hisyamfs 42:3b682b7d0388 316 //SIGNED MAGNITUDE FORMAT
hisyamfs 42:3b682b7d0388 317 struct t01l {
hisyamfs 42:3b682b7d0388 318 char TEMP : 8;
hisyamfs 42:3b682b7d0388 319
hisyamfs 42:3b682b7d0388 320 char get(){
hisyamfs 42:3b682b7d0388 321 return TEMP;
hisyamfs 42:3b682b7d0388 322 }
hisyamfs 42:3b682b7d0388 323 };
hisyamfs 42:3b682b7d0388 324 struct t01l _t01l;
hisyamfs 42:3b682b7d0388 325
hisyamfs 42:3b682b7d0388 326 struct t01h {
hisyamfs 42:3b682b7d0388 327 char TEMP : 3;
hisyamfs 42:3b682b7d0388 328 char SIGN : 1;
hisyamfs 42:3b682b7d0388 329
hisyamfs 42:3b682b7d0388 330 char get(){
hisyamfs 42:3b682b7d0388 331 return ( (SIGN << 3) | TEMP) & 0xF;
hisyamfs 42:3b682b7d0388 332 }
hisyamfs 42:3b682b7d0388 333 };
hisyamfs 42:3b682b7d0388 334 struct t01h _t01h;
hisyamfs 42:3b682b7d0388 335 */
hisyamfs 42:3b682b7d0388 336
hisyamfs 42:3b682b7d0388 337
hisyamfs 42:3b682b7d0388 338 };
hisyamfs 42:3b682b7d0388 339
hisyamfs 42:3b682b7d0388 340 #endif