MQTT client test with W5200 ethernet shield
Dependents: IBMIoTClientEthernetExample_W5200
Fork of W5500Interface by
WIZnet/W5500.h@9:dfffa4d6f022, 2014-10-15 (annotated)
- Committer:
- hjjeon
- Date:
- Wed Oct 15 06:25:21 2014 +0000
- Revision:
- 9:dfffa4d6f022
- Parent:
- 5:8aefaef88f79
- Child:
- 10:713b6d2aaefb
Add W5500 register access macro function and defines
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Bongjun | 0:e11e8793c3ce | 1 | #pragma once |
Bongjun | 0:e11e8793c3ce | 2 | |
Bongjun | 0:e11e8793c3ce | 3 | #include "mbed.h" |
Bongjun | 0:e11e8793c3ce | 4 | #include "mbed_debug.h" |
Bongjun | 0:e11e8793c3ce | 5 | |
Bongjun | 0:e11e8793c3ce | 6 | #define TEST_ASSERT(A) while(!(A)){debug("\n\n%s@%d %s ASSERT!\n\n",__PRETTY_FUNCTION__,__LINE__,#A);exit(1);}; |
Bongjun | 0:e11e8793c3ce | 7 | |
Bongjun | 0:e11e8793c3ce | 8 | #define DEFAULT_WAIT_RESP_TIMEOUT 500 |
Bongjun | 0:e11e8793c3ce | 9 | |
hjjeon | 9:dfffa4d6f022 | 10 | enum Command { |
hjjeon | 9:dfffa4d6f022 | 11 | OPEN = 0x01, |
hjjeon | 9:dfffa4d6f022 | 12 | LISTEN = 0x02, |
hjjeon | 9:dfffa4d6f022 | 13 | CONNECT = 0x04, |
hjjeon | 9:dfffa4d6f022 | 14 | DISCON = 0x08, |
hjjeon | 9:dfffa4d6f022 | 15 | CLOSE = 0x10, |
hjjeon | 9:dfffa4d6f022 | 16 | SEND = 0x20, |
hjjeon | 9:dfffa4d6f022 | 17 | SEND_MAC = 0x21, |
hjjeon | 9:dfffa4d6f022 | 18 | SEND_KEEP = 0x22, |
hjjeon | 9:dfffa4d6f022 | 19 | RECV = 0x40, |
hjjeon | 9:dfffa4d6f022 | 20 | |
hjjeon | 9:dfffa4d6f022 | 21 | }; |
hjjeon | 9:dfffa4d6f022 | 22 | |
hjjeon | 9:dfffa4d6f022 | 23 | enum Interrupt { |
hjjeon | 9:dfffa4d6f022 | 24 | INT_CON = 0x01, |
hjjeon | 9:dfffa4d6f022 | 25 | INT_DISCON = 0x02, |
hjjeon | 9:dfffa4d6f022 | 26 | INT_RECV = 0x04, |
hjjeon | 9:dfffa4d6f022 | 27 | INT_TIMEOUT = 0x08, |
hjjeon | 9:dfffa4d6f022 | 28 | INT_SEND_OK = 0x10, |
hjjeon | 9:dfffa4d6f022 | 29 | }; |
hjjeon | 9:dfffa4d6f022 | 30 | |
hjjeon | 9:dfffa4d6f022 | 31 | enum Status { |
hjjeon | 9:dfffa4d6f022 | 32 | SOCK_CLOSED = 0x00, |
hjjeon | 9:dfffa4d6f022 | 33 | SOCK_INIT = 0x13, |
hjjeon | 9:dfffa4d6f022 | 34 | SOCK_LISTEN = 0x14, |
hjjeon | 9:dfffa4d6f022 | 35 | SOCK_SYNSENT = 0x15, |
hjjeon | 9:dfffa4d6f022 | 36 | SOCK_ESTABLISHED = 0x17, |
hjjeon | 9:dfffa4d6f022 | 37 | SOCK_CLOSE_WAIT = 0x1c, |
hjjeon | 9:dfffa4d6f022 | 38 | SOCK_UDP = 0x22, |
hjjeon | 9:dfffa4d6f022 | 39 | }; |
hjjeon | 9:dfffa4d6f022 | 40 | |
hjjeon | 9:dfffa4d6f022 | 41 | typedef enum |
hjjeon | 9:dfffa4d6f022 | 42 | { |
hjjeon | 9:dfffa4d6f022 | 43 | |
hjjeon | 9:dfffa4d6f022 | 44 | IK_WOL = (1 << 4), ///< Wake On Lan by receiving the magic packet. Valid in W500. |
hjjeon | 9:dfffa4d6f022 | 45 | IK_PPPOE_TERMINATED = (1 << 5), ///< PPPoE Disconnected |
hjjeon | 9:dfffa4d6f022 | 46 | |
hjjeon | 9:dfffa4d6f022 | 47 | IK_DEST_UNREACH = (1 << 6), ///< Destination IP & Port Unreable, No use in W5200 |
hjjeon | 9:dfffa4d6f022 | 48 | |
hjjeon | 9:dfffa4d6f022 | 49 | IK_IP_CONFLICT = (1 << 7), ///< IP conflict occurred |
hjjeon | 9:dfffa4d6f022 | 50 | |
hjjeon | 9:dfffa4d6f022 | 51 | IK_SOCK_0 = (1 << 8), ///< Socket 0 interrupt |
hjjeon | 9:dfffa4d6f022 | 52 | IK_SOCK_1 = (1 << 9), ///< Socket 1 interrupt |
hjjeon | 9:dfffa4d6f022 | 53 | IK_SOCK_2 = (1 << 10), ///< Socket 2 interrupt |
hjjeon | 9:dfffa4d6f022 | 54 | IK_SOCK_3 = (1 << 11), ///< Socket 3 interrupt |
hjjeon | 9:dfffa4d6f022 | 55 | IK_SOCK_4 = (1 << 12), ///< Socket 4 interrupt, No use in 5100 |
hjjeon | 9:dfffa4d6f022 | 56 | IK_SOCK_5 = (1 << 13), ///< Socket 5 interrupt, No use in 5100 |
hjjeon | 9:dfffa4d6f022 | 57 | IK_SOCK_6 = (1 << 14), ///< Socket 6 interrupt, No use in 5100 |
hjjeon | 9:dfffa4d6f022 | 58 | IK_SOCK_7 = (1 << 15), ///< Socket 7 interrupt, No use in 5100 |
hjjeon | 9:dfffa4d6f022 | 59 | |
hjjeon | 9:dfffa4d6f022 | 60 | IK_SOCK_ALL = (0xFF << 8) ///< All Socket interrpt |
hjjeon | 9:dfffa4d6f022 | 61 | |
hjjeon | 9:dfffa4d6f022 | 62 | }intr_kind; |
Bongjun | 0:e11e8793c3ce | 63 | |
Bongjun | 0:e11e8793c3ce | 64 | #define MAX_SOCK_NUM 8 |
Bongjun | 0:e11e8793c3ce | 65 | |
Bongjun | 0:e11e8793c3ce | 66 | #define MR 0x0000 |
Bongjun | 0:e11e8793c3ce | 67 | #define GAR 0x0001 |
Bongjun | 0:e11e8793c3ce | 68 | #define SUBR 0x0005 |
Bongjun | 0:e11e8793c3ce | 69 | #define SHAR 0x0009 |
Bongjun | 0:e11e8793c3ce | 70 | #define SIPR 0x000f |
hjjeon | 9:dfffa4d6f022 | 71 | #define INTLEVEL 0x0013 |
hjjeon | 9:dfffa4d6f022 | 72 | #define IR 0x0015 |
hjjeon | 9:dfffa4d6f022 | 73 | #define IMR 0x0016 |
hjjeon | 9:dfffa4d6f022 | 74 | #define SIR 0x0017 |
hjjeon | 9:dfffa4d6f022 | 75 | #define SIMR 0x0018 |
hjjeon | 9:dfffa4d6f022 | 76 | #define RTR 0x0019 |
hjjeon | 9:dfffa4d6f022 | 77 | #define RCR 0x001b |
hjjeon | 9:dfffa4d6f022 | 78 | #define PTIMER 0x001c |
hjjeon | 9:dfffa4d6f022 | 79 | #define PMAGIC 0x001d |
hjjeon | 9:dfffa4d6f022 | 80 | #define PHAR 0x001e |
hjjeon | 9:dfffa4d6f022 | 81 | #define PSID 0x0024 |
hjjeon | 9:dfffa4d6f022 | 82 | #define PMRU 0x0026 |
hjjeon | 9:dfffa4d6f022 | 83 | #define UIPR 0x0028 |
hjjeon | 9:dfffa4d6f022 | 84 | #define UPORTR 0x002c |
kaizen | 5:8aefaef88f79 | 85 | #define PHYCFGR 0x002e |
hjjeon | 9:dfffa4d6f022 | 86 | #define VERSIONR 0x0039 |
hjjeon | 9:dfffa4d6f022 | 87 | |
Bongjun | 0:e11e8793c3ce | 88 | |
Bongjun | 0:e11e8793c3ce | 89 | // W5500 socket register |
Bongjun | 0:e11e8793c3ce | 90 | #define Sn_MR 0x0000 |
Bongjun | 0:e11e8793c3ce | 91 | #define Sn_CR 0x0001 |
Bongjun | 0:e11e8793c3ce | 92 | #define Sn_IR 0x0002 |
Bongjun | 0:e11e8793c3ce | 93 | #define Sn_SR 0x0003 |
Bongjun | 0:e11e8793c3ce | 94 | #define Sn_PORT 0x0004 |
hjjeon | 9:dfffa4d6f022 | 95 | #define Sn_DHAR 0x0006 |
Bongjun | 0:e11e8793c3ce | 96 | #define Sn_DIPR 0x000c |
Bongjun | 0:e11e8793c3ce | 97 | #define Sn_DPORT 0x0010 |
hjjeon | 9:dfffa4d6f022 | 98 | #define Sn_MSSR 0x0012 |
hjjeon | 9:dfffa4d6f022 | 99 | #define Sn_TOS 0x0015 |
hjjeon | 9:dfffa4d6f022 | 100 | #define Sn_TTL 0x0016 |
Bongjun | 0:e11e8793c3ce | 101 | #define Sn_RXBUF_SIZE 0x001e |
Bongjun | 0:e11e8793c3ce | 102 | #define Sn_TXBUF_SIZE 0x001f |
Bongjun | 0:e11e8793c3ce | 103 | #define Sn_TX_FSR 0x0020 |
hjjeon | 9:dfffa4d6f022 | 104 | #define Sn_TX_RD 0x0022 |
Bongjun | 0:e11e8793c3ce | 105 | #define Sn_TX_WR 0x0024 |
Bongjun | 0:e11e8793c3ce | 106 | #define Sn_RX_RSR 0x0026 |
Bongjun | 0:e11e8793c3ce | 107 | #define Sn_RX_RD 0x0028 |
hjjeon | 9:dfffa4d6f022 | 108 | #define Sn_RX_WR 0x002a |
hjjeon | 9:dfffa4d6f022 | 109 | #define Sn_IMR 0x002c |
hjjeon | 9:dfffa4d6f022 | 110 | #define Sn_FRAG 0x002d |
hjjeon | 9:dfffa4d6f022 | 111 | #define Sn_KPALVTR 0x002f |
hjjeon | 9:dfffa4d6f022 | 112 | |
hjjeon | 9:dfffa4d6f022 | 113 | //define for Mode Register option value |
hjjeon | 9:dfffa4d6f022 | 114 | #define MR_PPPOE 0x08 |
hjjeon | 9:dfffa4d6f022 | 115 | #define MR_RST 0x80 |
hjjeon | 9:dfffa4d6f022 | 116 | |
hjjeon | 9:dfffa4d6f022 | 117 | //Define for Socket Command register option value |
hjjeon | 9:dfffa4d6f022 | 118 | #define Sn_CR_OPEN 0x01 |
hjjeon | 9:dfffa4d6f022 | 119 | #define Sn_CR_LISTEN 0x02 |
hjjeon | 9:dfffa4d6f022 | 120 | #define Sn_CR_CONNECT 0x04 |
hjjeon | 9:dfffa4d6f022 | 121 | #define Sn_CR_DISCON 0x08 |
hjjeon | 9:dfffa4d6f022 | 122 | #define Sn_CR_CLOSE 0x10 |
hjjeon | 9:dfffa4d6f022 | 123 | #define Sn_CR_SEND 0x20 |
hjjeon | 9:dfffa4d6f022 | 124 | #define Sn_CR_SEND_MAC 0x21 |
hjjeon | 9:dfffa4d6f022 | 125 | #define Sn_CR_SEND_KEEP 0x22 |
hjjeon | 9:dfffa4d6f022 | 126 | #define Sn_CR_RECV 0x40 |
hjjeon | 9:dfffa4d6f022 | 127 | |
hjjeon | 9:dfffa4d6f022 | 128 | |
hjjeon | 9:dfffa4d6f022 | 129 | //Define for Socket Mode register option value |
hjjeon | 9:dfffa4d6f022 | 130 | #define Sn_MR_CLOSE 0x00 |
hjjeon | 9:dfffa4d6f022 | 131 | #define Sn_MR_TCP 0x01 |
hjjeon | 9:dfffa4d6f022 | 132 | #define Sn_MR_UDP 0x02 |
hjjeon | 9:dfffa4d6f022 | 133 | #define Sn_MR_MACRAW 0x04 |
hjjeon | 9:dfffa4d6f022 | 134 | #define Sn_MR_UCASTB 0x10 |
hjjeon | 9:dfffa4d6f022 | 135 | #define Sn_MR_ND 0x20 |
hjjeon | 9:dfffa4d6f022 | 136 | #define Sn_MR_BCASTB 0x40 |
hjjeon | 9:dfffa4d6f022 | 137 | #define Sn_MR_MULTI 0x80 |
hjjeon | 9:dfffa4d6f022 | 138 | |
hjjeon | 9:dfffa4d6f022 | 139 | #define Sn_IR_SENDOK 0x10 |
hjjeon | 9:dfffa4d6f022 | 140 | |
hjjeon | 9:dfffa4d6f022 | 141 | //Sn_IR values |
hjjeon | 9:dfffa4d6f022 | 142 | |
hjjeon | 9:dfffa4d6f022 | 143 | #define Sn_IR_TIMEOUT 0x08 |
hjjeon | 9:dfffa4d6f022 | 144 | #define Sn_IR_RECV 0x04 |
hjjeon | 9:dfffa4d6f022 | 145 | #define Sn_IR_DISCON 0x02 |
hjjeon | 9:dfffa4d6f022 | 146 | #define Sn_IR_CON 0x01 |
hjjeon | 9:dfffa4d6f022 | 147 | |
hjjeon | 9:dfffa4d6f022 | 148 | /* |
hjjeon | 9:dfffa4d6f022 | 149 | * SOCKET FLAG |
hjjeon | 9:dfffa4d6f022 | 150 | */ |
hjjeon | 9:dfffa4d6f022 | 151 | #define SF_ETHER_OWN (Sn_MR_MFEN) ///< In \ref Sn_MR_MACRAW, Receive only the packet as broadcast, multicast and own packet |
hjjeon | 9:dfffa4d6f022 | 152 | #define SF_IGMP_VER2 (Sn_MR_ND) ///< In \ref Sn_MR_UDP with \ref SF_MULTI_ENABLE, Select IGMP version 2. |
hjjeon | 9:dfffa4d6f022 | 153 | #define SF_TCP_NODELAY (Sn_MR_ND) ///< In \ref Sn_MR_TCP, Use to nodelayed ack. |
hjjeon | 9:dfffa4d6f022 | 154 | #define SF_MULTI_ENABLE (Sn_MR_MULTI) ///< In \ref Sn_MR_UDP, Enable multicast mode. |
hjjeon | 9:dfffa4d6f022 | 155 | #define SF_IO_NONBLOCK 0x01 ///< Socket nonblock io mode. It used parameter in \ref socket(). |
hjjeon | 9:dfffa4d6f022 | 156 | #define SF_BROAD_BLOCK (Sn_MR_BCASTB) ///< In \ref Sn_MR_UDP or \ref Sn_MR_MACRAW, Block broadcast packet. Valid only in W5500 |
hjjeon | 9:dfffa4d6f022 | 157 | #define SF_MULTI_BLOCK (Sn_MR_MMB) ///< In \ref Sn_MR_MACRAW, Block multicast packet. Valid only in W5500 |
hjjeon | 9:dfffa4d6f022 | 158 | #define SF_IPv6_BLOCK (Sn_MR_MIP6B) ///< In \ref Sn_MR_MACRAW, Block IPv6 packet. Valid only in W5500 |
hjjeon | 9:dfffa4d6f022 | 159 | #define SF_UNI_BLOCK (Sn_MR_UCASTB) ///< In \ref Sn_MR_UDP with \ref SF_MULTI_ENABLE. Valid only in W5500 |
hjjeon | 9:dfffa4d6f022 | 160 | |
hjjeon | 9:dfffa4d6f022 | 161 | #define SOCK_MACRAW 0x42 |
hjjeon | 9:dfffa4d6f022 | 162 | |
hjjeon | 9:dfffa4d6f022 | 163 | |
hjjeon | 9:dfffa4d6f022 | 164 | /* PHYCFGR register value */ |
hjjeon | 9:dfffa4d6f022 | 165 | #define PHYCFGR_RST ~(1<<7) //< For PHY reset, must operate AND mask. |
hjjeon | 9:dfffa4d6f022 | 166 | #define PHYCFGR_OPMD (1<<6) // Configre PHY with OPMDC value |
hjjeon | 9:dfffa4d6f022 | 167 | #define PHYCFGR_OPMDC_ALLA (7<<3) |
hjjeon | 9:dfffa4d6f022 | 168 | #define PHYCFGR_OPMDC_PDOWN (6<<3) |
hjjeon | 9:dfffa4d6f022 | 169 | #define PHYCFGR_OPMDC_NA (5<<3) |
hjjeon | 9:dfffa4d6f022 | 170 | #define PHYCFGR_OPMDC_100FA (4<<3) |
hjjeon | 9:dfffa4d6f022 | 171 | #define PHYCFGR_OPMDC_100F (3<<3) |
hjjeon | 9:dfffa4d6f022 | 172 | #define PHYCFGR_OPMDC_100H (2<<3) |
hjjeon | 9:dfffa4d6f022 | 173 | #define PHYCFGR_OPMDC_10F (1<<3) |
hjjeon | 9:dfffa4d6f022 | 174 | #define PHYCFGR_OPMDC_10H (0<<3) |
hjjeon | 9:dfffa4d6f022 | 175 | #define PHYCFGR_DPX_FULL (1<<2) |
hjjeon | 9:dfffa4d6f022 | 176 | #define PHYCFGR_DPX_HALF (0<<2) |
hjjeon | 9:dfffa4d6f022 | 177 | #define PHYCFGR_SPD_100 (1<<1) |
hjjeon | 9:dfffa4d6f022 | 178 | #define PHYCFGR_SPD_10 (0<<1) |
hjjeon | 9:dfffa4d6f022 | 179 | #define PHYCFGR_LNK_ON (1<<0) |
hjjeon | 9:dfffa4d6f022 | 180 | #define PHYCFGR_LNK_OFF (0<<0) |
hjjeon | 9:dfffa4d6f022 | 181 | |
hjjeon | 9:dfffa4d6f022 | 182 | //PHY status define |
hjjeon | 9:dfffa4d6f022 | 183 | #define PHY_CONFBY_HW 0 ///< Configured PHY operation mode by HW pin |
hjjeon | 9:dfffa4d6f022 | 184 | #define PHY_CONFBY_SW 1 ///< Configured PHY operation mode by SW register |
hjjeon | 9:dfffa4d6f022 | 185 | #define PHY_MODE_MANUAL 0 ///< Configured PHY operation mode with user setting. |
hjjeon | 9:dfffa4d6f022 | 186 | #define PHY_MODE_AUTONEGO 1 ///< Configured PHY operation mode with auto-negotiation |
hjjeon | 9:dfffa4d6f022 | 187 | #define PHY_SPEED_10 0 ///< Link Speed 10 |
hjjeon | 9:dfffa4d6f022 | 188 | #define PHY_SPEED_100 1 ///< Link Speed 100 |
hjjeon | 9:dfffa4d6f022 | 189 | #define PHY_DUPLEX_HALF 0 ///< Link Half-Duplex |
hjjeon | 9:dfffa4d6f022 | 190 | #define PHY_DUPLEX_FULL 1 ///< Link Full-Duplex |
hjjeon | 9:dfffa4d6f022 | 191 | #define PHY_LINK_OFF 0 ///< Link Off |
hjjeon | 9:dfffa4d6f022 | 192 | #define PHY_LINK_ON 1 ///< Link On |
hjjeon | 9:dfffa4d6f022 | 193 | #define PHY_POWER_NORM 0 ///< PHY power normal mode |
hjjeon | 9:dfffa4d6f022 | 194 | #define PHY_POWER_DOWN 1 ///< PHY power down mode |
Bongjun | 0:e11e8793c3ce | 195 | |
Bongjun | 0:e11e8793c3ce | 196 | class WIZnet_Chip { |
Bongjun | 0:e11e8793c3ce | 197 | public: |
kaizen | 5:8aefaef88f79 | 198 | |
kaizen | 5:8aefaef88f79 | 199 | enum Protocol { CLOSED = 0, TCP = 1, UDP = 2,}; |
kaizen | 5:8aefaef88f79 | 200 | enum Command { OPEN = 0x01, LISTEN = 0x02, CONNECT = 0x04, DISCON = 0x08, CLOSE = 0x10, SEND = 0x20, \ |
kaizen | 5:8aefaef88f79 | 201 | SEND_MAC = 0x21, SEND_KEEP = 0x22, RECV = 0x40, }; |
kaizen | 5:8aefaef88f79 | 202 | enum Interrupt { INT_CON = 0x01, INT_DISCON = 0x02, INT_RECV = 0x04, INT_TIMEOUT = 0x08, INT_SEND_OK = 0x10,}; |
kaizen | 5:8aefaef88f79 | 203 | |
kaizen | 5:8aefaef88f79 | 204 | enum Status { SOCK_CLOSED = 0x00, SOCK_INIT = 0x13, SOCK_LISTEN = 0x14, SOCK_SYNSENT = 0x15, SOCK_ESTABLISHED = 0x17, \ |
kaizen | 5:8aefaef88f79 | 205 | SOCK_CLOSE_WAIT = 0x1c, SOCK_UDP = 0x22, }; |
kaizen | 5:8aefaef88f79 | 206 | |
Bongjun | 0:e11e8793c3ce | 207 | /* |
Bongjun | 0:e11e8793c3ce | 208 | * Constructor |
Bongjun | 0:e11e8793c3ce | 209 | * |
Bongjun | 0:e11e8793c3ce | 210 | * @param spi spi class |
Bongjun | 0:e11e8793c3ce | 211 | * @param cs cs of the W5500 |
Bongjun | 0:e11e8793c3ce | 212 | * @param reset reset pin of the W5500 |
Bongjun | 0:e11e8793c3ce | 213 | */ |
Bongjun | 0:e11e8793c3ce | 214 | WIZnet_Chip(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName reset); |
Bongjun | 0:e11e8793c3ce | 215 | WIZnet_Chip(SPI* spi, PinName cs, PinName reset); |
Bongjun | 0:e11e8793c3ce | 216 | |
Bongjun | 0:e11e8793c3ce | 217 | /* |
Bongjun | 0:e11e8793c3ce | 218 | * Set MAC Address to W5500 |
Bongjun | 0:e11e8793c3ce | 219 | * |
Bongjun | 0:e11e8793c3ce | 220 | * @return true if connected, false otherwise |
Bongjun | 0:e11e8793c3ce | 221 | */ |
Bongjun | 0:e11e8793c3ce | 222 | bool setmac(); |
Bongjun | 0:e11e8793c3ce | 223 | |
Bongjun | 0:e11e8793c3ce | 224 | /* |
Bongjun | 0:e11e8793c3ce | 225 | * Set Network Informations (SrcIP, Netmask, Gataway) |
Bongjun | 0:e11e8793c3ce | 226 | * |
Bongjun | 0:e11e8793c3ce | 227 | * @return true if connected, false otherwise |
Bongjun | 0:e11e8793c3ce | 228 | */ |
Bongjun | 0:e11e8793c3ce | 229 | bool setip(); |
Bongjun | 0:e11e8793c3ce | 230 | |
Bongjun | 0:e11e8793c3ce | 231 | /* |
kaizen | 5:8aefaef88f79 | 232 | * Get Link Status |
kaizen | 5:8aefaef88f79 | 233 | * |
kaizen | 5:8aefaef88f79 | 234 | * @return true if Link up, false Link down |
kaizen | 5:8aefaef88f79 | 235 | */ |
kaizen | 5:8aefaef88f79 | 236 | bool linkstatus(); |
kaizen | 5:8aefaef88f79 | 237 | |
kaizen | 5:8aefaef88f79 | 238 | /* |
Bongjun | 0:e11e8793c3ce | 239 | * Disconnect the connection |
Bongjun | 0:e11e8793c3ce | 240 | * |
Bongjun | 0:e11e8793c3ce | 241 | * @ returns true |
Bongjun | 0:e11e8793c3ce | 242 | */ |
Bongjun | 0:e11e8793c3ce | 243 | bool disconnect(); |
Bongjun | 0:e11e8793c3ce | 244 | |
Bongjun | 0:e11e8793c3ce | 245 | /* |
Bongjun | 0:e11e8793c3ce | 246 | * Open a tcp connection with the specified host on the specified port |
Bongjun | 0:e11e8793c3ce | 247 | * |
Bongjun | 0:e11e8793c3ce | 248 | * @param host host (can be either an ip address or a name. If a name is provided, a dns request will be established) |
Bongjun | 0:e11e8793c3ce | 249 | * @param port port |
Bongjun | 0:e11e8793c3ce | 250 | * @ returns true if successful |
Bongjun | 0:e11e8793c3ce | 251 | */ |
Bongjun | 0:e11e8793c3ce | 252 | bool connect(int socket, const char * host, int port, int timeout_ms = 10*1000); |
Bongjun | 0:e11e8793c3ce | 253 | |
Bongjun | 0:e11e8793c3ce | 254 | /* |
Bongjun | 0:e11e8793c3ce | 255 | * Set the protocol (UDP or TCP) |
Bongjun | 0:e11e8793c3ce | 256 | * |
Bongjun | 0:e11e8793c3ce | 257 | * @param p protocol |
Bongjun | 0:e11e8793c3ce | 258 | * @ returns true if successful |
Bongjun | 0:e11e8793c3ce | 259 | */ |
Bongjun | 0:e11e8793c3ce | 260 | bool setProtocol(int socket, Protocol p); |
Bongjun | 0:e11e8793c3ce | 261 | |
Bongjun | 0:e11e8793c3ce | 262 | /* |
Bongjun | 0:e11e8793c3ce | 263 | * Reset the W5500 |
Bongjun | 0:e11e8793c3ce | 264 | */ |
Bongjun | 0:e11e8793c3ce | 265 | void reset(); |
Bongjun | 0:e11e8793c3ce | 266 | |
Bongjun | 0:e11e8793c3ce | 267 | int wait_readable(int socket, int wait_time_ms, int req_size = 0); |
Bongjun | 0:e11e8793c3ce | 268 | |
Bongjun | 0:e11e8793c3ce | 269 | int wait_writeable(int socket, int wait_time_ms, int req_size = 0); |
Bongjun | 0:e11e8793c3ce | 270 | |
Bongjun | 0:e11e8793c3ce | 271 | /* |
Bongjun | 0:e11e8793c3ce | 272 | * Check if a tcp link is active |
Bongjun | 0:e11e8793c3ce | 273 | * |
Bongjun | 0:e11e8793c3ce | 274 | * @returns true if successful |
Bongjun | 0:e11e8793c3ce | 275 | */ |
Bongjun | 0:e11e8793c3ce | 276 | bool is_connected(int socket); |
hjjeon | 9:dfffa4d6f022 | 277 | |
hjjeon | 9:dfffa4d6f022 | 278 | |
hjjeon | 9:dfffa4d6f022 | 279 | int8_t Socket_macraw(uint8_t sn, uint16_t port, uint8_t flag) |
hjjeon | 9:dfffa4d6f022 | 280 | { |
hjjeon | 9:dfffa4d6f022 | 281 | //CHECK_SOCKNUM(); |
hjjeon | 9:dfffa4d6f022 | 282 | |
hjjeon | 9:dfffa4d6f022 | 283 | if((flag & 0x06) != 0) return SOCKERR_SOCKFLAG; |
hjjeon | 9:dfffa4d6f022 | 284 | |
hjjeon | 9:dfffa4d6f022 | 285 | close(sn); |
hjjeon | 9:dfffa4d6f022 | 286 | setSn_MR(sn, (Sn_MR_MACRAW | (flag & 0xF0))); |
hjjeon | 9:dfffa4d6f022 | 287 | if(!port) |
hjjeon | 9:dfffa4d6f022 | 288 | { |
hjjeon | 9:dfffa4d6f022 | 289 | port = sock_any_port++; |
hjjeon | 9:dfffa4d6f022 | 290 | if(sock_any_port == 0xFFF0) sock_any_port = SOCK_ANY_PORT_NUM; |
hjjeon | 9:dfffa4d6f022 | 291 | } |
hjjeon | 9:dfffa4d6f022 | 292 | setSn_PORT(sn,port); |
hjjeon | 9:dfffa4d6f022 | 293 | setSn_CR(sn,Sn_CR_OPEN); |
hjjeon | 9:dfffa4d6f022 | 294 | while(eth->getSn_CR(sn)); |
hjjeon | 9:dfffa4d6f022 | 295 | //sock_io_mode |= ((flag & SF_IO_NONBLOCK) << sn); |
hjjeon | 9:dfffa4d6f022 | 296 | //sock_is_sending &= ~(1<<sn); |
hjjeon | 9:dfffa4d6f022 | 297 | //sock_remained_size[sn] = 0; |
hjjeon | 9:dfffa4d6f022 | 298 | //sock_pack_info[sn] = 0; |
hjjeon | 9:dfffa4d6f022 | 299 | while(getSn_SR(sn) == SOCK_CLOSED); |
hjjeon | 9:dfffa4d6f022 | 300 | return (int8_t)sn; |
hjjeon | 9:dfffa4d6f022 | 301 | } |
Bongjun | 0:e11e8793c3ce | 302 | |
Bongjun | 0:e11e8793c3ce | 303 | /* |
Bongjun | 0:e11e8793c3ce | 304 | * Close a tcp connection |
Bongjun | 0:e11e8793c3ce | 305 | * |
Bongjun | 0:e11e8793c3ce | 306 | * @ returns true if successful |
Bongjun | 0:e11e8793c3ce | 307 | */ |
Bongjun | 0:e11e8793c3ce | 308 | bool close(int socket); |
Bongjun | 0:e11e8793c3ce | 309 | |
Bongjun | 0:e11e8793c3ce | 310 | /* |
Bongjun | 0:e11e8793c3ce | 311 | * @param str string to be sent |
Bongjun | 0:e11e8793c3ce | 312 | * @param len string length |
Bongjun | 0:e11e8793c3ce | 313 | */ |
Bongjun | 0:e11e8793c3ce | 314 | int send(int socket, const char * str, int len); |
Bongjun | 0:e11e8793c3ce | 315 | |
Bongjun | 0:e11e8793c3ce | 316 | int recv(int socket, char* buf, int len); |
Bongjun | 0:e11e8793c3ce | 317 | |
Bongjun | 0:e11e8793c3ce | 318 | /* |
Bongjun | 0:e11e8793c3ce | 319 | * Return true if the module is using dhcp |
Bongjun | 0:e11e8793c3ce | 320 | * |
Bongjun | 0:e11e8793c3ce | 321 | * @returns true if the module is using dhcp |
Bongjun | 0:e11e8793c3ce | 322 | */ |
Bongjun | 0:e11e8793c3ce | 323 | bool isDHCP() { |
Bongjun | 0:e11e8793c3ce | 324 | return dhcp; |
Bongjun | 0:e11e8793c3ce | 325 | } |
Bongjun | 0:e11e8793c3ce | 326 | |
Bongjun | 0:e11e8793c3ce | 327 | bool gethostbyname(const char* host, uint32_t* ip); |
Bongjun | 0:e11e8793c3ce | 328 | |
Bongjun | 0:e11e8793c3ce | 329 | static WIZnet_Chip * getInstance() { |
Bongjun | 0:e11e8793c3ce | 330 | return inst; |
Bongjun | 0:e11e8793c3ce | 331 | }; |
Bongjun | 0:e11e8793c3ce | 332 | |
Bongjun | 0:e11e8793c3ce | 333 | int new_socket(); |
Bongjun | 0:e11e8793c3ce | 334 | uint16_t new_port(); |
Bongjun | 0:e11e8793c3ce | 335 | void scmd(int socket, Command cmd); |
Bongjun | 0:e11e8793c3ce | 336 | |
Bongjun | 0:e11e8793c3ce | 337 | template<typename T> |
Bongjun | 0:e11e8793c3ce | 338 | void sreg(int socket, uint16_t addr, T data) { |
Bongjun | 0:e11e8793c3ce | 339 | reg_wr<T>(addr, (0x0C + (socket << 5)), data); |
Bongjun | 0:e11e8793c3ce | 340 | } |
Bongjun | 0:e11e8793c3ce | 341 | |
Bongjun | 0:e11e8793c3ce | 342 | template<typename T> |
Bongjun | 0:e11e8793c3ce | 343 | T sreg(int socket, uint16_t addr) { |
Bongjun | 0:e11e8793c3ce | 344 | return reg_rd<T>(addr, (0x08 + (socket << 5))); |
Bongjun | 0:e11e8793c3ce | 345 | } |
Bongjun | 0:e11e8793c3ce | 346 | |
Bongjun | 0:e11e8793c3ce | 347 | template<typename T> |
Bongjun | 0:e11e8793c3ce | 348 | void reg_wr(uint16_t addr, T data) { |
Bongjun | 0:e11e8793c3ce | 349 | return reg_wr(addr, 0x04, data); |
Bongjun | 0:e11e8793c3ce | 350 | } |
Bongjun | 0:e11e8793c3ce | 351 | |
Bongjun | 0:e11e8793c3ce | 352 | template<typename T> |
Bongjun | 0:e11e8793c3ce | 353 | void reg_wr(uint16_t addr, uint8_t cb, T data) { |
Bongjun | 0:e11e8793c3ce | 354 | uint8_t buf[sizeof(T)]; |
Bongjun | 0:e11e8793c3ce | 355 | *reinterpret_cast<T*>(buf) = data; |
Bongjun | 0:e11e8793c3ce | 356 | for(int i = 0; i < sizeof(buf)/2; i++) { // Little Endian to Big Endian |
Bongjun | 0:e11e8793c3ce | 357 | uint8_t t = buf[i]; |
Bongjun | 0:e11e8793c3ce | 358 | buf[i] = buf[sizeof(buf)-1-i]; |
Bongjun | 0:e11e8793c3ce | 359 | buf[sizeof(buf)-1-i] = t; |
Bongjun | 0:e11e8793c3ce | 360 | } |
Bongjun | 0:e11e8793c3ce | 361 | spi_write(addr, cb, buf, sizeof(buf)); |
Bongjun | 0:e11e8793c3ce | 362 | } |
Bongjun | 0:e11e8793c3ce | 363 | |
Bongjun | 0:e11e8793c3ce | 364 | template<typename T> |
Bongjun | 0:e11e8793c3ce | 365 | T reg_rd(uint16_t addr) { |
Bongjun | 0:e11e8793c3ce | 366 | return reg_rd<T>(addr, 0x00); |
Bongjun | 0:e11e8793c3ce | 367 | } |
Bongjun | 0:e11e8793c3ce | 368 | |
Bongjun | 0:e11e8793c3ce | 369 | template<typename T> |
Bongjun | 0:e11e8793c3ce | 370 | T reg_rd(uint16_t addr, uint8_t cb) { |
Bongjun | 0:e11e8793c3ce | 371 | uint8_t buf[sizeof(T)]; |
Bongjun | 0:e11e8793c3ce | 372 | spi_read(addr, cb, buf, sizeof(buf)); |
Bongjun | 0:e11e8793c3ce | 373 | for(int i = 0; i < sizeof(buf)/2; i++) { // Big Endian to Little Endian |
Bongjun | 0:e11e8793c3ce | 374 | uint8_t t = buf[i]; |
Bongjun | 0:e11e8793c3ce | 375 | buf[i] = buf[sizeof(buf)-1-i]; |
Bongjun | 0:e11e8793c3ce | 376 | buf[sizeof(buf)-1-i] = t; |
Bongjun | 0:e11e8793c3ce | 377 | } |
Bongjun | 0:e11e8793c3ce | 378 | return *reinterpret_cast<T*>(buf); |
Bongjun | 0:e11e8793c3ce | 379 | } |
Bongjun | 0:e11e8793c3ce | 380 | |
Bongjun | 0:e11e8793c3ce | 381 | void reg_rd_mac(uint16_t addr, uint8_t* data) { |
Bongjun | 0:e11e8793c3ce | 382 | spi_read(addr, 0x00, data, 6); |
Bongjun | 0:e11e8793c3ce | 383 | } |
Bongjun | 0:e11e8793c3ce | 384 | |
Bongjun | 0:e11e8793c3ce | 385 | void reg_wr_ip(uint16_t addr, uint8_t cb, const char* ip) { |
Bongjun | 0:e11e8793c3ce | 386 | uint8_t buf[4]; |
Bongjun | 0:e11e8793c3ce | 387 | char* p = (char*)ip; |
Bongjun | 0:e11e8793c3ce | 388 | for(int i = 0; i < 4; i++) { |
Bongjun | 0:e11e8793c3ce | 389 | buf[i] = atoi(p); |
Bongjun | 0:e11e8793c3ce | 390 | p = strchr(p, '.'); |
Bongjun | 0:e11e8793c3ce | 391 | if (p == NULL) { |
Bongjun | 0:e11e8793c3ce | 392 | break; |
Bongjun | 0:e11e8793c3ce | 393 | } |
Bongjun | 0:e11e8793c3ce | 394 | p++; |
Bongjun | 0:e11e8793c3ce | 395 | } |
Bongjun | 0:e11e8793c3ce | 396 | spi_write(addr, cb, buf, sizeof(buf)); |
Bongjun | 0:e11e8793c3ce | 397 | } |
hjjeon | 9:dfffa4d6f022 | 398 | void reg_rd_ip_byte(uint16_t addr, uint8_t* data) { |
hjjeon | 9:dfffa4d6f022 | 399 | spi_read(addr, 0x00, data, 4); |
hjjeon | 9:dfffa4d6f022 | 400 | } |
hjjeon | 9:dfffa4d6f022 | 401 | |
hjjeon | 9:dfffa4d6f022 | 402 | void reg_wr_ip_byte(uint16_t addr, uint8_t* data) { |
hjjeon | 9:dfffa4d6f022 | 403 | spi_write(addr, 0x04, data, 4); |
hjjeon | 9:dfffa4d6f022 | 404 | } |
Bongjun | 0:e11e8793c3ce | 405 | |
Bongjun | 0:e11e8793c3ce | 406 | void sreg_ip(int socket, uint16_t addr, const char* ip) { |
Bongjun | 0:e11e8793c3ce | 407 | reg_wr_ip(addr, (0x0C + (socket << 5)), ip); |
Bongjun | 0:e11e8793c3ce | 408 | } |
hjjeon | 9:dfffa4d6f022 | 409 | |
hjjeon | 9:dfffa4d6f022 | 410 | |
hjjeon | 9:dfffa4d6f022 | 411 | ///////////////////////////////// |
hjjeon | 9:dfffa4d6f022 | 412 | // Common Register I/O function // |
hjjeon | 9:dfffa4d6f022 | 413 | ///////////////////////////////// |
hjjeon | 9:dfffa4d6f022 | 414 | /** |
hjjeon | 9:dfffa4d6f022 | 415 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 416 | * @brief Set Mode Register |
hjjeon | 9:dfffa4d6f022 | 417 | * @param (uint8_t)mr The value to be set. |
hjjeon | 9:dfffa4d6f022 | 418 | * @sa getMR() |
hjjeon | 9:dfffa4d6f022 | 419 | */ |
hjjeon | 9:dfffa4d6f022 | 420 | void setMR(uint8_t mr) { |
hjjeon | 9:dfffa4d6f022 | 421 | reg_wr<uint8_t>(MR,mr); |
hjjeon | 9:dfffa4d6f022 | 422 | } |
hjjeon | 9:dfffa4d6f022 | 423 | |
hjjeon | 9:dfffa4d6f022 | 424 | |
hjjeon | 9:dfffa4d6f022 | 425 | /** |
hjjeon | 9:dfffa4d6f022 | 426 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 427 | * @brief Get Mode Register |
hjjeon | 9:dfffa4d6f022 | 428 | * @return uint8_t. The value of Mode register. |
hjjeon | 9:dfffa4d6f022 | 429 | * @sa setMR() |
hjjeon | 9:dfffa4d6f022 | 430 | */ |
hjjeon | 9:dfffa4d6f022 | 431 | uint8_t getMR() { |
hjjeon | 9:dfffa4d6f022 | 432 | return reg_rd<uint8_t>(MR); |
hjjeon | 9:dfffa4d6f022 | 433 | } |
hjjeon | 9:dfffa4d6f022 | 434 | |
hjjeon | 9:dfffa4d6f022 | 435 | /** |
hjjeon | 9:dfffa4d6f022 | 436 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 437 | * @brief Set gateway IP address |
hjjeon | 9:dfffa4d6f022 | 438 | * @param (uint8_t*)gar Pointer variable to set gateway IP address. It should be allocated 4 bytes. |
hjjeon | 9:dfffa4d6f022 | 439 | * @sa getGAR() |
hjjeon | 9:dfffa4d6f022 | 440 | */ |
hjjeon | 9:dfffa4d6f022 | 441 | void setGAR(uint8_t * gar) { |
hjjeon | 9:dfffa4d6f022 | 442 | reg_wr_ip_byte(GAR,gar); |
hjjeon | 9:dfffa4d6f022 | 443 | } |
hjjeon | 9:dfffa4d6f022 | 444 | |
hjjeon | 9:dfffa4d6f022 | 445 | /** |
hjjeon | 9:dfffa4d6f022 | 446 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 447 | * @brief Get gateway IP address |
hjjeon | 9:dfffa4d6f022 | 448 | * @param (uint8_t*)gar Pointer variable to get gateway IP address. It should be allocated 4 bytes. |
hjjeon | 9:dfffa4d6f022 | 449 | * @sa setGAR() |
hjjeon | 9:dfffa4d6f022 | 450 | */ |
hjjeon | 9:dfffa4d6f022 | 451 | void getGAR(uint8_t * gar) { |
hjjeon | 9:dfffa4d6f022 | 452 | reg_rd_ip_byte(GAR,gar); |
hjjeon | 9:dfffa4d6f022 | 453 | } |
hjjeon | 9:dfffa4d6f022 | 454 | |
hjjeon | 9:dfffa4d6f022 | 455 | /** |
hjjeon | 9:dfffa4d6f022 | 456 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 457 | * @brief Set subnet mask address |
hjjeon | 9:dfffa4d6f022 | 458 | * @param (uint8_t*)subr Pointer variable to set subnet mask address. It should be allocated 4 bytes. |
hjjeon | 9:dfffa4d6f022 | 459 | * @sa getSUBR() |
hjjeon | 9:dfffa4d6f022 | 460 | */ |
hjjeon | 9:dfffa4d6f022 | 461 | void setSUBR(uint8_t * subr) { |
hjjeon | 9:dfffa4d6f022 | 462 | reg_wr_ip_byte(SUBR, subr); |
hjjeon | 9:dfffa4d6f022 | 463 | } |
hjjeon | 9:dfffa4d6f022 | 464 | |
hjjeon | 9:dfffa4d6f022 | 465 | |
hjjeon | 9:dfffa4d6f022 | 466 | /** |
hjjeon | 9:dfffa4d6f022 | 467 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 468 | * @brief Get subnet mask address |
hjjeon | 9:dfffa4d6f022 | 469 | * @param (uint8_t*)subr Pointer variable to get subnet mask address. It should be allocated 4 bytes. |
hjjeon | 9:dfffa4d6f022 | 470 | * @sa setSUBR() |
hjjeon | 9:dfffa4d6f022 | 471 | */ |
hjjeon | 9:dfffa4d6f022 | 472 | void getSUBR(uint8_t * subr) { |
hjjeon | 9:dfffa4d6f022 | 473 | reg_rd_ip_byte(SUBR, subr); |
hjjeon | 9:dfffa4d6f022 | 474 | } |
hjjeon | 9:dfffa4d6f022 | 475 | |
hjjeon | 9:dfffa4d6f022 | 476 | /** |
hjjeon | 9:dfffa4d6f022 | 477 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 478 | * @brief Set local MAC address |
hjjeon | 9:dfffa4d6f022 | 479 | * @param (uint8_t*)shar Pointer variable to set local MAC address. It should be allocated 6 bytes. |
hjjeon | 9:dfffa4d6f022 | 480 | * @sa getSHAR() |
hjjeon | 9:dfffa4d6f022 | 481 | */ |
hjjeon | 9:dfffa4d6f022 | 482 | void setSHAR(uint8_t * shar) { |
hjjeon | 9:dfffa4d6f022 | 483 | reg_wr_mac(SHAR, shar); |
hjjeon | 9:dfffa4d6f022 | 484 | } |
hjjeon | 9:dfffa4d6f022 | 485 | |
hjjeon | 9:dfffa4d6f022 | 486 | /** |
hjjeon | 9:dfffa4d6f022 | 487 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 488 | * @brief Get local MAC address |
hjjeon | 9:dfffa4d6f022 | 489 | * @param (uint8_t*)shar Pointer variable to get local MAC address. It should be allocated 6 bytes. |
hjjeon | 9:dfffa4d6f022 | 490 | * @sa setSHAR() |
hjjeon | 9:dfffa4d6f022 | 491 | */ |
hjjeon | 9:dfffa4d6f022 | 492 | void getSHAR(uint8_t * shar) { |
hjjeon | 9:dfffa4d6f022 | 493 | reg_rd_mac(SHAR, shar); |
hjjeon | 9:dfffa4d6f022 | 494 | } |
hjjeon | 9:dfffa4d6f022 | 495 | |
hjjeon | 9:dfffa4d6f022 | 496 | /** |
hjjeon | 9:dfffa4d6f022 | 497 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 498 | * @brief Set local IP address |
hjjeon | 9:dfffa4d6f022 | 499 | * @param (uint8_t*)sipr Pointer variable to set local IP address. It should be allocated 4 bytes. |
hjjeon | 9:dfffa4d6f022 | 500 | * @sa getSIPR() |
hjjeon | 9:dfffa4d6f022 | 501 | */ |
hjjeon | 9:dfffa4d6f022 | 502 | void setSIPR(uint8_t * sipr) { |
hjjeon | 9:dfffa4d6f022 | 503 | reg_wr_ip_byte(SIPR, sipr); |
hjjeon | 9:dfffa4d6f022 | 504 | } |
hjjeon | 9:dfffa4d6f022 | 505 | |
hjjeon | 9:dfffa4d6f022 | 506 | /** |
hjjeon | 9:dfffa4d6f022 | 507 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 508 | * @brief Get local IP address |
hjjeon | 9:dfffa4d6f022 | 509 | * @param (uint8_t*)sipr Pointer variable to get local IP address. It should be allocated 4 bytes. |
hjjeon | 9:dfffa4d6f022 | 510 | * @sa setSIPR() |
hjjeon | 9:dfffa4d6f022 | 511 | */ |
hjjeon | 9:dfffa4d6f022 | 512 | void getSIPR(uint8_t * sipr) { |
hjjeon | 9:dfffa4d6f022 | 513 | reg_rd_ip_byte(SIPR, sipr); |
hjjeon | 9:dfffa4d6f022 | 514 | } |
hjjeon | 9:dfffa4d6f022 | 515 | |
hjjeon | 9:dfffa4d6f022 | 516 | /** |
hjjeon | 9:dfffa4d6f022 | 517 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 518 | * @brief Set INTLEVEL register |
hjjeon | 9:dfffa4d6f022 | 519 | * @param (uint16_t)intlevel Value to set @ref INTLEVEL register. |
hjjeon | 9:dfffa4d6f022 | 520 | * @sa getINTLEVEL() |
hjjeon | 9:dfffa4d6f022 | 521 | */ |
hjjeon | 9:dfffa4d6f022 | 522 | void setINTLEVEL(uint16_t intlevel) { |
hjjeon | 9:dfffa4d6f022 | 523 | reg_wr<uint16_t>(INTLEVEL, intlevel); |
hjjeon | 9:dfffa4d6f022 | 524 | } |
hjjeon | 9:dfffa4d6f022 | 525 | |
hjjeon | 9:dfffa4d6f022 | 526 | |
hjjeon | 9:dfffa4d6f022 | 527 | /** |
hjjeon | 9:dfffa4d6f022 | 528 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 529 | * @brief Get INTLEVEL register |
hjjeon | 9:dfffa4d6f022 | 530 | * @return uint16_t. Value of @ref INTLEVEL register. |
hjjeon | 9:dfffa4d6f022 | 531 | * @sa setINTLEVEL() |
hjjeon | 9:dfffa4d6f022 | 532 | */ |
hjjeon | 9:dfffa4d6f022 | 533 | uint16_t getINTLEVEL() { |
hjjeon | 9:dfffa4d6f022 | 534 | return reg_rd<uint16_t>(INTLEVEL); |
hjjeon | 9:dfffa4d6f022 | 535 | } |
hjjeon | 9:dfffa4d6f022 | 536 | |
hjjeon | 9:dfffa4d6f022 | 537 | /** |
hjjeon | 9:dfffa4d6f022 | 538 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 539 | * @brief Set @ref IR register |
hjjeon | 9:dfffa4d6f022 | 540 | * @param (uint8_t)ir Value to set @ref IR register. |
hjjeon | 9:dfffa4d6f022 | 541 | * @sa getIR() |
hjjeon | 9:dfffa4d6f022 | 542 | */ |
hjjeon | 9:dfffa4d6f022 | 543 | void setIR(uint8_t ir) { |
hjjeon | 9:dfffa4d6f022 | 544 | reg_wr<uint8_t>(IR, (ir & 0xF0)); |
hjjeon | 9:dfffa4d6f022 | 545 | } |
hjjeon | 9:dfffa4d6f022 | 546 | |
hjjeon | 9:dfffa4d6f022 | 547 | /** |
hjjeon | 9:dfffa4d6f022 | 548 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 549 | * @brief Get @ref IR register |
hjjeon | 9:dfffa4d6f022 | 550 | * @return uint8_t. Value of @ref IR register. |
hjjeon | 9:dfffa4d6f022 | 551 | * @sa setIR() |
hjjeon | 9:dfffa4d6f022 | 552 | */ |
hjjeon | 9:dfffa4d6f022 | 553 | uint8_t getIR() { |
hjjeon | 9:dfffa4d6f022 | 554 | return reg_rd<uint8_t>(IR & 0xF0); |
hjjeon | 9:dfffa4d6f022 | 555 | } |
hjjeon | 9:dfffa4d6f022 | 556 | |
hjjeon | 9:dfffa4d6f022 | 557 | /** |
hjjeon | 9:dfffa4d6f022 | 558 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 559 | * @brief Set @ref IMR register |
hjjeon | 9:dfffa4d6f022 | 560 | * @param (uint8_t)imr Value to set @ref IMR register. |
hjjeon | 9:dfffa4d6f022 | 561 | * @sa getIMR() |
hjjeon | 9:dfffa4d6f022 | 562 | */ |
hjjeon | 9:dfffa4d6f022 | 563 | void setIMR(uint8_t imr) { |
hjjeon | 9:dfffa4d6f022 | 564 | reg_wr<uint8_t>(IMR, imr); |
hjjeon | 9:dfffa4d6f022 | 565 | } |
hjjeon | 9:dfffa4d6f022 | 566 | |
hjjeon | 9:dfffa4d6f022 | 567 | /** |
hjjeon | 9:dfffa4d6f022 | 568 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 569 | * @brief Get @ref IMR register |
hjjeon | 9:dfffa4d6f022 | 570 | * @return uint8_t. Value of @ref IMR register. |
hjjeon | 9:dfffa4d6f022 | 571 | * @sa setIMR() |
hjjeon | 9:dfffa4d6f022 | 572 | */ |
hjjeon | 9:dfffa4d6f022 | 573 | uint8_t getIMR() { |
hjjeon | 9:dfffa4d6f022 | 574 | return reg_rd<uint8_t>(IMR); |
hjjeon | 9:dfffa4d6f022 | 575 | } |
hjjeon | 9:dfffa4d6f022 | 576 | |
hjjeon | 9:dfffa4d6f022 | 577 | |
hjjeon | 9:dfffa4d6f022 | 578 | /** |
hjjeon | 9:dfffa4d6f022 | 579 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 580 | * @brief Set @ref SIR register |
hjjeon | 9:dfffa4d6f022 | 581 | * @param (uint8_t)sir Value to set @ref SIR register. |
hjjeon | 9:dfffa4d6f022 | 582 | * @sa getSIR() |
hjjeon | 9:dfffa4d6f022 | 583 | */ |
hjjeon | 9:dfffa4d6f022 | 584 | void setSIR(uint8_t sir) { |
hjjeon | 9:dfffa4d6f022 | 585 | reg_wr<uint8_t>(SIR, sir); |
hjjeon | 9:dfffa4d6f022 | 586 | } |
hjjeon | 9:dfffa4d6f022 | 587 | |
hjjeon | 9:dfffa4d6f022 | 588 | /** |
hjjeon | 9:dfffa4d6f022 | 589 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 590 | * @brief Get @ref SIR register |
hjjeon | 9:dfffa4d6f022 | 591 | * @return uint8_t. Value of @ref SIR register. |
hjjeon | 9:dfffa4d6f022 | 592 | * @sa setSIR() |
hjjeon | 9:dfffa4d6f022 | 593 | */ |
hjjeon | 9:dfffa4d6f022 | 594 | uint8_t getSIR() { |
hjjeon | 9:dfffa4d6f022 | 595 | return reg_rd<uint8_t>(SIR); |
hjjeon | 9:dfffa4d6f022 | 596 | } |
hjjeon | 9:dfffa4d6f022 | 597 | /** |
hjjeon | 9:dfffa4d6f022 | 598 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 599 | * @brief Set @ref SIMR register |
hjjeon | 9:dfffa4d6f022 | 600 | * @param (uint8_t)simr Value to set @ref SIMR register. |
hjjeon | 9:dfffa4d6f022 | 601 | * @sa getSIMR() |
hjjeon | 9:dfffa4d6f022 | 602 | */ |
hjjeon | 9:dfffa4d6f022 | 603 | void setSIMR(uint8_t simr) { |
hjjeon | 9:dfffa4d6f022 | 604 | reg_wr<uint8_t>(SIMR, simr); |
hjjeon | 9:dfffa4d6f022 | 605 | } |
hjjeon | 9:dfffa4d6f022 | 606 | |
hjjeon | 9:dfffa4d6f022 | 607 | /** |
hjjeon | 9:dfffa4d6f022 | 608 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 609 | * @brief Get @ref SIMR register |
hjjeon | 9:dfffa4d6f022 | 610 | * @return uint8_t. Value of @ref SIMR register. |
hjjeon | 9:dfffa4d6f022 | 611 | * @sa setSIMR() |
hjjeon | 9:dfffa4d6f022 | 612 | */ |
hjjeon | 9:dfffa4d6f022 | 613 | uint8_t getSIMR() { |
hjjeon | 9:dfffa4d6f022 | 614 | return reg_rd<uint8_t>(SIMR); |
hjjeon | 9:dfffa4d6f022 | 615 | } |
hjjeon | 9:dfffa4d6f022 | 616 | |
hjjeon | 9:dfffa4d6f022 | 617 | /** |
hjjeon | 9:dfffa4d6f022 | 618 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 619 | * @brief Set @ref RTR register |
hjjeon | 9:dfffa4d6f022 | 620 | * @param (uint16_t)rtr Value to set @ref RTR register. |
hjjeon | 9:dfffa4d6f022 | 621 | * @sa getRTR() |
hjjeon | 9:dfffa4d6f022 | 622 | */ |
hjjeon | 9:dfffa4d6f022 | 623 | void setRTR(uint16_t rtr) { |
hjjeon | 9:dfffa4d6f022 | 624 | reg_wr<uint16_t>(RTR, rtr); |
hjjeon | 9:dfffa4d6f022 | 625 | } |
hjjeon | 9:dfffa4d6f022 | 626 | |
hjjeon | 9:dfffa4d6f022 | 627 | /** |
hjjeon | 9:dfffa4d6f022 | 628 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 629 | * @brief Get @ref RTR register |
hjjeon | 9:dfffa4d6f022 | 630 | * @return uint16_t. Value of @ref RTR register. |
hjjeon | 9:dfffa4d6f022 | 631 | * @sa setRTR() |
hjjeon | 9:dfffa4d6f022 | 632 | */ |
hjjeon | 9:dfffa4d6f022 | 633 | uint16_t getRTR() { |
hjjeon | 9:dfffa4d6f022 | 634 | return reg_rd<uint16_t>(RTR); |
hjjeon | 9:dfffa4d6f022 | 635 | } |
hjjeon | 9:dfffa4d6f022 | 636 | |
hjjeon | 9:dfffa4d6f022 | 637 | /** |
hjjeon | 9:dfffa4d6f022 | 638 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 639 | * @brief Set @ref RCR register |
hjjeon | 9:dfffa4d6f022 | 640 | * @param (uint8_t)rcr Value to set @ref RCR register. |
hjjeon | 9:dfffa4d6f022 | 641 | * @sa getRCR() |
hjjeon | 9:dfffa4d6f022 | 642 | */ |
hjjeon | 9:dfffa4d6f022 | 643 | void setRCR(uint8_t rcr) { |
hjjeon | 9:dfffa4d6f022 | 644 | reg_wr<uint8_t>(RCR, rcr); |
hjjeon | 9:dfffa4d6f022 | 645 | } |
hjjeon | 9:dfffa4d6f022 | 646 | |
hjjeon | 9:dfffa4d6f022 | 647 | /** |
hjjeon | 9:dfffa4d6f022 | 648 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 649 | * @brief Get @ref RCR register |
hjjeon | 9:dfffa4d6f022 | 650 | * @return uint8_t. Value of @ref RCR register. |
hjjeon | 9:dfffa4d6f022 | 651 | * @sa setRCR() |
hjjeon | 9:dfffa4d6f022 | 652 | */ |
hjjeon | 9:dfffa4d6f022 | 653 | uint8_t getRCR() { |
hjjeon | 9:dfffa4d6f022 | 654 | return reg_rd<uint8_t>(RCR); |
hjjeon | 9:dfffa4d6f022 | 655 | } |
hjjeon | 9:dfffa4d6f022 | 656 | |
hjjeon | 9:dfffa4d6f022 | 657 | //================================================== test done =========================================================== |
hjjeon | 9:dfffa4d6f022 | 658 | |
hjjeon | 9:dfffa4d6f022 | 659 | /** |
hjjeon | 9:dfffa4d6f022 | 660 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 661 | * @brief Set @ref PTIMER register |
hjjeon | 9:dfffa4d6f022 | 662 | * @param (uint8_t)ptimer Value to set @ref PTIMER register. |
hjjeon | 9:dfffa4d6f022 | 663 | * @sa getPTIMER() |
hjjeon | 9:dfffa4d6f022 | 664 | */ |
hjjeon | 9:dfffa4d6f022 | 665 | void setPTIMER(uint8_t ptimer) { |
hjjeon | 9:dfffa4d6f022 | 666 | reg_wr<uint8_t>(PTIMER, ptimer); |
hjjeon | 9:dfffa4d6f022 | 667 | } |
hjjeon | 9:dfffa4d6f022 | 668 | |
hjjeon | 9:dfffa4d6f022 | 669 | /** |
hjjeon | 9:dfffa4d6f022 | 670 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 671 | * @brief Get @ref PTIMER register |
hjjeon | 9:dfffa4d6f022 | 672 | * @return uint8_t. Value of @ref PTIMER register. |
hjjeon | 9:dfffa4d6f022 | 673 | * @sa setPTIMER() |
hjjeon | 9:dfffa4d6f022 | 674 | */ |
hjjeon | 9:dfffa4d6f022 | 675 | uint8_t getPTIMER() { |
hjjeon | 9:dfffa4d6f022 | 676 | return reg_rd<uint8_t>(PTIMER); |
hjjeon | 9:dfffa4d6f022 | 677 | } |
hjjeon | 9:dfffa4d6f022 | 678 | |
hjjeon | 9:dfffa4d6f022 | 679 | /** |
hjjeon | 9:dfffa4d6f022 | 680 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 681 | * @brief Set @ref PMAGIC register |
hjjeon | 9:dfffa4d6f022 | 682 | * @param (uint8_t)pmagic Value to set @ref PMAGIC register. |
hjjeon | 9:dfffa4d6f022 | 683 | * @sa getPMAGIC() |
hjjeon | 9:dfffa4d6f022 | 684 | */ |
hjjeon | 9:dfffa4d6f022 | 685 | /* |
hjjeon | 9:dfffa4d6f022 | 686 | #define setPMAGIC(pmagic) \ |
hjjeon | 9:dfffa4d6f022 | 687 | WIZCHIP_WRITE(PMAGIC, pmagic) |
hjjeon | 9:dfffa4d6f022 | 688 | */ |
hjjeon | 9:dfffa4d6f022 | 689 | void setPMAGIC(uint8_t pmagic) { |
hjjeon | 9:dfffa4d6f022 | 690 | reg_wr<uint8_t>(PMAGIC, pmagic ); |
hjjeon | 9:dfffa4d6f022 | 691 | } |
hjjeon | 9:dfffa4d6f022 | 692 | /** |
hjjeon | 9:dfffa4d6f022 | 693 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 694 | * @brief Get @ref PMAGIC register |
hjjeon | 9:dfffa4d6f022 | 695 | * @return uint8_t. Value of @ref PMAGIC register. |
hjjeon | 9:dfffa4d6f022 | 696 | * @sa setPMAGIC() |
hjjeon | 9:dfffa4d6f022 | 697 | */ |
hjjeon | 9:dfffa4d6f022 | 698 | /* |
hjjeon | 9:dfffa4d6f022 | 699 | #define getPMAGIC() \ |
hjjeon | 9:dfffa4d6f022 | 700 | WIZCHIP_READ(PMAGIC) |
hjjeon | 9:dfffa4d6f022 | 701 | */ |
hjjeon | 9:dfffa4d6f022 | 702 | uint8_t getPMAGIC(uint8_t pmagic) { |
hjjeon | 9:dfffa4d6f022 | 703 | return reg_rd<uint8_t>(PMAGIC, pmagic); |
hjjeon | 9:dfffa4d6f022 | 704 | } |
hjjeon | 9:dfffa4d6f022 | 705 | /** |
hjjeon | 9:dfffa4d6f022 | 706 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 707 | * @brief Set PHAR address |
hjjeon | 9:dfffa4d6f022 | 708 | * @param (uint8_t*)phar Pointer variable to set PPP destination MAC register address. It should be allocated 6 bytes. |
hjjeon | 9:dfffa4d6f022 | 709 | * @sa getPHAR() |
hjjeon | 9:dfffa4d6f022 | 710 | */ |
hjjeon | 9:dfffa4d6f022 | 711 | void setPHAR(uint8_t * phar) { |
hjjeon | 9:dfffa4d6f022 | 712 | reg_wr_mac(PHAR, phar); |
hjjeon | 9:dfffa4d6f022 | 713 | } |
hjjeon | 9:dfffa4d6f022 | 714 | |
hjjeon | 9:dfffa4d6f022 | 715 | /** |
hjjeon | 9:dfffa4d6f022 | 716 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 717 | * @brief Get local IP address |
hjjeon | 9:dfffa4d6f022 | 718 | * @param (uint8_t*)phar Pointer variable to PPP destination MAC register address. It should be allocated 6 bytes. |
hjjeon | 9:dfffa4d6f022 | 719 | * @sa setPHAR() |
hjjeon | 9:dfffa4d6f022 | 720 | */ |
hjjeon | 9:dfffa4d6f022 | 721 | void getPHAR(uint8_t * phar) { |
hjjeon | 9:dfffa4d6f022 | 722 | reg_rd_mac(PHAR, phar); |
hjjeon | 9:dfffa4d6f022 | 723 | } |
hjjeon | 9:dfffa4d6f022 | 724 | |
hjjeon | 9:dfffa4d6f022 | 725 | /** |
hjjeon | 9:dfffa4d6f022 | 726 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 727 | * @brief Set @ref PSID register |
hjjeon | 9:dfffa4d6f022 | 728 | * @param (uint16_t)psid Value to set @ref PSID register. |
hjjeon | 9:dfffa4d6f022 | 729 | * @sa getPSID() |
hjjeon | 9:dfffa4d6f022 | 730 | */ |
hjjeon | 9:dfffa4d6f022 | 731 | void setPSID(uint16_t psid) { |
hjjeon | 9:dfffa4d6f022 | 732 | reg_wr<uint16_t>(PSID, psid ); |
hjjeon | 9:dfffa4d6f022 | 733 | } |
hjjeon | 9:dfffa4d6f022 | 734 | |
hjjeon | 9:dfffa4d6f022 | 735 | /** |
hjjeon | 9:dfffa4d6f022 | 736 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 737 | * @brief Get @ref PSID register |
hjjeon | 9:dfffa4d6f022 | 738 | * @return uint16_t. Value of @ref PSID register. |
hjjeon | 9:dfffa4d6f022 | 739 | * @sa setPSID() |
hjjeon | 9:dfffa4d6f022 | 740 | */ |
hjjeon | 9:dfffa4d6f022 | 741 | //uint16_t getPSID(void); |
hjjeon | 9:dfffa4d6f022 | 742 | uint16_t getPSID() { |
hjjeon | 9:dfffa4d6f022 | 743 | return reg_rd<uint16_t>(PSID); |
hjjeon | 9:dfffa4d6f022 | 744 | } |
hjjeon | 9:dfffa4d6f022 | 745 | |
hjjeon | 9:dfffa4d6f022 | 746 | /** |
hjjeon | 9:dfffa4d6f022 | 747 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 748 | * @brief Set @ref PMRU register |
hjjeon | 9:dfffa4d6f022 | 749 | * @param (uint16_t)pmru Value to set @ref PMRU register. |
hjjeon | 9:dfffa4d6f022 | 750 | * @sa getPMRU() |
hjjeon | 9:dfffa4d6f022 | 751 | */ |
hjjeon | 9:dfffa4d6f022 | 752 | void setPMRU(uint16_t pmru) { |
hjjeon | 9:dfffa4d6f022 | 753 | reg_wr<uint16_t>(PMRU, pmru); |
hjjeon | 9:dfffa4d6f022 | 754 | } |
hjjeon | 9:dfffa4d6f022 | 755 | |
hjjeon | 9:dfffa4d6f022 | 756 | /** |
hjjeon | 9:dfffa4d6f022 | 757 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 758 | * @brief Get @ref PMRU register |
hjjeon | 9:dfffa4d6f022 | 759 | * @return uint16_t. Value of @ref PMRU register. |
hjjeon | 9:dfffa4d6f022 | 760 | * @sa setPMRU() |
hjjeon | 9:dfffa4d6f022 | 761 | */ |
hjjeon | 9:dfffa4d6f022 | 762 | uint16_t getPMRU() { |
hjjeon | 9:dfffa4d6f022 | 763 | return reg_rd<uint16_t>(PMRU); |
hjjeon | 9:dfffa4d6f022 | 764 | } |
hjjeon | 9:dfffa4d6f022 | 765 | |
hjjeon | 9:dfffa4d6f022 | 766 | /** |
hjjeon | 9:dfffa4d6f022 | 767 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 768 | * @brief Get unreachable IP address |
hjjeon | 9:dfffa4d6f022 | 769 | * @param (uint8_t*)uipr Pointer variable to get unreachable IP address. It should be allocated 4 bytes. |
hjjeon | 9:dfffa4d6f022 | 770 | */ |
hjjeon | 9:dfffa4d6f022 | 771 | void getUIPR(uint8_t * uipr) { |
hjjeon | 9:dfffa4d6f022 | 772 | reg_rd_ip_byte(UIPR,uipr); |
hjjeon | 9:dfffa4d6f022 | 773 | } |
hjjeon | 9:dfffa4d6f022 | 774 | |
hjjeon | 9:dfffa4d6f022 | 775 | /** |
hjjeon | 9:dfffa4d6f022 | 776 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 777 | * @brief Get @ref UPORTR register |
hjjeon | 9:dfffa4d6f022 | 778 | * @return uint16_t. Value of @ref UPORTR register. |
hjjeon | 9:dfffa4d6f022 | 779 | */ |
hjjeon | 9:dfffa4d6f022 | 780 | uint16_t getUPORTR() { |
hjjeon | 9:dfffa4d6f022 | 781 | return reg_rd<uint16_t>(UPORTR); |
hjjeon | 9:dfffa4d6f022 | 782 | } |
hjjeon | 9:dfffa4d6f022 | 783 | |
hjjeon | 9:dfffa4d6f022 | 784 | /** |
hjjeon | 9:dfffa4d6f022 | 785 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 786 | * @brief Set @ref PHYCFGR register |
hjjeon | 9:dfffa4d6f022 | 787 | * @param (uint8_t)phycfgr Value to set @ref PHYCFGR register. |
hjjeon | 9:dfffa4d6f022 | 788 | * @sa getPHYCFGR() |
hjjeon | 9:dfffa4d6f022 | 789 | */ |
hjjeon | 9:dfffa4d6f022 | 790 | void setPHYCFGR(uint8_t phycfgr) { |
hjjeon | 9:dfffa4d6f022 | 791 | reg_wr<uint8_t>(PHYCFGR, phycfgr); |
hjjeon | 9:dfffa4d6f022 | 792 | } |
hjjeon | 9:dfffa4d6f022 | 793 | |
hjjeon | 9:dfffa4d6f022 | 794 | /** |
hjjeon | 9:dfffa4d6f022 | 795 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 796 | * @brief Get @ref PHYCFGR register |
hjjeon | 9:dfffa4d6f022 | 797 | * @return uint8_t. Value of @ref PHYCFGR register. |
hjjeon | 9:dfffa4d6f022 | 798 | * @sa setPHYCFGR() |
hjjeon | 9:dfffa4d6f022 | 799 | */ |
hjjeon | 9:dfffa4d6f022 | 800 | uint8_t getPHYCFGR() { |
hjjeon | 9:dfffa4d6f022 | 801 | return reg_rd<uint8_t>(PHYCFGR); |
hjjeon | 9:dfffa4d6f022 | 802 | } |
hjjeon | 9:dfffa4d6f022 | 803 | |
hjjeon | 9:dfffa4d6f022 | 804 | /** |
hjjeon | 9:dfffa4d6f022 | 805 | * @ingroup Common_register_access_function |
hjjeon | 9:dfffa4d6f022 | 806 | * @brief Get @ref VERSIONR register |
hjjeon | 9:dfffa4d6f022 | 807 | * @return uint8_t. Value of @ref VERSIONR register. |
hjjeon | 9:dfffa4d6f022 | 808 | */ |
hjjeon | 9:dfffa4d6f022 | 809 | uint8_t getVERSIONR() { |
hjjeon | 9:dfffa4d6f022 | 810 | return reg_rd<uint8_t>(VERSIONR); |
hjjeon | 9:dfffa4d6f022 | 811 | } |
hjjeon | 9:dfffa4d6f022 | 812 | |
hjjeon | 9:dfffa4d6f022 | 813 | ///////////////////////////////////// |
hjjeon | 9:dfffa4d6f022 | 814 | |
hjjeon | 9:dfffa4d6f022 | 815 | /////////////////////////////////// |
hjjeon | 9:dfffa4d6f022 | 816 | // Socket N register I/O function // |
hjjeon | 9:dfffa4d6f022 | 817 | /////////////////////////////////// |
hjjeon | 9:dfffa4d6f022 | 818 | /** |
hjjeon | 9:dfffa4d6f022 | 819 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 820 | * @brief Set @ref Sn_MR register |
hjjeon | 9:dfffa4d6f022 | 821 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 822 | * @param (uint8_t)mr Value to set @ref Sn_MR |
hjjeon | 9:dfffa4d6f022 | 823 | * @sa getSn_MR() |
hjjeon | 9:dfffa4d6f022 | 824 | */ |
hjjeon | 9:dfffa4d6f022 | 825 | void setSn_MR(uint8_t sn, uint8_t mr) { |
hjjeon | 9:dfffa4d6f022 | 826 | sreg<uint8_t>(sn, MR, mr); |
hjjeon | 9:dfffa4d6f022 | 827 | } |
hjjeon | 9:dfffa4d6f022 | 828 | |
hjjeon | 9:dfffa4d6f022 | 829 | /** |
hjjeon | 9:dfffa4d6f022 | 830 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 831 | * @brief Get @ref Sn_MR register |
hjjeon | 9:dfffa4d6f022 | 832 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 833 | * @return uint8_t. Value of @ref Sn_MR. |
hjjeon | 9:dfffa4d6f022 | 834 | * @sa setSn_MR() |
hjjeon | 9:dfffa4d6f022 | 835 | */ |
hjjeon | 9:dfffa4d6f022 | 836 | uint8_t getSn_MR(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 837 | return sreg<uint8_t>(sn, Sn_MR); |
hjjeon | 9:dfffa4d6f022 | 838 | } |
hjjeon | 9:dfffa4d6f022 | 839 | |
hjjeon | 9:dfffa4d6f022 | 840 | /** |
hjjeon | 9:dfffa4d6f022 | 841 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 842 | * @brief Set @ref Sn_CR register |
hjjeon | 9:dfffa4d6f022 | 843 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 844 | * @param (uint8_t)cr Value to set @ref Sn_CR |
hjjeon | 9:dfffa4d6f022 | 845 | * @sa getSn_CR() |
hjjeon | 9:dfffa4d6f022 | 846 | */ |
hjjeon | 9:dfffa4d6f022 | 847 | void setSn_CR(uint8_t sn, uint8_t cr) { |
hjjeon | 9:dfffa4d6f022 | 848 | sreg<uint8_t>(sn, Sn_CR, cr); |
hjjeon | 9:dfffa4d6f022 | 849 | } |
hjjeon | 9:dfffa4d6f022 | 850 | |
hjjeon | 9:dfffa4d6f022 | 851 | /** |
hjjeon | 9:dfffa4d6f022 | 852 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 853 | * @brief Get @ref Sn_CR register |
hjjeon | 9:dfffa4d6f022 | 854 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 855 | * @return uint8_t. Value of @ref Sn_CR. |
hjjeon | 9:dfffa4d6f022 | 856 | * @sa setSn_CR() |
hjjeon | 9:dfffa4d6f022 | 857 | */ |
hjjeon | 9:dfffa4d6f022 | 858 | uint8_t getSn_CR(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 859 | return sreg<uint8_t>(sn, Sn_CR); |
hjjeon | 9:dfffa4d6f022 | 860 | } |
hjjeon | 9:dfffa4d6f022 | 861 | |
hjjeon | 9:dfffa4d6f022 | 862 | /** |
hjjeon | 9:dfffa4d6f022 | 863 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 864 | * @brief Set @ref Sn_IR register |
hjjeon | 9:dfffa4d6f022 | 865 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 866 | * @param (uint8_t)ir Value to set @ref Sn_IR |
hjjeon | 9:dfffa4d6f022 | 867 | * @sa getSn_IR() |
hjjeon | 9:dfffa4d6f022 | 868 | */ |
hjjeon | 9:dfffa4d6f022 | 869 | void setSn_IR(uint8_t sn, uint8_t ir) { |
hjjeon | 9:dfffa4d6f022 | 870 | sreg<uint8_t>(sn, Sn_IR, (ir & 0x1F)); |
hjjeon | 9:dfffa4d6f022 | 871 | } |
hjjeon | 9:dfffa4d6f022 | 872 | |
hjjeon | 9:dfffa4d6f022 | 873 | /** |
hjjeon | 9:dfffa4d6f022 | 874 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 875 | * @brief Get @ref Sn_IR register |
hjjeon | 9:dfffa4d6f022 | 876 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 877 | * @return uint8_t. Value of @ref Sn_IR. |
hjjeon | 9:dfffa4d6f022 | 878 | * @sa setSn_IR() |
hjjeon | 9:dfffa4d6f022 | 879 | */ |
hjjeon | 9:dfffa4d6f022 | 880 | uint8_t getSn_IR(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 881 | return (sreg<uint8_t>(sn, Sn_IR)) & 0x1F; |
hjjeon | 9:dfffa4d6f022 | 882 | } |
hjjeon | 9:dfffa4d6f022 | 883 | |
hjjeon | 9:dfffa4d6f022 | 884 | /** |
hjjeon | 9:dfffa4d6f022 | 885 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 886 | * @brief Set @ref Sn_IMR register |
hjjeon | 9:dfffa4d6f022 | 887 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 888 | * @param (uint8_t)imr Value to set @ref Sn_IMR |
hjjeon | 9:dfffa4d6f022 | 889 | * @sa getSn_IMR() |
hjjeon | 9:dfffa4d6f022 | 890 | */ |
hjjeon | 9:dfffa4d6f022 | 891 | void setSn_IMR(uint8_t sn, uint8_t imr) { |
hjjeon | 9:dfffa4d6f022 | 892 | sreg<uint8_t>(sn, Sn_IMR, (imr & 0x1F)); |
hjjeon | 9:dfffa4d6f022 | 893 | } |
hjjeon | 9:dfffa4d6f022 | 894 | |
hjjeon | 9:dfffa4d6f022 | 895 | /** |
hjjeon | 9:dfffa4d6f022 | 896 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 897 | * @brief Get @ref Sn_IMR register |
hjjeon | 9:dfffa4d6f022 | 898 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 899 | * @return uint8_t. Value of @ref Sn_IMR. |
hjjeon | 9:dfffa4d6f022 | 900 | * @sa setSn_IMR() |
hjjeon | 9:dfffa4d6f022 | 901 | */ |
hjjeon | 9:dfffa4d6f022 | 902 | uint8_t getSn_IMR(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 903 | return (sreg<uint8_t>(sn, Sn_IMR)) & 0x1F; |
hjjeon | 9:dfffa4d6f022 | 904 | } |
hjjeon | 9:dfffa4d6f022 | 905 | |
hjjeon | 9:dfffa4d6f022 | 906 | /** |
hjjeon | 9:dfffa4d6f022 | 907 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 908 | * @brief Get @ref Sn_SR register |
hjjeon | 9:dfffa4d6f022 | 909 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 910 | * @return uint8_t. Value of @ref Sn_SR. |
hjjeon | 9:dfffa4d6f022 | 911 | */ |
hjjeon | 9:dfffa4d6f022 | 912 | uint8_t getSn_SR(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 913 | return sreg<uint8_t>(sn, Sn_SR); |
hjjeon | 9:dfffa4d6f022 | 914 | } |
hjjeon | 9:dfffa4d6f022 | 915 | |
hjjeon | 9:dfffa4d6f022 | 916 | /** |
hjjeon | 9:dfffa4d6f022 | 917 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 918 | * @brief Set @ref Sn_PORT register |
hjjeon | 9:dfffa4d6f022 | 919 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 920 | * @param (uint16_t)port Value to set @ref Sn_PORT. |
hjjeon | 9:dfffa4d6f022 | 921 | * @sa getSn_PORT() |
hjjeon | 9:dfffa4d6f022 | 922 | */ |
hjjeon | 9:dfffa4d6f022 | 923 | void setSn_PORT(uint8_t sn, uint16_t port) { |
hjjeon | 9:dfffa4d6f022 | 924 | sreg<uint16_t>(sn, Sn_PORT, port ); |
hjjeon | 9:dfffa4d6f022 | 925 | } |
hjjeon | 9:dfffa4d6f022 | 926 | |
hjjeon | 9:dfffa4d6f022 | 927 | /** |
hjjeon | 9:dfffa4d6f022 | 928 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 929 | * @brief Get @ref Sn_PORT register |
hjjeon | 9:dfffa4d6f022 | 930 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 931 | * @return uint16_t. Value of @ref Sn_PORT. |
hjjeon | 9:dfffa4d6f022 | 932 | * @sa setSn_PORT() |
hjjeon | 9:dfffa4d6f022 | 933 | */ |
hjjeon | 9:dfffa4d6f022 | 934 | uint16_t getSn_PORT(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 935 | return sreg<uint16_t>(sn, Sn_PORT); |
hjjeon | 9:dfffa4d6f022 | 936 | } |
hjjeon | 9:dfffa4d6f022 | 937 | |
hjjeon | 9:dfffa4d6f022 | 938 | /** |
hjjeon | 9:dfffa4d6f022 | 939 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 940 | * @brief Set @ref Sn_DHAR register |
hjjeon | 9:dfffa4d6f022 | 941 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 942 | * @param (uint8_t*)dhar Pointer variable to set socket n destination hardware address. It should be allocated 6 bytes. |
hjjeon | 9:dfffa4d6f022 | 943 | * @sa getSn_DHAR() |
hjjeon | 9:dfffa4d6f022 | 944 | */ |
hjjeon | 9:dfffa4d6f022 | 945 | void setSn_DHAR(uint8_t sn, uint8_t * dhar) { |
hjjeon | 9:dfffa4d6f022 | 946 | spi_write(Sn_DHAR, (0x0C + (sn << 5)), dhar, 6); |
hjjeon | 9:dfffa4d6f022 | 947 | } |
hjjeon | 9:dfffa4d6f022 | 948 | |
hjjeon | 9:dfffa4d6f022 | 949 | /** |
hjjeon | 9:dfffa4d6f022 | 950 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 951 | * @brief Get @ref Sn_MR register |
hjjeon | 9:dfffa4d6f022 | 952 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 953 | * @param (uint8_t*)dhar Pointer variable to get socket n destination hardware address. It should be allocated 6 bytes. |
hjjeon | 9:dfffa4d6f022 | 954 | * @sa setSn_DHAR() |
hjjeon | 9:dfffa4d6f022 | 955 | */ |
hjjeon | 9:dfffa4d6f022 | 956 | void getSn_DHAR(uint8_t sn, uint8_t * dhar) { |
hjjeon | 9:dfffa4d6f022 | 957 | spi_read(Sn_DHAR, (0x08 + (sn << 5)), dhar, 6); |
hjjeon | 9:dfffa4d6f022 | 958 | } |
hjjeon | 9:dfffa4d6f022 | 959 | |
hjjeon | 9:dfffa4d6f022 | 960 | /** |
hjjeon | 9:dfffa4d6f022 | 961 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 962 | * @brief Set @ref Sn_DIPR register |
hjjeon | 9:dfffa4d6f022 | 963 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 964 | * @param (uint8_t*)dipr Pointer variable to set socket n destination IP address. It should be allocated 4 bytes. |
hjjeon | 9:dfffa4d6f022 | 965 | * @sa getSn_DIPR() |
hjjeon | 9:dfffa4d6f022 | 966 | */ |
hjjeon | 9:dfffa4d6f022 | 967 | void setSn_DIPR(uint8_t sn, uint8_t * dipr) { |
hjjeon | 9:dfffa4d6f022 | 968 | spi_write(Sn_DIPR, (0x0C + (sn << 5)), dipr, 4); |
hjjeon | 9:dfffa4d6f022 | 969 | } |
hjjeon | 9:dfffa4d6f022 | 970 | |
hjjeon | 9:dfffa4d6f022 | 971 | /** |
hjjeon | 9:dfffa4d6f022 | 972 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 973 | * @brief Get @ref Sn_DIPR register |
hjjeon | 9:dfffa4d6f022 | 974 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 975 | * @param (uint8_t*)dipr Pointer variable to get socket n destination IP address. It should be allocated 4 bytes. |
hjjeon | 9:dfffa4d6f022 | 976 | * @sa SetSn_DIPR() |
hjjeon | 9:dfffa4d6f022 | 977 | */ |
hjjeon | 9:dfffa4d6f022 | 978 | void getSn_DIPR(uint8_t sn, uint8_t * dipr) { |
hjjeon | 9:dfffa4d6f022 | 979 | spi_read(Sn_DIPR, (0x08 + (sn << 5)), dipr, 4); |
hjjeon | 9:dfffa4d6f022 | 980 | } |
hjjeon | 9:dfffa4d6f022 | 981 | |
hjjeon | 9:dfffa4d6f022 | 982 | /** |
hjjeon | 9:dfffa4d6f022 | 983 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 984 | * @brief Set @ref Sn_DPORT register |
hjjeon | 9:dfffa4d6f022 | 985 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 986 | * @param (uint16_t)dport Value to set @ref Sn_DPORT |
hjjeon | 9:dfffa4d6f022 | 987 | * @sa getSn_DPORT() |
hjjeon | 9:dfffa4d6f022 | 988 | */ |
hjjeon | 9:dfffa4d6f022 | 989 | void setSn_DPORT(uint8_t sn, uint16_t dport) { |
hjjeon | 9:dfffa4d6f022 | 990 | sreg<uint16_t>(sn, Sn_DPORT, dport); |
hjjeon | 9:dfffa4d6f022 | 991 | } |
hjjeon | 9:dfffa4d6f022 | 992 | |
hjjeon | 9:dfffa4d6f022 | 993 | /** |
hjjeon | 9:dfffa4d6f022 | 994 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 995 | * @brief Get @ref Sn_DPORT register |
hjjeon | 9:dfffa4d6f022 | 996 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 997 | * @return uint16_t. Value of @ref Sn_DPORT. |
hjjeon | 9:dfffa4d6f022 | 998 | * @sa setSn_DPORT() |
hjjeon | 9:dfffa4d6f022 | 999 | */ |
hjjeon | 9:dfffa4d6f022 | 1000 | uint16_t getSn_DPORT(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1001 | return sreg<uint16_t>(sn, Sn_DPORT); |
hjjeon | 9:dfffa4d6f022 | 1002 | } |
hjjeon | 9:dfffa4d6f022 | 1003 | |
hjjeon | 9:dfffa4d6f022 | 1004 | /** |
hjjeon | 9:dfffa4d6f022 | 1005 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1006 | * @brief Set @ref Sn_MSSR register |
hjjeon | 9:dfffa4d6f022 | 1007 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1008 | * @param (uint16_t)mss Value to set @ref Sn_MSSR |
hjjeon | 9:dfffa4d6f022 | 1009 | * @sa setSn_MSSR() |
hjjeon | 9:dfffa4d6f022 | 1010 | */ |
hjjeon | 9:dfffa4d6f022 | 1011 | void setSn_MSSR(uint8_t sn, uint16_t mss) { |
hjjeon | 9:dfffa4d6f022 | 1012 | sreg<uint16_t>(sn, Sn_MSSR, mss); |
hjjeon | 9:dfffa4d6f022 | 1013 | } |
hjjeon | 9:dfffa4d6f022 | 1014 | |
hjjeon | 9:dfffa4d6f022 | 1015 | /** |
hjjeon | 9:dfffa4d6f022 | 1016 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1017 | * @brief Get @ref Sn_MSSR register |
hjjeon | 9:dfffa4d6f022 | 1018 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1019 | * @return uint16_t. Value of @ref Sn_MSSR. |
hjjeon | 9:dfffa4d6f022 | 1020 | * @sa setSn_MSSR() |
hjjeon | 9:dfffa4d6f022 | 1021 | */ |
hjjeon | 9:dfffa4d6f022 | 1022 | uint16_t getSn_MSSR(uint16_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1023 | return sreg<uint16_t>(sn, Sn_MSSR); |
hjjeon | 9:dfffa4d6f022 | 1024 | } |
hjjeon | 9:dfffa4d6f022 | 1025 | |
hjjeon | 9:dfffa4d6f022 | 1026 | /** |
hjjeon | 9:dfffa4d6f022 | 1027 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1028 | * @brief Set @ref Sn_TOS register |
hjjeon | 9:dfffa4d6f022 | 1029 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1030 | * @param (uint8_t)tos Value to set @ref Sn_TOS |
hjjeon | 9:dfffa4d6f022 | 1031 | * @sa getSn_TOS() |
hjjeon | 9:dfffa4d6f022 | 1032 | */ |
hjjeon | 9:dfffa4d6f022 | 1033 | void setSn_TOS(uint8_t sn, uint8_t tos) { |
hjjeon | 9:dfffa4d6f022 | 1034 | sreg<uint8_t>(sn, Sn_TOS, tos); |
hjjeon | 9:dfffa4d6f022 | 1035 | } |
hjjeon | 9:dfffa4d6f022 | 1036 | |
hjjeon | 9:dfffa4d6f022 | 1037 | /** |
hjjeon | 9:dfffa4d6f022 | 1038 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1039 | * @brief Get @ref Sn_TOS register |
hjjeon | 9:dfffa4d6f022 | 1040 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1041 | * @return uint8_t. Value of Sn_TOS. |
hjjeon | 9:dfffa4d6f022 | 1042 | * @sa setSn_TOS() |
hjjeon | 9:dfffa4d6f022 | 1043 | */ |
hjjeon | 9:dfffa4d6f022 | 1044 | uint8_t getSn_TOS(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1045 | return sreg<uint8_t>(sn, Sn_TOS); |
hjjeon | 9:dfffa4d6f022 | 1046 | } |
hjjeon | 9:dfffa4d6f022 | 1047 | |
hjjeon | 9:dfffa4d6f022 | 1048 | /** |
hjjeon | 9:dfffa4d6f022 | 1049 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1050 | * @brief Set @ref Sn_TTL register |
hjjeon | 9:dfffa4d6f022 | 1051 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1052 | * @param (uint8_t)ttl Value to set @ref Sn_TTL |
hjjeon | 9:dfffa4d6f022 | 1053 | * @sa getSn_TTL() |
hjjeon | 9:dfffa4d6f022 | 1054 | */ |
hjjeon | 9:dfffa4d6f022 | 1055 | void setSn_TTL(uint8_t sn, uint8_t ttl) { |
hjjeon | 9:dfffa4d6f022 | 1056 | sreg<uint8_t>(sn, Sn_TTL, ttl); |
hjjeon | 9:dfffa4d6f022 | 1057 | } |
hjjeon | 9:dfffa4d6f022 | 1058 | |
hjjeon | 9:dfffa4d6f022 | 1059 | |
hjjeon | 9:dfffa4d6f022 | 1060 | /** |
hjjeon | 9:dfffa4d6f022 | 1061 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1062 | * @brief Get @ref Sn_TTL register |
hjjeon | 9:dfffa4d6f022 | 1063 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1064 | * @return uint8_t. Value of @ref Sn_TTL. |
hjjeon | 9:dfffa4d6f022 | 1065 | * @sa setSn_TTL() |
hjjeon | 9:dfffa4d6f022 | 1066 | */ |
hjjeon | 9:dfffa4d6f022 | 1067 | uint8_t getSn_TTL(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1068 | return sreg<uint8_t>(sn, Sn_TTL); |
hjjeon | 9:dfffa4d6f022 | 1069 | } |
hjjeon | 9:dfffa4d6f022 | 1070 | |
hjjeon | 9:dfffa4d6f022 | 1071 | |
hjjeon | 9:dfffa4d6f022 | 1072 | /** |
hjjeon | 9:dfffa4d6f022 | 1073 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1074 | * @brief Set @ref Sn_RXBUF_SIZE register |
hjjeon | 9:dfffa4d6f022 | 1075 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1076 | * @param (uint8_t)rxbufsize Value to set @ref Sn_RXBUF_SIZE |
hjjeon | 9:dfffa4d6f022 | 1077 | * @sa getSn_RXBUF_SIZE() |
hjjeon | 9:dfffa4d6f022 | 1078 | */ |
hjjeon | 9:dfffa4d6f022 | 1079 | void setSn_RXBUF_SIZE(uint8_t sn, uint8_t rxbufsize) { |
hjjeon | 9:dfffa4d6f022 | 1080 | sreg<uint8_t>(sn, Sn_RXBUF_SIZE ,rxbufsize); |
hjjeon | 9:dfffa4d6f022 | 1081 | } |
hjjeon | 9:dfffa4d6f022 | 1082 | |
hjjeon | 9:dfffa4d6f022 | 1083 | |
hjjeon | 9:dfffa4d6f022 | 1084 | /** |
hjjeon | 9:dfffa4d6f022 | 1085 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1086 | * @brief Get @ref Sn_RXBUF_SIZE register |
hjjeon | 9:dfffa4d6f022 | 1087 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1088 | * @return uint8_t. Value of @ref Sn_RXBUF_SIZE. |
hjjeon | 9:dfffa4d6f022 | 1089 | * @sa setSn_RXBUF_SIZE() |
hjjeon | 9:dfffa4d6f022 | 1090 | */ |
hjjeon | 9:dfffa4d6f022 | 1091 | uint8_t getSn_RXBUF_SIZE(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1092 | return sreg<uint8_t>(sn, Sn_RXBUF_SIZE); |
hjjeon | 9:dfffa4d6f022 | 1093 | } |
hjjeon | 9:dfffa4d6f022 | 1094 | |
hjjeon | 9:dfffa4d6f022 | 1095 | /** |
hjjeon | 9:dfffa4d6f022 | 1096 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1097 | * @brief Set @ref Sn_TXBUF_SIZE register |
hjjeon | 9:dfffa4d6f022 | 1098 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1099 | * @param (uint8_t)txbufsize Value to set @ref Sn_TXBUF_SIZE |
hjjeon | 9:dfffa4d6f022 | 1100 | * @sa getSn_TXBUF_SIZE() |
hjjeon | 9:dfffa4d6f022 | 1101 | */ |
hjjeon | 9:dfffa4d6f022 | 1102 | void setSn_TXBUF_SIZE(uint8_t sn, uint8_t txbufsize) { |
hjjeon | 9:dfffa4d6f022 | 1103 | sreg<uint8_t>(sn, Sn_TXBUF_SIZE, txbufsize); |
hjjeon | 9:dfffa4d6f022 | 1104 | } |
hjjeon | 9:dfffa4d6f022 | 1105 | |
hjjeon | 9:dfffa4d6f022 | 1106 | /** |
hjjeon | 9:dfffa4d6f022 | 1107 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1108 | * @brief Get @ref Sn_TXBUF_SIZE register |
hjjeon | 9:dfffa4d6f022 | 1109 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1110 | * @return uint8_t. Value of @ref Sn_TXBUF_SIZE. |
hjjeon | 9:dfffa4d6f022 | 1111 | * @sa setSn_TXBUF_SIZE() |
hjjeon | 9:dfffa4d6f022 | 1112 | */ |
hjjeon | 9:dfffa4d6f022 | 1113 | uint8_t getSn_TXBUF_SIZE(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1114 | return sreg<uint8_t>(sn, Sn_TXBUF_SIZE); |
hjjeon | 9:dfffa4d6f022 | 1115 | } |
hjjeon | 9:dfffa4d6f022 | 1116 | |
hjjeon | 9:dfffa4d6f022 | 1117 | /** |
hjjeon | 9:dfffa4d6f022 | 1118 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1119 | * @brief Get @ref Sn_TX_FSR register |
hjjeon | 9:dfffa4d6f022 | 1120 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1121 | * @return uint16_t. Value of @ref Sn_TX_FSR. |
hjjeon | 9:dfffa4d6f022 | 1122 | */ |
hjjeon | 9:dfffa4d6f022 | 1123 | uint16_t getSn_TX_FSR(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1124 | return sreg<uint16_t>(sn, Sn_TX_FSR); |
hjjeon | 9:dfffa4d6f022 | 1125 | } |
hjjeon | 9:dfffa4d6f022 | 1126 | |
hjjeon | 9:dfffa4d6f022 | 1127 | |
hjjeon | 9:dfffa4d6f022 | 1128 | /** |
hjjeon | 9:dfffa4d6f022 | 1129 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1130 | * @brief Get @ref Sn_TX_RD register |
hjjeon | 9:dfffa4d6f022 | 1131 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1132 | * @return uint16_t. Value of @ref Sn_TX_RD. |
hjjeon | 9:dfffa4d6f022 | 1133 | */ |
hjjeon | 9:dfffa4d6f022 | 1134 | uint16_t getSn_TX_RD(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1135 | return sreg<uint16_t>(sn, Sn_TX_RD); |
hjjeon | 9:dfffa4d6f022 | 1136 | } |
hjjeon | 9:dfffa4d6f022 | 1137 | |
hjjeon | 9:dfffa4d6f022 | 1138 | /** |
hjjeon | 9:dfffa4d6f022 | 1139 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1140 | * @brief Set @ref Sn_TX_WR register |
hjjeon | 9:dfffa4d6f022 | 1141 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1142 | * @param (uint16_t)txwr Value to set @ref Sn_TX_WR |
hjjeon | 9:dfffa4d6f022 | 1143 | * @sa GetSn_TX_WR() |
hjjeon | 9:dfffa4d6f022 | 1144 | */ |
hjjeon | 9:dfffa4d6f022 | 1145 | void setSn_TX_WR(uint8_t sn, uint16_t txwr) { |
hjjeon | 9:dfffa4d6f022 | 1146 | sreg<uint16_t>(sn, Sn_TX_WR, txwr); |
hjjeon | 9:dfffa4d6f022 | 1147 | } |
hjjeon | 9:dfffa4d6f022 | 1148 | |
hjjeon | 9:dfffa4d6f022 | 1149 | /** |
hjjeon | 9:dfffa4d6f022 | 1150 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1151 | * @brief Get @ref Sn_TX_WR register |
hjjeon | 9:dfffa4d6f022 | 1152 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1153 | * @return uint16_t. Value of @ref Sn_TX_WR. |
hjjeon | 9:dfffa4d6f022 | 1154 | * @sa setSn_TX_WR() |
hjjeon | 9:dfffa4d6f022 | 1155 | */ |
hjjeon | 9:dfffa4d6f022 | 1156 | uint16_t getSn_TX_WR(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1157 | return sreg<uint16_t>(sn, Sn_TX_WR); |
hjjeon | 9:dfffa4d6f022 | 1158 | } |
hjjeon | 9:dfffa4d6f022 | 1159 | |
hjjeon | 9:dfffa4d6f022 | 1160 | |
hjjeon | 9:dfffa4d6f022 | 1161 | /** |
hjjeon | 9:dfffa4d6f022 | 1162 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1163 | * @brief Get @ref Sn_RX_RSR register |
hjjeon | 9:dfffa4d6f022 | 1164 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1165 | * @return uint16_t. Value of @ref Sn_RX_RSR. |
hjjeon | 9:dfffa4d6f022 | 1166 | */ |
hjjeon | 9:dfffa4d6f022 | 1167 | uint16_t getSn_RX_RSR(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1168 | return sreg<uint16_t>(sn, Sn_RX_RSR); |
hjjeon | 9:dfffa4d6f022 | 1169 | } |
hjjeon | 9:dfffa4d6f022 | 1170 | |
hjjeon | 9:dfffa4d6f022 | 1171 | |
hjjeon | 9:dfffa4d6f022 | 1172 | /** |
hjjeon | 9:dfffa4d6f022 | 1173 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1174 | * @brief Set @ref Sn_RX_RD register |
hjjeon | 9:dfffa4d6f022 | 1175 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1176 | * @param (uint16_t)rxrd Value to set @ref Sn_RX_RD |
hjjeon | 9:dfffa4d6f022 | 1177 | * @sa getSn_RX_RD() |
hjjeon | 9:dfffa4d6f022 | 1178 | */ |
hjjeon | 9:dfffa4d6f022 | 1179 | void setSn_RX_RD(uint8_t sn, uint16_t rxrd) { |
hjjeon | 9:dfffa4d6f022 | 1180 | sreg<uint16_t>(sn, Sn_RX_RD, rxrd); |
hjjeon | 9:dfffa4d6f022 | 1181 | } |
hjjeon | 9:dfffa4d6f022 | 1182 | |
hjjeon | 9:dfffa4d6f022 | 1183 | /** |
hjjeon | 9:dfffa4d6f022 | 1184 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1185 | * @brief Get @ref Sn_RX_RD register |
hjjeon | 9:dfffa4d6f022 | 1186 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1187 | * @regurn uint16_t. Value of @ref Sn_RX_RD. |
hjjeon | 9:dfffa4d6f022 | 1188 | * @sa setSn_RX_RD() |
hjjeon | 9:dfffa4d6f022 | 1189 | */ |
hjjeon | 9:dfffa4d6f022 | 1190 | uint16_t getSn_RX_RD(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1191 | return sreg<uint16_t>(sn, Sn_RX_RD); |
hjjeon | 9:dfffa4d6f022 | 1192 | } |
hjjeon | 9:dfffa4d6f022 | 1193 | |
hjjeon | 9:dfffa4d6f022 | 1194 | /** |
hjjeon | 9:dfffa4d6f022 | 1195 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1196 | * @brief Get @ref Sn_RX_WR register |
hjjeon | 9:dfffa4d6f022 | 1197 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1198 | * @return uint16_t. Value of @ref Sn_RX_WR. |
hjjeon | 9:dfffa4d6f022 | 1199 | */ |
hjjeon | 9:dfffa4d6f022 | 1200 | uint16_t getSn_RX_WR(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1201 | return sreg<uint16_t>(sn, Sn_RX_WR); |
hjjeon | 9:dfffa4d6f022 | 1202 | } |
hjjeon | 9:dfffa4d6f022 | 1203 | |
hjjeon | 9:dfffa4d6f022 | 1204 | |
hjjeon | 9:dfffa4d6f022 | 1205 | /** |
hjjeon | 9:dfffa4d6f022 | 1206 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1207 | * @brief Set @ref Sn_FRAG register |
hjjeon | 9:dfffa4d6f022 | 1208 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1209 | * @param (uint16_t)frag Value to set @ref Sn_FRAG |
hjjeon | 9:dfffa4d6f022 | 1210 | * @sa getSn_FRAD() |
hjjeon | 9:dfffa4d6f022 | 1211 | */ |
hjjeon | 9:dfffa4d6f022 | 1212 | void setSn_FRAG(uint8_t sn, uint16_t frag) { |
hjjeon | 9:dfffa4d6f022 | 1213 | sreg<uint16_t>(sn, Sn_FRAG, frag ); |
hjjeon | 9:dfffa4d6f022 | 1214 | } |
hjjeon | 9:dfffa4d6f022 | 1215 | |
hjjeon | 9:dfffa4d6f022 | 1216 | /** |
hjjeon | 9:dfffa4d6f022 | 1217 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1218 | * @brief Get @ref Sn_FRAG register |
hjjeon | 9:dfffa4d6f022 | 1219 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1220 | * @return uint16_t. Value of @ref Sn_FRAG. |
hjjeon | 9:dfffa4d6f022 | 1221 | * @sa setSn_FRAG() |
hjjeon | 9:dfffa4d6f022 | 1222 | */ |
hjjeon | 9:dfffa4d6f022 | 1223 | uint16_t getSn_FRAG(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1224 | return sreg<uint16_t>(sn, Sn_FRAG); |
hjjeon | 9:dfffa4d6f022 | 1225 | } |
hjjeon | 9:dfffa4d6f022 | 1226 | |
hjjeon | 9:dfffa4d6f022 | 1227 | /** |
hjjeon | 9:dfffa4d6f022 | 1228 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1229 | * @brief Set @ref Sn_KPALVTR register |
hjjeon | 9:dfffa4d6f022 | 1230 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1231 | * @param (uint8_t)kpalvt Value to set @ref Sn_KPALVTR |
hjjeon | 9:dfffa4d6f022 | 1232 | * @sa getSn_KPALVTR() |
hjjeon | 9:dfffa4d6f022 | 1233 | */ |
hjjeon | 9:dfffa4d6f022 | 1234 | void setSn_KPALVTR(uint8_t sn, uint8_t kpalvt) { |
hjjeon | 9:dfffa4d6f022 | 1235 | sreg<uint8_t>(sn, Sn_KPALVTR, kpalvt); |
hjjeon | 9:dfffa4d6f022 | 1236 | } |
hjjeon | 9:dfffa4d6f022 | 1237 | |
hjjeon | 9:dfffa4d6f022 | 1238 | /** |
hjjeon | 9:dfffa4d6f022 | 1239 | * @ingroup Socket_register_access_function |
hjjeon | 9:dfffa4d6f022 | 1240 | * @brief Get @ref Sn_KPALVTR register |
hjjeon | 9:dfffa4d6f022 | 1241 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1242 | * @return uint8_t. Value of @ref Sn_KPALVTR. |
hjjeon | 9:dfffa4d6f022 | 1243 | * @sa setSn_KPALVTR() |
hjjeon | 9:dfffa4d6f022 | 1244 | */ |
hjjeon | 9:dfffa4d6f022 | 1245 | uint8_t getSn_KPALVTR(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1246 | return sreg<uint8_t>(sn, Sn_KPALVTR); |
hjjeon | 9:dfffa4d6f022 | 1247 | } |
hjjeon | 9:dfffa4d6f022 | 1248 | |
hjjeon | 9:dfffa4d6f022 | 1249 | ////////////////////////////////////// |
hjjeon | 9:dfffa4d6f022 | 1250 | |
hjjeon | 9:dfffa4d6f022 | 1251 | ///////////////////////////////////// |
hjjeon | 9:dfffa4d6f022 | 1252 | // Sn_TXBUF & Sn_RXBUF IO function // |
hjjeon | 9:dfffa4d6f022 | 1253 | ///////////////////////////////////// |
hjjeon | 9:dfffa4d6f022 | 1254 | /** |
hjjeon | 9:dfffa4d6f022 | 1255 | * @brief Gets the max buffer size of socket sn passed as parameter. |
hjjeon | 9:dfffa4d6f022 | 1256 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1257 | * @return uint16_t. Value of Socket n RX max buffer size. |
hjjeon | 9:dfffa4d6f022 | 1258 | */ |
hjjeon | 9:dfffa4d6f022 | 1259 | uint16_t getSn_RxMAX(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1260 | return (getSn_RXBUF_SIZE(sn) << 10); |
hjjeon | 9:dfffa4d6f022 | 1261 | } |
hjjeon | 9:dfffa4d6f022 | 1262 | |
hjjeon | 9:dfffa4d6f022 | 1263 | /** |
hjjeon | 9:dfffa4d6f022 | 1264 | * @brief Gets the max buffer size of socket sn passed as parameters. |
hjjeon | 9:dfffa4d6f022 | 1265 | * @param (uint8_t)sn Socket number. It should be <b>0 ~ 7</b>. |
hjjeon | 9:dfffa4d6f022 | 1266 | * @return uint16_t. Value of Socket n TX max buffer size. |
hjjeon | 9:dfffa4d6f022 | 1267 | */ |
hjjeon | 9:dfffa4d6f022 | 1268 | //uint16_t getSn_TxMAX(uint8_t sn); |
hjjeon | 9:dfffa4d6f022 | 1269 | uint16_t getSn_TxMAX(uint8_t sn) { |
hjjeon | 9:dfffa4d6f022 | 1270 | return (getSn_TXBUF_SIZE(sn) << 10); |
hjjeon | 9:dfffa4d6f022 | 1271 | } |
Bongjun | 0:e11e8793c3ce | 1272 | |
Bongjun | 0:e11e8793c3ce | 1273 | protected: |
Bongjun | 0:e11e8793c3ce | 1274 | uint8_t mac[6]; |
Bongjun | 0:e11e8793c3ce | 1275 | uint32_t ip; |
Bongjun | 0:e11e8793c3ce | 1276 | uint32_t netmask; |
Bongjun | 0:e11e8793c3ce | 1277 | uint32_t gateway; |
Bongjun | 0:e11e8793c3ce | 1278 | uint32_t dnsaddr; |
Bongjun | 0:e11e8793c3ce | 1279 | bool dhcp; |
Bongjun | 0:e11e8793c3ce | 1280 | |
Bongjun | 0:e11e8793c3ce | 1281 | static WIZnet_Chip* inst; |
Bongjun | 0:e11e8793c3ce | 1282 | |
Bongjun | 0:e11e8793c3ce | 1283 | void reg_wr_mac(uint16_t addr, uint8_t* data) { |
Bongjun | 0:e11e8793c3ce | 1284 | spi_write(addr, 0x04, data, 6); |
Bongjun | 0:e11e8793c3ce | 1285 | } |
Bongjun | 0:e11e8793c3ce | 1286 | |
Bongjun | 0:e11e8793c3ce | 1287 | void spi_write(uint16_t addr, uint8_t cb, const uint8_t *buf, uint16_t len); |
Bongjun | 0:e11e8793c3ce | 1288 | void spi_read(uint16_t addr, uint8_t cb, uint8_t *buf, uint16_t len); |
Bongjun | 0:e11e8793c3ce | 1289 | SPI* spi; |
Bongjun | 0:e11e8793c3ce | 1290 | DigitalOut cs; |
Bongjun | 0:e11e8793c3ce | 1291 | DigitalOut reset_pin; |
Bongjun | 0:e11e8793c3ce | 1292 | }; |
Bongjun | 0:e11e8793c3ce | 1293 | |
Bongjun | 0:e11e8793c3ce | 1294 | extern uint32_t str_to_ip(const char* str); |
Bongjun | 0:e11e8793c3ce | 1295 | extern void printfBytes(char* str, uint8_t* buf, int len); |
Bongjun | 0:e11e8793c3ce | 1296 | extern void printHex(uint8_t* buf, int len); |
Bongjun | 0:e11e8793c3ce | 1297 | extern void debug_hex(uint8_t* buf, int len); |