RK4_euler

Dependencies:   FatFileSystem mbed

Fork of RK4_euler by hige dura

Committer:
higedura
Date:
Thu Nov 29 15:22:06 2012 +0000
Revision:
7:ec00db826804
Parent:
3:5b192b38b3bb
RK4_euler

Who changed what in which revision?

UserRevisionLine numberNew contents of line
higedura 3:5b192b38b3bb 1 /* mbed SDFileSystem Library, for providing file access to SD cards
higedura 3:5b192b38b3bb 2 * Copyright (c) 2008-2010, sford
higedura 3:5b192b38b3bb 3 *
higedura 3:5b192b38b3bb 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
higedura 3:5b192b38b3bb 5 * of this software and associated documentation files (the "Software"), to deal
higedura 3:5b192b38b3bb 6 * in the Software without restriction, including without limitation the rights
higedura 3:5b192b38b3bb 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
higedura 3:5b192b38b3bb 8 * copies of the Software, and to permit persons to whom the Software is
higedura 3:5b192b38b3bb 9 * furnished to do so, subject to the following conditions:
higedura 3:5b192b38b3bb 10 *
higedura 3:5b192b38b3bb 11 * The above copyright notice and this permission notice shall be included in
higedura 3:5b192b38b3bb 12 * all copies or substantial portions of the Software.
higedura 3:5b192b38b3bb 13 *
higedura 3:5b192b38b3bb 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
higedura 3:5b192b38b3bb 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
higedura 3:5b192b38b3bb 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
higedura 3:5b192b38b3bb 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
higedura 3:5b192b38b3bb 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
higedura 3:5b192b38b3bb 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
higedura 3:5b192b38b3bb 20 * THE SOFTWARE.
higedura 3:5b192b38b3bb 21 */
higedura 3:5b192b38b3bb 22
higedura 3:5b192b38b3bb 23 /* Introduction
higedura 3:5b192b38b3bb 24 * ------------
higedura 3:5b192b38b3bb 25 * SD and MMC cards support a number of interfaces, but common to them all
higedura 3:5b192b38b3bb 26 * is one based on SPI. This is the one I'm implmenting because it means
higedura 3:5b192b38b3bb 27 * it is much more portable even though not so performant, and we already
higedura 3:5b192b38b3bb 28 * have the mbed SPI Interface!
higedura 3:5b192b38b3bb 29 *
higedura 3:5b192b38b3bb 30 * The main reference I'm using is Chapter 7, "SPI Mode" of:
higedura 3:5b192b38b3bb 31 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
higedura 3:5b192b38b3bb 32 *
higedura 3:5b192b38b3bb 33 * SPI Startup
higedura 3:5b192b38b3bb 34 * -----------
higedura 3:5b192b38b3bb 35 * The SD card powers up in SD mode. The SPI interface mode is selected by
higedura 3:5b192b38b3bb 36 * asserting CS low and sending the reset command (CMD0). The card will
higedura 3:5b192b38b3bb 37 * respond with a (R1) response.
higedura 3:5b192b38b3bb 38 *
higedura 3:5b192b38b3bb 39 * CMD8 is optionally sent to determine the voltage range supported, and
higedura 3:5b192b38b3bb 40 * indirectly determine whether it is a version 1.x SD/non-SD card or
higedura 3:5b192b38b3bb 41 * version 2.x. I'll just ignore this for now.
higedura 3:5b192b38b3bb 42 *
higedura 3:5b192b38b3bb 43 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
higedura 3:5b192b38b3bb 44 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
higedura 3:5b192b38b3bb 45 *
higedura 3:5b192b38b3bb 46 * You should also indicate whether the host supports High Capicity cards,
higedura 3:5b192b38b3bb 47 * and check whether the card is high capacity - i'll also ignore this
higedura 3:5b192b38b3bb 48 *
higedura 3:5b192b38b3bb 49 * SPI Protocol
higedura 3:5b192b38b3bb 50 * ------------
higedura 3:5b192b38b3bb 51 * The SD SPI protocol is based on transactions made up of 8-bit words, with
higedura 3:5b192b38b3bb 52 * the host starting every bus transaction by asserting the CS signal low. The
higedura 3:5b192b38b3bb 53 * card always responds to commands, data blocks and errors.
higedura 3:5b192b38b3bb 54 *
higedura 3:5b192b38b3bb 55 * The protocol supports a CRC, but by default it is off (except for the
higedura 3:5b192b38b3bb 56 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
higedura 3:5b192b38b3bb 57 * I'll leave the CRC off I think!
higedura 3:5b192b38b3bb 58 *
higedura 3:5b192b38b3bb 59 * Standard capacity cards have variable data block sizes, whereas High
higedura 3:5b192b38b3bb 60 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
higedura 3:5b192b38b3bb 61 * just always use the Standard Capacity cards with a block size of 512 bytes.
higedura 3:5b192b38b3bb 62 * This is set with CMD16.
higedura 3:5b192b38b3bb 63 *
higedura 3:5b192b38b3bb 64 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
higedura 3:5b192b38b3bb 65 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
higedura 3:5b192b38b3bb 66 * the card gets a read command, it responds with a response token, and then
higedura 3:5b192b38b3bb 67 * a data token or an error.
higedura 3:5b192b38b3bb 68 *
higedura 3:5b192b38b3bb 69 * SPI Command Format
higedura 3:5b192b38b3bb 70 * ------------------
higedura 3:5b192b38b3bb 71 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
higedura 3:5b192b38b3bb 72 *
higedura 3:5b192b38b3bb 73 * +---------------+------------+------------+-----------+----------+--------------+
higedura 3:5b192b38b3bb 74 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
higedura 3:5b192b38b3bb 75 * +---------------+------------+------------+-----------+----------+--------------+
higedura 3:5b192b38b3bb 76 *
higedura 3:5b192b38b3bb 77 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
higedura 3:5b192b38b3bb 78 *
higedura 3:5b192b38b3bb 79 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
higedura 3:5b192b38b3bb 80 *
higedura 3:5b192b38b3bb 81 * SPI Response Format
higedura 3:5b192b38b3bb 82 * -------------------
higedura 3:5b192b38b3bb 83 * The main response format (R1) is a status byte (normally zero). Key flags:
higedura 3:5b192b38b3bb 84 * idle - 1 if the card is in an idle state/initialising
higedura 3:5b192b38b3bb 85 * cmd - 1 if an illegal command code was detected
higedura 3:5b192b38b3bb 86 *
higedura 3:5b192b38b3bb 87 * +-------------------------------------------------+
higedura 3:5b192b38b3bb 88 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
higedura 3:5b192b38b3bb 89 * +-------------------------------------------------+
higedura 3:5b192b38b3bb 90 *
higedura 3:5b192b38b3bb 91 * R1b is the same, except it is followed by a busy signal (zeros) until
higedura 3:5b192b38b3bb 92 * the first non-zero byte when it is ready again.
higedura 3:5b192b38b3bb 93 *
higedura 3:5b192b38b3bb 94 * Data Response Token
higedura 3:5b192b38b3bb 95 * -------------------
higedura 3:5b192b38b3bb 96 * Every data block written to the card is acknowledged by a byte
higedura 3:5b192b38b3bb 97 * response token
higedura 3:5b192b38b3bb 98 *
higedura 3:5b192b38b3bb 99 * +----------------------+
higedura 3:5b192b38b3bb 100 * | xxx | 0 | status | 1 |
higedura 3:5b192b38b3bb 101 * +----------------------+
higedura 3:5b192b38b3bb 102 * 010 - OK!
higedura 3:5b192b38b3bb 103 * 101 - CRC Error
higedura 3:5b192b38b3bb 104 * 110 - Write Error
higedura 3:5b192b38b3bb 105 *
higedura 3:5b192b38b3bb 106 * Single Block Read and Write
higedura 3:5b192b38b3bb 107 * ---------------------------
higedura 3:5b192b38b3bb 108 *
higedura 3:5b192b38b3bb 109 * Block transfers have a byte header, followed by the data, followed
higedura 3:5b192b38b3bb 110 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
higedura 3:5b192b38b3bb 111 *
higedura 3:5b192b38b3bb 112 * +------+---------+---------+- - - -+---------+-----------+----------+
higedura 3:5b192b38b3bb 113 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
higedura 3:5b192b38b3bb 114 * +------+---------+---------+- - - -+---------+-----------+----------+
higedura 3:5b192b38b3bb 115 */
higedura 3:5b192b38b3bb 116
higedura 3:5b192b38b3bb 117 #include "SDFileSystem.h"
higedura 3:5b192b38b3bb 118
higedura 3:5b192b38b3bb 119 #define SD_COMMAND_TIMEOUT 5000
higedura 3:5b192b38b3bb 120
higedura 3:5b192b38b3bb 121 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
higedura 3:5b192b38b3bb 122 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
higedura 3:5b192b38b3bb 123 _cs = 1;
higedura 3:5b192b38b3bb 124 }
higedura 3:5b192b38b3bb 125
higedura 3:5b192b38b3bb 126 #define R1_IDLE_STATE (1 << 0)
higedura 3:5b192b38b3bb 127 #define R1_ERASE_RESET (1 << 1)
higedura 3:5b192b38b3bb 128 #define R1_ILLEGAL_COMMAND (1 << 2)
higedura 3:5b192b38b3bb 129 #define R1_COM_CRC_ERROR (1 << 3)
higedura 3:5b192b38b3bb 130 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
higedura 3:5b192b38b3bb 131 #define R1_ADDRESS_ERROR (1 << 5)
higedura 3:5b192b38b3bb 132 #define R1_PARAMETER_ERROR (1 << 6)
higedura 3:5b192b38b3bb 133
higedura 3:5b192b38b3bb 134 // Types
higedura 3:5b192b38b3bb 135 // - v1.x Standard Capacity
higedura 3:5b192b38b3bb 136 // - v2.x Standard Capacity
higedura 3:5b192b38b3bb 137 // - v2.x High Capacity
higedura 3:5b192b38b3bb 138 // - Not recognised as an SD Card
higedura 3:5b192b38b3bb 139
higedura 3:5b192b38b3bb 140 #define SDCARD_FAIL 0
higedura 3:5b192b38b3bb 141 #define SDCARD_V1 1
higedura 3:5b192b38b3bb 142 #define SDCARD_V2 2
higedura 3:5b192b38b3bb 143 #define SDCARD_V2HC 3
higedura 3:5b192b38b3bb 144
higedura 3:5b192b38b3bb 145 int SDFileSystem::initialise_card() {
higedura 3:5b192b38b3bb 146 // Set to 100kHz for initialisation, and clock card with cs = 1
higedura 3:5b192b38b3bb 147 _spi.frequency(100000);
higedura 3:5b192b38b3bb 148 _cs = 1;
higedura 3:5b192b38b3bb 149 for(int i=0; i<16; i++) {
higedura 3:5b192b38b3bb 150 _spi.write(0xFF);
higedura 3:5b192b38b3bb 151 }
higedura 3:5b192b38b3bb 152
higedura 3:5b192b38b3bb 153 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
higedura 3:5b192b38b3bb 154 if(_cmd(0, 0) != R1_IDLE_STATE) {
higedura 3:5b192b38b3bb 155 fprintf(stderr, "No disk, or could not put SD card in to SPI idle state\n");
higedura 3:5b192b38b3bb 156 return SDCARD_FAIL;
higedura 3:5b192b38b3bb 157 }
higedura 3:5b192b38b3bb 158
higedura 3:5b192b38b3bb 159 // send CMD8 to determine whther it is ver 2.x
higedura 3:5b192b38b3bb 160 int r = _cmd8();
higedura 3:5b192b38b3bb 161 if(r == R1_IDLE_STATE) {
higedura 3:5b192b38b3bb 162 return initialise_card_v2();
higedura 3:5b192b38b3bb 163 } else if(r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
higedura 3:5b192b38b3bb 164 return initialise_card_v1();
higedura 3:5b192b38b3bb 165 } else {
higedura 3:5b192b38b3bb 166 fprintf(stderr, "Not in idle state after sending CMD8 (not an SD card?)\n");
higedura 3:5b192b38b3bb 167 return SDCARD_FAIL;
higedura 3:5b192b38b3bb 168 }
higedura 3:5b192b38b3bb 169 }
higedura 3:5b192b38b3bb 170
higedura 3:5b192b38b3bb 171 int SDFileSystem::initialise_card_v1() {
higedura 3:5b192b38b3bb 172 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
higedura 3:5b192b38b3bb 173 _cmd(55, 0);
higedura 3:5b192b38b3bb 174 if(_cmd(41, 0) == 0) {
higedura 3:5b192b38b3bb 175 return SDCARD_V1;
higedura 3:5b192b38b3bb 176 }
higedura 3:5b192b38b3bb 177 }
higedura 3:5b192b38b3bb 178
higedura 3:5b192b38b3bb 179 fprintf(stderr, "Timeout waiting for v1.x card\n");
higedura 3:5b192b38b3bb 180 return SDCARD_FAIL;
higedura 3:5b192b38b3bb 181 }
higedura 3:5b192b38b3bb 182
higedura 3:5b192b38b3bb 183 int SDFileSystem::initialise_card_v2() {
higedura 3:5b192b38b3bb 184
higedura 3:5b192b38b3bb 185 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
higedura 3:5b192b38b3bb 186 _cmd(55, 0);
higedura 3:5b192b38b3bb 187 if(_cmd(41, 0) == 0) {
higedura 3:5b192b38b3bb 188 _cmd58();
higedura 3:5b192b38b3bb 189 return SDCARD_V2;
higedura 3:5b192b38b3bb 190 }
higedura 3:5b192b38b3bb 191 }
higedura 3:5b192b38b3bb 192
higedura 3:5b192b38b3bb 193 fprintf(stderr, "Timeout waiting for v2.x card\n");
higedura 3:5b192b38b3bb 194 return SDCARD_FAIL;
higedura 3:5b192b38b3bb 195 }
higedura 3:5b192b38b3bb 196
higedura 3:5b192b38b3bb 197 int SDFileSystem::disk_initialize() {
higedura 3:5b192b38b3bb 198
higedura 3:5b192b38b3bb 199 int i = initialise_card();
higedura 3:5b192b38b3bb 200 // printf("init card = %d\n", i);
higedura 3:5b192b38b3bb 201 // printf("OK\n");
higedura 3:5b192b38b3bb 202
higedura 3:5b192b38b3bb 203 _sectors = _sd_sectors();
higedura 3:5b192b38b3bb 204
higedura 3:5b192b38b3bb 205 // Set block length to 512 (CMD16)
higedura 3:5b192b38b3bb 206 if(_cmd(16, 512) != 0) {
higedura 3:5b192b38b3bb 207 fprintf(stderr, "Set 512-byte block timed out\n");
higedura 3:5b192b38b3bb 208 return 1;
higedura 3:5b192b38b3bb 209 }
higedura 3:5b192b38b3bb 210
higedura 3:5b192b38b3bb 211 _spi.frequency(1000000); // Set to 1MHz for data transfer
higedura 3:5b192b38b3bb 212 return 0;
higedura 3:5b192b38b3bb 213 }
higedura 3:5b192b38b3bb 214
higedura 3:5b192b38b3bb 215 int SDFileSystem::disk_write(const char *buffer, int block_number) {
higedura 3:5b192b38b3bb 216 // set write address for single block (CMD24)
higedura 3:5b192b38b3bb 217 if(_cmd(24, block_number * 512) != 0) {
higedura 3:5b192b38b3bb 218 return 1;
higedura 3:5b192b38b3bb 219 }
higedura 3:5b192b38b3bb 220
higedura 3:5b192b38b3bb 221 // send the data block
higedura 3:5b192b38b3bb 222 _write(buffer, 512);
higedura 3:5b192b38b3bb 223 return 0;
higedura 3:5b192b38b3bb 224 }
higedura 3:5b192b38b3bb 225
higedura 3:5b192b38b3bb 226 int SDFileSystem::disk_read(char *buffer, int block_number) {
higedura 3:5b192b38b3bb 227 // set read address for single block (CMD17)
higedura 3:5b192b38b3bb 228 if(_cmd(17, block_number * 512) != 0) {
higedura 3:5b192b38b3bb 229 return 1;
higedura 3:5b192b38b3bb 230 }
higedura 3:5b192b38b3bb 231
higedura 3:5b192b38b3bb 232 // receive the data
higedura 3:5b192b38b3bb 233 _read(buffer, 512);
higedura 3:5b192b38b3bb 234 return 0;
higedura 3:5b192b38b3bb 235 }
higedura 3:5b192b38b3bb 236
higedura 3:5b192b38b3bb 237 int SDFileSystem::disk_status() { return 0; }
higedura 3:5b192b38b3bb 238 int SDFileSystem::disk_sync() { return 0; }
higedura 3:5b192b38b3bb 239 int SDFileSystem::disk_sectors() { return _sectors; }
higedura 3:5b192b38b3bb 240
higedura 3:5b192b38b3bb 241 // PRIVATE FUNCTIONS
higedura 3:5b192b38b3bb 242
higedura 3:5b192b38b3bb 243 int SDFileSystem::_cmd(int cmd, int arg) {
higedura 3:5b192b38b3bb 244 _cs = 0;
higedura 3:5b192b38b3bb 245
higedura 3:5b192b38b3bb 246 // send a command
higedura 3:5b192b38b3bb 247 _spi.write(0x40 | cmd);
higedura 3:5b192b38b3bb 248 _spi.write(arg >> 24);
higedura 3:5b192b38b3bb 249 _spi.write(arg >> 16);
higedura 3:5b192b38b3bb 250 _spi.write(arg >> 8);
higedura 3:5b192b38b3bb 251 _spi.write(arg >> 0);
higedura 3:5b192b38b3bb 252 _spi.write(0x95);
higedura 3:5b192b38b3bb 253
higedura 3:5b192b38b3bb 254 // wait for the repsonse (response[7] == 0)
higedura 3:5b192b38b3bb 255 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
higedura 3:5b192b38b3bb 256 int response = _spi.write(0xFF);
higedura 3:5b192b38b3bb 257 if(!(response & 0x80)) {
higedura 3:5b192b38b3bb 258 _cs = 1;
higedura 3:5b192b38b3bb 259 _spi.write(0xFF);
higedura 3:5b192b38b3bb 260 return response;
higedura 3:5b192b38b3bb 261 }
higedura 3:5b192b38b3bb 262 }
higedura 3:5b192b38b3bb 263 _cs = 1;
higedura 3:5b192b38b3bb 264 _spi.write(0xFF);
higedura 3:5b192b38b3bb 265 return -1; // timeout
higedura 3:5b192b38b3bb 266 }
higedura 3:5b192b38b3bb 267 int SDFileSystem::_cmdx(int cmd, int arg) {
higedura 3:5b192b38b3bb 268 _cs = 0;
higedura 3:5b192b38b3bb 269
higedura 3:5b192b38b3bb 270 // send a command
higedura 3:5b192b38b3bb 271 _spi.write(0x40 | cmd);
higedura 3:5b192b38b3bb 272 _spi.write(arg >> 24);
higedura 3:5b192b38b3bb 273 _spi.write(arg >> 16);
higedura 3:5b192b38b3bb 274 _spi.write(arg >> 8);
higedura 3:5b192b38b3bb 275 _spi.write(arg >> 0);
higedura 3:5b192b38b3bb 276 _spi.write(0x95);
higedura 3:5b192b38b3bb 277
higedura 3:5b192b38b3bb 278 // wait for the repsonse (response[7] == 0)
higedura 3:5b192b38b3bb 279 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
higedura 3:5b192b38b3bb 280 int response = _spi.write(0xFF);
higedura 3:5b192b38b3bb 281 if(!(response & 0x80)) {
higedura 3:5b192b38b3bb 282 return response;
higedura 3:5b192b38b3bb 283 }
higedura 3:5b192b38b3bb 284 }
higedura 3:5b192b38b3bb 285 _cs = 1;
higedura 3:5b192b38b3bb 286 _spi.write(0xFF);
higedura 3:5b192b38b3bb 287 return -1; // timeout
higedura 3:5b192b38b3bb 288 }
higedura 3:5b192b38b3bb 289
higedura 3:5b192b38b3bb 290
higedura 3:5b192b38b3bb 291 int SDFileSystem::_cmd58() {
higedura 3:5b192b38b3bb 292 _cs = 0;
higedura 3:5b192b38b3bb 293 int arg = 0;
higedura 3:5b192b38b3bb 294
higedura 3:5b192b38b3bb 295 // send a command
higedura 3:5b192b38b3bb 296 _spi.write(0x40 | 58);
higedura 3:5b192b38b3bb 297 _spi.write(arg >> 24);
higedura 3:5b192b38b3bb 298 _spi.write(arg >> 16);
higedura 3:5b192b38b3bb 299 _spi.write(arg >> 8);
higedura 3:5b192b38b3bb 300 _spi.write(arg >> 0);
higedura 3:5b192b38b3bb 301 _spi.write(0x95);
higedura 3:5b192b38b3bb 302
higedura 3:5b192b38b3bb 303 // wait for the repsonse (response[7] == 0)
higedura 3:5b192b38b3bb 304 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
higedura 3:5b192b38b3bb 305 int response = _spi.write(0xFF);
higedura 3:5b192b38b3bb 306 if(!(response & 0x80)) {
higedura 3:5b192b38b3bb 307 int ocr = _spi.write(0xFF) << 24;
higedura 3:5b192b38b3bb 308 ocr |= _spi.write(0xFF) << 16;
higedura 3:5b192b38b3bb 309 ocr |= _spi.write(0xFF) << 8;
higedura 3:5b192b38b3bb 310 ocr |= _spi.write(0xFF) << 0;
higedura 3:5b192b38b3bb 311 // printf("OCR = 0x%08X\n", ocr);
higedura 3:5b192b38b3bb 312 _cs = 1;
higedura 3:5b192b38b3bb 313 _spi.write(0xFF);
higedura 3:5b192b38b3bb 314 return response;
higedura 3:5b192b38b3bb 315 }
higedura 3:5b192b38b3bb 316 }
higedura 3:5b192b38b3bb 317 _cs = 1;
higedura 3:5b192b38b3bb 318 _spi.write(0xFF);
higedura 3:5b192b38b3bb 319 return -1; // timeout
higedura 3:5b192b38b3bb 320 }
higedura 3:5b192b38b3bb 321
higedura 3:5b192b38b3bb 322 int SDFileSystem::_cmd8() {
higedura 3:5b192b38b3bb 323 _cs = 0;
higedura 3:5b192b38b3bb 324
higedura 3:5b192b38b3bb 325 // send a command
higedura 3:5b192b38b3bb 326 _spi.write(0x40 | 8); // CMD8
higedura 3:5b192b38b3bb 327 _spi.write(0x00); // reserved
higedura 3:5b192b38b3bb 328 _spi.write(0x00); // reserved
higedura 3:5b192b38b3bb 329 _spi.write(0x01); // 3.3v
higedura 3:5b192b38b3bb 330 _spi.write(0xAA); // check pattern
higedura 3:5b192b38b3bb 331 _spi.write(0x87); // crc
higedura 3:5b192b38b3bb 332
higedura 3:5b192b38b3bb 333 // wait for the repsonse (response[7] == 0)
higedura 3:5b192b38b3bb 334 for(int i=0; i<SD_COMMAND_TIMEOUT * 1000; i++) {
higedura 3:5b192b38b3bb 335 char response[5];
higedura 3:5b192b38b3bb 336 response[0] = _spi.write(0xFF);
higedura 3:5b192b38b3bb 337 if(!(response[0] & 0x80)) {
higedura 3:5b192b38b3bb 338 for(int j=1; j<5; j++) {
higedura 3:5b192b38b3bb 339 response[i] = _spi.write(0xFF);
higedura 3:5b192b38b3bb 340 }
higedura 3:5b192b38b3bb 341 _cs = 1;
higedura 3:5b192b38b3bb 342 _spi.write(0xFF);
higedura 3:5b192b38b3bb 343 return response[0];
higedura 3:5b192b38b3bb 344 }
higedura 3:5b192b38b3bb 345 }
higedura 3:5b192b38b3bb 346 _cs = 1;
higedura 3:5b192b38b3bb 347 _spi.write(0xFF);
higedura 3:5b192b38b3bb 348 return -1; // timeout
higedura 3:5b192b38b3bb 349 }
higedura 3:5b192b38b3bb 350
higedura 3:5b192b38b3bb 351 int SDFileSystem::_read(char *buffer, int length) {
higedura 3:5b192b38b3bb 352 _cs = 0;
higedura 3:5b192b38b3bb 353
higedura 3:5b192b38b3bb 354 // read until start byte (0xFF)
higedura 3:5b192b38b3bb 355 while(_spi.write(0xFF) != 0xFE);
higedura 3:5b192b38b3bb 356
higedura 3:5b192b38b3bb 357 // read data
higedura 3:5b192b38b3bb 358 for(int i=0; i<length; i++) {
higedura 3:5b192b38b3bb 359 buffer[i] = _spi.write(0xFF);
higedura 3:5b192b38b3bb 360 }
higedura 3:5b192b38b3bb 361 _spi.write(0xFF); // checksum
higedura 3:5b192b38b3bb 362 _spi.write(0xFF);
higedura 3:5b192b38b3bb 363
higedura 3:5b192b38b3bb 364 _cs = 1;
higedura 3:5b192b38b3bb 365 _spi.write(0xFF);
higedura 3:5b192b38b3bb 366 return 0;
higedura 3:5b192b38b3bb 367 }
higedura 3:5b192b38b3bb 368
higedura 3:5b192b38b3bb 369 int SDFileSystem::_write(const char *buffer, int length) {
higedura 3:5b192b38b3bb 370 _cs = 0;
higedura 3:5b192b38b3bb 371
higedura 3:5b192b38b3bb 372 // indicate start of block
higedura 3:5b192b38b3bb 373 _spi.write(0xFE);
higedura 3:5b192b38b3bb 374
higedura 3:5b192b38b3bb 375 // write the data
higedura 3:5b192b38b3bb 376 for(int i=0; i<length; i++) {
higedura 3:5b192b38b3bb 377 _spi.write(buffer[i]);
higedura 3:5b192b38b3bb 378 }
higedura 3:5b192b38b3bb 379
higedura 3:5b192b38b3bb 380 // write the checksum
higedura 3:5b192b38b3bb 381 _spi.write(0xFF);
higedura 3:5b192b38b3bb 382 _spi.write(0xFF);
higedura 3:5b192b38b3bb 383
higedura 3:5b192b38b3bb 384 // check the repsonse token
higedura 3:5b192b38b3bb 385 if((_spi.write(0xFF) & 0x1F) != 0x05) {
higedura 3:5b192b38b3bb 386 _cs = 1;
higedura 3:5b192b38b3bb 387 _spi.write(0xFF);
higedura 3:5b192b38b3bb 388 return 1;
higedura 3:5b192b38b3bb 389 }
higedura 3:5b192b38b3bb 390
higedura 3:5b192b38b3bb 391 // wait for write to finish
higedura 3:5b192b38b3bb 392 while(_spi.write(0xFF) == 0);
higedura 3:5b192b38b3bb 393
higedura 3:5b192b38b3bb 394 _cs = 1;
higedura 3:5b192b38b3bb 395 _spi.write(0xFF);
higedura 3:5b192b38b3bb 396 return 0;
higedura 3:5b192b38b3bb 397 }
higedura 3:5b192b38b3bb 398
higedura 3:5b192b38b3bb 399 static int ext_bits(char *data, int msb, int lsb) {
higedura 3:5b192b38b3bb 400 int bits = 0;
higedura 3:5b192b38b3bb 401 int size = 1 + msb - lsb;
higedura 3:5b192b38b3bb 402 for(int i=0; i<size; i++) {
higedura 3:5b192b38b3bb 403 int position = lsb + i;
higedura 3:5b192b38b3bb 404 int byte = 15 - (position >> 3);
higedura 3:5b192b38b3bb 405 int bit = position & 0x7;
higedura 3:5b192b38b3bb 406 int value = (data[byte] >> bit) & 1;
higedura 3:5b192b38b3bb 407 bits |= value << i;
higedura 3:5b192b38b3bb 408 }
higedura 3:5b192b38b3bb 409 return bits;
higedura 3:5b192b38b3bb 410 }
higedura 3:5b192b38b3bb 411
higedura 3:5b192b38b3bb 412 int SDFileSystem::_sd_sectors() {
higedura 3:5b192b38b3bb 413
higedura 3:5b192b38b3bb 414 // CMD9, Response R2 (R1 byte + 16-byte block read)
higedura 3:5b192b38b3bb 415 if(_cmdx(9, 0) != 0) {
higedura 3:5b192b38b3bb 416 fprintf(stderr, "Didn't get a response from the disk\n");
higedura 3:5b192b38b3bb 417 return 0;
higedura 3:5b192b38b3bb 418 }
higedura 3:5b192b38b3bb 419
higedura 3:5b192b38b3bb 420 char csd[16];
higedura 3:5b192b38b3bb 421 if(_read(csd, 16) != 0) {
higedura 3:5b192b38b3bb 422 fprintf(stderr, "Couldn't read csd response from disk\n");
higedura 3:5b192b38b3bb 423 return 0;
higedura 3:5b192b38b3bb 424 }
higedura 3:5b192b38b3bb 425
higedura 3:5b192b38b3bb 426 // csd_structure : csd[127:126]
higedura 3:5b192b38b3bb 427 // c_size : csd[73:62]
higedura 3:5b192b38b3bb 428 // c_size_mult : csd[49:47]
higedura 3:5b192b38b3bb 429 // read_bl_len : csd[83:80] - the *maximum* read block length
higedura 3:5b192b38b3bb 430
higedura 3:5b192b38b3bb 431 int csd_structure = ext_bits(csd, 127, 126);
higedura 3:5b192b38b3bb 432 int c_size = ext_bits(csd, 73, 62);
higedura 3:5b192b38b3bb 433 int c_size_mult = ext_bits(csd, 49, 47);
higedura 3:5b192b38b3bb 434 int read_bl_len = ext_bits(csd, 83, 80);
higedura 3:5b192b38b3bb 435
higedura 3:5b192b38b3bb 436 // printf("CSD_STRUCT = %d\n", csd_structure);
higedura 3:5b192b38b3bb 437
higedura 3:5b192b38b3bb 438 if(csd_structure != 0) {
higedura 3:5b192b38b3bb 439 fprintf(stderr, "This disk tastes funny! I only know about type 0 CSD structures\n");
higedura 3:5b192b38b3bb 440 return 0;
higedura 3:5b192b38b3bb 441 }
higedura 3:5b192b38b3bb 442
higedura 3:5b192b38b3bb 443 // memory capacity = BLOCKNR * BLOCK_LEN
higedura 3:5b192b38b3bb 444 // where
higedura 3:5b192b38b3bb 445 // BLOCKNR = (C_SIZE+1) * MULT
higedura 3:5b192b38b3bb 446 // MULT = 2^(C_SIZE_MULT+2) (C_SIZE_MULT < 8)
higedura 3:5b192b38b3bb 447 // BLOCK_LEN = 2^READ_BL_LEN, (READ_BL_LEN < 12)
higedura 3:5b192b38b3bb 448
higedura 3:5b192b38b3bb 449 int block_len = 1 << read_bl_len;
higedura 3:5b192b38b3bb 450 int mult = 1 << (c_size_mult + 2);
higedura 3:5b192b38b3bb 451 int blocknr = (c_size + 1) * mult;
higedura 3:5b192b38b3bb 452 int capacity = blocknr * block_len;
higedura 3:5b192b38b3bb 453
higedura 3:5b192b38b3bb 454 int blocks = capacity / 512;
higedura 3:5b192b38b3bb 455
higedura 3:5b192b38b3bb 456 return blocks;
higedura 3:5b192b38b3bb 457 }