Dependencies:   mbed

Committer:
higedura
Date:
Thu Mar 15 10:41:22 2012 +0000
Revision:
11:b32b3d6be8d2
Parent:
0:b61f317f452e

        

Who changed what in which revision?

UserRevisionLine numberNew contents of line
higedura 0:b61f317f452e 1 /**
higedura 0:b61f317f452e 2 * @author Aaron Berk
higedura 0:b61f317f452e 3 *
higedura 0:b61f317f452e 4 * @section LICENSE
higedura 0:b61f317f452e 5 *
higedura 0:b61f317f452e 6 * Copyright (c) 2010 ARM Limited
higedura 0:b61f317f452e 7 *
higedura 0:b61f317f452e 8 * Permission is hereby granted, free of charge, to any person obtaining a copy
higedura 0:b61f317f452e 9 * of this software and associated documentation files (the "Software"), to deal
higedura 0:b61f317f452e 10 * in the Software without restriction, including without limitation the rights
higedura 0:b61f317f452e 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
higedura 0:b61f317f452e 12 * copies of the Software, and to permit persons to whom the Software is
higedura 0:b61f317f452e 13 * furnished to do so, subject to the following conditions:
higedura 0:b61f317f452e 14 *
higedura 0:b61f317f452e 15 * The above copyright notice and this permission notice shall be included in
higedura 0:b61f317f452e 16 * all copies or substantial portions of the Software.
higedura 0:b61f317f452e 17 *
higedura 0:b61f317f452e 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
higedura 0:b61f317f452e 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
higedura 0:b61f317f452e 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
higedura 0:b61f317f452e 21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
higedura 0:b61f317f452e 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
higedura 0:b61f317f452e 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
higedura 0:b61f317f452e 24 * THE SOFTWARE.
higedura 0:b61f317f452e 25 *
higedura 0:b61f317f452e 26 * @section DESCRIPTION
higedura 0:b61f317f452e 27 *
higedura 0:b61f317f452e 28 * ITG-3200 triple axis, digital interface, gyroscope.
higedura 0:b61f317f452e 29 *
higedura 0:b61f317f452e 30 * Datasheet:
higedura 0:b61f317f452e 31 *
higedura 0:b61f317f452e 32 * http://invensense.com/mems/gyro/documents/PS-ITG-3200-00-01.4.pdf
higedura 0:b61f317f452e 33 */
higedura 0:b61f317f452e 34
higedura 0:b61f317f452e 35 #ifndef ITG3200_H
higedura 0:b61f317f452e 36 #define ITG3200_H
higedura 0:b61f317f452e 37
higedura 0:b61f317f452e 38 /**
higedura 0:b61f317f452e 39 * Includes
higedura 0:b61f317f452e 40 */
higedura 0:b61f317f452e 41 #include "mbed.h"
higedura 0:b61f317f452e 42
higedura 0:b61f317f452e 43 /**
higedura 0:b61f317f452e 44 * Defines
higedura 0:b61f317f452e 45 */
higedura 0:b61f317f452e 46 #define ITG3200_I2C_ADDRESS 0x68 //7-bit address.
higedura 0:b61f317f452e 47
higedura 0:b61f317f452e 48 //-----------
higedura 0:b61f317f452e 49 // Registers
higedura 0:b61f317f452e 50 //-----------
higedura 0:b61f317f452e 51 #define WHO_AM_I_REG 0x00
higedura 0:b61f317f452e 52 #define SMPLRT_DIV_REG 0x15
higedura 0:b61f317f452e 53 #define DLPF_FS_REG 0x16
higedura 0:b61f317f452e 54 #define INT_CFG_REG 0x17
higedura 0:b61f317f452e 55 #define INT_STATUS 0x1A
higedura 0:b61f317f452e 56 #define TEMP_OUT_H_REG 0x1B
higedura 0:b61f317f452e 57 #define TEMP_OUT_L_REG 0x1C
higedura 0:b61f317f452e 58 #define GYRO_XOUT_H_REG 0x1D
higedura 0:b61f317f452e 59 #define GYRO_XOUT_L_REG 0x1E
higedura 0:b61f317f452e 60 #define GYRO_YOUT_H_REG 0x1F
higedura 0:b61f317f452e 61 #define GYRO_YOUT_L_REG 0x20
higedura 0:b61f317f452e 62 #define GYRO_ZOUT_H_REG 0x21
higedura 0:b61f317f452e 63 #define GYRO_ZOUT_L_REG 0x22
higedura 0:b61f317f452e 64 #define PWR_MGM_REG 0x3E
higedura 0:b61f317f452e 65
higedura 0:b61f317f452e 66 //----------------------------
higedura 0:b61f317f452e 67 // Low Pass Filter Bandwidths
higedura 0:b61f317f452e 68 //----------------------------
higedura 0:b61f317f452e 69 #define LPFBW_256HZ 0x00
higedura 0:b61f317f452e 70 #define LPFBW_188HZ 0x01
higedura 0:b61f317f452e 71 #define LPFBW_98HZ 0x02
higedura 0:b61f317f452e 72 #define LPFBW_42HZ 0x03
higedura 0:b61f317f452e 73 #define LPFBW_20HZ 0x04
higedura 0:b61f317f452e 74 #define LPFBW_10HZ 0x05
higedura 0:b61f317f452e 75 #define LPFBW_5HZ 0x06
higedura 0:b61f317f452e 76
higedura 0:b61f317f452e 77 /**
higedura 0:b61f317f452e 78 * ITG-3200 triple axis digital gyroscope.
higedura 0:b61f317f452e 79 */
higedura 0:b61f317f452e 80 class ITG3200 {
higedura 0:b61f317f452e 81
higedura 0:b61f317f452e 82 public:
higedura 0:b61f317f452e 83
higedura 0:b61f317f452e 84 /**
higedura 0:b61f317f452e 85 * Constructor.
higedura 0:b61f317f452e 86 *
higedura 0:b61f317f452e 87 * Sets FS_SEL to 0x03 for proper opertaion.
higedura 0:b61f317f452e 88 *
higedura 0:b61f317f452e 89 * @param sda - mbed pin to use for the SDA I2C line.
higedura 0:b61f317f452e 90 * @param scl - mbed pin to use for the SCL I2C line.
higedura 0:b61f317f452e 91 */
higedura 0:b61f317f452e 92 ITG3200(PinName sda, PinName scl);
higedura 0:b61f317f452e 93
higedura 0:b61f317f452e 94 /**
higedura 0:b61f317f452e 95 * Get the identity of the device.
higedura 0:b61f317f452e 96 *
higedura 0:b61f317f452e 97 * @return The contents of the Who Am I register which contains the I2C
higedura 0:b61f317f452e 98 * address of the device.
higedura 0:b61f317f452e 99 */
higedura 0:b61f317f452e 100 char getWhoAmI(void);
higedura 0:b61f317f452e 101
higedura 0:b61f317f452e 102 /**
higedura 0:b61f317f452e 103 * Set the address of the device.
higedura 0:b61f317f452e 104 *
higedura 0:b61f317f452e 105 * @param address The I2C slave address to write to the Who Am I register
higedura 0:b61f317f452e 106 * on the device.
higedura 0:b61f317f452e 107 */
higedura 0:b61f317f452e 108 void setWhoAmI(char address);
higedura 0:b61f317f452e 109
higedura 0:b61f317f452e 110 /**
higedura 0:b61f317f452e 111 * Get the sample rate divider.
higedura 0:b61f317f452e 112 *
higedura 0:b61f317f452e 113 * @return The sample rate divider as a number from 0-255.
higedura 0:b61f317f452e 114 */
higedura 0:b61f317f452e 115 char getSampleRateDivider(void);
higedura 0:b61f317f452e 116
higedura 0:b61f317f452e 117 /**
higedura 0:b61f317f452e 118 * Set the sample rate divider.
higedura 0:b61f317f452e 119 *
higedura 0:b61f317f452e 120 * Fsample = Finternal / (divider + 1), where Finternal = 1kHz or 8kHz,
higedura 0:b61f317f452e 121 * as decidied by the DLPF_FS register.
higedura 0:b61f317f452e 122 *
higedura 0:b61f317f452e 123 * @param The sample rate divider as a number from 0-255.
higedura 0:b61f317f452e 124 */
higedura 0:b61f317f452e 125 void setSampleRateDivider(char divider);
higedura 0:b61f317f452e 126
higedura 0:b61f317f452e 127 /**
higedura 0:b61f317f452e 128 * Get the internal sample rate.
higedura 0:b61f317f452e 129 *
higedura 0:b61f317f452e 130 * @return The internal sample rate in kHz - either 1 or 8.
higedura 0:b61f317f452e 131 */
higedura 0:b61f317f452e 132 int getInternalSampleRate(void);
higedura 0:b61f317f452e 133
higedura 0:b61f317f452e 134 /**
higedura 0:b61f317f452e 135 * Set the low pass filter bandwidth.
higedura 0:b61f317f452e 136 *
higedura 0:b61f317f452e 137 * Also used to set the internal sample rate.
higedura 0:b61f317f452e 138 * Pass the #define bandwidth codes as a parameter.
higedura 0:b61f317f452e 139 *
higedura 0:b61f317f452e 140 * 256Hz -> 8kHz internal sample rate.
higedura 0:b61f317f452e 141 * Everything else -> 1kHz internal rate.
higedura 0:b61f317f452e 142 *
higedura 0:b61f317f452e 143 * @param bandwidth Low pass filter bandwidth code
higedura 0:b61f317f452e 144 */
higedura 0:b61f317f452e 145 void setLpBandwidth(char bandwidth);
higedura 0:b61f317f452e 146
higedura 0:b61f317f452e 147 /**
higedura 0:b61f317f452e 148 * Get the interrupt configuration.
higedura 0:b61f317f452e 149 *
higedura 0:b61f317f452e 150 * See datasheet for register contents details.
higedura 0:b61f317f452e 151 *
higedura 0:b61f317f452e 152 * 7 6 5 4
higedura 0:b61f317f452e 153 * +------+------+--------------+------------------+
higedura 0:b61f317f452e 154 * | ACTL | OPEN | LATCH_INT_EN | INT_ANYRD_2CLEAR |
higedura 0:b61f317f452e 155 * +------+------+--------------+------------------+
higedura 0:b61f317f452e 156 *
higedura 0:b61f317f452e 157 * 3 2 1 0
higedura 0:b61f317f452e 158 * +---+------------+------------+---+
higedura 0:b61f317f452e 159 * | 0 | ITG_RDY_EN | RAW_RDY_EN | 0 |
higedura 0:b61f317f452e 160 * +---+------------+------------+---+
higedura 0:b61f317f452e 161 *
higedura 0:b61f317f452e 162 * ACTL Logic level for INT output pin; 1 = active low, 0 = active high.
higedura 0:b61f317f452e 163 * OPEN Drive type for INT output pin; 1 = open drain, 0 = push-pull.
higedura 0:b61f317f452e 164 * LATCH_INT_EN Latch mode; 1 = latch until interrupt is cleared,
higedura 0:b61f317f452e 165 * 0 = 50us pulse.
higedura 0:b61f317f452e 166 * INT_ANYRD_2CLEAR Latch clear method; 1 = any register read,
higedura 0:b61f317f452e 167 * 0 = status register read only.
higedura 0:b61f317f452e 168 * ITG_RDY_EN Enable interrupt when device is ready,
higedura 0:b61f317f452e 169 * (PLL ready after changing clock source).
higedura 0:b61f317f452e 170 * RAW_RDY_EN Enable interrupt when data is available.
higedura 0:b61f317f452e 171 * 0 Bits 1 and 3 of the INT_CFG register should be zero.
higedura 0:b61f317f452e 172 *
higedura 0:b61f317f452e 173 * @return the contents of the INT_CFG register.
higedura 0:b61f317f452e 174 */
higedura 0:b61f317f452e 175 char getInterruptConfiguration(void);
higedura 0:b61f317f452e 176
higedura 0:b61f317f452e 177 /**
higedura 0:b61f317f452e 178 * Set the interrupt configuration.
higedura 0:b61f317f452e 179 *
higedura 0:b61f317f452e 180 * See datasheet for configuration byte details.
higedura 0:b61f317f452e 181 *
higedura 0:b61f317f452e 182 * 7 6 5 4
higedura 0:b61f317f452e 183 * +------+------+--------------+------------------+
higedura 0:b61f317f452e 184 * | ACTL | OPEN | LATCH_INT_EN | INT_ANYRD_2CLEAR |
higedura 0:b61f317f452e 185 * +------+------+--------------+------------------+
higedura 0:b61f317f452e 186 *
higedura 0:b61f317f452e 187 * 3 2 1 0
higedura 0:b61f317f452e 188 * +---+------------+------------+---+
higedura 0:b61f317f452e 189 * | 0 | ITG_RDY_EN | RAW_RDY_EN | 0 |
higedura 0:b61f317f452e 190 * +---+------------+------------+---+
higedura 0:b61f317f452e 191 *
higedura 0:b61f317f452e 192 * ACTL Logic level for INT output pin; 1 = active low, 0 = active high.
higedura 0:b61f317f452e 193 * OPEN Drive type for INT output pin; 1 = open drain, 0 = push-pull.
higedura 0:b61f317f452e 194 * LATCH_INT_EN Latch mode; 1 = latch until interrupt is cleared,
higedura 0:b61f317f452e 195 * 0 = 50us pulse.
higedura 0:b61f317f452e 196 * INT_ANYRD_2CLEAR Latch clear method; 1 = any register read,
higedura 0:b61f317f452e 197 * 0 = status register read only.
higedura 0:b61f317f452e 198 * ITG_RDY_EN Enable interrupt when device is ready,
higedura 0:b61f317f452e 199 * (PLL ready after changing clock source).
higedura 0:b61f317f452e 200 * RAW_RDY_EN Enable interrupt when data is available.
higedura 0:b61f317f452e 201 * 0 Bits 1 and 3 of the INT_CFG register should be zero.
higedura 0:b61f317f452e 202 *
higedura 0:b61f317f452e 203 * @param config Configuration byte to write to INT_CFG register.
higedura 0:b61f317f452e 204 */
higedura 0:b61f317f452e 205 void setInterruptConfiguration(char config);
higedura 0:b61f317f452e 206
higedura 0:b61f317f452e 207 /**
higedura 0:b61f317f452e 208 * Check the ITG_RDY bit of the INT_STATUS register.
higedura 0:b61f317f452e 209 *
higedura 0:b61f317f452e 210 * @return True if the ITG_RDY bit is set, corresponding to PLL ready,
higedura 0:b61f317f452e 211 * false if the ITG_RDY bit is not set, corresponding to PLL not
higedura 0:b61f317f452e 212 * ready.
higedura 0:b61f317f452e 213 */
higedura 0:b61f317f452e 214 bool isPllReady(void);
higedura 0:b61f317f452e 215
higedura 0:b61f317f452e 216 /**
higedura 0:b61f317f452e 217 * Check the RAW_DATA_RDY bit of the INT_STATUS register.
higedura 0:b61f317f452e 218 *
higedura 0:b61f317f452e 219 * @return True if the RAW_DATA_RDY bit is set, corresponding to new data
higedura 0:b61f317f452e 220 * in the sensor registers, false if the RAW_DATA_RDY bit is not
higedura 0:b61f317f452e 221 * set, corresponding to no new data yet in the sensor registers.
higedura 0:b61f317f452e 222 */
higedura 0:b61f317f452e 223 bool isRawDataReady(void);
higedura 0:b61f317f452e 224
higedura 0:b61f317f452e 225 /**
higedura 0:b61f317f452e 226 * Get the temperature of the device.
higedura 0:b61f317f452e 227 *
higedura 0:b61f317f452e 228 * @return The temperature in degrees celsius.
higedura 0:b61f317f452e 229 */
higedura 0:b61f317f452e 230 float getTemperature(void);
higedura 0:b61f317f452e 231
higedura 0:b61f317f452e 232 /**
higedura 0:b61f317f452e 233 * Get the output for the x-axis gyroscope.
higedura 0:b61f317f452e 234 *
higedura 0:b61f317f452e 235 * Typical sensitivity is 14.375 LSB/(degrees/sec).
higedura 0:b61f317f452e 236 *
higedura 0:b61f317f452e 237 * @return The output on the x-axis in raw ADC counts.
higedura 0:b61f317f452e 238 */
higedura 0:b61f317f452e 239 int getGyroX(void);
higedura 0:b61f317f452e 240
higedura 0:b61f317f452e 241 /**
higedura 0:b61f317f452e 242 * Get the output for the y-axis gyroscope.
higedura 0:b61f317f452e 243 *
higedura 0:b61f317f452e 244 * Typical sensitivity is 14.375 LSB/(degrees/sec).
higedura 0:b61f317f452e 245 *
higedura 0:b61f317f452e 246 * @return The output on the y-axis in raw ADC counts.
higedura 0:b61f317f452e 247 */
higedura 0:b61f317f452e 248 int getGyroY(void);
higedura 0:b61f317f452e 249
higedura 0:b61f317f452e 250 /**
higedura 0:b61f317f452e 251 * Get the output on the z-axis gyroscope.
higedura 0:b61f317f452e 252 *
higedura 0:b61f317f452e 253 * Typical sensitivity is 14.375 LSB/(degrees/sec).
higedura 0:b61f317f452e 254 *
higedura 0:b61f317f452e 255 * @return The output on the z-axis in raw ADC counts.
higedura 0:b61f317f452e 256 */
higedura 0:b61f317f452e 257 int getGyroZ(void);
higedura 0:b61f317f452e 258
higedura 0:b61f317f452e 259 /**
higedura 0:b61f317f452e 260 * Get the power management configuration.
higedura 0:b61f317f452e 261 *
higedura 0:b61f317f452e 262 * See the datasheet for register contents details.
higedura 0:b61f317f452e 263 *
higedura 0:b61f317f452e 264 * 7 6 5 4
higedura 0:b61f317f452e 265 * +---------+-------+---------+---------+
higedura 0:b61f317f452e 266 * | H_RESET | SLEEP | STBY_XG | STBY_YG |
higedura 0:b61f317f452e 267 * +---------+-------+---------+---------+
higedura 0:b61f317f452e 268 *
higedura 0:b61f317f452e 269 * 3 2 1 0
higedura 0:b61f317f452e 270 * +---------+----------+----------+----------+
higedura 0:b61f317f452e 271 * | STBY_ZG | CLK_SEL2 | CLK_SEL1 | CLK_SEL0 |
higedura 0:b61f317f452e 272 * +---------+----------+----------+----------+
higedura 0:b61f317f452e 273 *
higedura 0:b61f317f452e 274 * H_RESET Reset device and internal registers to the power-up-default settings.
higedura 0:b61f317f452e 275 * SLEEP Enable low power sleep mode.
higedura 0:b61f317f452e 276 * STBY_XG Put gyro X in standby mode (1=standby, 0=normal).
higedura 0:b61f317f452e 277 * STBY_YG Put gyro Y in standby mode (1=standby, 0=normal).
higedura 0:b61f317f452e 278 * STBY_ZG Put gyro Z in standby mode (1=standby, 0=normal).
higedura 0:b61f317f452e 279 * CLK_SEL Select device clock source:
higedura 0:b61f317f452e 280 *
higedura 0:b61f317f452e 281 * CLK_SEL | Clock Source
higedura 0:b61f317f452e 282 * --------+--------------
higedura 0:b61f317f452e 283 * 0 Internal oscillator
higedura 0:b61f317f452e 284 * 1 PLL with X Gyro reference
higedura 0:b61f317f452e 285 * 2 PLL with Y Gyro reference
higedura 0:b61f317f452e 286 * 3 PLL with Z Gyro reference
higedura 0:b61f317f452e 287 * 4 PLL with external 32.768kHz reference
higedura 0:b61f317f452e 288 * 5 PLL with external 19.2MHz reference
higedura 0:b61f317f452e 289 * 6 Reserved
higedura 0:b61f317f452e 290 * 7 Reserved
higedura 0:b61f317f452e 291 *
higedura 0:b61f317f452e 292 * @return The contents of the PWR_MGM register.
higedura 0:b61f317f452e 293 */
higedura 0:b61f317f452e 294 char getPowerManagement(void);
higedura 0:b61f317f452e 295
higedura 0:b61f317f452e 296 /**
higedura 0:b61f317f452e 297 * Set power management configuration.
higedura 0:b61f317f452e 298 *
higedura 0:b61f317f452e 299 * See the datasheet for configuration byte details
higedura 0:b61f317f452e 300 *
higedura 0:b61f317f452e 301 * 7 6 5 4
higedura 0:b61f317f452e 302 * +---------+-------+---------+---------+
higedura 0:b61f317f452e 303 * | H_RESET | SLEEP | STBY_XG | STBY_YG |
higedura 0:b61f317f452e 304 * +---------+-------+---------+---------+
higedura 0:b61f317f452e 305 *
higedura 0:b61f317f452e 306 * 3 2 1 0
higedura 0:b61f317f452e 307 * +---------+----------+----------+----------+
higedura 0:b61f317f452e 308 * | STBY_ZG | CLK_SEL2 | CLK_SEL1 | CLK_SEL0 |
higedura 0:b61f317f452e 309 * +---------+----------+----------+----------+
higedura 0:b61f317f452e 310 *
higedura 0:b61f317f452e 311 * H_RESET Reset device and internal registers to the power-up-default settings.
higedura 0:b61f317f452e 312 * SLEEP Enable low power sleep mode.
higedura 0:b61f317f452e 313 * STBY_XG Put gyro X in standby mode (1=standby, 0=normal).
higedura 0:b61f317f452e 314 * STBY_YG Put gyro Y in standby mode (1=standby, 0=normal).
higedura 0:b61f317f452e 315 * STBY_ZG Put gyro Z in standby mode (1=standby, 0=normal).
higedura 0:b61f317f452e 316 * CLK_SEL Select device clock source:
higedura 0:b61f317f452e 317 *
higedura 0:b61f317f452e 318 * CLK_SEL | Clock Source
higedura 0:b61f317f452e 319 * --------+--------------
higedura 0:b61f317f452e 320 * 0 Internal oscillator
higedura 0:b61f317f452e 321 * 1 PLL with X Gyro reference
higedura 0:b61f317f452e 322 * 2 PLL with Y Gyro reference
higedura 0:b61f317f452e 323 * 3 PLL with Z Gyro reference
higedura 0:b61f317f452e 324 * 4 PLL with external 32.768kHz reference
higedura 0:b61f317f452e 325 * 5 PLL with external 19.2MHz reference
higedura 0:b61f317f452e 326 * 6 Reserved
higedura 0:b61f317f452e 327 * 7 Reserved
higedura 0:b61f317f452e 328 *
higedura 0:b61f317f452e 329 * @param config The configuration byte to write to the PWR_MGM register.
higedura 0:b61f317f452e 330 */
higedura 0:b61f317f452e 331 void setPowerManagement(char config);
higedura 0:b61f317f452e 332
higedura 0:b61f317f452e 333 private:
higedura 0:b61f317f452e 334
higedura 0:b61f317f452e 335 I2C i2c_;
higedura 0:b61f317f452e 336
higedura 0:b61f317f452e 337 };
higedura 0:b61f317f452e 338
higedura 0:b61f317f452e 339 #endif /* ITG3200_H */