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This library supports the internal QEI hardware of the LPC1768. WARNING: requires modification of the mbed module.
Dependents: Bracky-MPU6050-DMP mbed__motor_QEIHWv2_interupt_timer_sy_2017_RD_ver020 realtimeMM_V3 realtimeMM_V3 ... more
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qeihw.h
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00001 /* mbed Library - QEIhw 00002 * Copyright (c) 2010, hball 00003 * released under MIT license http://mbed.org/licence/mit 00004 */ 00005 00006 /***********************************************************************//** 00007 * @file qeihw.h 00008 * @brief Header file for the qeihw driver. Adapted from the CMSIS 00009 * header, lpc17xx_qei.h, v 2.0 00010 * @version 0.0 00011 * @date 10 Dec 2010 00012 * @author hb 00013 **************************************************************************/ 00014 00015 00016 #ifndef MBED_QEIHW_H 00017 #define MBED_QEIHW_H 00018 00019 /* Includes ------------------------------------------------------------------- */ 00020 #include "mbed.h" 00021 00022 00023 /* Public Types --------------------------------------------------------------- */ 00024 00025 /* Flag Status type definition */ 00026 typedef enum {RESET = 0, SET = !RESET} FlagStatus, IntStatus, SetState; 00027 00028 /* Functional State Definition */ 00029 typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; 00030 00031 00032 /* Other definitions */ 00033 #define XTAL_FREQ 12000000 00034 00035 /* Public Functions ----------------------------------------------------------- */ 00036 /** @defgroup QEI_Public_Functions QEI Public Functions 00037 */ 00038 00039 /** QEI hardware interface class 00040 * Requires mbed hardware modification: connect 00041 * encoder PhA to p1.20, and PhB to p1.23. 00042 * 00043 * Example: 00044 * @code 00045 * // Display changes in encoder position and direction 00046 #include "mbed.h" 00047 * #include "qeihw.h" 00048 * 00049 * DigitalOut led1(LED1); 00050 * DigitalOut led3(LED3); 00051 * QEIHW qei(QEI_DIRINV_NONE, QEI_SIGNALMODE_QUAD, QEI_CAPMODE_2X, QEI_INVINX_NONE ); 00052 * 00053 * int main() { 00054 * int32_t temp, position = 0; 00055 * qei.SetDigiFilter(480UL); 00056 * qei.SetMaxPosition(0xFFFFFFFF); 00057 * 00058 * while(1) { 00059 * while(position == (temp = qei.GetPosition()) ); 00060 * position = temp; 00061 * printf("New position = %d.\r\n", temp); 00062 * led1 = qei.Direction() == SET ? 1 : 0; 00063 * led3 = !led1; 00064 * wait(0.1); 00065 * } 00066 * } 00067 * @endcode 00068 */ 00069 00070 class QEIHW { 00071 public: 00072 00073 /** Create a QEI object and configure it 00074 * 00075 * @param _dirinv Direction invert. When = 1, complements the QEICONF register DIR bit 00076 * @param _sigmode Signal mode. When = 0, PhA and PhB are quadrature inputs. When = 1, PhA is direction and PhB is clock 00077 * @param _capmode Capture mode. When = 0, count PhA edges only (2X mode). Whe = 1, count PhB edges also (4X mode). 00078 * @param _invinx Invert index. When = 1, inverts the sense of the index signal 00079 */ 00080 QEIHW( uint32_t _dirinv, uint32_t _sigmode, uint32_t _capmode, uint32_t _invinx); 00081 00082 /** Resets value for each type of QEI value, such as velocity, position, etc. 00083 * 00084 * @param[in] ulResetType QEI Reset Type, should be one of the following: 00085 * - QEI_RESET_POS: Reset Position Counter 00086 * - QEI_RESET_POSOnIDX: Reset Position Counter on Index signal 00087 * - QEI_RESET_VEL: Reset Velocity 00088 * - QEI_RESET_IDX: Reset Index Counter 00089 */ 00090 void Reset(uint32_t ulResetType); 00091 00092 /** Powers down the QEI block, returns pins to GPIO mode 00093 * 00094 */ 00095 void DeInit(); 00096 00097 /** Report direction (QEISTAT bit DIR) 00098 * 00099 * @return State of the DIR bit (SET or RESET) 00100 */ 00101 FlagStatus Direction(); 00102 00103 /** 00104 * @brief Get current position value in QEI peripheral 00105 * 00106 * @return Current position value of QEI peripheral 00107 */ 00108 uint32_t GetPosition(); 00109 00110 /** Set max position value for QEI peripheral 00111 * 00112 * @param[in] ulMaxPos Max position value to set 00113 * @return None 00114 */ 00115 void SetMaxPosition(uint32_t ulMaxPos); 00116 00117 /** Set position compare value for QEI peripheral 00118 * @param[in] bPosCompCh Compare Position channel, should be: 00119 * - QEI_COMPPOS_CH_0: QEI compare position channel 0 00120 * - QEI_COMPPOS_CH_1: QEI compare position channel 1 00121 * - QEI_COMPPOS_CH_2: QEI compare position channel 2 00122 * @param[in] ulPosComp Compare Position value to set 00123 * @return None 00124 */ 00125 void SetPositionComp( uint8_t bPosCompCh, uint32_t ulPosComp); 00126 00127 /** Get current index counter of QEI peripheral 00128 * 00129 * @return Current value of QEI index counter 00130 */ 00131 uint32_t GetIndex(); 00132 00133 /** Set value for index compare in QEI peripheral 00134 * @param[in] ulIndexComp Compare Index Value to set 00135 * @return None 00136 */ 00137 void SetIndexComp( uint32_t ulIndexComp); 00138 00139 /** Set Velocity timer reload value 00140 * 00141 * @param[in] ulReloadValue Velocity timer reload count 00142 * @return None 00143 */ 00144 void SetVelocityTimerReload( uint32_t ulReloadValue); 00145 00146 /** Set Velocity timer reload value in microseconds 00147 * 00148 * @param[in] ulReloadValue Velocity timer reload count 00149 * @return None 00150 */ 00151 void SetVelocityTimerReload_us( uint32_t ulReloadValue); 00152 00153 /** Get current timer counter in QEI peripheral 00154 * 00155 * @return Current timer counter in QEI peripheral 00156 */ 00157 uint32_t GetTimer(); 00158 00159 /** Get current velocity pulse counter in current time period 00160 * 00161 * @return Current velocity pulse counter value 00162 */ 00163 uint32_t GetVelocity(); 00164 00165 /** Get the most recently measured velocity of the QEI. When 00166 * the Velocity timer in QEI is over-flow, the current velocity 00167 * value will be loaded into Velocity Capture register. 00168 * 00169 * @return The most recently measured velocity value 00170 */ 00171 uint32_t GetVelocityCap(); 00172 00173 /** Set Velocity Compare value for QEI peripheral 00174 * 00175 * @param[in] ulVelComp Compare Velocity value to set 00176 * @return None 00177 */ 00178 void SetVelocityComp( uint32_t ulVelComp); 00179 00180 /** Set value of sampling count for the digital filter in 00181 * QEI peripheral 00182 * 00183 * @param[in] ulSamplingPulse Value of sampling count to set 00184 * @return None 00185 */ 00186 void SetDigiFilter( uint32_t ulSamplingPulse); 00187 00188 /** Check whether if specified interrupt flag status in QEI 00189 * peripheral is set or not 00190 * 00191 * @param[in] ulIntType Interrupt Flag Status type, should be: 00192 - QEI_INTFLAG_INX_Int: index pulse was detected interrupt 00193 - QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt 00194 - QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt 00195 - QEI_INTFLAG_DIR_Int: Change of direction interrupt 00196 - QEI_INTFLAG_ERR_Int: An encoder phase error interrupt 00197 - QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt 00198 - QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the 00199 current position interrupt 00200 - QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the 00201 current position interrupt 00202 - QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the 00203 current position interrupt 00204 - QEI_INTFLAG_REV_Int: Index compare value is equal to the current 00205 index count interrupt 00206 - QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt 00207 - QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt 00208 - QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt 00209 * @return New State of specified interrupt flag status (SET or RESET) 00210 */ 00211 FlagStatus GetIntStatus( uint32_t ulIntType); 00212 00213 /** Enable/Disable specified interrupt in QEI peripheral 00214 * 00215 * @param[in] ulIntType Interrupt Flag Status type, should be: 00216 * - QEI_INTFLAG_INX_Int: index pulse was detected interrupt 00217 * - QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt 00218 * - QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt 00219 * - QEI_INTFLAG_DIR_Int: Change of direction interrupt 00220 * - QEI_INTFLAG_ERR_Int: An encoder phase error interrupt 00221 * - QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt 00222 * - QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the 00223 * current position interrupt 00224 * - QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the 00225 * current position interrupt 00226 * - QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the 00227 * current position interrupt 00228 * - QEI_INTFLAG_REV_Int: Index compare value is equal to the current 00229 * index count interrupt 00230 * - QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt 00231 * - QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt 00232 * - QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt 00233 * @param[in] NewState New function state, should be: 00234 * - DISABLE 00235 * - ENABLE 00236 * @return None 00237 */ 00238 void IntCmd( uint32_t ulIntType, FunctionalState NewState); 00239 00240 /** Asserts specified interrupt in QEI peripheral 00241 * 00242 * @param[in] ulIntType Interrupt Flag Status type, should be: 00243 - QEI_INTFLAG_INX_Int: index pulse was detected interrupt 00244 - QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt 00245 - QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt 00246 - QEI_INTFLAG_DIR_Int: Change of direction interrupt 00247 - QEI_INTFLAG_ERR_Int: An encoder phase error interrupt 00248 - QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt 00249 - QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the 00250 current position interrupt 00251 - QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the 00252 current position interrupt 00253 - QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the 00254 current position interrupt 00255 - QEI_INTFLAG_REV_Int: Index compare value is equal to the current 00256 index count interrupt 00257 - QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt 00258 - QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt 00259 - QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt 00260 * @return None 00261 */ 00262 void IntSet( uint32_t ulIntType); 00263 00264 /** De-asserts specified interrupt (pending) in QEI peripheral 00265 * 00266 * @param[in] ulIntType Interrupt Flag Status type, should be: 00267 - QEI_INTFLAG_INX_Int: index pulse was detected interrupt 00268 - QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt 00269 - QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt 00270 - QEI_INTFLAG_DIR_Int: Change of direction interrupt 00271 - QEI_INTFLAG_ERR_Int: An encoder phase error interrupt 00272 - QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt 00273 - QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the 00274 current position interrupt 00275 - QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the 00276 current position interrupt 00277 - QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the 00278 current position interrupt 00279 - QEI_INTFLAG_REV_Int: Index compare value is equal to the current 00280 index count interrupt 00281 - QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt 00282 - QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt 00283 - QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt 00284 * @return None 00285 */ 00286 void IntClear( uint32_t ulIntType); 00287 00288 /** Append interrupt handler for specific QEI interrupt source 00289 * 00290 * @param[in] ulISRType Interrupt Flag Status type, should be: 00291 * - QEI_INTFLAG_INX_Int: index pulse was detected interrupt 00292 * - QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt 00293 * - QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt 00294 * - QEI_INTFLAG_DIR_Int: Change of direction interrupt 00295 * - QEI_INTFLAG_ERR_Int: An encoder phase error interrupt 00296 * - QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt 00297 * - QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the 00298 * current position interrupt 00299 * - QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the 00300 * current position interrupt 00301 * - QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the 00302 * current position interrupt 00303 * - QEI_INTFLAG_REV_Int: Index compare value is equal to the current 00304 * index count interrupt 00305 * - QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt 00306 * - QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt 00307 * - QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt 00308 * 00309 * @return none 00310 */ 00311 void AppendISR(uint32_t ulISRType, void(*fptr)(void)); 00312 00313 /** Unappend interrupt handler for specific QEI interrupt source 00314 * 00315 * @param[in] ulISRType Interrupt Flag Status type, should be: 00316 * - QEI_INTFLAG_INX_Int: index pulse was detected interrupt 00317 * - QEI_INTFLAG_TIM_Int: Velocity timer over flow interrupt 00318 * - QEI_INTFLAG_VELC_Int: Capture velocity is less than compare interrupt 00319 * - QEI_INTFLAG_DIR_Int: Change of direction interrupt 00320 * - QEI_INTFLAG_ERR_Int: An encoder phase error interrupt 00321 * - QEI_INTFLAG_ENCLK_Int: An encoder clock pulse was detected interrupt 00322 * - QEI_INTFLAG_POS0_Int: position 0 compare value is equal to the 00323 * current position interrupt 00324 * - QEI_INTFLAG_POS1_Int: position 1 compare value is equal to the 00325 * current position interrupt 00326 * - QEI_INTFLAG_POS2_Int: position 2 compare value is equal to the 00327 * current position interrupt 00328 * - QEI_INTFLAG_REV_Int: Index compare value is equal to the current 00329 * index count interrupt 00330 * - QEI_INTFLAG_POS0REV_Int: Combined position 0 and revolution count interrupt 00331 * - QEI_INTFLAG_POS1REV_Int: Combined position 1 and revolution count interrupt 00332 * - QEI_INTFLAG_POS2REV_Int: Combined position 2 and revolution count interrupt 00333 * 00334 * @return none 00335 */ 00336 void UnAppendISR(uint32_t ulISRType); 00337 00338 00339 /** 00340 * @brief Calculates the actual velocity in RPM passed via velocity 00341 * capture value and Pulse Per Revolution (of the encoder) value 00342 * parameter input. 00343 * 00344 * @param[in] ulVelCapValue Velocity capture input value that can 00345 * be got from QEI_GetVelocityCap() function 00346 * @param[in] ulPPR Pulse per round of encoder 00347 * @return The actual value of velocity in RPM (Revolutions per minute) 00348 */ 00349 uint32_t CalculateRPM( uint32_t ulVelCapValue, uint32_t ulPPR); 00350 00351 00352 /* Public Macros -------------------------------------------------------------- */ 00353 /* QEI Reset types */ 00354 #define QEI_RESET_POS QEI_CON_RESP /**< Reset position counter */ 00355 #define QEI_RESET_POSOnIDX QEI_CON_RESPI /**< Reset Posistion Counter on Index */ 00356 #define QEI_RESET_VEL QEI_CON_RESV /**< Reset Velocity */ 00357 #define QEI_RESET_IDX QEI_CON_RESI /**< Reset Index Counter */ 00358 00359 /* QEI Direction Invert Type Option */ 00360 #define QEI_DIRINV_NONE ((uint32_t)(0)) /**< Direction is not inverted */ 00361 #define QEI_DIRINV_CMPL ((uint32_t)(1)) /**< Direction is complemented */ 00362 00363 /* QEI Signal Mode Option */ 00364 #define QEI_SIGNALMODE_QUAD ((uint32_t)(0)) /**< Signal operation: Quadrature phase mode */ 00365 #define QEI_SIGNALMODE_CLKDIR ((uint32_t)(1)) /**< Signal operation: Clock/Direction mode */ 00366 00367 /* QEI Capture Mode Option */ 00368 #define QEI_CAPMODE_2X ((uint32_t)(0)) /**< Capture mode: Only Phase-A edges are counted (2X) */ 00369 #define QEI_CAPMODE_4X ((uint32_t)(1)) /**< Capture mode: BOTH PhA and PhB edges are counted (4X)*/ 00370 00371 /* QEI Invert Index Signal Option */ 00372 #define QEI_INVINX_NONE ((uint32_t)(0)) /**< Invert Index signal option: None */ 00373 #define QEI_INVINX_EN ((uint32_t)(1)) /**< Invert Index signal option: Enable */ 00374 00375 /* QEI timer reload option */ 00376 #define QEI_TIMERRELOAD_TICKVAL ((uint8_t)(0)) /**< Reload value in absolute value */ 00377 #define QEI_TIMERRELOAD_USVAL ((uint8_t)(1)) /**< Reload value in microsecond value */ 00378 00379 /* QEI Flag Status type */ 00380 #define QEI_STATUS_DIR ((uint32_t)(1<<0)) /**< Direction status */ 00381 00382 /* QEI Compare Position channel option */ 00383 #define QEI_COMPPOS_CH_0 ((uint8_t)(0)) /**< QEI compare position channel 0 */ 00384 #define QEI_COMPPOS_CH_1 ((uint8_t)(1)) /**< QEI compare position channel 1 */ 00385 #define QEI_COMPPOS_CH_2 ((uint8_t)(2)) /**< QEI compare position channel 2 */ 00386 00387 /* QEI interrupt flag type */ 00388 #define QEI_INTFLAG_INX_Int ((uint32_t)(1<<0)) /**< index pulse was detected interrupt */ 00389 #define QEI_INTFLAG_TIM_Int ((uint32_t)(1<<1)) /**< Velocity timer over flow interrupt */ 00390 #define QEI_INTFLAG_VELC_Int ((uint32_t)(1<<2)) /**< Capture velocity is less than compare interrupt */ 00391 #define QEI_INTFLAG_DIR_Int ((uint32_t)(1<<3)) /**< Change of direction interrupt */ 00392 #define QEI_INTFLAG_ERR_Int ((uint32_t)(1<<4)) /**< An encoder phase error interrupt */ 00393 #define QEI_INTFLAG_ENCLK_Int ((uint32_t)(1<<5)) /**< An encoder clock pulse was detected interrupt */ 00394 #define QEI_INTFLAG_POS0_Int ((uint32_t)(1<<6)) /**< position 0 compare value is equal to the 00395 current position interrupt */ 00396 #define QEI_INTFLAG_POS1_Int ((uint32_t)(1<<7)) /**< position 1 compare value is equal to the 00397 current position interrupt */ 00398 #define QEI_INTFLAG_POS2_Int ((uint32_t)(1<<8)) /**< position 2 compare value is equal to the 00399 current position interrupt */ 00400 #define QEI_INTFLAG_REV_Int ((uint32_t)(1<<9)) /**< Index compare value is equal to the current 00401 index count interrupt */ 00402 #define QEI_INTFLAG_POS0REV_Int ((uint32_t)(1<<10)) /**< Combined position 0 and revolution count interrupt */ 00403 #define QEI_INTFLAG_POS1REV_Int ((uint32_t)(1<<11)) /**< Combined position 1 and revolution count interrupt */ 00404 #define QEI_INTFLAG_POS2REV_Int ((uint32_t)(1<<12)) /**< Combined position 2 and revolution count interrupt */ 00405 00406 /* QEI Process position reporting options */ 00407 #define QEI_PROCESS_OPERATE 0; 00408 #define QEI_PROCESS_RESET 1; 00409 #define QEI_PROCESS_INCREMENTAL 0; 00410 #define QEI_PROCESS_ACCUMULATE 1; 00411 #define QEI_PROCESS_LINEAR 0; 00412 #define QEI_PROCESS_WEIGHTED 1; 00413 00414 private: 00415 static void _Qeiisr(void); 00416 void Qeiisr(void); 00417 static QEIHW *instance; 00418 00419 void(*_qei_isr[13])(); 00420 00421 00422 /* Private Macros ------------------------------------------------------------- */ 00423 /* --------------------- BIT DEFINITIONS -------------------------------------- */ 00424 /* Quadrature Encoder Interface Control Register Definition --------------------- */ 00425 /*********************************************************************//** 00426 * Macro defines for QEI Control register 00427 **********************************************************************/ 00428 #define QEI_CON_RESP ((uint32_t)(1<<0)) /**< Reset position counter */ 00429 #define QEI_CON_RESPI ((uint32_t)(1<<1)) /**< Reset Posistion Counter on Index */ 00430 #define QEI_CON_RESV ((uint32_t)(1<<2)) /**< Reset Velocity */ 00431 #define QEI_CON_RESI ((uint32_t)(1<<3)) /**< Reset Index Counter */ 00432 #define QEI_CON_BITMASK ((uint32_t)(0x0F)) /**< QEI Control register bit-mask */ 00433 00434 /*********************************************************************//** 00435 * Macro defines for QEI Configuration register 00436 **********************************************************************/ 00437 #define QEI_CONF_DIRINV ((uint32_t)(1<<0)) /**< Direction Invert */ 00438 #define QEI_CONF_SIGMODE ((uint32_t)(1<<1)) /**< Signal mode */ 00439 #define QEI_CONF_CAPMODE ((uint32_t)(1<<2)) /**< Capture mode */ 00440 #define QEI_CONF_INVINX ((uint32_t)(1<<3)) /**< Invert index */ 00441 #define QEI_CONF_BITMASK ((uint32_t)(0x0F)) /**< QEI Configuration register bit-mask */ 00442 00443 /*********************************************************************//** 00444 * Macro defines for QEI Status register 00445 **********************************************************************/ 00446 #define QEI_STAT_DIR ((uint32_t)(1<<0)) /**< Direction bit */ 00447 #define QEI_STAT_BITMASK ((uint32_t)(1<<0)) /**< QEI status register bit-mask */ 00448 00449 /* Quadrature Encoder Interface Interrupt registers definitions --------------------- */ 00450 /*********************************************************************//** 00451 * Macro defines for QEI Interrupt Status register 00452 **********************************************************************/ 00453 #define QEI_INTSTAT_INX_Int ((uint32_t)(1<<0)) /**< Indicates that an index pulse was detected */ 00454 #define QEI_INTSTAT_TIM_Int ((uint32_t)(1<<1)) /**< Indicates that a velocity timer overflow occurred */ 00455 #define QEI_INTSTAT_VELC_Int ((uint32_t)(1<<2)) /**< Indicates that capture velocity is less than compare velocity */ 00456 #define QEI_INTSTAT_DIR_Int ((uint32_t)(1<<3)) /**< Indicates that a change of direction was detected */ 00457 #define QEI_INTSTAT_ERR_Int ((uint32_t)(1<<4)) /**< Indicates that an encoder phase error was detected */ 00458 #define QEI_INTSTAT_ENCLK_Int ((uint32_t)(1<<5)) /**< Indicates that and encoder clock pulse was detected */ 00459 #define QEI_INTSTAT_POS0_Int ((uint32_t)(1<<6)) /**< Indicates that the position 0 compare value is equal to the 00460 current position */ 00461 #define QEI_INTSTAT_POS1_Int ((uint32_t)(1<<7)) /**< Indicates that the position 1compare value is equal to the 00462 current position */ 00463 #define QEI_INTSTAT_POS2_Int ((uint32_t)(1<<8)) /**< Indicates that the position 2 compare value is equal to the 00464 current position */ 00465 #define QEI_INTSTAT_REV_Int ((uint32_t)(1<<9)) /**< Indicates that the index compare value is equal to the current 00466 index count */ 00467 #define QEI_INTSTAT_POS0REV_Int ((uint32_t)(1<<10)) /**< Combined position 0 and revolution count interrupt. Set when 00468 both the POS0_Int bit is set and the REV_Int is set */ 00469 #define QEI_INTSTAT_POS1REV_Int ((uint32_t)(1<<11)) /**< Combined position 1 and revolution count interrupt. Set when 00470 both the POS1_Int bit is set and the REV_Int is set */ 00471 #define QEI_INTSTAT_POS2REV_Int ((uint32_t)(1<<12)) /**< Combined position 2 and revolution count interrupt. Set when 00472 both the POS2_Int bit is set and the REV_Int is set */ 00473 #define QEI_INTSTAT_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Status register bit-mask */ 00474 00475 /*********************************************************************//** 00476 * Macro defines for QEI Interrupt Set register 00477 **********************************************************************/ 00478 #define QEI_INTSET_INX_Int ((uint32_t)(1<<0)) /**< Set Bit Indicates that an index pulse was detected */ 00479 #define QEI_INTSET_TIM_Int ((uint32_t)(1<<1)) /**< Set Bit Indicates that a velocity timer overflow occurred */ 00480 #define QEI_INTSET_VELC_Int ((uint32_t)(1<<2)) /**< Set Bit Indicates that capture velocity is less than compare velocity */ 00481 #define QEI_INTSET_DIR_Int ((uint32_t)(1<<3)) /**< Set Bit Indicates that a change of direction was detected */ 00482 #define QEI_INTSET_ERR_Int ((uint32_t)(1<<4)) /**< Set Bit Indicates that an encoder phase error was detected */ 00483 #define QEI_INTSET_ENCLK_Int ((uint32_t)(1<<5)) /**< Set Bit Indicates that and encoder clock pulse was detected */ 00484 #define QEI_INTSET_POS0_Int ((uint32_t)(1<<6)) /**< Set Bit Indicates that the position 0 compare value is equal to the 00485 current position */ 00486 #define QEI_INTSET_POS1_Int ((uint32_t)(1<<7)) /**< Set Bit Indicates that the position 1compare value is equal to the 00487 current position */ 00488 #define QEI_INTSET_POS2_Int ((uint32_t)(1<<8)) /**< Set Bit Indicates that the position 2 compare value is equal to the 00489 current position */ 00490 #define QEI_INTSET_REV_Int ((uint32_t)(1<<9)) /**< Set Bit Indicates that the index compare value is equal to the current 00491 index count */ 00492 #define QEI_INTSET_POS0REV_Int ((uint32_t)(1<<10)) /**< Set Bit that combined position 0 and revolution count interrupt */ 00493 #define QEI_INTSET_POS1REV_Int ((uint32_t)(1<<11)) /**< Set Bit that Combined position 1 and revolution count interrupt */ 00494 #define QEI_INTSET_POS2REV_Int ((uint32_t)(1<<12)) /**< Set Bit that Combined position 2 and revolution count interrupt */ 00495 #define QEI_INTSET_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Set register bit-mask */ 00496 00497 /*********************************************************************//** 00498 * Macro defines for QEI Interrupt Clear register 00499 **********************************************************************/ 00500 #define QEI_INTCLR_INX_Int ((uint32_t)(1<<0)) /**< Clear Bit Indicates that an index pulse was detected */ 00501 #define QEI_INTCLR_TIM_Int ((uint32_t)(1<<1)) /**< Clear Bit Indicates that a velocity timer overflow occurred */ 00502 #define QEI_INTCLR_VELC_Int ((uint32_t)(1<<2)) /**< Clear Bit Indicates that capture velocity is less than compare velocity */ 00503 #define QEI_INTCLR_DIR_Int ((uint32_t)(1<<3)) /**< Clear Bit Indicates that a change of direction was detected */ 00504 #define QEI_INTCLR_ERR_Int ((uint32_t)(1<<4)) /**< Clear Bit Indicates that an encoder phase error was detected */ 00505 #define QEI_INTCLR_ENCLK_Int ((uint32_t)(1<<5)) /**< Clear Bit Indicates that and encoder clock pulse was detected */ 00506 #define QEI_INTCLR_POS0_Int ((uint32_t)(1<<6)) /**< Clear Bit Indicates that the position 0 compare value is equal to the 00507 current position */ 00508 #define QEI_INTCLR_POS1_Int ((uint32_t)(1<<7)) /**< Clear Bit Indicates that the position 1compare value is equal to the 00509 current position */ 00510 #define QEI_INTCLR_POS2_Int ((uint32_t)(1<<8)) /**< Clear Bit Indicates that the position 2 compare value is equal to the 00511 current position */ 00512 #define QEI_INTCLR_REV_Int ((uint32_t)(1<<9)) /**< Clear Bit Indicates that the index compare value is equal to the current 00513 index count */ 00514 #define QEI_INTCLR_POS0REV_Int ((uint32_t)(1<<10)) /**< Clear Bit that combined position 0 and revolution count interrupt */ 00515 #define QEI_INTCLR_POS1REV_Int ((uint32_t)(1<<11)) /**< Clear Bit that Combined position 1 and revolution count interrupt */ 00516 #define QEI_INTCLR_POS2REV_Int ((uint32_t)(1<<12)) /**< Clear Bit that Combined position 2 and revolution count interrupt */ 00517 #define QEI_INTCLR_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Clear register bit-mask */ 00518 00519 /*********************************************************************//** 00520 * Macro defines for QEI Interrupt Enable register 00521 **********************************************************************/ 00522 #define QEI_INTEN_INX_Int ((uint32_t)(1<<0)) /**< Enabled Interrupt Bit Indicates that an index pulse was detected */ 00523 #define QEI_INTEN_TIM_Int ((uint32_t)(1<<1)) /**< Enabled Interrupt Bit Indicates that a velocity timer overflow occurred */ 00524 #define QEI_INTEN_VELC_Int ((uint32_t)(1<<2)) /**< Enabled Interrupt Bit Indicates that capture velocity is less than compare velocity */ 00525 #define QEI_INTEN_DIR_Int ((uint32_t)(1<<3)) /**< Enabled Interrupt Bit Indicates that a change of direction was detected */ 00526 #define QEI_INTEN_ERR_Int ((uint32_t)(1<<4)) /**< Enabled Interrupt Bit Indicates that an encoder phase error was detected */ 00527 #define QEI_INTEN_ENCLK_Int ((uint32_t)(1<<5)) /**< Enabled Interrupt Bit Indicates that and encoder clock pulse was detected */ 00528 #define QEI_INTEN_POS0_Int ((uint32_t)(1<<6)) /**< Enabled Interrupt Bit Indicates that the position 0 compare value is equal to the 00529 current position */ 00530 #define QEI_INTEN_POS1_Int ((uint32_t)(1<<7)) /**< Enabled Interrupt Bit Indicates that the position 1compare value is equal to the 00531 current position */ 00532 #define QEI_INTEN_POS2_Int ((uint32_t)(1<<8)) /**< Enabled Interrupt Bit Indicates that the position 2 compare value is equal to the 00533 current position */ 00534 #define QEI_INTEN_REV_Int ((uint32_t)(1<<9)) /**< Enabled Interrupt Bit Indicates that the index compare value is equal to the current 00535 index count */ 00536 #define QEI_INTEN_POS0REV_Int ((uint32_t)(1<<10)) /**< Enabled Interrupt Bit that combined position 0 and revolution count interrupt */ 00537 #define QEI_INTEN_POS1REV_Int ((uint32_t)(1<<11)) /**< Enabled Interrupt Bit that Combined position 1 and revolution count interrupt */ 00538 #define QEI_INTEN_POS2REV_Int ((uint32_t)(1<<12)) /**< Enabled Interrupt Bit that Combined position 2 and revolution count interrupt */ 00539 #define QEI_INTEN_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Enable register bit-mask */ 00540 00541 /*********************************************************************//** 00542 * Macro defines for QEI Interrupt Enable Set register 00543 **********************************************************************/ 00544 #define QEI_IESET_INX_Int ((uint32_t)(1<<0)) /**< Set Enable Interrupt Bit Indicates that an index pulse was detected */ 00545 #define QEI_IESET_TIM_Int ((uint32_t)(1<<1)) /**< Set Enable Interrupt Bit Indicates that a velocity timer overflow occurred */ 00546 #define QEI_IESET_VELC_Int ((uint32_t)(1<<2)) /**< Set Enable Interrupt Bit Indicates that capture velocity is less than compare velocity */ 00547 #define QEI_IESET_DIR_Int ((uint32_t)(1<<3)) /**< Set Enable Interrupt Bit Indicates that a change of direction was detected */ 00548 #define QEI_IESET_ERR_Int ((uint32_t)(1<<4)) /**< Set Enable Interrupt Bit Indicates that an encoder phase error was detected */ 00549 #define QEI_IESET_ENCLK_Int ((uint32_t)(1<<5)) /**< Set Enable Interrupt Bit Indicates that and encoder clock pulse was detected */ 00550 #define QEI_IESET_POS0_Int ((uint32_t)(1<<6)) /**< Set Enable Interrupt Bit Indicates that the position 0 compare value is equal to the 00551 current position */ 00552 #define QEI_IESET_POS1_Int ((uint32_t)(1<<7)) /**< Set Enable Interrupt Bit Indicates that the position 1compare value is equal to the 00553 current position */ 00554 #define QEI_IESET_POS2_Int ((uint32_t)(1<<8)) /**< Set Enable Interrupt Bit Indicates that the position 2 compare value is equal to the 00555 current position */ 00556 #define QEI_IESET_REV_Int ((uint32_t)(1<<9)) /**< Set Enable Interrupt Bit Indicates that the index compare value is equal to the current 00557 index count */ 00558 #define QEI_IESET_POS0REV_Int ((uint32_t)(1<<10)) /**< Set Enable Interrupt Bit that combined position 0 and revolution count interrupt */ 00559 #define QEI_IESET_POS1REV_Int ((uint32_t)(1<<11)) /**< Set Enable Interrupt Bit that Combined position 1 and revolution count interrupt */ 00560 #define QEI_IESET_POS2REV_Int ((uint32_t)(1<<12)) /**< Set Enable Interrupt Bit that Combined position 2 and revolution count interrupt */ 00561 #define QEI_IESET_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Enable Set register bit-mask */ 00562 00563 /*********************************************************************//** 00564 * Macro defines for QEI Interrupt Enable Clear register 00565 **********************************************************************/ 00566 #define QEI_IECLR_INX_Int ((uint32_t)(1<<0)) /**< Clear Enabled Interrupt Bit Indicates that an index pulse was detected */ 00567 #define QEI_IECLR_TIM_Int ((uint32_t)(1<<1)) /**< Clear Enabled Interrupt Bit Indicates that a velocity timer overflow occurred */ 00568 #define QEI_IECLR_VELC_Int ((uint32_t)(1<<2)) /**< Clear Enabled Interrupt Bit Indicates that capture velocity is less than compare velocity */ 00569 #define QEI_IECLR_DIR_Int ((uint32_t)(1<<3)) /**< Clear Enabled Interrupt Bit Indicates that a change of direction was detected */ 00570 #define QEI_IECLR_ERR_Int ((uint32_t)(1<<4)) /**< Clear Enabled Interrupt Bit Indicates that an encoder phase error was detected */ 00571 #define QEI_IECLR_ENCLK_Int ((uint32_t)(1<<5)) /**< Clear Enabled Interrupt Bit Indicates that and encoder clock pulse was detected */ 00572 #define QEI_IECLR_POS0_Int ((uint32_t)(1<<6)) /**< Clear Enabled Interrupt Bit Indicates that the position 0 compare value is equal to the 00573 current position */ 00574 #define QEI_IECLR_POS1_Int ((uint32_t)(1<<7)) /**< Clear Enabled Interrupt Bit Indicates that the position 1compare value is equal to the 00575 current position */ 00576 #define QEI_IECLR_POS2_Int ((uint32_t)(1<<8)) /**< Clear Enabled Interrupt Bit Indicates that the position 2 compare value is equal to the 00577 current position */ 00578 #define QEI_IECLR_REV_Int ((uint32_t)(1<<9)) /**< Clear Enabled Interrupt Bit Indicates that the index compare value is equal to the current 00579 index count */ 00580 #define QEI_IECLR_POS0REV_Int ((uint32_t)(1<<10)) /**< Clear Enabled Interrupt Bit that combined position 0 and revolution count interrupt */ 00581 #define QEI_IECLR_POS1REV_Int ((uint32_t)(1<<11)) /**< Clear Enabled Interrupt Bit that Combined position 1 and revolution count interrupt */ 00582 #define QEI_IECLR_POS2REV_Int ((uint32_t)(1<<12)) /**< Clear Enabled Interrupt Bit that Combined position 2 and revolution count interrupt */ 00583 #define QEI_IECLR_BITMASK ((uint32_t)(0x1FFF)) /**< QEI Interrupt Enable Clear register bit-mask */ 00584 00585 /*********************************************************************//** 00586 * Macro defines for PCONP register QEI-related bits 00587 **********************************************************************/ 00588 #define PCONP_QEI_ENABLE ((uint32_t)(1<<18)) /**< QEI peripheral power enable bit */ 00589 #define PCONP_QEI_DISABLE ~((uint32_t)(1<<18)) /**< QEI peripheral power disable bit-mask */ 00590 00591 /*********************************************************************//** 00592 * Macro defines for PCLKSELx register QEI-related bits 00593 **********************************************************************/ 00594 #define PCLKSEL_CCLK_DIV_1 1UL /**< Set PCLK to CCLK/1 */ 00595 #define PCLKSEL_CCLK_DIV_2 2UL /**< Set PCLK to CCLK/2 */ 00596 #define PCLKSEL_CCLK_DIV_4 0UL /**< Set PCLK to CCLK/4 */ 00597 #define PCLKSEL_CCLK_DIV_8 3UL /**< Set PCLK to CCLK/8 */ 00598 #define PCLKSEL1_PCLK_QEI_MASK ((uint32_t)(3<<0)) /**< PCLK_QEI PCLK_QEI bit field mask */ 00599 /*********************************************************************//** 00600 * Macro defines for PINSEL3 register QEI-related bits 00601 **********************************************************************/ 00602 #define PINSEL3_MCI0 ((uint32_t)(1<<8)) /**< MCIO (PhA) pin select */ 00603 #define PINSEL3_MCI0_MASK ~((uint32_t)(3<<8)) /**< MCIO (PhA) pin mask */ 00604 #define PINSEL3_MCI1 ((uint32_t)(1<<14)) /**< MCI1 (PhB) pin select */ 00605 #define PINSEL3_MCI1_MASK ~((uint32_t)(3<<14)) /**< MCI2 (PhB) pin mask */ 00606 #define PINSEL3_MCI2 ((uint32_t)(1<<16)) /**< MCI2 (Index) pin select */ 00607 #define PINSEL3_MCI2_MASK ~((uint32_t)(3<<16)) /**< MCI2 (Index) pin mask */ 00608 00609 /*********************************************************************//** 00610 * Macro defines for PINMODE3 register QEI-related bits 00611 **********************************************************************/ 00612 #define PIN_PULL_UP 0UL 00613 #define PIN_REPEATER 1UL 00614 #define PIN_NORESISTOR 2UL 00615 #define PIN_PULL_DOWN 3UL 00616 00617 #define PINMODE3_MCI0 ((uint32_t)(PIN_NORESISTOR<<8)) /**< MCIO (PhA) resistor selection */ 00618 #define PINMODE3_GPIO1p20 ((uint32_t)(PIN_PULL_DOWN<<8)) /**< GPIO 1.20) resistor selection */ 00619 #define PINMODE3_MCI0_MASK ~((uint32_t)(3<<8)) /**< MCIO (PhA) resistor mask */ 00620 00621 #define PINMODE3_MCI1 ((uint32_t)(PIN_NORESISTOR<<14)) /**< MCI1 (PhB) resistor selection */ 00622 #define PINMODE3_GPIO1p23 ((uint32_t)(PIN_PULL_DOWN<<14)) /**< GPIO 1.23) resistor selection */ 00623 #define PINMODE3_MCI1_MASK ~((uint32_t)(3<<14)) /**< MCI1 (PhB) resistor mask */ 00624 00625 #define PINMODE3_MCI2 ((uint32_t)(PIN_PULL_UP<<16)) /**< MCI2 (Index) resistor selection */ 00626 #define PINMODE3_GPIO1p24 ((uint32_t)(PIN_PULL_DOWN<<16)) /**< GPIO 1.24) resistor selection */ 00627 #define PINMODE3_MCI2_MASK ~((uint32_t)(3<<16)) /**< MCI2 (Index) resistor mask */ 00628 00629 }; 00630 00631 00632 #endif /* MBED_QEI_H */ 00633 /* --------------------------------- End Of File ------------------------------ */
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