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drv/usb/UsbInc.h@0:281d6ff68967, 2010-11-19 (annotated)

Committer:: hexley
Date:: Fri Nov 19 01:54:45 2010 +0000
Revision:: 0:281d6ff68967

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User	Revision	Line number	New contents of line
hexley	0:281d6ff68967	1
hexley	0:281d6ff68967	2	/*
hexley	0:281d6ff68967	3	Copyright (c) 2010 Donatien Garnier (donatiengar [at] gmail [dot] com)
hexley	0:281d6ff68967	4
hexley	0:281d6ff68967	5	Permission is hereby granted, free of charge, to any person obtaining a copy
hexley	0:281d6ff68967	6	of this software and associated documentation files (the "Software"), to deal
hexley	0:281d6ff68967	7	in the Software without restriction, including without limitation the rights
hexley	0:281d6ff68967	8	to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
hexley	0:281d6ff68967	9	copies of the Software, and to permit persons to whom the Software is
hexley	0:281d6ff68967	10	furnished to do so, subject to the following conditions:
hexley	0:281d6ff68967	11
hexley	0:281d6ff68967	12	The above copyright notice and this permission notice shall be included in
hexley	0:281d6ff68967	13	all copies or substantial portions of the Software.
hexley	0:281d6ff68967	14
hexley	0:281d6ff68967	15	THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
hexley	0:281d6ff68967	16	IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
hexley	0:281d6ff68967	17	FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
hexley	0:281d6ff68967	18	AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
hexley	0:281d6ff68967	19	LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
hexley	0:281d6ff68967	20	OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
hexley	0:281d6ff68967	21	THE SOFTWARE.
hexley	0:281d6ff68967	22	*/
hexley	0:281d6ff68967	23
hexley	0:281d6ff68967	24	#ifndef USB_INC_H
hexley	0:281d6ff68967	25	#define USB_INC_H
hexley	0:281d6ff68967	26
hexley	0:281d6ff68967	27	#include "mbed.h"
hexley	0:281d6ff68967	28
hexley	0:281d6ff68967	29	#define MIN(a,b) ((a)<(b)?(a):(b))
hexley	0:281d6ff68967	30	#define MAX(a,b) ((a)>(b)?(a):(b))
hexley	0:281d6ff68967	31
hexley	0:281d6ff68967	32	//typedef int32_t RC;
hexley	0:281d6ff68967	33
hexley	0:281d6ff68967	34	typedef uint8_t byte;
hexley	0:281d6ff68967	35	typedef uint16_t word;
hexley	0:281d6ff68967	36
hexley	0:281d6ff68967	37	enum UsbErr
hexley	0:281d6ff68967	38	{
hexley	0:281d6ff68967	39	__USBERR_MIN = -0xFFFF,
hexley	0:281d6ff68967	40	USBERR_DISCONNECTED,
hexley	0:281d6ff68967	41	USBERR_NOTFOUND,
hexley	0:281d6ff68967	42	USBERR_BADCONFIG,
hexley	0:281d6ff68967	43	USBERR_PROCESSING,
hexley	0:281d6ff68967	44	USBERR_HALTED, //Transfer on an ep is stalled
hexley	0:281d6ff68967	45	USBERR_BUSY,
hexley	0:281d6ff68967	46	USBERR_TDFAIL,
hexley	0:281d6ff68967	47	USBERR_ERROR,
hexley	0:281d6ff68967	48	USBERR_OK = 0
hexley	0:281d6ff68967	49	};
hexley	0:281d6ff68967	50
hexley	0:281d6ff68967	51
hexley	0:281d6ff68967	52	/* From NXP's USBHostLite stack's usbhost_lpc17xx.h */
hexley	0:281d6ff68967	53	/* Only the types names have been changed to avoid unecessary typedefs */
hexley	0:281d6ff68967	54
hexley	0:281d6ff68967	55
hexley	0:281d6ff68967	56	/*
hexley	0:281d6ff68967	57	**************************************************************************************************************
hexley	0:281d6ff68967	58	* NXP USB Host Stack
hexley	0:281d6ff68967	59	*
hexley	0:281d6ff68967	60	* (c) Copyright 2008, NXP SemiConductors
hexley	0:281d6ff68967	61	* (c) Copyright 2008, OnChip Technologies LLC
hexley	0:281d6ff68967	62	* All Rights Reserved
hexley	0:281d6ff68967	63	*
hexley	0:281d6ff68967	64	* www.nxp.com
hexley	0:281d6ff68967	65	* www.onchiptech.com
hexley	0:281d6ff68967	66	*
hexley	0:281d6ff68967	67	* File : usbhost_lpc17xx.h
hexley	0:281d6ff68967	68	* Programmer(s) : Ravikanth.P
hexley	0:281d6ff68967	69	* Version :
hexley	0:281d6ff68967	70	*
hexley	0:281d6ff68967	71	**************************************************************************************************************
hexley	0:281d6ff68967	72	*/
hexley	0:281d6ff68967	73
hexley	0:281d6ff68967	74
hexley	0:281d6ff68967	75
hexley	0:281d6ff68967	76	/*
hexley	0:281d6ff68967	77	**************************************************************************************************************
hexley	0:281d6ff68967	78	* OHCI OPERATIONAL REGISTER FIELD DEFINITIONS
hexley	0:281d6ff68967	79	**************************************************************************************************************
hexley	0:281d6ff68967	80	*/
hexley	0:281d6ff68967	81
hexley	0:281d6ff68967	82	/* ------------------ HcControl Register --------------------- */
hexley	0:281d6ff68967	83	#define OR_CONTROL_CLE 0x00000010
hexley	0:281d6ff68967	84	#define OR_CONTROL_BLE 0x00000020
hexley	0:281d6ff68967	85	#define OR_CONTROL_HCFS 0x000000C0
hexley	0:281d6ff68967	86	#define OR_CONTROL_HC_OPER 0x00000080
hexley	0:281d6ff68967	87	/* ----------------- HcCommandStatus Register ----------------- */
hexley	0:281d6ff68967	88	#define OR_CMD_STATUS_HCR 0x00000001
hexley	0:281d6ff68967	89	#define OR_CMD_STATUS_CLF 0x00000002
hexley	0:281d6ff68967	90	#define OR_CMD_STATUS_BLF 0x00000004
hexley	0:281d6ff68967	91	/* --------------- HcInterruptStatus Register ----------------- */
hexley	0:281d6ff68967	92	#define OR_INTR_STATUS_WDH 0x00000002
hexley	0:281d6ff68967	93	#define OR_INTR_STATUS_RHSC 0x00000040
hexley	0:281d6ff68967	94	#define OR_INTR_STATUS_UE 0x00000010
hexley	0:281d6ff68967	95	/* --------------- HcInterruptEnable Register ----------------- */
hexley	0:281d6ff68967	96	#define OR_INTR_ENABLE_WDH 0x00000002
hexley	0:281d6ff68967	97	#define OR_INTR_ENABLE_RHSC 0x00000040
hexley	0:281d6ff68967	98	#define OR_INTR_ENABLE_MIE 0x80000000
hexley	0:281d6ff68967	99	/* ---------------- HcRhDescriptorA Register ------------------ */
hexley	0:281d6ff68967	100	#define OR_RH_STATUS_LPSC 0x00010000
hexley	0:281d6ff68967	101	#define OR_RH_STATUS_DRWE 0x00008000
hexley	0:281d6ff68967	102	/* -------------- HcRhPortStatus[1:NDP] Register -------------- */
hexley	0:281d6ff68967	103	#define OR_RH_PORT_CCS 0x00000001
hexley	0:281d6ff68967	104	#define OR_RH_PORT_PRS 0x00000010
hexley	0:281d6ff68967	105	#define OR_RH_PORT_CSC 0x00010000
hexley	0:281d6ff68967	106	#define OR_RH_PORT_PRSC 0x00100000
hexley	0:281d6ff68967	107
hexley	0:281d6ff68967	108
hexley	0:281d6ff68967	109	/*
hexley	0:281d6ff68967	110	**************************************************************************************************************
hexley	0:281d6ff68967	111	* FRAME INTERVAL
hexley	0:281d6ff68967	112	**************************************************************************************************************
hexley	0:281d6ff68967	113	*/
hexley	0:281d6ff68967	114
hexley	0:281d6ff68967	115	#define FI 0x2EDF /* 12000 bits per frame (-1) */
hexley	0:281d6ff68967	116	#define DEFAULT_FMINTERVAL ((((6 * (FI - 210)) / 7) << 16) \| FI)
hexley	0:281d6ff68967	117
hexley	0:281d6ff68967	118	/*
hexley	0:281d6ff68967	119	**************************************************************************************************************
hexley	0:281d6ff68967	120	* ENDPOINT DESCRIPTOR CONTROL FIELDS
hexley	0:281d6ff68967	121	**************************************************************************************************************
hexley	0:281d6ff68967	122	*/
hexley	0:281d6ff68967	123
hexley	0:281d6ff68967	124	#define ED_SKIP (uint32_t) (0x00001000) /* Skip this ep in queue */
hexley	0:281d6ff68967	125
hexley	0:281d6ff68967	126	/*
hexley	0:281d6ff68967	127	**************************************************************************************************************
hexley	0:281d6ff68967	128	* TRANSFER DESCRIPTOR CONTROL FIELDS
hexley	0:281d6ff68967	129	**************************************************************************************************************
hexley	0:281d6ff68967	130	*/
hexley	0:281d6ff68967	131
hexley	0:281d6ff68967	132	#define TD_ROUNDING (uint32_t) (0x00040000) /* Buffer Rounding */
hexley	0:281d6ff68967	133	#define TD_SETUP (uint32_t)(0) /* Direction of Setup Packet */
hexley	0:281d6ff68967	134	#define TD_IN (uint32_t)(0x00100000) /* Direction In */
hexley	0:281d6ff68967	135	#define TD_OUT (uint32_t)(0x00080000) /* Direction Out */
hexley	0:281d6ff68967	136	#define TD_DELAY_INT(x) (uint32_t)((x) << 21) /* Delay Interrupt */
hexley	0:281d6ff68967	137	#define TD_TOGGLE_0 (uint32_t)(0x02000000) /* Toggle 0 */
hexley	0:281d6ff68967	138	#define TD_TOGGLE_1 (uint32_t)(0x03000000) /* Toggle 1 */
hexley	0:281d6ff68967	139	#define TD_CC (uint32_t)(0xF0000000) /* Completion Code */
hexley	0:281d6ff68967	140
hexley	0:281d6ff68967	141	/*
hexley	0:281d6ff68967	142	**************************************************************************************************************
hexley	0:281d6ff68967	143	* USB STANDARD REQUEST DEFINITIONS
hexley	0:281d6ff68967	144	**************************************************************************************************************
hexley	0:281d6ff68967	145	*/
hexley	0:281d6ff68967	146
hexley	0:281d6ff68967	147	#define USB_DESCRIPTOR_TYPE_DEVICE 1
hexley	0:281d6ff68967	148	#define USB_DESCRIPTOR_TYPE_CONFIGURATION 2
hexley	0:281d6ff68967	149	#define USB_DESCRIPTOR_TYPE_INTERFACE 4
hexley	0:281d6ff68967	150	#define USB_DESCRIPTOR_TYPE_ENDPOINT 5
hexley	0:281d6ff68967	151	/* ----------- Control RequestType Fields ----------- */
hexley	0:281d6ff68967	152	#define USB_DEVICE_TO_HOST 0x80
hexley	0:281d6ff68967	153	#define USB_HOST_TO_DEVICE 0x00
hexley	0:281d6ff68967	154	#define USB_REQUEST_TYPE_CLASS 0x20
hexley	0:281d6ff68967	155	#define USB_RECIPIENT_DEVICE 0x00
hexley	0:281d6ff68967	156	#define USB_RECIPIENT_INTERFACE 0x01
hexley	0:281d6ff68967	157	/* -------------- USB Standard Requests -------------- */
hexley	0:281d6ff68967	158	#define SET_ADDRESS 5
hexley	0:281d6ff68967	159	#define GET_DESCRIPTOR 6
hexley	0:281d6ff68967	160	#define SET_CONFIGURATION 9
hexley	0:281d6ff68967	161	#define SET_INTERFACE 11
hexley	0:281d6ff68967	162
hexley	0:281d6ff68967	163	/*
hexley	0:281d6ff68967	164	**************************************************************************************************************
hexley	0:281d6ff68967	165	* TYPE DEFINITIONS
hexley	0:281d6ff68967	166	**************************************************************************************************************
hexley	0:281d6ff68967	167	*/
hexley	0:281d6ff68967	168
hexley	0:281d6ff68967	169	typedef struct hcEd { /* ----------- HostController EndPoint Descriptor ------------- */
hexley	0:281d6ff68967	170	volatile uint32_t Control; /* Endpoint descriptor control */
hexley	0:281d6ff68967	171	volatile uint32_t TailTd; /* Physical address of tail in Transfer descriptor list */
hexley	0:281d6ff68967	172	volatile uint32_t HeadTd; /* Physcial address of head in Transfer descriptor list */
hexley	0:281d6ff68967	173	volatile uint32_t Next; /* Physical address of next Endpoint descriptor */
hexley	0:281d6ff68967	174	} HCED;
hexley	0:281d6ff68967	175
hexley	0:281d6ff68967	176	typedef struct hcTd { /* ------------ HostController Transfer Descriptor ------------ */
hexley	0:281d6ff68967	177	volatile uint32_t Control; /* Transfer descriptor control */
hexley	0:281d6ff68967	178	volatile uint32_t CurrBufPtr; /* Physical address of current buffer pointer */
hexley	0:281d6ff68967	179	volatile uint32_t Next; /* Physical pointer to next Transfer Descriptor */
hexley	0:281d6ff68967	180	volatile uint32_t BufEnd; /* Physical address of end of buffer */
hexley	0:281d6ff68967	181	} HCTD;
hexley	0:281d6ff68967	182
hexley	0:281d6ff68967	183	typedef struct hcca { /* ----------- Host Controller Communication Area ------------ */
hexley	0:281d6ff68967	184	volatile uint32_t IntTable[32]; /* Interrupt Table */
hexley	0:281d6ff68967	185	volatile uint32_t FrameNumber; /* Frame Number */
hexley	0:281d6ff68967	186	volatile uint32_t DoneHead; /* Done Head */
hexley	0:281d6ff68967	187	volatile uint8_t Reserved[116]; /* Reserved for future use */
hexley	0:281d6ff68967	188	volatile uint8_t Unknown[4]; /* Unused */
hexley	0:281d6ff68967	189	} HCCA;
hexley	0:281d6ff68967	190
hexley	0:281d6ff68967	191
hexley	0:281d6ff68967	192
hexley	0:281d6ff68967	193	#endif

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Type:	Library
Created:	19 Nov 2010
Imports:	44
Forks:	0
Commits:	1
Dependents:	0
Dependencies:	0
Followers:	1

drv/usb/UsbInc.h@0:281d6ff68967, 2010-11-19 (annotated)

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