This is an involuntary fork, created because the repository would not update mmSPI. SPI library used to communicate with an altera development board attached to four zigbee-header pins.
Dependents: Embedded_RTOS_Project
Fork of mmSPI by
Diff: mmSPI.cpp
- Revision:
- 19:c2b753533b93
- Parent:
- 18:4a29cad91540
- Child:
- 20:2d5cd38047ca
diff -r 4a29cad91540 -r c2b753533b93 mmSPI.cpp --- a/mmSPI.cpp Mon Aug 19 20:45:29 2013 +0000 +++ b/mmSPI.cpp Mon Aug 19 23:05:29 2013 +0000 @@ -270,12 +270,17 @@ // a CPU register. char mmSPI::read_register(char cRegister, char * pcReceive, char * pcSend) { - int dLoop; // send all 0. + int dLoop; + // int dComplement; + + // dComplement = 7 - (int) cRegister; + + // send all 0. for (dLoop = 0; dLoop < 8; dLoop++) pcSend[dLoop] = 0x00; transceive_vector2(pcReceive, pcSend, 8); // snap & scan-out reg contents. - return (pcReceive[cRegister]); // return the particular reg value. + return (pcReceive[6 - cRegister]); // return the particular reg value. } //----------------------------------------------//------------------------------ void mmSPI::write_memory(char cHData, char cLdata, char cAddress, char * pcReceive, char * pcSend) @@ -284,28 +289,41 @@ // clear transmit vector. for (dLoop = 0; dLoop < 8; dLoop++) pcSend[dLoop] = 0x00; + + /* + CTRL = 7 + R0 = 6 + R1 = 5 + R2 = 4 + R3 = 3 + PC = 2 + IR-H = 1 + IR-L = 0 +*/ + // R3 <- address. // R2 <- high-data. // R1 <- low-data. write_register(0x03,cAddress, pcReceive, pcSend); - write_register(0x02,cHData, pcReceive, pcSend); - write_register(0x01,cLdata, pcReceive, pcSend); + read_register(0x03,pcReceive,pcSend); + + // write_register(0x04,cHData, pcReceive, pcSend); + // write_register(0x05,cLdata, pcReceive, pcSend); - pcSend[7] = 0x02; // write-enable high. - pcSend[1] = 0x02; - pcSend[0] = 0x00; - +// pcSend[7] = 0x02; // write-enable high. +// pcSend[1] = 0x02; + // pcSend[0] = 0x00; + // transceive_vector2(pcReceive, pcSend, 8); - transceive_vector2(pcReceive, pcSend, 8); - - pcSend[7] = 0x02; // write-enable low. - pcSend[1] = 0x00; - pcSend[0] = 0x00; - transceive_vector2(pcReceive, pcSend, 8); +// pcSend[7] = 0x02; // write-enable low. +// pcSend[1] = 0x00; + // pcSend[0] = 0x00; + // transceive_vector2(pcReceive, pcSend, 8); // clear transmit vector. for (dLoop = 0; dLoop < 8; dLoop++) pcSend[dLoop] = 0x00; + } //----------------------------------------------//------------------------------ // fetch a word from main memory. @@ -319,22 +337,35 @@ // clear transmit vector. for (dLoop = 0; dLoop < 8; dLoop++) pcSend[dLoop] = 0x00; + /* + CTRL = 7 + R0 = 6 + R1 = 5 + R2 = 4 + R3 = 3 + PC = 2 + IR-H = 1 + IR-L = 0 +*/ + + + // R3 <- address. write_register(0x03,cAddress, pcReceive, pcSend); pcSend[7] = 0x02; // mbed sends command. - pcSend[1] = 0x68; // R2 <- MM[R3] + pcSend[1] = 0xD0; // R2 <- MM[R3] pcSend[0] = 0x00; transceive_vector2(pcReceive, pcSend, 8); // send command. pcSend[7] = 0x02; // mbed sends command. - pcSend[1] = 0x64; // R1 <- MM[R3] + pcSend[1] = 0xD1; // R1 <- MM[R3] pcSend[0] = 0x00; transceive_vector2(pcReceive, pcSend, 8); // send command. // obtain MM content. - cHData = read_register(0x02, pcReceive, pcSend); - cLData = read_register(0x01, pcReceive, pcSend); + cHData = read_register(0x04, pcReceive, pcSend); + cLData = read_register(0x05, pcReceive, pcSend); udMemoryContent = (cHData << 8) + cLData; // build the memory word.