mbed library sources. Supersedes mbed-src.
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targets/cmsis/TARGET_NUVOTON/TARGET_NUC472/StdDriver/nuc472_uart.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /**************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 2 | * @file uart.h |
<> | 144:ef7eb2e8f9f7 | 3 | * @version V1.00 |
<> | 144:ef7eb2e8f9f7 | 4 | * $Revision: 19 $ |
<> | 144:ef7eb2e8f9f7 | 5 | * $Date: 14/10/07 9:28a $ |
<> | 144:ef7eb2e8f9f7 | 6 | * @brief NUC472/NUC442 UART driver header file |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * @note |
<> | 144:ef7eb2e8f9f7 | 9 | * Copyright (C) 2013 Nuvoton Technology Corp. All rights reserved. |
<> | 144:ef7eb2e8f9f7 | 10 | *****************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 11 | |
<> | 144:ef7eb2e8f9f7 | 12 | |
<> | 144:ef7eb2e8f9f7 | 13 | #ifndef __UART_H__ |
<> | 144:ef7eb2e8f9f7 | 14 | #define __UART_H__ |
<> | 144:ef7eb2e8f9f7 | 15 | |
<> | 144:ef7eb2e8f9f7 | 16 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 17 | extern "C" |
<> | 144:ef7eb2e8f9f7 | 18 | { |
<> | 144:ef7eb2e8f9f7 | 19 | #endif |
<> | 144:ef7eb2e8f9f7 | 20 | |
<> | 144:ef7eb2e8f9f7 | 21 | |
<> | 144:ef7eb2e8f9f7 | 22 | /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver |
<> | 144:ef7eb2e8f9f7 | 23 | @{ |
<> | 144:ef7eb2e8f9f7 | 24 | */ |
<> | 144:ef7eb2e8f9f7 | 25 | |
<> | 144:ef7eb2e8f9f7 | 26 | /** @addtogroup NUC472_442_UART_Driver UART Driver |
<> | 144:ef7eb2e8f9f7 | 27 | @{ |
<> | 144:ef7eb2e8f9f7 | 28 | */ |
<> | 144:ef7eb2e8f9f7 | 29 | |
<> | 144:ef7eb2e8f9f7 | 30 | /** @addtogroup NUC472_442_UART_EXPORTED_CONSTANTS UART Exported Constants |
<> | 144:ef7eb2e8f9f7 | 31 | @{ |
<> | 144:ef7eb2e8f9f7 | 32 | */ |
<> | 144:ef7eb2e8f9f7 | 33 | |
<> | 144:ef7eb2e8f9f7 | 34 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 35 | /* UART_FCR constants definitions */ |
<> | 144:ef7eb2e8f9f7 | 36 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 37 | |
<> | 144:ef7eb2e8f9f7 | 38 | #define UART_FIFO_RFITL_1BYTE (0x0 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 1 byte */ |
<> | 144:ef7eb2e8f9f7 | 39 | #define UART_FIFO_RFITL_4BYTES (0x1 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 4 bytes */ |
<> | 144:ef7eb2e8f9f7 | 40 | #define UART_FIFO_RFITL_8BYTES (0x2 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 8 bytes */ |
<> | 144:ef7eb2e8f9f7 | 41 | #define UART_FIFO_RFITL_14BYTES (0x3 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 14 bytes */ |
<> | 144:ef7eb2e8f9f7 | 42 | |
<> | 144:ef7eb2e8f9f7 | 43 | #define UART_FIFO_RTSTRGLV_1BYTE (0x0 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 1 byte */ |
<> | 144:ef7eb2e8f9f7 | 44 | #define UART_FIFO_RTSTRGLV_4BYTES (0x1 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 4 bytes */ |
<> | 144:ef7eb2e8f9f7 | 45 | #define UART_FIFO_RTSTRGLV_8BYTES (0x2 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 8 bytes */ |
<> | 144:ef7eb2e8f9f7 | 46 | #define UART_FIFO_RTSTRGLV_14BYTES (0x3 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 14 bytes */ |
<> | 144:ef7eb2e8f9f7 | 47 | |
<> | 144:ef7eb2e8f9f7 | 48 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 49 | /* UART_LCR constants definitions */ |
<> | 144:ef7eb2e8f9f7 | 50 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 51 | #define UART_WORD_LEN_5 (0) /*!< UART_LINE setting to set UART word length to 5 bits */ |
<> | 144:ef7eb2e8f9f7 | 52 | #define UART_WORD_LEN_6 (1) /*!< UART_LINE setting to set UART word length to 6 bits */ |
<> | 144:ef7eb2e8f9f7 | 53 | #define UART_WORD_LEN_7 (2) /*!< UART_LINE setting to set UART word length to 7 bits */ |
<> | 144:ef7eb2e8f9f7 | 54 | #define UART_WORD_LEN_8 (3) /*!< UART_LINE setting to set UART word length to 8 bits */ |
<> | 144:ef7eb2e8f9f7 | 55 | |
<> | 144:ef7eb2e8f9f7 | 56 | #define UART_PARITY_NONE (0x0 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as no parity */ |
<> | 144:ef7eb2e8f9f7 | 57 | #define UART_PARITY_ODD (0x1 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as odd parity */ |
<> | 144:ef7eb2e8f9f7 | 58 | #define UART_PARITY_EVEN (0x3 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as even parity */ |
<> | 144:ef7eb2e8f9f7 | 59 | #define UART_PARITY_MARK (0x5 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '1' */ |
<> | 144:ef7eb2e8f9f7 | 60 | #define UART_PARITY_SPACE (0x7 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '0' */ |
<> | 144:ef7eb2e8f9f7 | 61 | |
<> | 144:ef7eb2e8f9f7 | 62 | #define UART_STOP_BIT_1 (0x0 << UART_LINE_NSB_Pos) /*!< UART_LINE setting for one stop bit */ |
<> | 144:ef7eb2e8f9f7 | 63 | #define UART_STOP_BIT_1_5 (0x1 << UART_LINE_NSB_Pos) /*!< UART_LINE setting for 1.5 stop bit when 5-bit word length */ |
<> | 144:ef7eb2e8f9f7 | 64 | #define UART_STOP_BIT_2 (0x1 << UART_LINE_NSB_Pos) /*!< UART_LINE setting for two stop bit when 6, 7, 8-bit word length */ |
<> | 144:ef7eb2e8f9f7 | 65 | |
<> | 144:ef7eb2e8f9f7 | 66 | |
<> | 144:ef7eb2e8f9f7 | 67 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 68 | /* UART RTS LEVEL TRIGGER constants definitions */ |
<> | 144:ef7eb2e8f9f7 | 69 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 70 | #define UART_RTS_IS_HIGH_LEV_TRG (0x1 << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is High Level Trigger */ |
<> | 144:ef7eb2e8f9f7 | 71 | #define UART_RTS_IS_LOW_LEV_TRG (0x0 << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is Low Level Trigger */ |
<> | 144:ef7eb2e8f9f7 | 72 | |
<> | 144:ef7eb2e8f9f7 | 73 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 74 | /* UART CTS LEVEL TRIGGER constants definitions */ |
<> | 144:ef7eb2e8f9f7 | 75 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 76 | #define UART_CTS_IS_HIGH_LEV_TRG (0x1 << UART_MODEMSTS_CTSACTLV_Pos) /*!< Set CTS is High Level Trigger */ |
<> | 144:ef7eb2e8f9f7 | 77 | #define UART_CTS_IS_LOW_LEV_TRG (0x0 << UART_MODEMSTS_CTSACTLV_Pos) /*!< Set CTS is Low Level Trigger */ |
<> | 144:ef7eb2e8f9f7 | 78 | |
<> | 144:ef7eb2e8f9f7 | 79 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 80 | /* UART_FUNC_SEL constants definitions */ |
<> | 144:ef7eb2e8f9f7 | 81 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 82 | #define UART_FUNCSEL_UART (0x0 << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set UART Function (Default) */ |
<> | 144:ef7eb2e8f9f7 | 83 | #define UART_FUNCSEL_IrDA (0x2 << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set IrDA Function */ |
<> | 144:ef7eb2e8f9f7 | 84 | #define UART_FUNCSEL_RS485 (0x3 << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set RS485 Function */ |
<> | 144:ef7eb2e8f9f7 | 85 | |
<> | 144:ef7eb2e8f9f7 | 86 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 87 | /* UART BAUDRATE MODE constants definitions */ |
<> | 144:ef7eb2e8f9f7 | 88 | /*---------------------------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 89 | #define UART_BAUD_MODE0 (0) /*!< Set UART Baudrate Mode is Mode0 */ |
<> | 144:ef7eb2e8f9f7 | 90 | #define UART_BAUD_MODE2 (UART_BAUD_BAUDM1_Msk | UART_BAUD_BAUDM0_Msk) /*!< Set UART Baudrate Mode is Mode2 */ |
<> | 144:ef7eb2e8f9f7 | 91 | |
<> | 144:ef7eb2e8f9f7 | 92 | |
<> | 144:ef7eb2e8f9f7 | 93 | |
<> | 144:ef7eb2e8f9f7 | 94 | /*@}*/ /* end of group NUC472_442_UART_EXPORTED_CONSTANTS */ |
<> | 144:ef7eb2e8f9f7 | 95 | |
<> | 144:ef7eb2e8f9f7 | 96 | |
<> | 144:ef7eb2e8f9f7 | 97 | /** @addtogroup NUC472_442_UART_EXPORTED_FUNCTIONS UART Exported Functions |
<> | 144:ef7eb2e8f9f7 | 98 | @{ |
<> | 144:ef7eb2e8f9f7 | 99 | */ |
<> | 144:ef7eb2e8f9f7 | 100 | |
<> | 144:ef7eb2e8f9f7 | 101 | |
<> | 144:ef7eb2e8f9f7 | 102 | /** |
<> | 144:ef7eb2e8f9f7 | 103 | * @brief Calculate UART baudrate mode0 divider |
<> | 144:ef7eb2e8f9f7 | 104 | * |
<> | 144:ef7eb2e8f9f7 | 105 | * @param[in] u32SrcFreq UART clock frequency |
<> | 144:ef7eb2e8f9f7 | 106 | * @param[in] u32BaudRate Baudrate of UART module |
<> | 144:ef7eb2e8f9f7 | 107 | * |
<> | 144:ef7eb2e8f9f7 | 108 | * @return UART baudrate mode0 divider |
<> | 144:ef7eb2e8f9f7 | 109 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 110 | * |
<> | 144:ef7eb2e8f9f7 | 111 | */ |
<> | 144:ef7eb2e8f9f7 | 112 | #define UART_BAUD_MODE0_DIVIDER(u32SrcFreq, u32BaudRate) (((u32SrcFreq + (u32BaudRate*8)) / u32BaudRate >> 4)-2) |
<> | 144:ef7eb2e8f9f7 | 113 | |
<> | 144:ef7eb2e8f9f7 | 114 | /** |
<> | 144:ef7eb2e8f9f7 | 115 | * @brief Calculate UART baudrate mode2 divider |
<> | 144:ef7eb2e8f9f7 | 116 | * |
<> | 144:ef7eb2e8f9f7 | 117 | * @param[in] u32SrcFreq UART clock frequency |
<> | 144:ef7eb2e8f9f7 | 118 | * @param[in] u32BaudRate Baudrate of UART module |
<> | 144:ef7eb2e8f9f7 | 119 | * |
<> | 144:ef7eb2e8f9f7 | 120 | * @return UART baudrate mode2 divider |
<> | 144:ef7eb2e8f9f7 | 121 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 122 | */ |
<> | 144:ef7eb2e8f9f7 | 123 | #define UART_BAUD_MODE2_DIVIDER(u32SrcFreq, u32BaudRate) (((u32SrcFreq + (u32BaudRate/2)) / u32BaudRate)-2) |
<> | 144:ef7eb2e8f9f7 | 124 | |
<> | 144:ef7eb2e8f9f7 | 125 | |
<> | 144:ef7eb2e8f9f7 | 126 | /** |
<> | 144:ef7eb2e8f9f7 | 127 | * @brief Write Data to Tx data register |
<> | 144:ef7eb2e8f9f7 | 128 | * |
<> | 144:ef7eb2e8f9f7 | 129 | * @param[in] uart The base address of UART module. |
<> | 144:ef7eb2e8f9f7 | 130 | * @param[in] u8Data Data byte to transmit |
<> | 144:ef7eb2e8f9f7 | 131 | * |
<> | 144:ef7eb2e8f9f7 | 132 | * @return None |
<> | 144:ef7eb2e8f9f7 | 133 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 134 | */ |
<> | 144:ef7eb2e8f9f7 | 135 | #define UART_WRITE(uart, u8Data) (uart->DAT = (u8Data)) |
<> | 144:ef7eb2e8f9f7 | 136 | |
<> | 144:ef7eb2e8f9f7 | 137 | /** |
<> | 144:ef7eb2e8f9f7 | 138 | * @brief Read Rx data register |
<> | 144:ef7eb2e8f9f7 | 139 | * |
<> | 144:ef7eb2e8f9f7 | 140 | * @param[in] uart The base address of UART module. |
<> | 144:ef7eb2e8f9f7 | 141 | * |
<> | 144:ef7eb2e8f9f7 | 142 | * @return The oldest data byte in RX FIFO |
<> | 144:ef7eb2e8f9f7 | 143 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 144 | */ |
<> | 144:ef7eb2e8f9f7 | 145 | #define UART_READ(uart) (uart->DAT) |
<> | 144:ef7eb2e8f9f7 | 146 | |
<> | 144:ef7eb2e8f9f7 | 147 | |
<> | 144:ef7eb2e8f9f7 | 148 | /** |
<> | 144:ef7eb2e8f9f7 | 149 | * @brief Get Tx empty register value. |
<> | 144:ef7eb2e8f9f7 | 150 | * |
<> | 144:ef7eb2e8f9f7 | 151 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 152 | * |
<> | 144:ef7eb2e8f9f7 | 153 | * @return Tx empty register value. |
<> | 144:ef7eb2e8f9f7 | 154 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 155 | */ |
<> | 144:ef7eb2e8f9f7 | 156 | #define UART_GET_TX_EMPTY(uart) (uart->FIFOSTS & UART_FIFOSTS_TXEMPTY_Msk) |
<> | 144:ef7eb2e8f9f7 | 157 | |
<> | 144:ef7eb2e8f9f7 | 158 | |
<> | 144:ef7eb2e8f9f7 | 159 | /** |
<> | 144:ef7eb2e8f9f7 | 160 | * @brief Get Rx empty register value. |
<> | 144:ef7eb2e8f9f7 | 161 | * |
<> | 144:ef7eb2e8f9f7 | 162 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 163 | * |
<> | 144:ef7eb2e8f9f7 | 164 | * @return Rx empty register value. |
<> | 144:ef7eb2e8f9f7 | 165 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 166 | */ |
<> | 144:ef7eb2e8f9f7 | 167 | #define UART_GET_RX_EMPTY(uart) (uart->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk) |
<> | 144:ef7eb2e8f9f7 | 168 | |
<> | 144:ef7eb2e8f9f7 | 169 | /** |
<> | 144:ef7eb2e8f9f7 | 170 | * @brief Check specified uart port transmission is over. |
<> | 144:ef7eb2e8f9f7 | 171 | * |
<> | 144:ef7eb2e8f9f7 | 172 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 173 | * |
<> | 144:ef7eb2e8f9f7 | 174 | * @return TE_Flag. |
<> | 144:ef7eb2e8f9f7 | 175 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 176 | */ |
<> | 144:ef7eb2e8f9f7 | 177 | #define UART_IS_TX_EMPTY(uart) ((uart->FIFOSTS & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos) |
<> | 144:ef7eb2e8f9f7 | 178 | |
<> | 144:ef7eb2e8f9f7 | 179 | |
<> | 144:ef7eb2e8f9f7 | 180 | /** |
<> | 144:ef7eb2e8f9f7 | 181 | * @brief Wait specified uart port transmission is over |
<> | 144:ef7eb2e8f9f7 | 182 | * |
<> | 144:ef7eb2e8f9f7 | 183 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 184 | * |
<> | 144:ef7eb2e8f9f7 | 185 | * @return None |
<> | 144:ef7eb2e8f9f7 | 186 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 187 | */ |
<> | 144:ef7eb2e8f9f7 | 188 | #define UART_WAIT_TX_EMPTY(uart) while(!(((uart->FIFOSTS) & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos)) |
<> | 144:ef7eb2e8f9f7 | 189 | |
<> | 144:ef7eb2e8f9f7 | 190 | /** |
<> | 144:ef7eb2e8f9f7 | 191 | * @brief Check RDA_IF is set or not |
<> | 144:ef7eb2e8f9f7 | 192 | * |
<> | 144:ef7eb2e8f9f7 | 193 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 194 | * |
<> | 144:ef7eb2e8f9f7 | 195 | * @return |
<> | 144:ef7eb2e8f9f7 | 196 | * 0 : The number of bytes in the RX FIFO is less than the RFITL |
<> | 144:ef7eb2e8f9f7 | 197 | * 1 : The number of bytes in the RX FIFO equals or larger than RFITL |
<> | 144:ef7eb2e8f9f7 | 198 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 199 | */ |
<> | 144:ef7eb2e8f9f7 | 200 | #define UART_IS_RX_READY(uart) ((uart->INTSTS & UART_INTSTS_RDAIF_Msk)>>UART_INTSTS_RDAIF_Pos) |
<> | 144:ef7eb2e8f9f7 | 201 | |
<> | 144:ef7eb2e8f9f7 | 202 | |
<> | 144:ef7eb2e8f9f7 | 203 | /** |
<> | 144:ef7eb2e8f9f7 | 204 | * @brief Check TX FIFO is full or not |
<> | 144:ef7eb2e8f9f7 | 205 | * |
<> | 144:ef7eb2e8f9f7 | 206 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 207 | * |
<> | 144:ef7eb2e8f9f7 | 208 | * @return |
<> | 144:ef7eb2e8f9f7 | 209 | * 1 = TX FIFO is full |
<> | 144:ef7eb2e8f9f7 | 210 | * 0 = TX FIFO is not full |
<> | 144:ef7eb2e8f9f7 | 211 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 212 | */ |
<> | 144:ef7eb2e8f9f7 | 213 | #define UART_IS_TX_FULL(uart) ((uart->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)>>UART_FIFOSTS_TXFULL_Pos) |
<> | 144:ef7eb2e8f9f7 | 214 | |
<> | 144:ef7eb2e8f9f7 | 215 | /** |
<> | 144:ef7eb2e8f9f7 | 216 | * @brief Check RX FIFO is full or not |
<> | 144:ef7eb2e8f9f7 | 217 | * |
<> | 144:ef7eb2e8f9f7 | 218 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 219 | * |
<> | 144:ef7eb2e8f9f7 | 220 | * @return |
<> | 144:ef7eb2e8f9f7 | 221 | * 1 = RX FIFO is full |
<> | 144:ef7eb2e8f9f7 | 222 | * 0 = RX FIFO is not full |
<> | 144:ef7eb2e8f9f7 | 223 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 224 | * |
<> | 144:ef7eb2e8f9f7 | 225 | */ |
<> | 144:ef7eb2e8f9f7 | 226 | #define UART_IS_RX_FULL(uart) ((uart->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)>>UART_FIFOSTS_RXFULL_Pos) |
<> | 144:ef7eb2e8f9f7 | 227 | |
<> | 144:ef7eb2e8f9f7 | 228 | |
<> | 144:ef7eb2e8f9f7 | 229 | /** |
<> | 144:ef7eb2e8f9f7 | 230 | * @brief Get Tx full register value |
<> | 144:ef7eb2e8f9f7 | 231 | * |
<> | 144:ef7eb2e8f9f7 | 232 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 233 | * |
<> | 144:ef7eb2e8f9f7 | 234 | * @return Tx full register value |
<> | 144:ef7eb2e8f9f7 | 235 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 236 | */ |
<> | 144:ef7eb2e8f9f7 | 237 | #define UART_GET_TX_FULL(uart) (uart->FIFOSTS & UART_FIFOSTS_TXFULL_Msk) |
<> | 144:ef7eb2e8f9f7 | 238 | |
<> | 144:ef7eb2e8f9f7 | 239 | |
<> | 144:ef7eb2e8f9f7 | 240 | /** |
<> | 144:ef7eb2e8f9f7 | 241 | * @brief Get Rx full register value |
<> | 144:ef7eb2e8f9f7 | 242 | * |
<> | 144:ef7eb2e8f9f7 | 243 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 244 | * |
<> | 144:ef7eb2e8f9f7 | 245 | * @return Rx full register value |
<> | 144:ef7eb2e8f9f7 | 246 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 247 | */ |
<> | 144:ef7eb2e8f9f7 | 248 | #define UART_GET_RX_FULL(uart) (uart->FIFOSTS & UART_FIFOSTS_RXFULL_Msk) |
<> | 144:ef7eb2e8f9f7 | 249 | |
<> | 144:ef7eb2e8f9f7 | 250 | |
<> | 144:ef7eb2e8f9f7 | 251 | /** |
<> | 144:ef7eb2e8f9f7 | 252 | * @brief Enable specified interrupt |
<> | 144:ef7eb2e8f9f7 | 253 | * |
<> | 144:ef7eb2e8f9f7 | 254 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 255 | * @param[in] u32eIntSel Interrupt type select |
<> | 144:ef7eb2e8f9f7 | 256 | * - \ref UART_INTEN_TOCNTEN_Msk : Rx Time Out interrupt |
<> | 144:ef7eb2e8f9f7 | 257 | * - \ref UART_INTEN_WKCTSIEN_Msk : Wakeup interrupt |
<> | 144:ef7eb2e8f9f7 | 258 | * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error interrupt |
<> | 144:ef7eb2e8f9f7 | 259 | * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt |
<> | 144:ef7eb2e8f9f7 | 260 | * - \ref UART_INTEN_MODEMIEN_Msk : Modem interrupt |
<> | 144:ef7eb2e8f9f7 | 261 | * - \ref UART_INTEN_RLSIEN_Msk : Rx Line status interrupt |
<> | 144:ef7eb2e8f9f7 | 262 | * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt |
<> | 144:ef7eb2e8f9f7 | 263 | * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt |
<> | 144:ef7eb2e8f9f7 | 264 | * |
<> | 144:ef7eb2e8f9f7 | 265 | * @return None |
<> | 144:ef7eb2e8f9f7 | 266 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 267 | */ |
<> | 144:ef7eb2e8f9f7 | 268 | #define UART_ENABLE_INT(uart, u32eIntSel) (uart->INTEN |= (u32eIntSel)) |
<> | 144:ef7eb2e8f9f7 | 269 | |
<> | 144:ef7eb2e8f9f7 | 270 | |
<> | 144:ef7eb2e8f9f7 | 271 | /** |
<> | 144:ef7eb2e8f9f7 | 272 | * @brief Disable specified interrupt |
<> | 144:ef7eb2e8f9f7 | 273 | * |
<> | 144:ef7eb2e8f9f7 | 274 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 275 | * @param[in] u32eIntSel Interrupt type select |
<> | 144:ef7eb2e8f9f7 | 276 | * - \ref UART_INTEN_TOCNTEN_Msk : Rx Time Out interrupt |
<> | 144:ef7eb2e8f9f7 | 277 | * - \ref UART_INTEN_WKCTSIEN_Msk : Wakeup interrupt |
<> | 144:ef7eb2e8f9f7 | 278 | * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error interrupt |
<> | 144:ef7eb2e8f9f7 | 279 | * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt |
<> | 144:ef7eb2e8f9f7 | 280 | * - \ref UART_INTEN_MODEMIEN_Msk : Modem interrupt |
<> | 144:ef7eb2e8f9f7 | 281 | * - \ref UART_INTEN_RLSIEN_Msk : Rx Line status interrupt |
<> | 144:ef7eb2e8f9f7 | 282 | * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt |
<> | 144:ef7eb2e8f9f7 | 283 | * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt |
<> | 144:ef7eb2e8f9f7 | 284 | * @return None |
<> | 144:ef7eb2e8f9f7 | 285 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 286 | */ |
<> | 144:ef7eb2e8f9f7 | 287 | #define UART_DISABLE_INT(uart, u32eIntSel) (uart->INTEN &= ~ (u32eIntSel)) |
<> | 144:ef7eb2e8f9f7 | 288 | |
<> | 144:ef7eb2e8f9f7 | 289 | |
<> | 144:ef7eb2e8f9f7 | 290 | /** |
<> | 144:ef7eb2e8f9f7 | 291 | * @brief Get specified interrupt flag/status |
<> | 144:ef7eb2e8f9f7 | 292 | * |
<> | 144:ef7eb2e8f9f7 | 293 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 294 | * @param[in] u32eIntTypeFlag Interrupt type select |
<> | 144:ef7eb2e8f9f7 | 295 | * - \ref UART_INTSTS_HWBUFEINT_Msk : In DMA Mode, Buffer Error Interrupt Indicator. |
<> | 144:ef7eb2e8f9f7 | 296 | * - \ref UART_INTSTS_HWTOINT_Msk : In DMA Mode, Time-out Interrupt Indicator. |
<> | 144:ef7eb2e8f9f7 | 297 | * - \ref UART_INTSTS_HWMODINT_Msk : In DMA Mode, MODEM Status Interrupt Indicator. |
<> | 144:ef7eb2e8f9f7 | 298 | * - \ref UART_INTSTS_HWRLSINT_Msk : In DMA Mode, Receive Line Status Interrupt Indicator. |
<> | 144:ef7eb2e8f9f7 | 299 | * - \ref UART_INTSTS_HWBUFEIF_Msk : In DMA Mode, Buffer Error Interrupt Flag. |
<> | 144:ef7eb2e8f9f7 | 300 | * - \ref UART_INTSTS_HWTOIF_Msk : In DMA Mode, Time-out Interrupt Flag. |
<> | 144:ef7eb2e8f9f7 | 301 | * - \ref UART_INTSTS_HWMODIF_Msk : In DMA Mode, MODEM Interrupt Flag. |
<> | 144:ef7eb2e8f9f7 | 302 | * - \ref UART_INTSTS_HWRLSIF_Msk : In DMA Mode, Receive Line Status Flag. |
<> | 144:ef7eb2e8f9f7 | 303 | * - \ref UART_INTSTS_LININT_Msk : LIN Bus Interrupt Indicator. |
<> | 144:ef7eb2e8f9f7 | 304 | * - \ref UART_INTSTS_BUFERRINT_Msk : Buffer Error Interrupt Indicator. |
<> | 144:ef7eb2e8f9f7 | 305 | * - \ref UART_INTSTS_RXTOINT_Msk : Time-out Interrupt Indicator. |
<> | 144:ef7eb2e8f9f7 | 306 | * - \ref UART_INTSTS_MODEMINT_Msk : Modem Status Interrupt Indicator. |
<> | 144:ef7eb2e8f9f7 | 307 | * - \ref UART_INTSTS_RLSINT_Msk : Receive Line Status Interrupt Indicator. |
<> | 144:ef7eb2e8f9f7 | 308 | * - \ref UART_INTSTS_THREINT_Msk : Transmit Holding Register Empty Interrupt Indicator. |
<> | 144:ef7eb2e8f9f7 | 309 | * - \ref UART_INTSTS_RDAINT_Msk : Receive Data Available Interrupt Indicator. |
<> | 144:ef7eb2e8f9f7 | 310 | * - \ref UART_INTSTS_LINIF_Msk : LIN Bus Flag. |
<> | 144:ef7eb2e8f9f7 | 311 | * - \ref UART_INTSTS_BUFERRIF_Msk : Buffer Error Interrupt Flag |
<> | 144:ef7eb2e8f9f7 | 312 | * - \ref UART_INTSTS_RXTOIF_Msk : Rx time-out interrupt Flag |
<> | 144:ef7eb2e8f9f7 | 313 | * - \ref UART_INTSTS_MODENIF_Msk : Modem interrupt Flag |
<> | 144:ef7eb2e8f9f7 | 314 | * - \ref UART_INTSTS_RLSIF_Msk : Rx Line status interrupt Flag |
<> | 144:ef7eb2e8f9f7 | 315 | * - \ref UART_INTSTS_THREIF_Msk : Tx empty interrupt Flag |
<> | 144:ef7eb2e8f9f7 | 316 | * - \ref UART_INTSTS_RDAIF_Msk : Rx ready interrupt Flag |
<> | 144:ef7eb2e8f9f7 | 317 | * |
<> | 144:ef7eb2e8f9f7 | 318 | * @return |
<> | 144:ef7eb2e8f9f7 | 319 | * 0 = The specified interrupt is not happened. |
<> | 144:ef7eb2e8f9f7 | 320 | * 1 = The specified interrupt is happened. |
<> | 144:ef7eb2e8f9f7 | 321 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 322 | */ |
<> | 144:ef7eb2e8f9f7 | 323 | #define UART_GET_INT_FLAG(uart,u32eIntTypeFlag) ((uart->INTSTS & (u32eIntTypeFlag))?1:0) |
<> | 144:ef7eb2e8f9f7 | 324 | |
<> | 144:ef7eb2e8f9f7 | 325 | |
<> | 144:ef7eb2e8f9f7 | 326 | /** |
<> | 144:ef7eb2e8f9f7 | 327 | * @brief Set RTS pin is low |
<> | 144:ef7eb2e8f9f7 | 328 | * |
<> | 144:ef7eb2e8f9f7 | 329 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 330 | * @return None |
<> | 144:ef7eb2e8f9f7 | 331 | */ |
<> | 144:ef7eb2e8f9f7 | 332 | __STATIC_INLINE void UART_CLEAR_RTS(UART_T* uart) |
<> | 144:ef7eb2e8f9f7 | 333 | { |
<> | 144:ef7eb2e8f9f7 | 334 | uart->MODEM |= UART_MODEM_RTSACTLV_Msk; |
<> | 144:ef7eb2e8f9f7 | 335 | uart->MODEM &= UART_MODEM_RTS_Msk; |
<> | 144:ef7eb2e8f9f7 | 336 | } |
<> | 144:ef7eb2e8f9f7 | 337 | |
<> | 144:ef7eb2e8f9f7 | 338 | /** |
<> | 144:ef7eb2e8f9f7 | 339 | * @brief Set RTS pin is high |
<> | 144:ef7eb2e8f9f7 | 340 | * |
<> | 144:ef7eb2e8f9f7 | 341 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 342 | * @return None |
<> | 144:ef7eb2e8f9f7 | 343 | */ |
<> | 144:ef7eb2e8f9f7 | 344 | __STATIC_INLINE void UART_SET_RTS(UART_T* uart) |
<> | 144:ef7eb2e8f9f7 | 345 | { |
<> | 144:ef7eb2e8f9f7 | 346 | uart->MODEM |= UART_MODEM_RTSACTLV_Msk | UART_MODEM_RTS_Msk; |
<> | 144:ef7eb2e8f9f7 | 347 | } |
<> | 144:ef7eb2e8f9f7 | 348 | |
<> | 144:ef7eb2e8f9f7 | 349 | /** |
<> | 144:ef7eb2e8f9f7 | 350 | * @brief Clear RS-485 Address Byte Detection Flag |
<> | 144:ef7eb2e8f9f7 | 351 | * |
<> | 144:ef7eb2e8f9f7 | 352 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 353 | * @return None |
<> | 144:ef7eb2e8f9f7 | 354 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 355 | */ |
<> | 144:ef7eb2e8f9f7 | 356 | #define UART_RS485_CLEAR_ADDR_FLAG(uart) (uart->FIFOSTS |= UART_FIFOSTS_ADDRDETF_Msk) |
<> | 144:ef7eb2e8f9f7 | 357 | |
<> | 144:ef7eb2e8f9f7 | 358 | |
<> | 144:ef7eb2e8f9f7 | 359 | /** |
<> | 144:ef7eb2e8f9f7 | 360 | * @brief Get RS-485 Address Byte Detection Flag |
<> | 144:ef7eb2e8f9f7 | 361 | * |
<> | 144:ef7eb2e8f9f7 | 362 | * @param[in] uart The base address of UART module |
<> | 144:ef7eb2e8f9f7 | 363 | * @return RS-485 Address Byte Detection Flag |
<> | 144:ef7eb2e8f9f7 | 364 | * \hideinitializer |
<> | 144:ef7eb2e8f9f7 | 365 | */ |
<> | 144:ef7eb2e8f9f7 | 366 | #define UART_RS485_GET_ADDR_FLAG(uart) ((uart->FIFOSTS & UART_FIFOSTS_ADDRDETF_Msk) >> UART_FIFOSTS_ADDRDETF_Pos) |
<> | 144:ef7eb2e8f9f7 | 367 | |
<> | 144:ef7eb2e8f9f7 | 368 | |
<> | 144:ef7eb2e8f9f7 | 369 | void UART_ClearIntFlag(UART_T* uart , uint32_t u32InterruptFlag); |
<> | 144:ef7eb2e8f9f7 | 370 | void UART_Close(UART_T* uart ); |
<> | 144:ef7eb2e8f9f7 | 371 | void UART_DisableFlowCtrl(UART_T* uart ); |
<> | 144:ef7eb2e8f9f7 | 372 | void UART_DisableInt(UART_T* uart, uint32_t u32InterruptFlag ); |
<> | 144:ef7eb2e8f9f7 | 373 | void UART_EnableFlowCtrl(UART_T* uart ); |
<> | 144:ef7eb2e8f9f7 | 374 | void UART_EnableInt(UART_T* uart, uint32_t u32InterruptFlag ); |
<> | 144:ef7eb2e8f9f7 | 375 | void UART_Open(UART_T* uart, uint32_t u32baudrate); |
<> | 144:ef7eb2e8f9f7 | 376 | uint32_t UART_Read(UART_T* uart, uint8_t *pu8RxBuf, uint32_t u32ReadBytes); |
<> | 144:ef7eb2e8f9f7 | 377 | void UART_SetLine_Config(UART_T* uart, uint32_t u32baudrate, uint32_t u32data_width, uint32_t u32parity, uint32_t u32stop_bits); |
<> | 144:ef7eb2e8f9f7 | 378 | void UART_SetTimeoutCnt(UART_T* uart, uint32_t u32TOC); |
<> | 144:ef7eb2e8f9f7 | 379 | void UART_SelectIrDAMode(UART_T* uart, uint32_t u32Buadrate, uint32_t u32Direction); |
<> | 144:ef7eb2e8f9f7 | 380 | void UART_SelectRS485Mode(UART_T* uart, uint32_t u32Mode, uint32_t u32Addr); |
<> | 144:ef7eb2e8f9f7 | 381 | uint32_t UART_Write(UART_T* uart,uint8_t *pu8TxBuf, uint32_t u32WriteBytes); |
<> | 144:ef7eb2e8f9f7 | 382 | |
<> | 144:ef7eb2e8f9f7 | 383 | |
<> | 144:ef7eb2e8f9f7 | 384 | /*@}*/ /* end of group NUC472_442_UART_EXPORTED_FUNCTIONS */ |
<> | 144:ef7eb2e8f9f7 | 385 | |
<> | 144:ef7eb2e8f9f7 | 386 | /*@}*/ /* end of group NUC472_442_UART_Driver */ |
<> | 144:ef7eb2e8f9f7 | 387 | |
<> | 144:ef7eb2e8f9f7 | 388 | /*@}*/ /* end of group NUC472_442_Device_Driver */ |
<> | 144:ef7eb2e8f9f7 | 389 | |
<> | 144:ef7eb2e8f9f7 | 390 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 391 | } |
<> | 144:ef7eb2e8f9f7 | 392 | #endif |
<> | 144:ef7eb2e8f9f7 | 393 | |
<> | 144:ef7eb2e8f9f7 | 394 | #endif //__UART_H__ |
<> | 144:ef7eb2e8f9f7 | 395 | |
<> | 144:ef7eb2e8f9f7 | 396 | /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/ |
<> | 144:ef7eb2e8f9f7 | 397 | |
<> | 144:ef7eb2e8f9f7 | 398 | |
<> | 144:ef7eb2e8f9f7 | 399 | |
<> | 144:ef7eb2e8f9f7 | 400 |