Filippo Casamassima / mbed

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Dependents:   Nucleo_blueNRG

Fork of mbed by mbed official

TARGET_NUCLEO_F072RB/stm32f0xx_hal_iwdg.h@93:e188a91d3eaa, 2015-02-03 (annotated)

Committer:
Kojto
Date:
Tue Feb 03 15:31:20 2015 +0000
Revision:
93:e188a91d3eaa
Parent:
92:4fc01daae5a5 
Release 93 of the mbed library



Main changes:



- Renesas RZ_A1H bugfixes - i2c, ticker

- new targets - Nucleo F303RE, Nucleo F070RB, BLE SMURFS,

                Dragonfly 411RE,

- BusXXX - is connected method, plus operators addition

- LPC8xx - I2c fixes

- timestamp_t reverted to uint32_t

- RTX - fixes regarding stack (alignment, magic word)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 85:024bf7f99721 1 /**
bogdanm 85:024bf7f99721 2 ******************************************************************************
bogdanm 85:024bf7f99721 3 * @file stm32f0xx_hal_iwdg.h
bogdanm 85:024bf7f99721 4 * @author MCD Application Team
Kojto 93:e188a91d3eaa 5 * @version V1.2.0
Kojto 93:e188a91d3eaa 6 * @date 11-December-2014
bogdanm 85:024bf7f99721 7 * @brief Header file of IWDG HAL module.
bogdanm 85:024bf7f99721 8 ******************************************************************************
bogdanm 85:024bf7f99721 9 * @attention
bogdanm 85:024bf7f99721 10 *
bogdanm 85:024bf7f99721 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 85:024bf7f99721 12 *
bogdanm 85:024bf7f99721 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 85:024bf7f99721 14 * are permitted provided that the following conditions are met:
bogdanm 85:024bf7f99721 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 85:024bf7f99721 16 * this list of conditions and the following disclaimer.
bogdanm 85:024bf7f99721 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 85:024bf7f99721 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 85:024bf7f99721 19 * and/or other materials provided with the distribution.
bogdanm 85:024bf7f99721 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 85:024bf7f99721 21 * may be used to endorse or promote products derived from this software
bogdanm 85:024bf7f99721 22 * without specific prior written permission.
bogdanm 85:024bf7f99721 23 *
bogdanm 85:024bf7f99721 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 85:024bf7f99721 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 85:024bf7f99721 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 85:024bf7f99721 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 85:024bf7f99721 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 85:024bf7f99721 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 85:024bf7f99721 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 85:024bf7f99721 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 85:024bf7f99721 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 85:024bf7f99721 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 85:024bf7f99721 34 *
bogdanm 85:024bf7f99721 35 ******************************************************************************
bogdanm 85:024bf7f99721 36 */
bogdanm 85:024bf7f99721 37
bogdanm 85:024bf7f99721 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 85:024bf7f99721 39 #ifndef __STM32F0xx_HAL_IWDG_H
bogdanm 85:024bf7f99721 40 #define __STM32F0xx_HAL_IWDG_H
bogdanm 85:024bf7f99721 41
bogdanm 85:024bf7f99721 42 #ifdef __cplusplus
bogdanm 85:024bf7f99721 43 extern "C" {
bogdanm 85:024bf7f99721 44 #endif
bogdanm 85:024bf7f99721 45
bogdanm 85:024bf7f99721 46 /* Includes ------------------------------------------------------------------*/
bogdanm 85:024bf7f99721 47 #include "stm32f0xx_hal_def.h"
bogdanm 85:024bf7f99721 48
bogdanm 85:024bf7f99721 49 /** @addtogroup STM32F0xx_HAL_Driver
bogdanm 85:024bf7f99721 50 * @{
bogdanm 85:024bf7f99721 51 */
bogdanm 85:024bf7f99721 52
bogdanm 85:024bf7f99721 53 /** @addtogroup IWDG
bogdanm 85:024bf7f99721 54 * @{
bogdanm 85:024bf7f99721 55 */
bogdanm 85:024bf7f99721 56
bogdanm 85:024bf7f99721 57 /* Exported types ------------------------------------------------------------*/
bogdanm 85:024bf7f99721 58
bogdanm 92:4fc01daae5a5 59 /** @defgroup IWDG_Exported_Types IWDG Exported Types
bogdanm 92:4fc01daae5a5 60 * @{
bogdanm 92:4fc01daae5a5 61 */
bogdanm 92:4fc01daae5a5 62
bogdanm 85:024bf7f99721 63 /**
bogdanm 85:024bf7f99721 64 * @brief IWDG HAL State Structure definition
bogdanm 85:024bf7f99721 65 */
bogdanm 85:024bf7f99721 66 typedef enum
bogdanm 85:024bf7f99721 67 {
bogdanm 85:024bf7f99721 68 HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */
bogdanm 85:024bf7f99721 69 HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */
bogdanm 85:024bf7f99721 70 HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */
bogdanm 85:024bf7f99721 71 HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */
bogdanm 85:024bf7f99721 72 HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */
bogdanm 85:024bf7f99721 73
bogdanm 85:024bf7f99721 74 }HAL_IWDG_StateTypeDef;
bogdanm 85:024bf7f99721 75
bogdanm 85:024bf7f99721 76 /**
bogdanm 85:024bf7f99721 77 * @brief IWDG Init structure definition
bogdanm 85:024bf7f99721 78 */
bogdanm 85:024bf7f99721 79 typedef struct
bogdanm 85:024bf7f99721 80 {
bogdanm 85:024bf7f99721 81 uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
bogdanm 85:024bf7f99721 82 This parameter can be a value of @ref IWDG_Prescaler */
bogdanm 85:024bf7f99721 83
bogdanm 85:024bf7f99721 84 uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
bogdanm 85:024bf7f99721 85 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
bogdanm 85:024bf7f99721 86
bogdanm 85:024bf7f99721 87 uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
bogdanm 85:024bf7f99721 88 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
bogdanm 85:024bf7f99721 89
bogdanm 85:024bf7f99721 90 } IWDG_InitTypeDef;
bogdanm 85:024bf7f99721 91
bogdanm 85:024bf7f99721 92 /**
bogdanm 85:024bf7f99721 93 * @brief IWDG Handle Structure definition
bogdanm 85:024bf7f99721 94 */
bogdanm 85:024bf7f99721 95 typedef struct
bogdanm 85:024bf7f99721 96 {
bogdanm 85:024bf7f99721 97 IWDG_TypeDef *Instance; /*!< Register base address */
bogdanm 85:024bf7f99721 98
bogdanm 85:024bf7f99721 99 IWDG_InitTypeDef Init; /*!< IWDG required parameters */
bogdanm 85:024bf7f99721 100
bogdanm 85:024bf7f99721 101 HAL_LockTypeDef Lock; /*!< IWDG Locking object */
bogdanm 85:024bf7f99721 102
bogdanm 85:024bf7f99721 103 __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */
bogdanm 85:024bf7f99721 104
bogdanm 85:024bf7f99721 105 }IWDG_HandleTypeDef;
bogdanm 85:024bf7f99721 106
bogdanm 92:4fc01daae5a5 107 /**
bogdanm 92:4fc01daae5a5 108 * @}
bogdanm 92:4fc01daae5a5 109 */
bogdanm 92:4fc01daae5a5 110
bogdanm 85:024bf7f99721 111 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 112
bogdanm 92:4fc01daae5a5 113 /** @defgroup IWDG_Exported_Constants IWDG Exported Constants
bogdanm 85:024bf7f99721 114 * @{
bogdanm 85:024bf7f99721 115 */
bogdanm 85:024bf7f99721 116
bogdanm 92:4fc01daae5a5 117 /** @defgroup IWDG_Registers_BitMask IWDG Registers BitMask
bogdanm 85:024bf7f99721 118 * @brief IWDG registers bit mask
bogdanm 85:024bf7f99721 119 * @{
bogdanm 85:024bf7f99721 120 */
bogdanm 85:024bf7f99721 121 /* --- KR Register ---*/
bogdanm 85:024bf7f99721 122 /* KR register bit mask */
bogdanm 85:024bf7f99721 123 #define KR_KEY_RELOAD ((uint32_t)0xAAAA) /*!< IWDG Reload Counter Enable */
bogdanm 85:024bf7f99721 124 #define KR_KEY_ENABLE ((uint32_t)0xCCCC) /*!< IWDG Peripheral Enable */
bogdanm 85:024bf7f99721 125 #define KR_KEY_EWA ((uint32_t)0x5555) /*!< IWDG KR Write Access Enable */
bogdanm 85:024bf7f99721 126 #define KR_KEY_DWA ((uint32_t)0x0000) /*!< IWDG KR Write Access Disable */
bogdanm 85:024bf7f99721 127
bogdanm 92:4fc01daae5a5 128 #define IS_IWDG_KR(__KR__) (((__KR__) == KR_KEY_RELOAD) || \
bogdanm 92:4fc01daae5a5 129 ((__KR__) == KR_KEY_ENABLE))|| \
bogdanm 92:4fc01daae5a5 130 ((__KR__) == KR_KEY_EWA)) || \
bogdanm 92:4fc01daae5a5 131 ((__KR__) == KR_KEY_DWA))
bogdanm 85:024bf7f99721 132 /**
bogdanm 85:024bf7f99721 133 * @}
bogdanm 85:024bf7f99721 134 */
bogdanm 85:024bf7f99721 135
bogdanm 92:4fc01daae5a5 136 /** @defgroup IWDG_Flag_definition IWDG Flag definition
bogdanm 85:024bf7f99721 137 * @{
bogdanm 85:024bf7f99721 138 */
bogdanm 92:4fc01daae5a5 139 #define IWDG_FLAG_PVU ((uint32_t)IWDG_SR_PVU) /*!< Watchdog counter prescaler value update Flag */
bogdanm 92:4fc01daae5a5 140 #define IWDG_FLAG_RVU ((uint32_t)IWDG_SR_RVU) /*!< Watchdog counter reload value update Flag */
bogdanm 92:4fc01daae5a5 141 #define IWDG_FLAG_WVU ((uint32_t)IWDG_SR_WVU) /*!< Watchdog counter window value update Flag */
bogdanm 85:024bf7f99721 142
bogdanm 85:024bf7f99721 143 /**
bogdanm 85:024bf7f99721 144 * @}
bogdanm 85:024bf7f99721 145 */
bogdanm 85:024bf7f99721 146
bogdanm 92:4fc01daae5a5 147 /** @defgroup IWDG_Prescaler IWDG Prescaler
bogdanm 85:024bf7f99721 148 * @{
bogdanm 85:024bf7f99721 149 */
bogdanm 92:4fc01daae5a5 150 #define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */
bogdanm 92:4fc01daae5a5 151 #define IWDG_PRESCALER_8 ((uint8_t)(IWDG_PR_PR_0)) /*!< IWDG prescaler set to 8 */
bogdanm 92:4fc01daae5a5 152 #define IWDG_PRESCALER_16 ((uint8_t)(IWDG_PR_PR_1)) /*!< IWDG prescaler set to 16 */
bogdanm 92:4fc01daae5a5 153 #define IWDG_PRESCALER_32 ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 32 */
bogdanm 92:4fc01daae5a5 154 #define IWDG_PRESCALER_64 ((uint8_t)(IWDG_PR_PR_2)) /*!< IWDG prescaler set to 64 */
bogdanm 92:4fc01daae5a5 155 #define IWDG_PRESCALER_128 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 128 */
bogdanm 92:4fc01daae5a5 156 #define IWDG_PRESCALER_256 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1)) /*!< IWDG prescaler set to 256 */
bogdanm 92:4fc01daae5a5 157
bogdanm 92:4fc01daae5a5 158 #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
bogdanm 92:4fc01daae5a5 159 ((__PRESCALER__) == IWDG_PRESCALER_8) || \
bogdanm 92:4fc01daae5a5 160 ((__PRESCALER__) == IWDG_PRESCALER_16) || \
bogdanm 92:4fc01daae5a5 161 ((__PRESCALER__) == IWDG_PRESCALER_32) || \
bogdanm 92:4fc01daae5a5 162 ((__PRESCALER__) == IWDG_PRESCALER_64) || \
bogdanm 92:4fc01daae5a5 163 ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
bogdanm 92:4fc01daae5a5 164 ((__PRESCALER__) == IWDG_PRESCALER_256))
bogdanm 92:4fc01daae5a5 165
bogdanm 85:024bf7f99721 166 /**
bogdanm 85:024bf7f99721 167 * @}
bogdanm 85:024bf7f99721 168 */
bogdanm 85:024bf7f99721 169
bogdanm 92:4fc01daae5a5 170 /** @defgroup IWDG_Reload_Value IWDG Reload Value
bogdanm 92:4fc01daae5a5 171 * @{
bogdanm 92:4fc01daae5a5 172 */
bogdanm 92:4fc01daae5a5 173 #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF)
bogdanm 92:4fc01daae5a5 174 /**
bogdanm 92:4fc01daae5a5 175 * @}
bogdanm 92:4fc01daae5a5 176 */
bogdanm 92:4fc01daae5a5 177
bogdanm 92:4fc01daae5a5 178 /** @defgroup IWDG_CounterWindow_Value IWDG CounterWindow Value
bogdanm 85:024bf7f99721 179 * @{
bogdanm 85:024bf7f99721 180 */
bogdanm 92:4fc01daae5a5 181 #define IS_IWDG_WINDOW(__VALUE__) ((__VALUE__) <= 0xFFF)
bogdanm 85:024bf7f99721 182 /**
bogdanm 85:024bf7f99721 183 * @}
bogdanm 85:024bf7f99721 184 */
bogdanm 92:4fc01daae5a5 185 /** @defgroup IWDG_Window_option IWDG Window option
bogdanm 85:024bf7f99721 186 * @{
bogdanm 85:024bf7f99721 187 */
bogdanm 85:024bf7f99721 188 #define IWDG_WINDOW_DISABLE 0xFFF
bogdanm 85:024bf7f99721 189 /**
bogdanm 85:024bf7f99721 190 * @}
bogdanm 85:024bf7f99721 191 */
bogdanm 85:024bf7f99721 192
bogdanm 85:024bf7f99721 193 /**
bogdanm 85:024bf7f99721 194 * @}
bogdanm 85:024bf7f99721 195 */
bogdanm 85:024bf7f99721 196
bogdanm 85:024bf7f99721 197 /* Exported macros -----------------------------------------------------------*/
bogdanm 85:024bf7f99721 198
bogdanm 92:4fc01daae5a5 199 /** @defgroup IWDG_Exported_Macros IWDG Exported Macros
bogdanm 85:024bf7f99721 200 * @{
bogdanm 85:024bf7f99721 201 */
bogdanm 85:024bf7f99721 202
bogdanm 85:024bf7f99721 203 /** @brief Reset IWDG handle state
bogdanm 85:024bf7f99721 204 * @param __HANDLE__: IWDG handle.
bogdanm 85:024bf7f99721 205 * @retval None
bogdanm 85:024bf7f99721 206 */
bogdanm 85:024bf7f99721 207 #define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET)
bogdanm 85:024bf7f99721 208
bogdanm 85:024bf7f99721 209 /**
bogdanm 85:024bf7f99721 210 * @brief Enables the IWDG peripheral.
bogdanm 85:024bf7f99721 211 * @param __HANDLE__: IWDG handle
bogdanm 85:024bf7f99721 212 * @retval None
bogdanm 85:024bf7f99721 213 */
bogdanm 92:4fc01daae5a5 214 #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_ENABLE)
bogdanm 85:024bf7f99721 215
bogdanm 85:024bf7f99721 216 /**
bogdanm 85:024bf7f99721 217 * @brief Reloads IWDG counter with value defined in the reload register
bogdanm 85:024bf7f99721 218 * (write access to IWDG_PR and IWDG_RLR registers disabled).
bogdanm 85:024bf7f99721 219 * @param __HANDLE__: IWDG handle
bogdanm 85:024bf7f99721 220 * @retval None
bogdanm 85:024bf7f99721 221 */
bogdanm 92:4fc01daae5a5 222 #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_RELOAD)
bogdanm 85:024bf7f99721 223
bogdanm 85:024bf7f99721 224 /**
bogdanm 85:024bf7f99721 225 * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
bogdanm 85:024bf7f99721 226 * @param __HANDLE__: IWDG handle
bogdanm 85:024bf7f99721 227 * @retval None
bogdanm 85:024bf7f99721 228 */
bogdanm 92:4fc01daae5a5 229 #define __HAL_IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_EWA)
bogdanm 85:024bf7f99721 230
bogdanm 85:024bf7f99721 231 /**
bogdanm 85:024bf7f99721 232 * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
bogdanm 85:024bf7f99721 233 * @param __HANDLE__: IWDG handle
bogdanm 85:024bf7f99721 234 * @retval None
bogdanm 85:024bf7f99721 235 */
bogdanm 92:4fc01daae5a5 236 #define __HAL_IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, KR_KEY_DWA)
bogdanm 85:024bf7f99721 237
bogdanm 85:024bf7f99721 238 /**
bogdanm 85:024bf7f99721 239 * @brief Gets the selected IWDG's flag status.
bogdanm 85:024bf7f99721 240 * @param __HANDLE__: IWDG handle
bogdanm 85:024bf7f99721 241 * @param __FLAG__: specifies the flag to check.
bogdanm 85:024bf7f99721 242 * This parameter can be one of the following values:
bogdanm 85:024bf7f99721 243 * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag
bogdanm 85:024bf7f99721 244 * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag
bogdanm 85:024bf7f99721 245 * @arg IWDG_FLAG_WVU: Watchdog counter window value flag
bogdanm 85:024bf7f99721 246 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 85:024bf7f99721 247 */
bogdanm 85:024bf7f99721 248 #define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
bogdanm 85:024bf7f99721 249
bogdanm 85:024bf7f99721 250 /**
bogdanm 85:024bf7f99721 251 * @}
bogdanm 85:024bf7f99721 252 */
bogdanm 85:024bf7f99721 253
bogdanm 85:024bf7f99721 254 /* Exported functions --------------------------------------------------------*/
bogdanm 85:024bf7f99721 255
bogdanm 92:4fc01daae5a5 256 /** @addtogroup IWDG_Exported_Functions
bogdanm 92:4fc01daae5a5 257 * @{
bogdanm 92:4fc01daae5a5 258 */
bogdanm 92:4fc01daae5a5 259
bogdanm 92:4fc01daae5a5 260 /** @addtogroup IWDG_Exported_Functions_Group1
bogdanm 92:4fc01daae5a5 261 * @{
bogdanm 92:4fc01daae5a5 262 */
bogdanm 92:4fc01daae5a5 263 /* Initialization/de-initialization functions ********************************/
bogdanm 85:024bf7f99721 264 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
bogdanm 85:024bf7f99721 265 void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg);
bogdanm 85:024bf7f99721 266
bogdanm 92:4fc01daae5a5 267 /**
bogdanm 92:4fc01daae5a5 268 * @}
bogdanm 92:4fc01daae5a5 269 */
bogdanm 92:4fc01daae5a5 270
bogdanm 92:4fc01daae5a5 271 /** @addtogroup IWDG_Exported_Functions_Group2
bogdanm 92:4fc01daae5a5 272 * @{
bogdanm 92:4fc01daae5a5 273 */
bogdanm 85:024bf7f99721 274 /* I/O operation functions ****************************************************/
bogdanm 85:024bf7f99721 275 HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg);
bogdanm 85:024bf7f99721 276 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
bogdanm 85:024bf7f99721 277
bogdanm 92:4fc01daae5a5 278 /**
bogdanm 92:4fc01daae5a5 279 * @}
bogdanm 92:4fc01daae5a5 280 */
bogdanm 92:4fc01daae5a5 281
bogdanm 92:4fc01daae5a5 282 /** @addtogroup IWDG_Exported_Functions_Group3
bogdanm 92:4fc01daae5a5 283 * @{
bogdanm 92:4fc01daae5a5 284 */
bogdanm 85:024bf7f99721 285 /* Peripheral State functions ************************************************/
bogdanm 85:024bf7f99721 286 HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg);
bogdanm 85:024bf7f99721 287
bogdanm 85:024bf7f99721 288 /**
bogdanm 85:024bf7f99721 289 * @}
bogdanm 85:024bf7f99721 290 */
bogdanm 85:024bf7f99721 291
bogdanm 85:024bf7f99721 292 /**
bogdanm 85:024bf7f99721 293 * @}
bogdanm 85:024bf7f99721 294 */
bogdanm 85:024bf7f99721 295
bogdanm 92:4fc01daae5a5 296 /**
bogdanm 92:4fc01daae5a5 297 * @}
bogdanm 92:4fc01daae5a5 298 */
bogdanm 92:4fc01daae5a5 299
bogdanm 92:4fc01daae5a5 300 /**
bogdanm 92:4fc01daae5a5 301 * @}
bogdanm 92:4fc01daae5a5 302 */
bogdanm 92:4fc01daae5a5 303
bogdanm 85:024bf7f99721 304 #ifdef __cplusplus
bogdanm 85:024bf7f99721 305 }
bogdanm 85:024bf7f99721 306 #endif
bogdanm 85:024bf7f99721 307
bogdanm 85:024bf7f99721 308 #endif /* __STM32F0xx_HAL_IWDG_H */
bogdanm 85:024bf7f99721 309
bogdanm 85:024bf7f99721 310 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 92:4fc01daae5a5 311