Filippo Casamassima
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mbed official
TARGET_NUCLEO_F072RB/stm32f0xx_hal_i2s.h@93:e188a91d3eaa, 2015-02-03 (annotated)
- Committer:
- Kojto
- Date:
- Tue Feb 03 15:31:20 2015 +0000
- Revision:
- 93:e188a91d3eaa
- Parent:
- 92:4fc01daae5a5
Release 93 of the mbed library
Main changes:
- Renesas RZ_A1H bugfixes - i2c, ticker
- new targets - Nucleo F303RE, Nucleo F070RB, BLE SMURFS,
Dragonfly 411RE,
- BusXXX - is connected method, plus operators addition
- LPC8xx - I2c fixes
- timestamp_t reverted to uint32_t
- RTX - fixes regarding stack (alignment, magic word)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 85:024bf7f99721 | 1 | /** |
| bogdanm | 85:024bf7f99721 | 2 | ****************************************************************************** |
| bogdanm | 85:024bf7f99721 | 3 | * @file stm32f0xx_hal_i2s.h |
| bogdanm | 85:024bf7f99721 | 4 | * @author MCD Application Team |
| Kojto | 93:e188a91d3eaa | 5 | * @version V1.2.0 |
| Kojto | 93:e188a91d3eaa | 6 | * @date 11-December-2014 |
| bogdanm | 85:024bf7f99721 | 7 | * @brief Header file of I2S HAL module. |
| bogdanm | 85:024bf7f99721 | 8 | ****************************************************************************** |
| bogdanm | 85:024bf7f99721 | 9 | * @attention |
| bogdanm | 85:024bf7f99721 | 10 | * |
| bogdanm | 85:024bf7f99721 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 85:024bf7f99721 | 12 | * |
| bogdanm | 85:024bf7f99721 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 85:024bf7f99721 | 14 | * are permitted provided that the following conditions are met: |
| bogdanm | 85:024bf7f99721 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 85:024bf7f99721 | 16 | * this list of conditions and the following disclaimer. |
| bogdanm | 85:024bf7f99721 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 85:024bf7f99721 | 18 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 85:024bf7f99721 | 19 | * and/or other materials provided with the distribution. |
| bogdanm | 85:024bf7f99721 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 85:024bf7f99721 | 21 | * may be used to endorse or promote products derived from this software |
| bogdanm | 85:024bf7f99721 | 22 | * without specific prior written permission. |
| bogdanm | 85:024bf7f99721 | 23 | * |
| bogdanm | 85:024bf7f99721 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 85:024bf7f99721 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 85:024bf7f99721 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 85:024bf7f99721 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 85:024bf7f99721 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 85:024bf7f99721 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 85:024bf7f99721 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 85:024bf7f99721 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 85:024bf7f99721 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 85:024bf7f99721 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 85:024bf7f99721 | 34 | * |
| bogdanm | 85:024bf7f99721 | 35 | ****************************************************************************** |
| bogdanm | 85:024bf7f99721 | 36 | */ |
| bogdanm | 85:024bf7f99721 | 37 | |
| bogdanm | 85:024bf7f99721 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 85:024bf7f99721 | 39 | #ifndef __STM32F0xx_HAL_I2S_H |
| bogdanm | 85:024bf7f99721 | 40 | #define __STM32F0xx_HAL_I2S_H |
| bogdanm | 85:024bf7f99721 | 41 | |
| bogdanm | 85:024bf7f99721 | 42 | #ifdef __cplusplus |
| bogdanm | 85:024bf7f99721 | 43 | extern "C" { |
| bogdanm | 85:024bf7f99721 | 44 | #endif |
| bogdanm | 85:024bf7f99721 | 45 | |
| bogdanm | 92:4fc01daae5a5 | 46 | #if defined(STM32F031x6) || defined(STM32F038xx) || \ |
| bogdanm | 92:4fc01daae5a5 | 47 | defined(STM32F051x8) || defined(STM32F058xx) || \ |
| bogdanm | 85:024bf7f99721 | 48 | defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \ |
| bogdanm | 92:4fc01daae5a5 | 49 | defined(STM32F042x6) || defined(STM32F048xx) || \ |
| bogdanm | 92:4fc01daae5a5 | 50 | defined(STM32F091xC) || defined(STM32F098xx) |
| bogdanm | 85:024bf7f99721 | 51 | |
| bogdanm | 85:024bf7f99721 | 52 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 85:024bf7f99721 | 53 | #include "stm32f0xx_hal_def.h" |
| bogdanm | 85:024bf7f99721 | 54 | |
| bogdanm | 85:024bf7f99721 | 55 | /** @addtogroup STM32F0xx_HAL_Driver |
| bogdanm | 85:024bf7f99721 | 56 | * @{ |
| bogdanm | 85:024bf7f99721 | 57 | */ |
| bogdanm | 85:024bf7f99721 | 58 | |
| bogdanm | 85:024bf7f99721 | 59 | /** @addtogroup I2S |
| bogdanm | 85:024bf7f99721 | 60 | * @{ |
| bogdanm | 85:024bf7f99721 | 61 | */ |
| bogdanm | 85:024bf7f99721 | 62 | |
| bogdanm | 85:024bf7f99721 | 63 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 92:4fc01daae5a5 | 64 | /** @defgroup I2S_Exported_Types I2S Exported Types |
| bogdanm | 92:4fc01daae5a5 | 65 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 66 | */ |
| bogdanm | 92:4fc01daae5a5 | 67 | |
| bogdanm | 85:024bf7f99721 | 68 | /** |
| bogdanm | 85:024bf7f99721 | 69 | * @brief I2S Init structure definition |
| bogdanm | 85:024bf7f99721 | 70 | */ |
| bogdanm | 85:024bf7f99721 | 71 | typedef struct |
| bogdanm | 85:024bf7f99721 | 72 | { |
| bogdanm | 92:4fc01daae5a5 | 73 | uint32_t Mode; /*!< Specifies the I2S operating mode. |
| bogdanm | 85:024bf7f99721 | 74 | This parameter can be a value of @ref I2S_Mode */ |
| bogdanm | 85:024bf7f99721 | 75 | |
| bogdanm | 92:4fc01daae5a5 | 76 | uint32_t Standard; /*!< Specifies the standard used for the I2S communication. |
| bogdanm | 85:024bf7f99721 | 77 | This parameter can be a value of @ref I2S_Standard */ |
| bogdanm | 85:024bf7f99721 | 78 | |
| bogdanm | 92:4fc01daae5a5 | 79 | uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. |
| bogdanm | 85:024bf7f99721 | 80 | This parameter can be a value of @ref I2S_Data_Format */ |
| bogdanm | 85:024bf7f99721 | 81 | |
| bogdanm | 92:4fc01daae5a5 | 82 | uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. |
| bogdanm | 85:024bf7f99721 | 83 | This parameter can be a value of @ref I2S_MCLK_Output */ |
| bogdanm | 85:024bf7f99721 | 84 | |
| bogdanm | 85:024bf7f99721 | 85 | uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. |
| bogdanm | 85:024bf7f99721 | 86 | This parameter can be a value of @ref I2S_Audio_Frequency */ |
| bogdanm | 85:024bf7f99721 | 87 | |
| bogdanm | 92:4fc01daae5a5 | 88 | uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. |
| bogdanm | 85:024bf7f99721 | 89 | This parameter can be a value of @ref I2S_Clock_Polarity */ |
| bogdanm | 85:024bf7f99721 | 90 | }I2S_InitTypeDef; |
| bogdanm | 85:024bf7f99721 | 91 | |
| bogdanm | 85:024bf7f99721 | 92 | /** |
| bogdanm | 85:024bf7f99721 | 93 | * @brief HAL State structures definition |
| bogdanm | 85:024bf7f99721 | 94 | */ |
| bogdanm | 85:024bf7f99721 | 95 | typedef enum |
| bogdanm | 85:024bf7f99721 | 96 | { |
| bogdanm | 85:024bf7f99721 | 97 | HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */ |
| bogdanm | 85:024bf7f99721 | 98 | HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */ |
| bogdanm | 85:024bf7f99721 | 99 | HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */ |
| bogdanm | 85:024bf7f99721 | 100 | HAL_I2S_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */ |
| bogdanm | 85:024bf7f99721 | 101 | HAL_I2S_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */ |
| bogdanm | 85:024bf7f99721 | 102 | HAL_I2S_STATE_PAUSE = 0x06, /*!< I2S pause state: used in case of DMA */ |
| bogdanm | 92:4fc01daae5a5 | 103 | HAL_I2S_STATE_ERROR = 0x07 /*!< I2S error state */ |
| bogdanm | 85:024bf7f99721 | 104 | }HAL_I2S_StateTypeDef; |
| bogdanm | 85:024bf7f99721 | 105 | |
| bogdanm | 85:024bf7f99721 | 106 | /** |
| bogdanm | 85:024bf7f99721 | 107 | * @brief I2S handle Structure definition |
| bogdanm | 85:024bf7f99721 | 108 | */ |
| bogdanm | 85:024bf7f99721 | 109 | typedef struct |
| bogdanm | 85:024bf7f99721 | 110 | { |
| Kojto | 93:e188a91d3eaa | 111 | SPI_TypeDef *Instance; /*!< I2S registers base address */ |
| bogdanm | 85:024bf7f99721 | 112 | |
| Kojto | 93:e188a91d3eaa | 113 | I2S_InitTypeDef Init; /*!< I2S communication parameters */ |
| bogdanm | 85:024bf7f99721 | 114 | |
| Kojto | 93:e188a91d3eaa | 115 | uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */ |
| bogdanm | 85:024bf7f99721 | 116 | |
| Kojto | 93:e188a91d3eaa | 117 | __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */ |
| bogdanm | 85:024bf7f99721 | 118 | |
| Kojto | 93:e188a91d3eaa | 119 | __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */ |
| bogdanm | 85:024bf7f99721 | 120 | |
| Kojto | 93:e188a91d3eaa | 121 | uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */ |
| bogdanm | 85:024bf7f99721 | 122 | |
| Kojto | 93:e188a91d3eaa | 123 | __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */ |
| bogdanm | 85:024bf7f99721 | 124 | |
| Kojto | 93:e188a91d3eaa | 125 | __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter |
| bogdanm | 92:4fc01daae5a5 | 126 | (This field is initialized at the |
| bogdanm | 92:4fc01daae5a5 | 127 | same value as transfer size at the |
| bogdanm | 92:4fc01daae5a5 | 128 | beginning of the transfer and |
| bogdanm | 92:4fc01daae5a5 | 129 | decremented when a sample is received. |
| bogdanm | 92:4fc01daae5a5 | 130 | NbSamplesReceived = RxBufferSize-RxBufferCount) */ |
| bogdanm | 85:024bf7f99721 | 131 | |
| Kojto | 93:e188a91d3eaa | 132 | DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */ |
| bogdanm | 85:024bf7f99721 | 133 | |
| Kojto | 93:e188a91d3eaa | 134 | DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */ |
| bogdanm | 85:024bf7f99721 | 135 | |
| Kojto | 93:e188a91d3eaa | 136 | __IO HAL_LockTypeDef Lock; /*!< I2S locking object */ |
| bogdanm | 85:024bf7f99721 | 137 | |
| Kojto | 93:e188a91d3eaa | 138 | __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */ |
| bogdanm | 85:024bf7f99721 | 139 | |
| Kojto | 93:e188a91d3eaa | 140 | __IO uint32_t ErrorCode; /*!< I2S Error code |
| Kojto | 93:e188a91d3eaa | 141 | This parameter can be a value of @ref I2S_Error */ |
| bogdanm | 85:024bf7f99721 | 142 | |
| bogdanm | 85:024bf7f99721 | 143 | }I2S_HandleTypeDef; |
| bogdanm | 85:024bf7f99721 | 144 | /** |
| bogdanm | 85:024bf7f99721 | 145 | * @} |
| bogdanm | 85:024bf7f99721 | 146 | */ |
| bogdanm | 85:024bf7f99721 | 147 | |
| bogdanm | 92:4fc01daae5a5 | 148 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 92:4fc01daae5a5 | 149 | /** @defgroup I2S_Exported_Constants I2S Exported Constants |
| bogdanm | 92:4fc01daae5a5 | 150 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 151 | */ |
| Kojto | 93:e188a91d3eaa | 152 | /** @defgroup I2S_Error I2S Error |
| Kojto | 93:e188a91d3eaa | 153 | * @{ |
| Kojto | 93:e188a91d3eaa | 154 | */ |
| Kojto | 93:e188a91d3eaa | 155 | #define HAL_I2S_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ |
| Kojto | 93:e188a91d3eaa | 156 | #define HAL_I2S_ERROR_TIMEOUT ((uint32_t)0x00000001) /*!< Timeout error */ |
| Kojto | 93:e188a91d3eaa | 157 | #define HAL_I2S_ERROR_OVR ((uint32_t)0x00000002) /*!< OVR error */ |
| Kojto | 93:e188a91d3eaa | 158 | #define HAL_I2S_ERROR_UDR ((uint32_t)0x00000004) /*!< UDR error */ |
| Kojto | 93:e188a91d3eaa | 159 | #define HAL_I2S_ERROR_DMA ((uint32_t)0x00000008) /*!< DMA transfer error */ |
| Kojto | 93:e188a91d3eaa | 160 | #define HAL_I2S_ERROR_UNKNOW ((uint32_t)0x00000010) /*!< Unknow Error error */ |
| Kojto | 93:e188a91d3eaa | 161 | /** |
| Kojto | 93:e188a91d3eaa | 162 | * @} |
| Kojto | 93:e188a91d3eaa | 163 | */ |
| bogdanm | 92:4fc01daae5a5 | 164 | |
| bogdanm | 92:4fc01daae5a5 | 165 | /** @defgroup I2S_Mode I2S Mode |
| bogdanm | 85:024bf7f99721 | 166 | * @{ |
| bogdanm | 85:024bf7f99721 | 167 | */ |
| bogdanm | 85:024bf7f99721 | 168 | #define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000) |
| bogdanm | 85:024bf7f99721 | 169 | #define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100) |
| bogdanm | 85:024bf7f99721 | 170 | #define I2S_MODE_MASTER_TX ((uint32_t)0x00000200) |
| bogdanm | 85:024bf7f99721 | 171 | #define I2S_MODE_MASTER_RX ((uint32_t)0x00000300) |
| bogdanm | 85:024bf7f99721 | 172 | |
| bogdanm | 85:024bf7f99721 | 173 | #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ |
| bogdanm | 85:024bf7f99721 | 174 | ((MODE) == I2S_MODE_SLAVE_RX) || \ |
| bogdanm | 85:024bf7f99721 | 175 | ((MODE) == I2S_MODE_MASTER_TX)|| \ |
| bogdanm | 85:024bf7f99721 | 176 | ((MODE) == I2S_MODE_MASTER_RX)) |
| bogdanm | 85:024bf7f99721 | 177 | /** |
| bogdanm | 85:024bf7f99721 | 178 | * @} |
| bogdanm | 85:024bf7f99721 | 179 | */ |
| bogdanm | 85:024bf7f99721 | 180 | |
| bogdanm | 92:4fc01daae5a5 | 181 | /** @defgroup I2S_Standard I2S Standard |
| bogdanm | 85:024bf7f99721 | 182 | * @{ |
| bogdanm | 85:024bf7f99721 | 183 | */ |
| bogdanm | 85:024bf7f99721 | 184 | #define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000) |
| bogdanm | 85:024bf7f99721 | 185 | #define I2S_STANDARD_MSB ((uint32_t)0x00000010) |
| bogdanm | 85:024bf7f99721 | 186 | #define I2S_STANDARD_LSB ((uint32_t)0x00000020) |
| bogdanm | 85:024bf7f99721 | 187 | #define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030) |
| bogdanm | 85:024bf7f99721 | 188 | #define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0) |
| bogdanm | 85:024bf7f99721 | 189 | |
| bogdanm | 92:4fc01daae5a5 | 190 | #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \ |
| bogdanm | 85:024bf7f99721 | 191 | ((STANDARD) == I2S_STANDARD_MSB) || \ |
| bogdanm | 85:024bf7f99721 | 192 | ((STANDARD) == I2S_STANDARD_LSB) || \ |
| bogdanm | 85:024bf7f99721 | 193 | ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \ |
| bogdanm | 85:024bf7f99721 | 194 | ((STANDARD) == I2S_STANDARD_PCM_LONG)) |
| bogdanm | 85:024bf7f99721 | 195 | /** |
| bogdanm | 85:024bf7f99721 | 196 | * @} |
| bogdanm | 85:024bf7f99721 | 197 | */ |
| bogdanm | 85:024bf7f99721 | 198 | |
| bogdanm | 92:4fc01daae5a5 | 199 | /** @defgroup I2S_Data_Format I2S Data Format |
| bogdanm | 85:024bf7f99721 | 200 | * @{ |
| bogdanm | 85:024bf7f99721 | 201 | */ |
| bogdanm | 85:024bf7f99721 | 202 | #define I2S_DATAFORMAT_16B ((uint32_t)0x00000000) |
| bogdanm | 85:024bf7f99721 | 203 | #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001) |
| bogdanm | 85:024bf7f99721 | 204 | #define I2S_DATAFORMAT_24B ((uint32_t)0x00000003) |
| bogdanm | 85:024bf7f99721 | 205 | #define I2S_DATAFORMAT_32B ((uint32_t)0x00000005) |
| bogdanm | 85:024bf7f99721 | 206 | |
| bogdanm | 85:024bf7f99721 | 207 | #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \ |
| bogdanm | 85:024bf7f99721 | 208 | ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \ |
| bogdanm | 85:024bf7f99721 | 209 | ((FORMAT) == I2S_DATAFORMAT_24B) || \ |
| bogdanm | 85:024bf7f99721 | 210 | ((FORMAT) == I2S_DATAFORMAT_32B)) |
| bogdanm | 85:024bf7f99721 | 211 | /** |
| bogdanm | 85:024bf7f99721 | 212 | * @} |
| bogdanm | 85:024bf7f99721 | 213 | */ |
| bogdanm | 85:024bf7f99721 | 214 | |
| bogdanm | 92:4fc01daae5a5 | 215 | /** @defgroup I2S_MCLK_Output I2S MCLK Output |
| bogdanm | 85:024bf7f99721 | 216 | * @{ |
| bogdanm | 85:024bf7f99721 | 217 | */ |
| bogdanm | 85:024bf7f99721 | 218 | #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE) |
| bogdanm | 85:024bf7f99721 | 219 | #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000) |
| bogdanm | 85:024bf7f99721 | 220 | |
| bogdanm | 85:024bf7f99721 | 221 | #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \ |
| bogdanm | 85:024bf7f99721 | 222 | ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE)) |
| bogdanm | 85:024bf7f99721 | 223 | /** |
| bogdanm | 85:024bf7f99721 | 224 | * @} |
| bogdanm | 85:024bf7f99721 | 225 | */ |
| bogdanm | 85:024bf7f99721 | 226 | |
| bogdanm | 92:4fc01daae5a5 | 227 | /** @defgroup I2S_Audio_Frequency I2S Audio Frequency |
| bogdanm | 85:024bf7f99721 | 228 | * @{ |
| bogdanm | 85:024bf7f99721 | 229 | */ |
| bogdanm | 85:024bf7f99721 | 230 | #define I2S_AUDIOFREQ_192K ((uint32_t)192000) |
| bogdanm | 85:024bf7f99721 | 231 | #define I2S_AUDIOFREQ_96K ((uint32_t)96000) |
| bogdanm | 85:024bf7f99721 | 232 | #define I2S_AUDIOFREQ_48K ((uint32_t)48000) |
| bogdanm | 85:024bf7f99721 | 233 | #define I2S_AUDIOFREQ_44K ((uint32_t)44100) |
| bogdanm | 85:024bf7f99721 | 234 | #define I2S_AUDIOFREQ_32K ((uint32_t)32000) |
| bogdanm | 85:024bf7f99721 | 235 | #define I2S_AUDIOFREQ_22K ((uint32_t)22050) |
| bogdanm | 85:024bf7f99721 | 236 | #define I2S_AUDIOFREQ_16K ((uint32_t)16000) |
| bogdanm | 85:024bf7f99721 | 237 | #define I2S_AUDIOFREQ_11K ((uint32_t)11025) |
| bogdanm | 85:024bf7f99721 | 238 | #define I2S_AUDIOFREQ_8K ((uint32_t)8000) |
| bogdanm | 85:024bf7f99721 | 239 | #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2) |
| bogdanm | 85:024bf7f99721 | 240 | |
| bogdanm | 85:024bf7f99721 | 241 | #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \ |
| bogdanm | 85:024bf7f99721 | 242 | ((FREQ) <= I2S_AUDIOFREQ_192K)) || \ |
| bogdanm | 85:024bf7f99721 | 243 | ((FREQ) == I2S_AUDIOFREQ_DEFAULT)) |
| bogdanm | 85:024bf7f99721 | 244 | /** |
| bogdanm | 85:024bf7f99721 | 245 | * @} |
| bogdanm | 85:024bf7f99721 | 246 | */ |
| bogdanm | 85:024bf7f99721 | 247 | |
| bogdanm | 92:4fc01daae5a5 | 248 | /** @defgroup I2S_Clock_Polarity I2S Clock Polarity |
| bogdanm | 85:024bf7f99721 | 249 | * @{ |
| bogdanm | 85:024bf7f99721 | 250 | */ |
| bogdanm | 85:024bf7f99721 | 251 | #define I2S_CPOL_LOW ((uint32_t)0x00000000) |
| bogdanm | 85:024bf7f99721 | 252 | #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL) |
| bogdanm | 85:024bf7f99721 | 253 | |
| bogdanm | 85:024bf7f99721 | 254 | #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \ |
| bogdanm | 85:024bf7f99721 | 255 | ((CPOL) == I2S_CPOL_HIGH)) |
| bogdanm | 85:024bf7f99721 | 256 | /** |
| bogdanm | 85:024bf7f99721 | 257 | * @} |
| bogdanm | 85:024bf7f99721 | 258 | */ |
| bogdanm | 85:024bf7f99721 | 259 | |
| bogdanm | 92:4fc01daae5a5 | 260 | /** @defgroup I2S_Interrupt_configuration_definition I2S Interrupt configuration definition |
| bogdanm | 85:024bf7f99721 | 261 | * @{ |
| bogdanm | 85:024bf7f99721 | 262 | */ |
| bogdanm | 85:024bf7f99721 | 263 | #define I2S_IT_TXE SPI_CR2_TXEIE |
| bogdanm | 85:024bf7f99721 | 264 | #define I2S_IT_RXNE SPI_CR2_RXNEIE |
| bogdanm | 85:024bf7f99721 | 265 | #define I2S_IT_ERR SPI_CR2_ERRIE |
| bogdanm | 85:024bf7f99721 | 266 | /** |
| bogdanm | 85:024bf7f99721 | 267 | * @} |
| bogdanm | 85:024bf7f99721 | 268 | */ |
| bogdanm | 85:024bf7f99721 | 269 | |
| bogdanm | 92:4fc01daae5a5 | 270 | /** @defgroup I2S_Flag_definition I2S Flag definition |
| bogdanm | 85:024bf7f99721 | 271 | * @{ |
| bogdanm | 85:024bf7f99721 | 272 | */ |
| bogdanm | 85:024bf7f99721 | 273 | #define I2S_FLAG_TXE SPI_SR_TXE |
| bogdanm | 85:024bf7f99721 | 274 | #define I2S_FLAG_RXNE SPI_SR_RXNE |
| bogdanm | 85:024bf7f99721 | 275 | |
| bogdanm | 85:024bf7f99721 | 276 | #define I2S_FLAG_UDR SPI_SR_UDR |
| bogdanm | 85:024bf7f99721 | 277 | #define I2S_FLAG_OVR SPI_SR_OVR |
| bogdanm | 85:024bf7f99721 | 278 | #define I2S_FLAG_FRE SPI_SR_FRE |
| bogdanm | 85:024bf7f99721 | 279 | |
| bogdanm | 85:024bf7f99721 | 280 | #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE |
| bogdanm | 85:024bf7f99721 | 281 | #define I2S_FLAG_BSY SPI_SR_BSY |
| bogdanm | 85:024bf7f99721 | 282 | /** |
| bogdanm | 85:024bf7f99721 | 283 | * @} |
| bogdanm | 85:024bf7f99721 | 284 | */ |
| bogdanm | 85:024bf7f99721 | 285 | |
| bogdanm | 85:024bf7f99721 | 286 | /** |
| bogdanm | 85:024bf7f99721 | 287 | * @} |
| bogdanm | 85:024bf7f99721 | 288 | */ |
| bogdanm | 85:024bf7f99721 | 289 | |
| bogdanm | 85:024bf7f99721 | 290 | /* Exported macros -----------------------------------------------------------*/ |
| bogdanm | 92:4fc01daae5a5 | 291 | /** @defgroup I2S_Exported_macros I2S Exported Macros |
| bogdanm | 92:4fc01daae5a5 | 292 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 293 | */ |
| bogdanm | 85:024bf7f99721 | 294 | |
| bogdanm | 85:024bf7f99721 | 295 | /** @brief Reset I2S handle state |
| bogdanm | 85:024bf7f99721 | 296 | * @param __HANDLE__: I2S handle. |
| bogdanm | 85:024bf7f99721 | 297 | * @retval None |
| bogdanm | 85:024bf7f99721 | 298 | */ |
| bogdanm | 85:024bf7f99721 | 299 | #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) |
| bogdanm | 85:024bf7f99721 | 300 | |
| bogdanm | 85:024bf7f99721 | 301 | /** @brief Enable or disable the specified SPI peripheral (in I2S mode). |
| bogdanm | 85:024bf7f99721 | 302 | * @param __HANDLE__: specifies the I2S Handle. |
| bogdanm | 85:024bf7f99721 | 303 | * @retval None |
| bogdanm | 85:024bf7f99721 | 304 | */ |
| bogdanm | 85:024bf7f99721 | 305 | #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE) |
| bogdanm | 85:024bf7f99721 | 306 | #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= (uint16_t)(~SPI_I2SCFGR_I2SE)) |
| bogdanm | 85:024bf7f99721 | 307 | |
| bogdanm | 85:024bf7f99721 | 308 | /** @brief Enable or disable the specified I2S interrupts. |
| bogdanm | 85:024bf7f99721 | 309 | * @param __HANDLE__: specifies the I2S Handle. |
| bogdanm | 85:024bf7f99721 | 310 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
| bogdanm | 85:024bf7f99721 | 311 | * This parameter can be one of the following values: |
| bogdanm | 85:024bf7f99721 | 312 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
| bogdanm | 85:024bf7f99721 | 313 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
| bogdanm | 85:024bf7f99721 | 314 | * @arg I2S_IT_ERR: Error interrupt enable |
| bogdanm | 85:024bf7f99721 | 315 | * @retval None |
| bogdanm | 85:024bf7f99721 | 316 | */ |
| bogdanm | 85:024bf7f99721 | 317 | #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__)) |
| bogdanm | 85:024bf7f99721 | 318 | #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (uint16_t)(~(__INTERRUPT__))) |
| bogdanm | 85:024bf7f99721 | 319 | |
| bogdanm | 85:024bf7f99721 | 320 | /** @brief Checks if the specified I2S interrupt source is enabled or disabled. |
| bogdanm | 85:024bf7f99721 | 321 | * @param __HANDLE__: specifies the I2S Handle. |
| bogdanm | 85:024bf7f99721 | 322 | * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. |
| bogdanm | 85:024bf7f99721 | 323 | * @param __INTERRUPT__: specifies the I2S interrupt source to check. |
| bogdanm | 85:024bf7f99721 | 324 | * This parameter can be one of the following values: |
| bogdanm | 85:024bf7f99721 | 325 | * @arg I2S_IT_TXE: Tx buffer empty interrupt enable |
| bogdanm | 85:024bf7f99721 | 326 | * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable |
| bogdanm | 85:024bf7f99721 | 327 | * @arg I2S_IT_ERR: Error interrupt enable |
| bogdanm | 85:024bf7f99721 | 328 | * @retval The new state of __IT__ (TRUE or FALSE). |
| bogdanm | 85:024bf7f99721 | 329 | */ |
| bogdanm | 85:024bf7f99721 | 330 | #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| bogdanm | 85:024bf7f99721 | 331 | |
| bogdanm | 85:024bf7f99721 | 332 | /** @brief Checks whether the specified I2S flag is set or not. |
| bogdanm | 85:024bf7f99721 | 333 | * @param __HANDLE__: specifies the I2S Handle. |
| bogdanm | 85:024bf7f99721 | 334 | * @param __FLAG__: specifies the flag to check. |
| bogdanm | 85:024bf7f99721 | 335 | * This parameter can be one of the following values: |
| bogdanm | 85:024bf7f99721 | 336 | * @arg I2S_FLAG_RXNE: Receive buffer not empty flag |
| bogdanm | 85:024bf7f99721 | 337 | * @arg I2S_FLAG_TXE: Transmit buffer empty flag |
| bogdanm | 85:024bf7f99721 | 338 | * @arg I2S_FLAG_UDR: Underrun flag |
| bogdanm | 85:024bf7f99721 | 339 | * @arg I2S_FLAG_OVR: Overrun flag |
| bogdanm | 85:024bf7f99721 | 340 | * @arg I2S_FLAG_FRE: Frame error flag |
| bogdanm | 85:024bf7f99721 | 341 | * @arg I2S_FLAG_CHSIDE: Channel Side flag |
| bogdanm | 85:024bf7f99721 | 342 | * @arg I2S_FLAG_BSY: Busy flag |
| bogdanm | 85:024bf7f99721 | 343 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| bogdanm | 85:024bf7f99721 | 344 | */ |
| bogdanm | 85:024bf7f99721 | 345 | #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| bogdanm | 85:024bf7f99721 | 346 | |
| bogdanm | 85:024bf7f99721 | 347 | /** @brief Clears the I2S OVR pending flag. |
| bogdanm | 85:024bf7f99721 | 348 | * @param __HANDLE__: specifies the I2S Handle. |
| bogdanm | 85:024bf7f99721 | 349 | * @retval None |
| bogdanm | 85:024bf7f99721 | 350 | */ |
| Kojto | 93:e188a91d3eaa | 351 | #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \ |
| Kojto | 93:e188a91d3eaa | 352 | __IO uint32_t tmpreg; \ |
| Kojto | 93:e188a91d3eaa | 353 | tmpreg = (__HANDLE__)->Instance->DR; \ |
| Kojto | 93:e188a91d3eaa | 354 | tmpreg = (__HANDLE__)->Instance->SR; \ |
| Kojto | 93:e188a91d3eaa | 355 | UNUSED(tmpreg); \ |
| Kojto | 93:e188a91d3eaa | 356 | }while(0) |
| bogdanm | 85:024bf7f99721 | 357 | /** @brief Clears the I2S UDR pending flag. |
| bogdanm | 85:024bf7f99721 | 358 | * @param __HANDLE__: specifies the I2S Handle. |
| bogdanm | 85:024bf7f99721 | 359 | * @retval None |
| bogdanm | 85:024bf7f99721 | 360 | */ |
| Kojto | 93:e188a91d3eaa | 361 | #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\ |
| Kojto | 93:e188a91d3eaa | 362 | __IO uint32_t tmpreg;\ |
| Kojto | 93:e188a91d3eaa | 363 | tmpreg = ((__HANDLE__)->Instance->SR);\ |
| Kojto | 93:e188a91d3eaa | 364 | UNUSED(tmpreg); \ |
| Kojto | 93:e188a91d3eaa | 365 | }while(0) |
| bogdanm | 92:4fc01daae5a5 | 366 | /** |
| bogdanm | 92:4fc01daae5a5 | 367 | * @} |
| bogdanm | 92:4fc01daae5a5 | 368 | */ |
| bogdanm | 85:024bf7f99721 | 369 | |
| bogdanm | 85:024bf7f99721 | 370 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 92:4fc01daae5a5 | 371 | /** @addtogroup I2S_Exported_Functions |
| bogdanm | 92:4fc01daae5a5 | 372 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 373 | */ |
| bogdanm | 92:4fc01daae5a5 | 374 | |
| bogdanm | 92:4fc01daae5a5 | 375 | /** @addtogroup I2S_Exported_Functions_Group1 |
| bogdanm | 92:4fc01daae5a5 | 376 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 377 | */ |
| bogdanm | 85:024bf7f99721 | 378 | /* Initialization/de-initialization functions **********************************/ |
| bogdanm | 92:4fc01daae5a5 | 379 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); |
| bogdanm | 85:024bf7f99721 | 380 | HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s); |
| bogdanm | 85:024bf7f99721 | 381 | void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); |
| bogdanm | 85:024bf7f99721 | 382 | void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); |
| bogdanm | 92:4fc01daae5a5 | 383 | /** |
| bogdanm | 92:4fc01daae5a5 | 384 | * @} |
| bogdanm | 92:4fc01daae5a5 | 385 | */ |
| bogdanm | 85:024bf7f99721 | 386 | |
| bogdanm | 92:4fc01daae5a5 | 387 | /** @addtogroup I2S_Exported_Functions_Group2 |
| bogdanm | 92:4fc01daae5a5 | 388 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 389 | */ |
| bogdanm | 85:024bf7f99721 | 390 | /* I/O operation functions ***************************************************/ |
| bogdanm | 85:024bf7f99721 | 391 | /* Blocking mode: Polling */ |
| bogdanm | 85:024bf7f99721 | 392 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
| bogdanm | 85:024bf7f99721 | 393 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
| bogdanm | 85:024bf7f99721 | 394 | |
| bogdanm | 85:024bf7f99721 | 395 | /* Non-Blocking mode: Interrupt */ |
| bogdanm | 85:024bf7f99721 | 396 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| bogdanm | 85:024bf7f99721 | 397 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| bogdanm | 85:024bf7f99721 | 398 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); |
| bogdanm | 85:024bf7f99721 | 399 | |
| bogdanm | 85:024bf7f99721 | 400 | /* Non-Blocking mode: DMA */ |
| bogdanm | 85:024bf7f99721 | 401 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| bogdanm | 85:024bf7f99721 | 402 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| bogdanm | 85:024bf7f99721 | 403 | |
| bogdanm | 85:024bf7f99721 | 404 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); |
| bogdanm | 85:024bf7f99721 | 405 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); |
| bogdanm | 85:024bf7f99721 | 406 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); |
| bogdanm | 85:024bf7f99721 | 407 | |
| bogdanm | 85:024bf7f99721 | 408 | /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ |
| bogdanm | 85:024bf7f99721 | 409 | void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
| bogdanm | 85:024bf7f99721 | 410 | void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); |
| bogdanm | 85:024bf7f99721 | 411 | void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
| bogdanm | 85:024bf7f99721 | 412 | void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); |
| bogdanm | 85:024bf7f99721 | 413 | void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); |
| bogdanm | 92:4fc01daae5a5 | 414 | /** |
| bogdanm | 92:4fc01daae5a5 | 415 | * @} |
| bogdanm | 92:4fc01daae5a5 | 416 | */ |
| bogdanm | 92:4fc01daae5a5 | 417 | |
| bogdanm | 92:4fc01daae5a5 | 418 | /** @addtogroup I2S_Exported_Functions_Group3 |
| bogdanm | 92:4fc01daae5a5 | 419 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 420 | */ |
| bogdanm | 92:4fc01daae5a5 | 421 | /* Peripheral Control and State functions ************************************/ |
| bogdanm | 92:4fc01daae5a5 | 422 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); |
| Kojto | 93:e188a91d3eaa | 423 | uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); |
| bogdanm | 92:4fc01daae5a5 | 424 | /** |
| bogdanm | 92:4fc01daae5a5 | 425 | * @} |
| bogdanm | 92:4fc01daae5a5 | 426 | */ |
| bogdanm | 85:024bf7f99721 | 427 | |
| bogdanm | 85:024bf7f99721 | 428 | /** |
| bogdanm | 85:024bf7f99721 | 429 | * @} |
| bogdanm | 85:024bf7f99721 | 430 | */ |
| bogdanm | 85:024bf7f99721 | 431 | |
| bogdanm | 92:4fc01daae5a5 | 432 | |
| bogdanm | 85:024bf7f99721 | 433 | /** |
| bogdanm | 85:024bf7f99721 | 434 | * @} |
| bogdanm | 85:024bf7f99721 | 435 | */ |
| bogdanm | 85:024bf7f99721 | 436 | |
| bogdanm | 92:4fc01daae5a5 | 437 | /** |
| bogdanm | 92:4fc01daae5a5 | 438 | * @} |
| bogdanm | 92:4fc01daae5a5 | 439 | */ |
| bogdanm | 92:4fc01daae5a5 | 440 | #endif /* defined(STM32F031x6) || defined(STM32F038xx) || */ |
| bogdanm | 92:4fc01daae5a5 | 441 | /* defined(STM32F051x8) || defined(STM32F058xx) || */ |
| bogdanm | 92:4fc01daae5a5 | 442 | /* defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) ||*/ |
| bogdanm | 92:4fc01daae5a5 | 443 | /* defined(STM32F042x6) || defined(STM32F048xx) || */ |
| bogdanm | 92:4fc01daae5a5 | 444 | /* defined(STM32F091xC) || defined(STM32F098xx) */ |
| bogdanm | 85:024bf7f99721 | 445 | |
| bogdanm | 85:024bf7f99721 | 446 | #ifdef __cplusplus |
| bogdanm | 85:024bf7f99721 | 447 | } |
| bogdanm | 85:024bf7f99721 | 448 | #endif |
| bogdanm | 85:024bf7f99721 | 449 | |
| bogdanm | 85:024bf7f99721 | 450 | |
| bogdanm | 85:024bf7f99721 | 451 | #endif /* __STM32F0xx_HAL_I2S_H */ |
| bogdanm | 85:024bf7f99721 | 452 | |
| bogdanm | 85:024bf7f99721 | 453 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |