my fork

Dependents:   Nucleo_blueNRG

Fork of mbed by mbed official

Committer:
filartrix
Date:
Wed Apr 08 14:12:53 2015 +0000
Revision:
97:4298809c7c9e
Parent:
93:e188a91d3eaa
First reale BlueNRG module for nucleo 401 board

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 85:024bf7f99721 1 /**
bogdanm 85:024bf7f99721 2 ******************************************************************************
bogdanm 85:024bf7f99721 3 * @file stm32f0xx_hal_uart_ex.h
bogdanm 85:024bf7f99721 4 * @author MCD Application Team
Kojto 93:e188a91d3eaa 5 * @version V1.2.0
Kojto 93:e188a91d3eaa 6 * @date 11-December-2014
bogdanm 85:024bf7f99721 7 * @brief Header file of UART HAL Extension module.
bogdanm 85:024bf7f99721 8 ******************************************************************************
bogdanm 85:024bf7f99721 9 * @attention
bogdanm 85:024bf7f99721 10 *
bogdanm 85:024bf7f99721 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 85:024bf7f99721 12 *
bogdanm 85:024bf7f99721 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 85:024bf7f99721 14 * are permitted provided that the following conditions are met:
bogdanm 85:024bf7f99721 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 85:024bf7f99721 16 * this list of conditions and the following disclaimer.
bogdanm 85:024bf7f99721 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 85:024bf7f99721 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 85:024bf7f99721 19 * and/or other materials provided with the distribution.
bogdanm 85:024bf7f99721 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 85:024bf7f99721 21 * may be used to endorse or promote products derived from this software
bogdanm 85:024bf7f99721 22 * without specific prior written permission.
bogdanm 85:024bf7f99721 23 *
bogdanm 85:024bf7f99721 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 85:024bf7f99721 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 85:024bf7f99721 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 85:024bf7f99721 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 85:024bf7f99721 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 85:024bf7f99721 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 85:024bf7f99721 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 85:024bf7f99721 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 85:024bf7f99721 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 85:024bf7f99721 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 85:024bf7f99721 34 *
bogdanm 85:024bf7f99721 35 ******************************************************************************
bogdanm 85:024bf7f99721 36 */
bogdanm 85:024bf7f99721 37
bogdanm 85:024bf7f99721 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 85:024bf7f99721 39 #ifndef __STM32F0xx_HAL_UART_EX_H
bogdanm 85:024bf7f99721 40 #define __STM32F0xx_HAL_UART_EX_H
bogdanm 85:024bf7f99721 41
bogdanm 85:024bf7f99721 42 #ifdef __cplusplus
bogdanm 85:024bf7f99721 43 extern "C" {
bogdanm 85:024bf7f99721 44 #endif
bogdanm 85:024bf7f99721 45
bogdanm 85:024bf7f99721 46 /* Includes ------------------------------------------------------------------*/
bogdanm 85:024bf7f99721 47 #include "stm32f0xx_hal_def.h"
bogdanm 85:024bf7f99721 48
bogdanm 85:024bf7f99721 49 /** @addtogroup STM32F0xx_HAL_Driver
bogdanm 85:024bf7f99721 50 * @{
bogdanm 85:024bf7f99721 51 */
bogdanm 85:024bf7f99721 52
bogdanm 85:024bf7f99721 53 /** @addtogroup UARTEx
bogdanm 85:024bf7f99721 54 * @{
bogdanm 85:024bf7f99721 55 */
bogdanm 85:024bf7f99721 56
bogdanm 85:024bf7f99721 57 /* Exported types ------------------------------------------------------------*/
Kojto 93:e188a91d3eaa 58 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
Kojto 93:e188a91d3eaa 59 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types
Kojto 93:e188a91d3eaa 60 * @{
Kojto 93:e188a91d3eaa 61 */
Kojto 93:e188a91d3eaa 62
Kojto 93:e188a91d3eaa 63 /**
Kojto 93:e188a91d3eaa 64 * @brief UART wake up from stop mode parameters
Kojto 93:e188a91d3eaa 65 */
Kojto 93:e188a91d3eaa 66 typedef struct
Kojto 93:e188a91d3eaa 67 {
Kojto 93:e188a91d3eaa 68 uint32_t WakeUpEvent; /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF).
Kojto 93:e188a91d3eaa 69 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.
Kojto 93:e188a91d3eaa 70 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
Kojto 93:e188a91d3eaa 71 be filled up. */
Kojto 93:e188a91d3eaa 72
Kojto 93:e188a91d3eaa 73 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long.
Kojto 93:e188a91d3eaa 74 This parameter can be a value of @ref UART_WakeUp_Address_Length */
Kojto 93:e188a91d3eaa 75
Kojto 93:e188a91d3eaa 76 uint8_t Address; /*!< UART/USART node address (7-bit long max) */
Kojto 93:e188a91d3eaa 77 } UART_WakeUpTypeDef;
Kojto 93:e188a91d3eaa 78 /**
Kojto 93:e188a91d3eaa 79 * @}
Kojto 93:e188a91d3eaa 80 */
Kojto 93:e188a91d3eaa 81 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
Kojto 93:e188a91d3eaa 82
bogdanm 85:024bf7f99721 83 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 84 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
bogdanm 85:024bf7f99721 85 * @{
bogdanm 85:024bf7f99721 86 */
bogdanm 85:024bf7f99721 87
bogdanm 92:4fc01daae5a5 88 /** @defgroup UARTEx_Word_Length UARTEx Word Length
bogdanm 85:024bf7f99721 89 * @{
bogdanm 85:024bf7f99721 90 */
Kojto 93:e188a91d3eaa 91 #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
Kojto 93:e188a91d3eaa 92 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
Kojto 93:e188a91d3eaa 93 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
bogdanm 85:024bf7f99721 94 #define UART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1)
bogdanm 85:024bf7f99721 95 #define UART_WORDLENGTH_8B ((uint32_t)0x00000000)
bogdanm 85:024bf7f99721 96 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0)
bogdanm 85:024bf7f99721 97 #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_7B) || \
bogdanm 85:024bf7f99721 98 ((LENGTH) == UART_WORDLENGTH_8B) || \
bogdanm 85:024bf7f99721 99 ((LENGTH) == UART_WORDLENGTH_9B))
bogdanm 85:024bf7f99721 100 #else
bogdanm 85:024bf7f99721 101 #define UART_WORDLENGTH_8B ((uint32_t)0x00000000)
bogdanm 85:024bf7f99721 102 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
bogdanm 85:024bf7f99721 103 #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
bogdanm 85:024bf7f99721 104 ((LENGTH) == UART_WORDLENGTH_9B))
Kojto 93:e188a91d3eaa 105 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
Kojto 93:e188a91d3eaa 106 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
Kojto 93:e188a91d3eaa 107 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
bogdanm 85:024bf7f99721 108 /**
bogdanm 85:024bf7f99721 109 * @}
bogdanm 85:024bf7f99721 110 */
bogdanm 85:024bf7f99721 111
bogdanm 92:4fc01daae5a5 112 /** @defgroup UARTEx_AutoBaud_Rate_Mode UARTEx Advanced Feature AutoBaud Rate Mode
bogdanm 85:024bf7f99721 113 * @{
bogdanm 85:024bf7f99721 114 */
Kojto 93:e188a91d3eaa 115 #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
Kojto 93:e188a91d3eaa 116 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
Kojto 93:e188a91d3eaa 117 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
bogdanm 85:024bf7f99721 118 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x0000)
bogdanm 85:024bf7f99721 119 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0)
bogdanm 85:024bf7f99721 120 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1)
bogdanm 85:024bf7f99721 121 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE)
bogdanm 85:024bf7f99721 122 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(MODE) (((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
bogdanm 85:024bf7f99721 123 ((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \
bogdanm 85:024bf7f99721 124 ((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \
bogdanm 85:024bf7f99721 125 ((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
bogdanm 85:024bf7f99721 126 #else
bogdanm 85:024bf7f99721 127 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x0000)
bogdanm 85:024bf7f99721 128 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0)
bogdanm 85:024bf7f99721 129 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(MODE) (((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
bogdanm 85:024bf7f99721 130 ((MODE) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE))
Kojto 93:e188a91d3eaa 131 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
Kojto 93:e188a91d3eaa 132 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
Kojto 93:e188a91d3eaa 133 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
bogdanm 85:024bf7f99721 134 /**
bogdanm 85:024bf7f99721 135 * @}
bogdanm 85:024bf7f99721 136 */
bogdanm 85:024bf7f99721 137
bogdanm 85:024bf7f99721 138
Kojto 93:e188a91d3eaa 139 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm 92:4fc01daae5a5 140 /** @defgroup UARTEx_LIN UARTEx Local Interconnection Network mode
bogdanm 85:024bf7f99721 141 * @{
bogdanm 85:024bf7f99721 142 */
bogdanm 85:024bf7f99721 143 #define UART_LIN_DISABLE ((uint32_t)0x00000000)
bogdanm 85:024bf7f99721 144 #define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN)
bogdanm 85:024bf7f99721 145 #define IS_UART_LIN(LIN) (((LIN) == UART_LIN_DISABLE) || \
bogdanm 85:024bf7f99721 146 ((LIN) == UART_LIN_ENABLE))
bogdanm 85:024bf7f99721 147 /**
bogdanm 85:024bf7f99721 148 * @}
bogdanm 85:024bf7f99721 149 */
bogdanm 85:024bf7f99721 150
bogdanm 92:4fc01daae5a5 151 /** @defgroup UARTEx_LIN_Break_Detection UARTEx LIN Break Detection
bogdanm 85:024bf7f99721 152 * @{
bogdanm 85:024bf7f99721 153 */
bogdanm 85:024bf7f99721 154 #define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000)
bogdanm 85:024bf7f99721 155 #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
bogdanm 85:024bf7f99721 156 #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
bogdanm 85:024bf7f99721 157 ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
bogdanm 85:024bf7f99721 158 /**
bogdanm 85:024bf7f99721 159 * @}
bogdanm 85:024bf7f99721 160 */
Kojto 93:e188a91d3eaa 161 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm 85:024bf7f99721 162
bogdanm 92:4fc01daae5a5 163 /** @defgroup UART_Flags UARTEx Status Flags
bogdanm 85:024bf7f99721 164 * Elements values convention: 0xXXXX
bogdanm 85:024bf7f99721 165 * - 0xXXXX : Flag mask in the ISR register
bogdanm 85:024bf7f99721 166 * @{
bogdanm 85:024bf7f99721 167 */
bogdanm 85:024bf7f99721 168 #define UART_FLAG_REACK ((uint32_t)0x00400000)
bogdanm 85:024bf7f99721 169 #define UART_FLAG_TEACK ((uint32_t)0x00200000)
Kojto 93:e188a91d3eaa 170 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm 85:024bf7f99721 171 #define UART_FLAG_WUF ((uint32_t)0x00100000)
Kojto 93:e188a91d3eaa 172 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm 85:024bf7f99721 173 #define UART_FLAG_RWU ((uint32_t)0x00080000)
bogdanm 85:024bf7f99721 174 #define UART_FLAG_SBKF ((uint32_t)0x00040000
bogdanm 85:024bf7f99721 175 #define UART_FLAG_CMF ((uint32_t)0x00020000)
bogdanm 85:024bf7f99721 176 #define UART_FLAG_BUSY ((uint32_t)0x00010000)
bogdanm 85:024bf7f99721 177 #define UART_FLAG_ABRF ((uint32_t)0x00008000)
bogdanm 85:024bf7f99721 178 #define UART_FLAG_ABRE ((uint32_t)0x00004000)
Kojto 93:e188a91d3eaa 179 #if !defined(STM32F030x6) && !defined(STM32F030x8)
bogdanm 85:024bf7f99721 180 #define UART_FLAG_EOBF ((uint32_t)0x00001000)
bogdanm 85:024bf7f99721 181 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */
bogdanm 85:024bf7f99721 182 #define UART_FLAG_RTOF ((uint32_t)0x00000800)
bogdanm 85:024bf7f99721 183 #define UART_FLAG_CTS ((uint32_t)0x00000400)
bogdanm 85:024bf7f99721 184 #define UART_FLAG_CTSIF ((uint32_t)0x00000200)
Kojto 93:e188a91d3eaa 185 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm 85:024bf7f99721 186 #define UART_FLAG_LBDF ((uint32_t)0x00000100)
Kojto 93:e188a91d3eaa 187 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm 85:024bf7f99721 188 #define UART_FLAG_TXE ((uint32_t)0x00000080)
bogdanm 85:024bf7f99721 189 #define UART_FLAG_TC ((uint32_t)0x00000040)
bogdanm 85:024bf7f99721 190 #define UART_FLAG_RXNE ((uint32_t)0x00000020)
bogdanm 85:024bf7f99721 191 #define UART_FLAG_IDLE ((uint32_t)0x00000010)
bogdanm 85:024bf7f99721 192 #define UART_FLAG_ORE ((uint32_t)0x00000008)
bogdanm 85:024bf7f99721 193 #define UART_FLAG_NE ((uint32_t)0x00000004)
bogdanm 85:024bf7f99721 194 #define UART_FLAG_FE ((uint32_t)0x00000002)
bogdanm 85:024bf7f99721 195 #define UART_FLAG_PE ((uint32_t)0x00000001)
bogdanm 85:024bf7f99721 196 /**
bogdanm 85:024bf7f99721 197 * @}
bogdanm 85:024bf7f99721 198 */
bogdanm 85:024bf7f99721 199
bogdanm 92:4fc01daae5a5 200 /** @defgroup UART_Interrupt_definition UARTEx Interrupts Definition
Kojto 93:e188a91d3eaa 201 * Elements values convention: 0000ZZZZZ0XXYYYYYb
bogdanm 85:024bf7f99721 202 * - YYYYY : Interrupt source position in the XX register (5bits)
bogdanm 85:024bf7f99721 203 * - XX : Interrupt source register (2bits)
bogdanm 85:024bf7f99721 204 * - 01: CR1 register
bogdanm 85:024bf7f99721 205 * - 10: CR2 register
bogdanm 85:024bf7f99721 206 * - 11: CR3 register
Kojto 93:e188a91d3eaa 207 * - ZZZZZ : Flag position in the ISR register(5bits)
bogdanm 85:024bf7f99721 208 * @{
bogdanm 85:024bf7f99721 209 */
bogdanm 85:024bf7f99721 210 #define UART_IT_PE ((uint16_t)0x0028)
bogdanm 85:024bf7f99721 211 #define UART_IT_TXE ((uint16_t)0x0727)
bogdanm 85:024bf7f99721 212 #define UART_IT_TC ((uint16_t)0x0626)
bogdanm 85:024bf7f99721 213 #define UART_IT_RXNE ((uint16_t)0x0525)
bogdanm 85:024bf7f99721 214 #define UART_IT_IDLE ((uint16_t)0x0424)
Kojto 93:e188a91d3eaa 215 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm 85:024bf7f99721 216 #define UART_IT_LBD ((uint16_t)0x0846)
Kojto 93:e188a91d3eaa 217 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm 85:024bf7f99721 218 #define UART_IT_CTS ((uint16_t)0x096A)
Kojto 93:e188a91d3eaa 219 #define UART_IT_CM ((uint16_t)0x112E)
Kojto 93:e188a91d3eaa 220 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm 85:024bf7f99721 221 #define UART_IT_WUF ((uint16_t)0x1476)
Kojto 93:e188a91d3eaa 222 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm 85:024bf7f99721 223 /**
bogdanm 85:024bf7f99721 224 * @}
bogdanm 85:024bf7f99721 225 */
bogdanm 85:024bf7f99721 226
bogdanm 85:024bf7f99721 227
bogdanm 92:4fc01daae5a5 228 /** @defgroup UART_IT_CLEAR_Flags UARTEx Interruption Clear Flags
bogdanm 85:024bf7f99721 229 * @{
bogdanm 85:024bf7f99721 230 */
bogdanm 85:024bf7f99721 231 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
bogdanm 85:024bf7f99721 232 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
bogdanm 85:024bf7f99721 233 #define UART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
bogdanm 85:024bf7f99721 234 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
bogdanm 85:024bf7f99721 235 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
bogdanm 85:024bf7f99721 236 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
Kojto 93:e188a91d3eaa 237 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm 85:024bf7f99721 238 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag (not available on F030xx devices)*/
Kojto 93:e188a91d3eaa 239 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm 85:024bf7f99721 240 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
bogdanm 85:024bf7f99721 241 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< Receiver Time Out Clear Flag */
bogdanm 85:024bf7f99721 242 #define UART_CLEAR_EOBF USART_ICR_EOBCF /*!< End Of Block Clear Flag */
bogdanm 85:024bf7f99721 243 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */
Kojto 93:e188a91d3eaa 244 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm 85:024bf7f99721 245 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */
Kojto 93:e188a91d3eaa 246 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm 85:024bf7f99721 247 /**
bogdanm 85:024bf7f99721 248 * @}
bogdanm 85:024bf7f99721 249 */
bogdanm 85:024bf7f99721 250
bogdanm 92:4fc01daae5a5 251 /** @defgroup UART_Request_Parameters UARTEx Request Parameters
bogdanm 85:024bf7f99721 252 * @{
bogdanm 85:024bf7f99721 253 */
bogdanm 85:024bf7f99721 254 #define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */
bogdanm 85:024bf7f99721 255 #define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /*!< Send Break Request */
bogdanm 85:024bf7f99721 256 #define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /*!< Mute Mode Request */
bogdanm 85:024bf7f99721 257 #define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
bogdanm 85:024bf7f99721 258 #if !defined(STM32F030x6) && !defined(STM32F030x8)
bogdanm 85:024bf7f99721 259 #define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
bogdanm 85:024bf7f99721 260 #define IS_UART_REQUEST_PARAMETER(PARAM) (((PARAM) == UART_AUTOBAUD_REQUEST) || \
bogdanm 85:024bf7f99721 261 ((PARAM) == UART_SENDBREAK_REQUEST) || \
bogdanm 85:024bf7f99721 262 ((PARAM) == UART_MUTE_MODE_REQUEST) || \
bogdanm 85:024bf7f99721 263 ((PARAM) == UART_RXDATA_FLUSH_REQUEST) || \
bogdanm 85:024bf7f99721 264 ((PARAM) == UART_TXDATA_FLUSH_REQUEST))
bogdanm 85:024bf7f99721 265 #else
bogdanm 85:024bf7f99721 266 #define IS_UART_REQUEST_PARAMETER(PARAM) (((PARAM) == UART_AUTOBAUD_REQUEST) || \
bogdanm 85:024bf7f99721 267 ((PARAM) == UART_SENDBREAK_REQUEST) || \
bogdanm 85:024bf7f99721 268 ((PARAM) == UART_MUTE_MODE_REQUEST) || \
bogdanm 85:024bf7f99721 269 ((PARAM) == UART_RXDATA_FLUSH_REQUEST))
bogdanm 85:024bf7f99721 270 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */
bogdanm 85:024bf7f99721 271 /**
bogdanm 85:024bf7f99721 272 * @}
bogdanm 85:024bf7f99721 273 */
bogdanm 85:024bf7f99721 274
Kojto 93:e188a91d3eaa 275 #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm 92:4fc01daae5a5 276 /** @defgroup UART_Stop_Mode_Enable UARTEx Advanced Feature Stop Mode Enable
bogdanm 85:024bf7f99721 277 * @{
bogdanm 85:024bf7f99721 278 */
bogdanm 85:024bf7f99721 279 #define UART_ADVFEATURE_STOPMODE_DISABLE ((uint32_t)0x00000000)
bogdanm 85:024bf7f99721 280 #define UART_ADVFEATURE_STOPMODE_ENABLE ((uint32_t)USART_CR1_UESM)
bogdanm 85:024bf7f99721 281 #define IS_UART_ADVFEATURE_STOPMODE(STOPMODE) (((STOPMODE) == UART_ADVFEATURE_STOPMODE_DISABLE) || \
bogdanm 85:024bf7f99721 282 ((STOPMODE) == UART_ADVFEATURE_STOPMODE_ENABLE))
bogdanm 85:024bf7f99721 283 /**
bogdanm 85:024bf7f99721 284 * @}
bogdanm 85:024bf7f99721 285 */
bogdanm 85:024bf7f99721 286
bogdanm 85:024bf7f99721 287 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
bogdanm 85:024bf7f99721 288 * @{
bogdanm 85:024bf7f99721 289 */
bogdanm 85:024bf7f99721 290 #define UART_WAKEUP_ON_ADDRESS ((uint32_t)0x0000)
bogdanm 85:024bf7f99721 291 #define UART_WAKEUP_ON_STARTBIT ((uint32_t)USART_CR3_WUS_1)
bogdanm 85:024bf7f99721 292 #define UART_WAKEUP_ON_READDATA_NONEMPTY ((uint32_t)USART_CR3_WUS)
bogdanm 85:024bf7f99721 293 #define IS_UART_WAKEUP_SELECTION(WAKE) (((WAKE) == UART_WAKEUP_ON_ADDRESS) || \
bogdanm 85:024bf7f99721 294 ((WAKE) == UART_WAKEUP_ON_STARTBIT) || \
bogdanm 85:024bf7f99721 295 ((WAKE) == UART_WAKEUP_ON_READDATA_NONEMPTY))
bogdanm 85:024bf7f99721 296 /**
bogdanm 85:024bf7f99721 297 * @}
bogdanm 85:024bf7f99721 298 */
Kojto 93:e188a91d3eaa 299 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm 85:024bf7f99721 300
bogdanm 85:024bf7f99721 301 /**
bogdanm 85:024bf7f99721 302 * @}
bogdanm 85:024bf7f99721 303 */
bogdanm 85:024bf7f99721 304
bogdanm 85:024bf7f99721 305 /* Exported macro ------------------------------------------------------------*/
bogdanm 85:024bf7f99721 306
bogdanm 92:4fc01daae5a5 307 /** @defgroup UARTEx_Exported_Macros UARTEx Exported Macros
bogdanm 85:024bf7f99721 308 * @{
bogdanm 85:024bf7f99721 309 */
bogdanm 85:024bf7f99721 310
bogdanm 85:024bf7f99721 311 /** @brief Reports the UART clock source.
bogdanm 85:024bf7f99721 312 * @param __HANDLE__: specifies the UART Handle
bogdanm 85:024bf7f99721 313 * @param __CLOCKSOURCE__ : output variable
bogdanm 85:024bf7f99721 314 * @retval UART clocking source, written in __CLOCKSOURCE__.
bogdanm 85:024bf7f99721 315 */
bogdanm 85:024bf7f99721 316
bogdanm 85:024bf7f99721 317
bogdanm 85:024bf7f99721 318 #if defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx)
bogdanm 85:024bf7f99721 319 #define __HAL_UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm 85:024bf7f99721 320 do { \
bogdanm 85:024bf7f99721 321 switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm 85:024bf7f99721 322 { \
bogdanm 85:024bf7f99721 323 case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm 85:024bf7f99721 324 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 85:024bf7f99721 325 break; \
bogdanm 85:024bf7f99721 326 case RCC_USART1CLKSOURCE_HSI: \
bogdanm 85:024bf7f99721 327 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm 85:024bf7f99721 328 break; \
bogdanm 85:024bf7f99721 329 case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm 85:024bf7f99721 330 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm 85:024bf7f99721 331 break; \
bogdanm 85:024bf7f99721 332 case RCC_USART1CLKSOURCE_LSE: \
bogdanm 85:024bf7f99721 333 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm 85:024bf7f99721 334 break; \
bogdanm 85:024bf7f99721 335 default: \
bogdanm 85:024bf7f99721 336 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm 85:024bf7f99721 337 break; \
bogdanm 85:024bf7f99721 338 } \
bogdanm 85:024bf7f99721 339 } while(0)
Kojto 93:e188a91d3eaa 340 #elif defined (STM32F030x8) || defined (STM32F070x6) || \
bogdanm 85:024bf7f99721 341 defined (STM32F042x6) || defined (STM32F048xx) || \
bogdanm 85:024bf7f99721 342 defined (STM32F051x8) || defined (STM32F058xx)
bogdanm 85:024bf7f99721 343 #define __HAL_UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm 85:024bf7f99721 344 do { \
bogdanm 85:024bf7f99721 345 if((__HANDLE__)->Instance == USART1) \
bogdanm 85:024bf7f99721 346 { \
bogdanm 85:024bf7f99721 347 switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm 85:024bf7f99721 348 { \
bogdanm 85:024bf7f99721 349 case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm 85:024bf7f99721 350 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 85:024bf7f99721 351 break; \
bogdanm 85:024bf7f99721 352 case RCC_USART1CLKSOURCE_HSI: \
bogdanm 85:024bf7f99721 353 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm 85:024bf7f99721 354 break; \
bogdanm 85:024bf7f99721 355 case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm 85:024bf7f99721 356 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm 85:024bf7f99721 357 break; \
bogdanm 85:024bf7f99721 358 case RCC_USART1CLKSOURCE_LSE: \
bogdanm 85:024bf7f99721 359 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm 85:024bf7f99721 360 break; \
bogdanm 85:024bf7f99721 361 default: \
bogdanm 85:024bf7f99721 362 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm 85:024bf7f99721 363 break; \
bogdanm 85:024bf7f99721 364 } \
bogdanm 85:024bf7f99721 365 } \
bogdanm 85:024bf7f99721 366 else if((__HANDLE__)->Instance == USART2) \
bogdanm 85:024bf7f99721 367 { \
bogdanm 85:024bf7f99721 368 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 85:024bf7f99721 369 } \
bogdanm 85:024bf7f99721 370 else \
bogdanm 85:024bf7f99721 371 { \
bogdanm 85:024bf7f99721 372 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm 85:024bf7f99721 373 } \
bogdanm 85:024bf7f99721 374 } while(0)
Kojto 93:e188a91d3eaa 375 #elif defined(STM32F070xB)
Kojto 93:e188a91d3eaa 376 #define __HAL_UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
Kojto 93:e188a91d3eaa 377 do { \
Kojto 93:e188a91d3eaa 378 if((__HANDLE__)->Instance == USART1) \
Kojto 93:e188a91d3eaa 379 { \
Kojto 93:e188a91d3eaa 380 switch(__HAL_RCC_GET_USART1_SOURCE()) \
Kojto 93:e188a91d3eaa 381 { \
Kojto 93:e188a91d3eaa 382 case RCC_USART1CLKSOURCE_PCLK1: \
Kojto 93:e188a91d3eaa 383 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto 93:e188a91d3eaa 384 break; \
Kojto 93:e188a91d3eaa 385 case RCC_USART1CLKSOURCE_HSI: \
Kojto 93:e188a91d3eaa 386 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
Kojto 93:e188a91d3eaa 387 break; \
Kojto 93:e188a91d3eaa 388 case RCC_USART1CLKSOURCE_SYSCLK: \
Kojto 93:e188a91d3eaa 389 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
Kojto 93:e188a91d3eaa 390 break; \
Kojto 93:e188a91d3eaa 391 case RCC_USART1CLKSOURCE_LSE: \
Kojto 93:e188a91d3eaa 392 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
Kojto 93:e188a91d3eaa 393 break; \
Kojto 93:e188a91d3eaa 394 default: \
Kojto 93:e188a91d3eaa 395 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
Kojto 93:e188a91d3eaa 396 break; \
Kojto 93:e188a91d3eaa 397 } \
Kojto 93:e188a91d3eaa 398 } \
Kojto 93:e188a91d3eaa 399 else if((__HANDLE__)->Instance == USART2) \
Kojto 93:e188a91d3eaa 400 { \
Kojto 93:e188a91d3eaa 401 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto 93:e188a91d3eaa 402 } \
Kojto 93:e188a91d3eaa 403 else if((__HANDLE__)->Instance == USART3) \
Kojto 93:e188a91d3eaa 404 { \
Kojto 93:e188a91d3eaa 405 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto 93:e188a91d3eaa 406 } \
Kojto 93:e188a91d3eaa 407 else if((__HANDLE__)->Instance == USART4) \
Kojto 93:e188a91d3eaa 408 { \
Kojto 93:e188a91d3eaa 409 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto 93:e188a91d3eaa 410 } \
Kojto 93:e188a91d3eaa 411 else \
Kojto 93:e188a91d3eaa 412 { \
Kojto 93:e188a91d3eaa 413 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
Kojto 93:e188a91d3eaa 414 } \
Kojto 93:e188a91d3eaa 415 } while(0)
bogdanm 85:024bf7f99721 416 #elif defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)
bogdanm 85:024bf7f99721 417 #define __HAL_UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm 85:024bf7f99721 418 do { \
bogdanm 85:024bf7f99721 419 if((__HANDLE__)->Instance == USART1) \
bogdanm 85:024bf7f99721 420 { \
bogdanm 85:024bf7f99721 421 switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm 85:024bf7f99721 422 { \
bogdanm 85:024bf7f99721 423 case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm 85:024bf7f99721 424 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 85:024bf7f99721 425 break; \
bogdanm 85:024bf7f99721 426 case RCC_USART1CLKSOURCE_HSI: \
bogdanm 85:024bf7f99721 427 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm 85:024bf7f99721 428 break; \
bogdanm 85:024bf7f99721 429 case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm 85:024bf7f99721 430 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm 85:024bf7f99721 431 break; \
bogdanm 85:024bf7f99721 432 case RCC_USART1CLKSOURCE_LSE: \
bogdanm 85:024bf7f99721 433 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm 85:024bf7f99721 434 break; \
bogdanm 85:024bf7f99721 435 default: \
bogdanm 85:024bf7f99721 436 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm 85:024bf7f99721 437 break; \
bogdanm 85:024bf7f99721 438 } \
bogdanm 85:024bf7f99721 439 } \
bogdanm 85:024bf7f99721 440 else if((__HANDLE__)->Instance == USART2) \
bogdanm 85:024bf7f99721 441 { \
bogdanm 85:024bf7f99721 442 switch(__HAL_RCC_GET_USART2_SOURCE()) \
bogdanm 85:024bf7f99721 443 { \
bogdanm 85:024bf7f99721 444 case RCC_USART2CLKSOURCE_PCLK1: \
bogdanm 85:024bf7f99721 445 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 85:024bf7f99721 446 break; \
bogdanm 85:024bf7f99721 447 case RCC_USART2CLKSOURCE_HSI: \
bogdanm 85:024bf7f99721 448 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm 85:024bf7f99721 449 break; \
bogdanm 85:024bf7f99721 450 case RCC_USART2CLKSOURCE_SYSCLK: \
bogdanm 85:024bf7f99721 451 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm 85:024bf7f99721 452 break; \
bogdanm 85:024bf7f99721 453 case RCC_USART2CLKSOURCE_LSE: \
bogdanm 85:024bf7f99721 454 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm 85:024bf7f99721 455 break; \
bogdanm 85:024bf7f99721 456 default: \
bogdanm 85:024bf7f99721 457 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm 85:024bf7f99721 458 break; \
bogdanm 85:024bf7f99721 459 } \
bogdanm 85:024bf7f99721 460 } \
bogdanm 85:024bf7f99721 461 else if((__HANDLE__)->Instance == USART3) \
bogdanm 85:024bf7f99721 462 { \
bogdanm 85:024bf7f99721 463 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 85:024bf7f99721 464 } \
bogdanm 85:024bf7f99721 465 else if((__HANDLE__)->Instance == USART4) \
bogdanm 85:024bf7f99721 466 { \
bogdanm 85:024bf7f99721 467 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 85:024bf7f99721 468 } \
bogdanm 85:024bf7f99721 469 else \
bogdanm 85:024bf7f99721 470 { \
bogdanm 85:024bf7f99721 471 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm 85:024bf7f99721 472 } \
bogdanm 85:024bf7f99721 473 } while(0)
bogdanm 92:4fc01daae5a5 474 #elif defined(STM32F091xC) || defined (STM32F098xx)
bogdanm 92:4fc01daae5a5 475 #define __HAL_UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm 92:4fc01daae5a5 476 do { \
bogdanm 92:4fc01daae5a5 477 if((__HANDLE__)->Instance == USART1) \
bogdanm 92:4fc01daae5a5 478 { \
bogdanm 92:4fc01daae5a5 479 switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm 92:4fc01daae5a5 480 { \
bogdanm 92:4fc01daae5a5 481 case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm 92:4fc01daae5a5 482 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 92:4fc01daae5a5 483 break; \
bogdanm 92:4fc01daae5a5 484 case RCC_USART1CLKSOURCE_HSI: \
bogdanm 92:4fc01daae5a5 485 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm 92:4fc01daae5a5 486 break; \
bogdanm 92:4fc01daae5a5 487 case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm 92:4fc01daae5a5 488 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm 92:4fc01daae5a5 489 break; \
bogdanm 92:4fc01daae5a5 490 case RCC_USART1CLKSOURCE_LSE: \
bogdanm 92:4fc01daae5a5 491 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm 92:4fc01daae5a5 492 break; \
bogdanm 92:4fc01daae5a5 493 default: \
bogdanm 92:4fc01daae5a5 494 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm 92:4fc01daae5a5 495 break; \
bogdanm 92:4fc01daae5a5 496 } \
bogdanm 92:4fc01daae5a5 497 } \
bogdanm 92:4fc01daae5a5 498 else if((__HANDLE__)->Instance == USART2) \
bogdanm 92:4fc01daae5a5 499 { \
bogdanm 92:4fc01daae5a5 500 switch(__HAL_RCC_GET_USART2_SOURCE()) \
bogdanm 92:4fc01daae5a5 501 { \
bogdanm 92:4fc01daae5a5 502 case RCC_USART2CLKSOURCE_PCLK1: \
bogdanm 92:4fc01daae5a5 503 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 92:4fc01daae5a5 504 break; \
bogdanm 92:4fc01daae5a5 505 case RCC_USART2CLKSOURCE_HSI: \
bogdanm 92:4fc01daae5a5 506 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm 92:4fc01daae5a5 507 break; \
bogdanm 92:4fc01daae5a5 508 case RCC_USART2CLKSOURCE_SYSCLK: \
bogdanm 92:4fc01daae5a5 509 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm 92:4fc01daae5a5 510 break; \
bogdanm 92:4fc01daae5a5 511 case RCC_USART2CLKSOURCE_LSE: \
bogdanm 92:4fc01daae5a5 512 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm 92:4fc01daae5a5 513 break; \
bogdanm 92:4fc01daae5a5 514 default: \
bogdanm 92:4fc01daae5a5 515 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm 92:4fc01daae5a5 516 break; \
bogdanm 92:4fc01daae5a5 517 } \
bogdanm 92:4fc01daae5a5 518 } \
bogdanm 92:4fc01daae5a5 519 else if((__HANDLE__)->Instance == USART3) \
bogdanm 92:4fc01daae5a5 520 { \
bogdanm 92:4fc01daae5a5 521 switch(__HAL_RCC_GET_USART3_SOURCE()) \
bogdanm 92:4fc01daae5a5 522 { \
bogdanm 92:4fc01daae5a5 523 case RCC_USART3CLKSOURCE_PCLK1: \
bogdanm 92:4fc01daae5a5 524 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 92:4fc01daae5a5 525 break; \
bogdanm 92:4fc01daae5a5 526 case RCC_USART3CLKSOURCE_HSI: \
bogdanm 92:4fc01daae5a5 527 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm 92:4fc01daae5a5 528 break; \
bogdanm 92:4fc01daae5a5 529 case RCC_USART3CLKSOURCE_SYSCLK: \
bogdanm 92:4fc01daae5a5 530 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm 92:4fc01daae5a5 531 break; \
bogdanm 92:4fc01daae5a5 532 case RCC_USART3CLKSOURCE_LSE: \
bogdanm 92:4fc01daae5a5 533 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm 92:4fc01daae5a5 534 break; \
bogdanm 92:4fc01daae5a5 535 default: \
bogdanm 92:4fc01daae5a5 536 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm 92:4fc01daae5a5 537 break; \
bogdanm 92:4fc01daae5a5 538 } \
bogdanm 92:4fc01daae5a5 539 } \
bogdanm 92:4fc01daae5a5 540 else if((__HANDLE__)->Instance == USART4) \
bogdanm 92:4fc01daae5a5 541 { \
bogdanm 92:4fc01daae5a5 542 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 92:4fc01daae5a5 543 } \
bogdanm 92:4fc01daae5a5 544 else if((__HANDLE__)->Instance == USART5) \
bogdanm 92:4fc01daae5a5 545 { \
bogdanm 92:4fc01daae5a5 546 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 92:4fc01daae5a5 547 } \
bogdanm 92:4fc01daae5a5 548 else if((__HANDLE__)->Instance == USART6) \
bogdanm 92:4fc01daae5a5 549 { \
bogdanm 92:4fc01daae5a5 550 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 92:4fc01daae5a5 551 } \
bogdanm 92:4fc01daae5a5 552 else if((__HANDLE__)->Instance == USART7) \
bogdanm 92:4fc01daae5a5 553 { \
bogdanm 92:4fc01daae5a5 554 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 92:4fc01daae5a5 555 } \
bogdanm 92:4fc01daae5a5 556 else if((__HANDLE__)->Instance == USART8) \
bogdanm 92:4fc01daae5a5 557 { \
bogdanm 92:4fc01daae5a5 558 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm 92:4fc01daae5a5 559 } \
bogdanm 92:4fc01daae5a5 560 else \
bogdanm 92:4fc01daae5a5 561 { \
bogdanm 92:4fc01daae5a5 562 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm 92:4fc01daae5a5 563 } \
bogdanm 92:4fc01daae5a5 564 } while(0)
Kojto 93:e188a91d3eaa 565 #elif defined(STM32F030xC)
Kojto 93:e188a91d3eaa 566 #define __HAL_UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
Kojto 93:e188a91d3eaa 567 do { \
Kojto 93:e188a91d3eaa 568 if((__HANDLE__)->Instance == USART1) \
Kojto 93:e188a91d3eaa 569 { \
Kojto 93:e188a91d3eaa 570 switch(__HAL_RCC_GET_USART1_SOURCE()) \
Kojto 93:e188a91d3eaa 571 { \
Kojto 93:e188a91d3eaa 572 case RCC_USART1CLKSOURCE_PCLK1: \
Kojto 93:e188a91d3eaa 573 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto 93:e188a91d3eaa 574 break; \
Kojto 93:e188a91d3eaa 575 case RCC_USART1CLKSOURCE_HSI: \
Kojto 93:e188a91d3eaa 576 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
Kojto 93:e188a91d3eaa 577 break; \
Kojto 93:e188a91d3eaa 578 case RCC_USART1CLKSOURCE_SYSCLK: \
Kojto 93:e188a91d3eaa 579 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
Kojto 93:e188a91d3eaa 580 break; \
Kojto 93:e188a91d3eaa 581 case RCC_USART1CLKSOURCE_LSE: \
Kojto 93:e188a91d3eaa 582 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
Kojto 93:e188a91d3eaa 583 break; \
Kojto 93:e188a91d3eaa 584 default: \
Kojto 93:e188a91d3eaa 585 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
Kojto 93:e188a91d3eaa 586 break; \
Kojto 93:e188a91d3eaa 587 } \
Kojto 93:e188a91d3eaa 588 } \
Kojto 93:e188a91d3eaa 589 else if((__HANDLE__)->Instance == USART2) \
Kojto 93:e188a91d3eaa 590 { \
Kojto 93:e188a91d3eaa 591 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto 93:e188a91d3eaa 592 } \
Kojto 93:e188a91d3eaa 593 else if((__HANDLE__)->Instance == USART3) \
Kojto 93:e188a91d3eaa 594 { \
Kojto 93:e188a91d3eaa 595 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto 93:e188a91d3eaa 596 } \
Kojto 93:e188a91d3eaa 597 else if((__HANDLE__)->Instance == USART4) \
Kojto 93:e188a91d3eaa 598 { \
Kojto 93:e188a91d3eaa 599 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto 93:e188a91d3eaa 600 } \
Kojto 93:e188a91d3eaa 601 else if((__HANDLE__)->Instance == USART5) \
Kojto 93:e188a91d3eaa 602 { \
Kojto 93:e188a91d3eaa 603 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto 93:e188a91d3eaa 604 } \
Kojto 93:e188a91d3eaa 605 else if((__HANDLE__)->Instance == USART6) \
Kojto 93:e188a91d3eaa 606 { \
Kojto 93:e188a91d3eaa 607 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
Kojto 93:e188a91d3eaa 608 } \
Kojto 93:e188a91d3eaa 609 else \
Kojto 93:e188a91d3eaa 610 { \
Kojto 93:e188a91d3eaa 611 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
Kojto 93:e188a91d3eaa 612 } \
Kojto 93:e188a91d3eaa 613 } while(0)
bogdanm 92:4fc01daae5a5 614
bogdanm 85:024bf7f99721 615 #endif /* defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F038xx) */
bogdanm 85:024bf7f99721 616
bogdanm 85:024bf7f99721 617
bogdanm 85:024bf7f99721 618 /** @brief Computes the UART mask to apply to retrieve the received data
bogdanm 85:024bf7f99721 619 * according to the word length and to the parity bits activation.
bogdanm 85:024bf7f99721 620 * If PCE = 1, the parity bit is not included in the data extracted
bogdanm 85:024bf7f99721 621 * by the reception API().
bogdanm 85:024bf7f99721 622 * This masking operation is not carried out in the case of
bogdanm 85:024bf7f99721 623 * DMA transfers.
bogdanm 85:024bf7f99721 624 * @param __HANDLE__: specifies the UART Handle
bogdanm 85:024bf7f99721 625 * @retval none
bogdanm 85:024bf7f99721 626 */
Kojto 93:e188a91d3eaa 627 #if defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
Kojto 93:e188a91d3eaa 628 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
Kojto 93:e188a91d3eaa 629 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC)
bogdanm 85:024bf7f99721 630 #define __HAL_UART_MASK_COMPUTATION(__HANDLE__) \
bogdanm 85:024bf7f99721 631 do { \
bogdanm 85:024bf7f99721 632 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
bogdanm 85:024bf7f99721 633 { \
bogdanm 85:024bf7f99721 634 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm 85:024bf7f99721 635 { \
bogdanm 85:024bf7f99721 636 (__HANDLE__)->Mask = 0x01FF ; \
bogdanm 85:024bf7f99721 637 } \
bogdanm 85:024bf7f99721 638 else \
bogdanm 85:024bf7f99721 639 { \
bogdanm 85:024bf7f99721 640 (__HANDLE__)->Mask = 0x00FF ; \
bogdanm 85:024bf7f99721 641 } \
bogdanm 85:024bf7f99721 642 } \
bogdanm 85:024bf7f99721 643 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
bogdanm 85:024bf7f99721 644 { \
bogdanm 85:024bf7f99721 645 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm 85:024bf7f99721 646 { \
bogdanm 85:024bf7f99721 647 (__HANDLE__)->Mask = 0x00FF ; \
bogdanm 85:024bf7f99721 648 } \
bogdanm 85:024bf7f99721 649 else \
bogdanm 85:024bf7f99721 650 { \
bogdanm 85:024bf7f99721 651 (__HANDLE__)->Mask = 0x007F ; \
bogdanm 85:024bf7f99721 652 } \
bogdanm 85:024bf7f99721 653 } \
bogdanm 85:024bf7f99721 654 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
bogdanm 85:024bf7f99721 655 { \
bogdanm 85:024bf7f99721 656 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm 85:024bf7f99721 657 { \
bogdanm 85:024bf7f99721 658 (__HANDLE__)->Mask = 0x007F ; \
bogdanm 85:024bf7f99721 659 } \
bogdanm 85:024bf7f99721 660 else \
bogdanm 85:024bf7f99721 661 { \
bogdanm 85:024bf7f99721 662 (__HANDLE__)->Mask = 0x003F ; \
bogdanm 85:024bf7f99721 663 } \
bogdanm 85:024bf7f99721 664 } \
bogdanm 85:024bf7f99721 665 } while(0)
bogdanm 85:024bf7f99721 666 #else
bogdanm 85:024bf7f99721 667 #define __HAL_UART_MASK_COMPUTATION(__HANDLE__) \
bogdanm 85:024bf7f99721 668 do { \
bogdanm 85:024bf7f99721 669 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
bogdanm 85:024bf7f99721 670 { \
bogdanm 85:024bf7f99721 671 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm 85:024bf7f99721 672 { \
bogdanm 85:024bf7f99721 673 (__HANDLE__)->Mask = 0x01FF ; \
bogdanm 85:024bf7f99721 674 } \
bogdanm 85:024bf7f99721 675 else \
bogdanm 85:024bf7f99721 676 { \
bogdanm 85:024bf7f99721 677 (__HANDLE__)->Mask = 0x00FF ; \
bogdanm 85:024bf7f99721 678 } \
bogdanm 85:024bf7f99721 679 } \
bogdanm 85:024bf7f99721 680 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
bogdanm 85:024bf7f99721 681 { \
bogdanm 85:024bf7f99721 682 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm 85:024bf7f99721 683 { \
bogdanm 85:024bf7f99721 684 (__HANDLE__)->Mask = 0x00FF ; \
bogdanm 85:024bf7f99721 685 } \
bogdanm 85:024bf7f99721 686 else \
bogdanm 85:024bf7f99721 687 { \
bogdanm 85:024bf7f99721 688 (__HANDLE__)->Mask = 0x007F ; \
bogdanm 85:024bf7f99721 689 } \
bogdanm 85:024bf7f99721 690 } \
bogdanm 85:024bf7f99721 691 } while(0)
Kojto 93:e188a91d3eaa 692 #endif /* defined (STM32F042x6) || defined (STM32F048xx) || defined (STM32F070x6) || \
Kojto 93:e188a91d3eaa 693 defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || defined (STM32F070xB) || \
Kojto 93:e188a91d3eaa 694 defined (STM32F091xC) || defined (STM32F098xx) || defined (STM32F030xC) */
bogdanm 85:024bf7f99721 695 /**
bogdanm 85:024bf7f99721 696 * @}
bogdanm 85:024bf7f99721 697 */
bogdanm 85:024bf7f99721 698
bogdanm 85:024bf7f99721 699 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 700 /** @addtogroup UARTEx_Exported_Functions
bogdanm 92:4fc01daae5a5 701 * @{
bogdanm 92:4fc01daae5a5 702 */
bogdanm 92:4fc01daae5a5 703
bogdanm 92:4fc01daae5a5 704 /** @addtogroup UARTEx_Exported_Functions_Group1
bogdanm 92:4fc01daae5a5 705 * @brief Extended Initialization and Configuration Functions
bogdanm 92:4fc01daae5a5 706 * @{
bogdanm 92:4fc01daae5a5 707 */
bogdanm 85:024bf7f99721 708 /* Initialization and de-initialization functions ****************************/
Kojto 93:e188a91d3eaa 709 #if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
bogdanm 85:024bf7f99721 710 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t UART_DEPolarity, uint32_t UART_DEAssertionTime, uint32_t UART_DEDeassertionTime);
bogdanm 92:4fc01daae5a5 711 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
Kojto 93:e188a91d3eaa 712 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
bogdanm 92:4fc01daae5a5 713 /**
bogdanm 92:4fc01daae5a5 714 * @}
bogdanm 92:4fc01daae5a5 715 */
bogdanm 92:4fc01daae5a5 716
bogdanm 92:4fc01daae5a5 717 /** @addtogroup UARTEx_Exported_Functions_Group2
Kojto 93:e188a91d3eaa 718 * @brief Extended UART Interrupt handling function
bogdanm 92:4fc01daae5a5 719 * @{
bogdanm 92:4fc01daae5a5 720 */
bogdanm 92:4fc01daae5a5 721
Kojto 93:e188a91d3eaa 722 /* IO operation functions ***************************************************/
bogdanm 85:024bf7f99721 723 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
Kojto 93:e188a91d3eaa 724
Kojto 93:e188a91d3eaa 725 #if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
bogdanm 85:024bf7f99721 726 void HAL_UART_WakeupCallback(UART_HandleTypeDef *huart);
Kojto 93:e188a91d3eaa 727 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
bogdanm 92:4fc01daae5a5 728 /**
bogdanm 92:4fc01daae5a5 729 * @}
bogdanm 92:4fc01daae5a5 730 */
bogdanm 92:4fc01daae5a5 731
bogdanm 92:4fc01daae5a5 732 /** @addtogroup UARTEx_Exported_Functions_Group3
bogdanm 92:4fc01daae5a5 733 * @brief Extended Peripheral Control functions
bogdanm 92:4fc01daae5a5 734 * @{
bogdanm 92:4fc01daae5a5 735 */
bogdanm 92:4fc01daae5a5 736
bogdanm 85:024bf7f99721 737 /* Peripheral Control functions **********************************************/
bogdanm 85:024bf7f99721 738 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
Kojto 93:e188a91d3eaa 739 #if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6) && !defined(STM32F030xC)
Kojto 93:e188a91d3eaa 740 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
Kojto 93:e188a91d3eaa 741 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
Kojto 93:e188a91d3eaa 742 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
bogdanm 85:024bf7f99721 743 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
Kojto 93:e188a91d3eaa 744 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
bogdanm 92:4fc01daae5a5 745 /**
bogdanm 92:4fc01daae5a5 746 * @}
bogdanm 92:4fc01daae5a5 747 */
bogdanm 85:024bf7f99721 748 /* Peripheral State functions ************************************************/
bogdanm 85:024bf7f99721 749
bogdanm 92:4fc01daae5a5 750 /**
bogdanm 92:4fc01daae5a5 751 * @}
bogdanm 92:4fc01daae5a5 752 */
bogdanm 92:4fc01daae5a5 753
bogdanm 85:024bf7f99721 754
bogdanm 85:024bf7f99721 755 /**
bogdanm 85:024bf7f99721 756 * @}
bogdanm 85:024bf7f99721 757 */
bogdanm 85:024bf7f99721 758
bogdanm 85:024bf7f99721 759 /**
bogdanm 85:024bf7f99721 760 * @}
bogdanm 85:024bf7f99721 761 */
bogdanm 85:024bf7f99721 762
bogdanm 85:024bf7f99721 763 #ifdef __cplusplus
bogdanm 85:024bf7f99721 764 }
bogdanm 85:024bf7f99721 765 #endif
bogdanm 85:024bf7f99721 766
bogdanm 85:024bf7f99721 767 #endif /* __STM32F0xx_HAL_UART_EX_H */
bogdanm 85:024bf7f99721 768
bogdanm 85:024bf7f99721 769 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
bogdanm 92:4fc01daae5a5 770