Diff: AnalohIn_Diff.cpp

Revision:

3:d17541ceae12

Parent:

2:ea5a4c22bd53

Child:

4:a833fa5cce1e

--- a/AnalohIn_Diff.cpp	Fri Dec 05 14:06:38 2014 +0000
+++ b/AnalohIn_Diff.cpp	Wed Dec 10 12:53:25 2014 +0000
@@ -18,10 +18,11 @@
 
 #if FSL_FEATURE_ADC_HAS_DIFF_MODE
 
-AnalogIn_Diff::~AnalogIn_Diff() { }
+
 
 AnalogIn_Diff::AnalogIn_Diff(int adc_ch)
 {
+    
     const uint32_t temp[] = ADC_BASE_ADDRS;
     for (int i = 0; i < sizeof(temp) / sizeof(temp[0]); i++)
         adc_addrs[i] = temp[i];
@@ -29,7 +30,7 @@
     
     instance=(adc_ch>>1)&1;
     chnNum=(adc_ch>>0)&1;
-            
+    test(1);       
     
     CLOCK_SYS_EnableAdcClock(instance);
 
@@ -51,24 +52,30 @@
     ADC_HAL_SetClkDividerMode(adc_addrs[instance], (adc_clk_divider_mode_t)(clkdiv & 0x3));
     ADC_HAL_SetRefVoltSrcMode(adc_addrs[instance], kAdcRefVoltSrcOfVref);
     ADC_HAL_SetResolutionMode(adc_addrs[instance], kAdcResolutionBitOfDiffModeAs16);
-    ADC_HAL_SetContinuousConvCmd(adc_addrs[instance], false);
+    ADC_HAL_SetContinuousConvCmd(adc_addrs[instance], false);//false
     ADC_HAL_SetHwTriggerCmd(adc_addrs[instance], false); /* sw trigger */
     ADC_HAL_SetHwAverageCmd(adc_addrs[instance], false);
     //ADC_HAL_SetHwAverageMode(adc_addrs[instance], kAdcHwAverageCountOf4);
     ADC_HAL_SetChnMuxMode(adc_addrs[instance], kAdcChnMuxOfB); /* only B channels are avail */
 
-
 }
 
+AnalogIn_Diff::~AnalogIn_Diff() { }
 
+void AnalogIn_Diff::test (int x)
+{
+       printf("\r\n %i: 0x%08lx\r\n",x,(long)adc_addrs[instance]);
+}
 
 
 int16_t AnalogIn_Diff::read_raws16()    // Returns a 16bit signed integer
 {
     /* sw trigger (SC1A) */
+
     ADC_HAL_ConfigChn(adc_addrs[instance], 0, false, true, chnNum);
     while (!ADC_HAL_GetChnConvCompletedCmd(adc_addrs[instance], 0));
-    return ADC_HAL_GetChnConvValueRAW(adc_addrs[instance], 0);
+   return ADC_HAL_GetChnConvValueRAW(adc_addrs[instance], 0);
+
 }
 
 float AnalogIn_Diff::read()