12-Bit, 8-Channel, ADC System Monitor w/ Temp Sensor, Internal/External Reference, & I2C Interface

Dependents:   ADC128D818_HelloWorld

Committer:
fblanc
Date:
Tue Aug 27 11:38:38 2013 +0000
Revision:
0:9cc68ef524da
Child:
1:5f9dbbbc34c5
OK;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
fblanc 0:9cc68ef524da 1
fblanc 0:9cc68ef524da 2 #include "ADC128D818.h"
fblanc 0:9cc68ef524da 3
fblanc 0:9cc68ef524da 4 //Create instance
fblanc 0:9cc68ef524da 5 ADC128D818::ADC128D818(PinName sda, PinName scl, PinName adc_int) : _i2c(sda, scl), _Adc_Int (adc_int)
fblanc 0:9cc68ef524da 6 {
fblanc 0:9cc68ef524da 7 }
fblanc 0:9cc68ef524da 8
fblanc 0:9cc68ef524da 9 //destroy instance
fblanc 0:9cc68ef524da 10 ADC128D818::~ADC128D818()
fblanc 0:9cc68ef524da 11 {
fblanc 0:9cc68ef524da 12 }
fblanc 0:9cc68ef524da 13
fblanc 0:9cc68ef524da 14 int ADC128D818::init(char address, char mode, char vref, char rate, char mask_channel, char mask_int)
fblanc 0:9cc68ef524da 15 {
fblanc 0:9cc68ef524da 16
fblanc 0:9cc68ef524da 17 char data;
fblanc 0:9cc68ef524da 18 char cmd_data[2];
fblanc 0:9cc68ef524da 19
fblanc 0:9cc68ef524da 20 _address=address << 1; //bug ?
fblanc 0:9cc68ef524da 21
fblanc 0:9cc68ef524da 22 //2 test Busy_Status_Register
fblanc 0:9cc68ef524da 23 cmd_data[0]= ADC_REG_Busy_Status_Register;
fblanc 0:9cc68ef524da 24
fblanc 0:9cc68ef524da 25 if(_i2c.write(_address, cmd_data, 1))
fblanc 0:9cc68ef524da 26 return -1; //NO DEVICE
fblanc 0:9cc68ef524da 27 _i2c.read(_address,&data,1); //read a byte
fblanc 0:9cc68ef524da 28
fblanc 0:9cc68ef524da 29 if ((data & Busy_Status_Register_Not_Ready) == 1)
fblanc 0:9cc68ef524da 30 return -2; //ADC is BUSY
fblanc 0:9cc68ef524da 31
fblanc 0:9cc68ef524da 32 ADC128D818::stop();
fblanc 0:9cc68ef524da 33 //3 Program the Advanced Configuration Register
fblanc 0:9cc68ef524da 34 data=0;
fblanc 0:9cc68ef524da 35 switch (vref)
fblanc 0:9cc68ef524da 36 {
fblanc 0:9cc68ef524da 37 case ADC_VREF_INT:
fblanc 0:9cc68ef524da 38 data&=~Advanced_Configuration_Register_External_Reference_Enable; //0
fblanc 0:9cc68ef524da 39 break;
fblanc 0:9cc68ef524da 40 case ADC_VREF_EXT:
fblanc 0:9cc68ef524da 41 data|=Advanced_Configuration_Register_External_Reference_Enable; //1
fblanc 0:9cc68ef524da 42 break;
fblanc 0:9cc68ef524da 43 }
fblanc 0:9cc68ef524da 44 switch (mode)
fblanc 0:9cc68ef524da 45 {
fblanc 0:9cc68ef524da 46 case ADC_MODE_0:
fblanc 0:9cc68ef524da 47 data&=~Advanced_Configuration_Register_Mode_Select_0; //0
fblanc 0:9cc68ef524da 48 data&=~Advanced_Configuration_Register_Mode_Select_1; //0
fblanc 0:9cc68ef524da 49 break;
fblanc 0:9cc68ef524da 50 case ADC_MODE_1:
fblanc 0:9cc68ef524da 51 data&=~Advanced_Configuration_Register_Mode_Select_0; //0
fblanc 0:9cc68ef524da 52 data|=Advanced_Configuration_Register_Mode_Select_1; //1
fblanc 0:9cc68ef524da 53 break;
fblanc 0:9cc68ef524da 54 case ADC_MODE_2:
fblanc 0:9cc68ef524da 55 data|=~Advanced_Configuration_Register_Mode_Select_0; //1
fblanc 0:9cc68ef524da 56 data&=Advanced_Configuration_Register_Mode_Select_1; //0
fblanc 0:9cc68ef524da 57 break;
fblanc 0:9cc68ef524da 58 case ADC_MODE_3:
fblanc 0:9cc68ef524da 59 data|=~Advanced_Configuration_Register_Mode_Select_0; //1
fblanc 0:9cc68ef524da 60 data|=Advanced_Configuration_Register_Mode_Select_1; //1
fblanc 0:9cc68ef524da 61 break;
fblanc 0:9cc68ef524da 62 }
fblanc 0:9cc68ef524da 63
fblanc 0:9cc68ef524da 64 cmd_data[0]=ADC_REG_Advanced_Configuration_Register;
fblanc 0:9cc68ef524da 65 cmd_data[1]=data;
fblanc 0:9cc68ef524da 66
fblanc 0:9cc68ef524da 67 _i2c.write(_address, cmd_data, 2); //send a byte & wait acknowledged
fblanc 0:9cc68ef524da 68
fblanc 0:9cc68ef524da 69 //4 Program the Conversion Rate Register
fblanc 0:9cc68ef524da 70 data=0;
fblanc 0:9cc68ef524da 71 switch (rate)
fblanc 0:9cc68ef524da 72 {
fblanc 0:9cc68ef524da 73 case ADC_RATE_LOW_POWER:
fblanc 0:9cc68ef524da 74 data&=~Advanced_Configuration_Register_External_Reference_Enable; //0
fblanc 0:9cc68ef524da 75 break;
fblanc 0:9cc68ef524da 76 case ADC_RATE_CONTINUOUS:
fblanc 0:9cc68ef524da 77 data|=Advanced_Configuration_Register_External_Reference_Enable; //1
fblanc 0:9cc68ef524da 78 break;
fblanc 0:9cc68ef524da 79 }
fblanc 0:9cc68ef524da 80
fblanc 0:9cc68ef524da 81 cmd_data[0]=ADC_REG_Conversion_Rate_Register;
fblanc 0:9cc68ef524da 82 cmd_data[1]=data;
fblanc 0:9cc68ef524da 83
fblanc 0:9cc68ef524da 84 _i2c.write(_address, cmd_data, 2); //send a byte & wait acknowledged
fblanc 0:9cc68ef524da 85
fblanc 0:9cc68ef524da 86 //5 Choose to enable or disable the channels using the Channel Disable Register
fblanc 0:9cc68ef524da 87
fblanc 0:9cc68ef524da 88 cmd_data[0]=ADC_REG_Channel_Disable_Register;
fblanc 0:9cc68ef524da 89 cmd_data[1]=mask_channel;
fblanc 0:9cc68ef524da 90
fblanc 0:9cc68ef524da 91 _i2c.write(_address, cmd_data, 2); //send a byte & wait acknowledged
fblanc 0:9cc68ef524da 92
fblanc 0:9cc68ef524da 93 //6 Using the Interrupt Mask Register
fblanc 0:9cc68ef524da 94
fblanc 0:9cc68ef524da 95 cmd_data[0]=ADC_REG_Interrupt_Mask_Register;
fblanc 0:9cc68ef524da 96 cmd_data[1]=mask_int;
fblanc 0:9cc68ef524da 97
fblanc 0:9cc68ef524da 98 _i2c.write(_address, cmd_data, 2); //send a byte & wait acknowledged
fblanc 0:9cc68ef524da 99
fblanc 0:9cc68ef524da 100 return 0;
fblanc 0:9cc68ef524da 101 }
fblanc 0:9cc68ef524da 102
fblanc 0:9cc68ef524da 103
fblanc 0:9cc68ef524da 104 int ADC128D818::init_limit(char channel, int limit, char high_low)
fblanc 0:9cc68ef524da 105 {
fblanc 0:9cc68ef524da 106 char cmd_data[3];
fblanc 0:9cc68ef524da 107 char *ptr;
fblanc 0:9cc68ef524da 108 cmd_data[0]=ADC_REG_Limit_Registers + channel + high_low;
fblanc 0:9cc68ef524da 109 ptr=(char *) & limit;
fblanc 0:9cc68ef524da 110 cmd_data[1]=*ptr;
fblanc 0:9cc68ef524da 111 cmd_data[2]=*++ptr;
fblanc 0:9cc68ef524da 112
fblanc 0:9cc68ef524da 113 _i2c.write(_address, cmd_data, 3); //send a byte & wait acknowledged
fblanc 0:9cc68ef524da 114
fblanc 0:9cc68ef524da 115 return 0;
fblanc 0:9cc68ef524da 116 }
fblanc 0:9cc68ef524da 117
fblanc 0:9cc68ef524da 118 int ADC128D818::read_channel(char channel)
fblanc 0:9cc68ef524da 119 {
fblanc 0:9cc68ef524da 120
fblanc 0:9cc68ef524da 121 char data[2];
fblanc 0:9cc68ef524da 122 // char *ptr;
fblanc 0:9cc68ef524da 123 char cmd[1] ;
fblanc 0:9cc68ef524da 124 cmd[0] = ADC_REG_Channel_Readings_Registers + channel;
fblanc 0:9cc68ef524da 125 _i2c.write(_address, cmd, 1); //send a byte & wait acknowledged
fblanc 0:9cc68ef524da 126 //ptr=(char *) & data;
fblanc 0:9cc68ef524da 127 _i2c.read(_address,data,2); //read a byte
fblanc 0:9cc68ef524da 128
fblanc 0:9cc68ef524da 129 return (int) data[0]*256+data[1];
fblanc 0:9cc68ef524da 130 }
fblanc 0:9cc68ef524da 131
fblanc 0:9cc68ef524da 132
fblanc 0:9cc68ef524da 133
fblanc 0:9cc68ef524da 134 char ADC128D818::read_register(char Register)
fblanc 0:9cc68ef524da 135 {
fblanc 0:9cc68ef524da 136 char cmd ;
fblanc 0:9cc68ef524da 137 cmd = Register;
fblanc 0:9cc68ef524da 138
fblanc 0:9cc68ef524da 139 _i2c.write(_address, &cmd, 1); //send a byte
fblanc 0:9cc68ef524da 140 _i2c.read(_address,&cmd,1); //read a byte
fblanc 0:9cc68ef524da 141
fblanc 0:9cc68ef524da 142 return cmd;
fblanc 0:9cc68ef524da 143 }
fblanc 0:9cc68ef524da 144
fblanc 0:9cc68ef524da 145 void ADC128D818::start()
fblanc 0:9cc68ef524da 146 {
fblanc 0:9cc68ef524da 147 char cmd_data[2];
fblanc 0:9cc68ef524da 148 cmd_data[0]= ADC_REG_Configuration_Register;
fblanc 0:9cc68ef524da 149 cmd_data[1]= Configuration_Register_Start | Configuration_Register_INT_Enable ;
fblanc 0:9cc68ef524da 150
fblanc 0:9cc68ef524da 151 _i2c.write(_address, cmd_data, 2); //send a 2 byte
fblanc 0:9cc68ef524da 152
fblanc 0:9cc68ef524da 153 }
fblanc 0:9cc68ef524da 154 void ADC128D818::stop()
fblanc 0:9cc68ef524da 155 {
fblanc 0:9cc68ef524da 156 char cmd_data[2];
fblanc 0:9cc68ef524da 157 cmd_data[0]= ADC_REG_Configuration_Register;
fblanc 0:9cc68ef524da 158 cmd_data[1]= 0 ;
fblanc 0:9cc68ef524da 159
fblanc 0:9cc68ef524da 160 _i2c.write(_address, cmd_data, 2); //send a byte
fblanc 0:9cc68ef524da 161
fblanc 0:9cc68ef524da 162 }