Fahad Mirza / Mbed 2 deprecated Nucleo_HXC900

A demo application for HXC900 LoRaWAN module using Nucleo-L053R8.

Dependencies:   mbed

hw_gpio.h@0:a0c5877bd360, 2018-07-12 (annotated)

Committer:
fahadmirza
Date:
Thu Jul 12 00:50:48 2018 +0000
Revision:
0:a0c5877bd360
Porting complete!

Who changed what in which revision?

UserRevisionLine numberNew contents of line
fahadmirza 0:a0c5877bd360 1 /*
fahadmirza 0:a0c5877bd360 2 / _____) _ | |
fahadmirza 0:a0c5877bd360 3 ( (____ _____ ____ _| |_ _____ ____| |__
fahadmirza 0:a0c5877bd360 4 \____ \| ___ | (_ _) ___ |/ ___) _ \
fahadmirza 0:a0c5877bd360 5 _____) ) ____| | | || |_| ____( (___| | | |
fahadmirza 0:a0c5877bd360 6 (______/|_____)_|_|_| \__)_____)\____)_| |_|
fahadmirza 0:a0c5877bd360 7 (C)2013 Semtech
fahadmirza 0:a0c5877bd360 8
fahadmirza 0:a0c5877bd360 9 Description: Bleeper board GPIO driver implementation
fahadmirza 0:a0c5877bd360 10
fahadmirza 0:a0c5877bd360 11 License: Revised BSD License, see LICENSE.TXT file include in the project
fahadmirza 0:a0c5877bd360 12
fahadmirza 0:a0c5877bd360 13 Maintainer: Miguel Luis and Gregory Cristian
fahadmirza 0:a0c5877bd360 14 */
fahadmirza 0:a0c5877bd360 15 /******************************************************************************
fahadmirza 0:a0c5877bd360 16 * @file hw_gpio.h
fahadmirza 0:a0c5877bd360 17 * @author MCD Application Team
fahadmirza 0:a0c5877bd360 18 * @version V1.1.4
fahadmirza 0:a0c5877bd360 19 * @date 08-January-2018
fahadmirza 0:a0c5877bd360 20 * @brief Header for driver hw_rtc.c module
fahadmirza 0:a0c5877bd360 21 ******************************************************************************
fahadmirza 0:a0c5877bd360 22 * @attention
fahadmirza 0:a0c5877bd360 23 *
fahadmirza 0:a0c5877bd360 24 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics International N.V.
fahadmirza 0:a0c5877bd360 25 * All rights reserved.</center></h2>
fahadmirza 0:a0c5877bd360 26 *
fahadmirza 0:a0c5877bd360 27 * Redistribution and use in source and binary forms, with or without
fahadmirza 0:a0c5877bd360 28 * modification, are permitted, provided that the following conditions are met:
fahadmirza 0:a0c5877bd360 29 *
fahadmirza 0:a0c5877bd360 30 * 1. Redistribution of source code must retain the above copyright notice,
fahadmirza 0:a0c5877bd360 31 * this list of conditions and the following disclaimer.
fahadmirza 0:a0c5877bd360 32 * 2. Redistributions in binary form must reproduce the above copyright notice,
fahadmirza 0:a0c5877bd360 33 * this list of conditions and the following disclaimer in the documentation
fahadmirza 0:a0c5877bd360 34 * and/or other materials provided with the distribution.
fahadmirza 0:a0c5877bd360 35 * 3. Neither the name of STMicroelectronics nor the names of other
fahadmirza 0:a0c5877bd360 36 * contributors to this software may be used to endorse or promote products
fahadmirza 0:a0c5877bd360 37 * derived from this software without specific written permission.
fahadmirza 0:a0c5877bd360 38 * 4. This software, including modifications and/or derivative works of this
fahadmirza 0:a0c5877bd360 39 * software, must execute solely and exclusively on microcontroller or
fahadmirza 0:a0c5877bd360 40 * microprocessor devices manufactured by or for STMicroelectronics.
fahadmirza 0:a0c5877bd360 41 * 5. Redistribution and use of this software other than as permitted under
fahadmirza 0:a0c5877bd360 42 * this license is void and will automatically terminate your rights under
fahadmirza 0:a0c5877bd360 43 * this license.
fahadmirza 0:a0c5877bd360 44 *
fahadmirza 0:a0c5877bd360 45 * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS"
fahadmirza 0:a0c5877bd360 46 * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
fahadmirza 0:a0c5877bd360 47 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
fahadmirza 0:a0c5877bd360 48 * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
fahadmirza 0:a0c5877bd360 49 * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
fahadmirza 0:a0c5877bd360 50 * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
fahadmirza 0:a0c5877bd360 51 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
fahadmirza 0:a0c5877bd360 52 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
fahadmirza 0:a0c5877bd360 53 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
fahadmirza 0:a0c5877bd360 54 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
fahadmirza 0:a0c5877bd360 55 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
fahadmirza 0:a0c5877bd360 56 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
fahadmirza 0:a0c5877bd360 57 *
fahadmirza 0:a0c5877bd360 58 ******************************************************************************
fahadmirza 0:a0c5877bd360 59 */
fahadmirza 0:a0c5877bd360 60
fahadmirza 0:a0c5877bd360 61 /* Define to prevent recursive inclusion -------------------------------------*/
fahadmirza 0:a0c5877bd360 62 #ifndef __HW_GPIO_H__
fahadmirza 0:a0c5877bd360 63 #define __HW_GPIO_H__
fahadmirza 0:a0c5877bd360 64
fahadmirza 0:a0c5877bd360 65
fahadmirza 0:a0c5877bd360 66 #ifdef __cplusplus
fahadmirza 0:a0c5877bd360 67 extern "C" {
fahadmirza 0:a0c5877bd360 68 #endif
fahadmirza 0:a0c5877bd360 69
fahadmirza 0:a0c5877bd360 70
fahadmirza 0:a0c5877bd360 71 /* Exported types ------------------------------------------------------------*/
fahadmirza 0:a0c5877bd360 72
fahadmirza 0:a0c5877bd360 73 typedef void( GpioIrqHandler )( void );
fahadmirza 0:a0c5877bd360 74
fahadmirza 0:a0c5877bd360 75 /* Exported constants --------------------------------------------------------*/
fahadmirza 0:a0c5877bd360 76 /* External variables --------------------------------------------------------*/
fahadmirza 0:a0c5877bd360 77 /* Exported macros -----------------------------------------------------------*/
fahadmirza 0:a0c5877bd360 78 /*!
fahadmirza 0:a0c5877bd360 79 * \brief GPIOs Macro
fahadmirza 0:a0c5877bd360 80 */
fahadmirza 0:a0c5877bd360 81
fahadmirza 0:a0c5877bd360 82 #define RCC_GPIO_CLK_ENABLE( __GPIO_PORT__ ) \
fahadmirza 0:a0c5877bd360 83 do { \
fahadmirza 0:a0c5877bd360 84 switch( __GPIO_PORT__) \
fahadmirza 0:a0c5877bd360 85 { \
fahadmirza 0:a0c5877bd360 86 case GPIOA_BASE: __HAL_RCC_GPIOA_CLK_ENABLE(); break; \
fahadmirza 0:a0c5877bd360 87 case GPIOB_BASE: __HAL_RCC_GPIOB_CLK_ENABLE(); break; \
fahadmirza 0:a0c5877bd360 88 case GPIOC_BASE: __HAL_RCC_GPIOC_CLK_ENABLE(); break; \
fahadmirza 0:a0c5877bd360 89 case GPIOD_BASE: __HAL_RCC_GPIOD_CLK_ENABLE(); break; \
fahadmirza 0:a0c5877bd360 90 case GPIOH_BASE: default: __HAL_RCC_GPIOH_CLK_ENABLE(); \
fahadmirza 0:a0c5877bd360 91 } \
fahadmirza 0:a0c5877bd360 92 } while(0)
fahadmirza 0:a0c5877bd360 93
fahadmirza 0:a0c5877bd360 94 #define RCC_GPIO_CLK_DISABLE( __GPIO_PORT__ ) \
fahadmirza 0:a0c5877bd360 95 do { \
fahadmirza 0:a0c5877bd360 96 switch( __GPIO_PORT__) \
fahadmirza 0:a0c5877bd360 97 { \
fahadmirza 0:a0c5877bd360 98 case GPIOA_BASE: __HAL_RCC_GPIOA_CLK_DISABLE(); break; \
fahadmirza 0:a0c5877bd360 99 case GPIOB_BASE: __HAL_RCC_GPIOB_CLK_DISABLE(); break; \
fahadmirza 0:a0c5877bd360 100 case GPIOC_BASE: __HAL_RCC_GPIOC_CLK_DISABLE(); break; \
fahadmirza 0:a0c5877bd360 101 case GPIOD_BASE: __HAL_RCC_GPIOD_CLK_DISABLE(); break; \
fahadmirza 0:a0c5877bd360 102 case GPIOH_BASE: default: __HAL_RCC_GPIOH_CLK_ENABLE(); \
fahadmirza 0:a0c5877bd360 103 } \
fahadmirza 0:a0c5877bd360 104 } while(0)
fahadmirza 0:a0c5877bd360 105 /* Exported functions ------------------------------------------------------- */
fahadmirza 0:a0c5877bd360 106 /*!
fahadmirza 0:a0c5877bd360 107 * @brief Initializes the given GPIO object
fahadmirza 0:a0c5877bd360 108 *
fahadmirza 0:a0c5877bd360 109 * @param GPIOx: where x can be (A..E and H)
fahadmirza 0:a0c5877bd360 110 * @param GPIO_Pin: specifies the port bit to be written.
fahadmirza 0:a0c5877bd360 111 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
fahadmirza 0:a0c5877bd360 112 * All port bits are not necessarily available on all GPIOs.
fahadmirza 0:a0c5877bd360 113 * @param [IN] initStruct GPIO_InitTypeDef intit structure
fahadmirza 0:a0c5877bd360 114 * @retval none
fahadmirza 0:a0c5877bd360 115 */
fahadmirza 0:a0c5877bd360 116 void HW_GPIO_Init( GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_InitTypeDef* initStruct);
fahadmirza 0:a0c5877bd360 117
fahadmirza 0:a0c5877bd360 118 /*!
fahadmirza 0:a0c5877bd360 119 * @brief Records the interrupt handler for the GPIO object
fahadmirza 0:a0c5877bd360 120 *
fahadmirza 0:a0c5877bd360 121 * @param GPIOx: where x can be (A..E and H)
fahadmirza 0:a0c5877bd360 122 * @param GPIO_Pin: specifies the port bit to be written.
fahadmirza 0:a0c5877bd360 123 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
fahadmirza 0:a0c5877bd360 124 * All port bits are not necessarily available on all GPIOs.
fahadmirza 0:a0c5877bd360 125 * @param [IN] prio NVIC priority (0 is highest)
fahadmirza 0:a0c5877bd360 126 * @param [IN] irqHandler points to the function to execute
fahadmirza 0:a0c5877bd360 127 * @retval none
fahadmirza 0:a0c5877bd360 128 */
fahadmirza 0:a0c5877bd360 129 void HW_GPIO_SetIrq( GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, uint32_t prio, GpioIrqHandler *irqHandler );
fahadmirza 0:a0c5877bd360 130
fahadmirza 0:a0c5877bd360 131 /*!
fahadmirza 0:a0c5877bd360 132 * @brief Execute the interrupt from the object
fahadmirza 0:a0c5877bd360 133 *
fahadmirza 0:a0c5877bd360 134 * @param GPIOx: where x can be (A..E and H)
fahadmirza 0:a0c5877bd360 135 * @param GPIO_Pin: specifies the port bit to be written.
fahadmirza 0:a0c5877bd360 136 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
fahadmirza 0:a0c5877bd360 137 * All port bits are not necessarily available on all GPIOs.
fahadmirza 0:a0c5877bd360 138 * @retval none
fahadmirza 0:a0c5877bd360 139 */
fahadmirza 0:a0c5877bd360 140 void HW_GPIO_IrqHandler( uint16_t GPIO_Pin );
fahadmirza 0:a0c5877bd360 141
fahadmirza 0:a0c5877bd360 142 /*!
fahadmirza 0:a0c5877bd360 143 * @brief Writes the given value to the GPIO output
fahadmirza 0:a0c5877bd360 144 *
fahadmirza 0:a0c5877bd360 145 * @param GPIO_Pin: specifies the port bit to be written.
fahadmirza 0:a0c5877bd360 146 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
fahadmirza 0:a0c5877bd360 147 * All port bits are not necessarily available on all GPIOs.
fahadmirza 0:a0c5877bd360 148 * @param [IN] value New GPIO output value
fahadmirza 0:a0c5877bd360 149 * @retval none
fahadmirza 0:a0c5877bd360 150 */
fahadmirza 0:a0c5877bd360 151 void HW_GPIO_Write( GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, uint32_t value );
fahadmirza 0:a0c5877bd360 152
fahadmirza 0:a0c5877bd360 153 /*!
fahadmirza 0:a0c5877bd360 154 * @brief Reads the current GPIO input value
fahadmirza 0:a0c5877bd360 155 *
fahadmirza 0:a0c5877bd360 156 * @param GPIOx: where x can be (A..E and H)
fahadmirza 0:a0c5877bd360 157 * @param GPIO_Pin: specifies the port bit to be written.
fahadmirza 0:a0c5877bd360 158 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
fahadmirza 0:a0c5877bd360 159 * All port bits are not necessarily available on all GPIOs.
fahadmirza 0:a0c5877bd360 160 * @retval value Current GPIO input value
fahadmirza 0:a0c5877bd360 161 */
fahadmirza 0:a0c5877bd360 162 uint32_t HW_GPIO_Read( GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin );
fahadmirza 0:a0c5877bd360 163
fahadmirza 0:a0c5877bd360 164 #ifdef __cplusplus
fahadmirza 0:a0c5877bd360 165 }
fahadmirza 0:a0c5877bd360 166 #endif
fahadmirza 0:a0c5877bd360 167
fahadmirza 0:a0c5877bd360 168 #endif /* __HW_GPIO_H__ */
fahadmirza 0:a0c5877bd360 169
fahadmirza 0:a0c5877bd360 170 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
fahadmirza 0:a0c5877bd360 171