Fahad Mirza / Mbed 2 deprecated Nucleo_HXC900

A demo application for HXC900 LoRaWAN module using Nucleo-L053R8.

Dependencies:   mbed

Driver/hw_conf.h@5:53302861bfea, 2018-07-16 (annotated)

Committer:
fahadmirza
Date:
Mon Jul 16 20:12:42 2018 +0000
Revision:
5:53302861bfea
Parent:
hw_conf.h@0:a0c5877bd360 
Updated directories;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
fahadmirza 0:a0c5877bd360 1 /*
fahadmirza 0:a0c5877bd360 2 _ _ _____ _______
fahadmirza 0:a0c5877bd360 3 | | | | |_ _| |__ __|
fahadmirza 0:a0c5877bd360 4 | |__| | __ ___ __ | | ___ | |
fahadmirza 0:a0c5877bd360 5 | __ |/ _` \ \/ / | | / _ \| |
fahadmirza 0:a0c5877bd360 6 | | | | (_| |> < _| || (_) | |
fahadmirza 0:a0c5877bd360 7 |_| |_|\__,_/_/\_\_____\___/|_|
fahadmirza 0:a0c5877bd360 8 (C)2017 HaxIoT
fahadmirza 0:a0c5877bd360 9
fahadmirza 0:a0c5877bd360 10 Description: contains hardware configuration Macros and Constants
fahadmirza 0:a0c5877bd360 11 License: Revised BSD License, see LICENSE.TXT file include in the project
fahadmirza 0:a0c5877bd360 12 */
fahadmirza 0:a0c5877bd360 13 /******************************************************************************
fahadmirza 0:a0c5877bd360 14 * File : hw_conf.h
fahadmirza 0:a0c5877bd360 15 * Author : Fahad Mirza (HaxIoT)
fahadmirza 0:a0c5877bd360 16 * Version : V1.0.0
fahadmirza 0:a0c5877bd360 17 * Modified : 13-April-2018
fahadmirza 0:a0c5877bd360 18 * Brief : contains hardware configuration Macros and Constants
fahadmirza 0:a0c5877bd360 19 ******************************************************************************
fahadmirza 0:a0c5877bd360 20 * @attention
fahadmirza 0:a0c5877bd360 21 *
fahadmirza 0:a0c5877bd360 22 * <h2><center>&copy; Copyright (c) 2017 Haxiot
fahadmirza 0:a0c5877bd360 23 * All rights reserved.</center></h2>
fahadmirza 0:a0c5877bd360 24 *
fahadmirza 0:a0c5877bd360 25 * Redistribution and use in source and binary forms, with or without
fahadmirza 0:a0c5877bd360 26 * modification, are permitted, provided that the following conditions are met:
fahadmirza 0:a0c5877bd360 27 *
fahadmirza 0:a0c5877bd360 28 * 1. Redistribution of source code must retain the above copyright notice,
fahadmirza 0:a0c5877bd360 29 * this list of conditions and the following disclaimer.
fahadmirza 0:a0c5877bd360 30 * 2. Redistributions in binary form must reproduce the above copyright notice,
fahadmirza 0:a0c5877bd360 31 * this list of conditions and the following disclaimer in the documentation
fahadmirza 0:a0c5877bd360 32 * and/or other materials provided with the distribution.
fahadmirza 0:a0c5877bd360 33 * 3. Neither the name of STMicroelectronics nor the names of other
fahadmirza 0:a0c5877bd360 34 * contributors to this software may be used to endorse or promote products
fahadmirza 0:a0c5877bd360 35 * derived from this software without specific written permission.
fahadmirza 0:a0c5877bd360 36 * 4. This software, including modifications and/or derivative works of this
fahadmirza 0:a0c5877bd360 37 * software, must execute solely and exclusively on microcontroller or
fahadmirza 0:a0c5877bd360 38 * microprocessor devices manufactured by or for STMicroelectronics.
fahadmirza 0:a0c5877bd360 39 * 5. Redistribution and use of this software other than as permitted under
fahadmirza 0:a0c5877bd360 40 * this license is void and will automatically terminate your rights under
fahadmirza 0:a0c5877bd360 41 * this license.
fahadmirza 0:a0c5877bd360 42 *
fahadmirza 0:a0c5877bd360 43 * THIS SOFTWARE IS PROVIDED BY HAXIOT AND CONTRIBUTORS "AS IS"
fahadmirza 0:a0c5877bd360 44 * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT
fahadmirza 0:a0c5877bd360 45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
fahadmirza 0:a0c5877bd360 46 * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY
fahadmirza 0:a0c5877bd360 47 * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT
fahadmirza 0:a0c5877bd360 48 * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
fahadmirza 0:a0c5877bd360 49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
fahadmirza 0:a0c5877bd360 50 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
fahadmirza 0:a0c5877bd360 51 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
fahadmirza 0:a0c5877bd360 52 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
fahadmirza 0:a0c5877bd360 53 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
fahadmirza 0:a0c5877bd360 54 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
fahadmirza 0:a0c5877bd360 55 *
fahadmirza 0:a0c5877bd360 56 ******************************************************************************
fahadmirza 0:a0c5877bd360 57 */
fahadmirza 0:a0c5877bd360 58
fahadmirza 0:a0c5877bd360 59 /* Define to prevent recursive inclusion -------------------------------------*/
fahadmirza 0:a0c5877bd360 60 #ifndef __HW_CONF_H__
fahadmirza 0:a0c5877bd360 61 #define __HW_CONF_H__
fahadmirza 0:a0c5877bd360 62
fahadmirza 0:a0c5877bd360 63 #ifdef __cplusplus
fahadmirza 0:a0c5877bd360 64 extern "C" {
fahadmirza 0:a0c5877bd360 65 #endif
fahadmirza 0:a0c5877bd360 66
fahadmirza 0:a0c5877bd360 67 /* RTC HW definition ------------------------------------------------------------ */
fahadmirza 0:a0c5877bd360 68 #define RTC_OUTPUT DBG_RTC_OUTPUT
fahadmirza 0:a0c5877bd360 69 #define RTC_Alarm_IRQn RTC_IRQn
fahadmirza 0:a0c5877bd360 70
fahadmirza 0:a0c5877bd360 71 /* USART HW definition -----------------------------------------------------------*/
fahadmirza 0:a0c5877bd360 72 #define HXC_USARTX USART1
fahadmirza 0:a0c5877bd360 73 #define HXC_USARTX_CLK_ENABLE() __USART1_CLK_ENABLE()
fahadmirza 0:a0c5877bd360 74 #define HXC_USARTX_RX_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE()
fahadmirza 0:a0c5877bd360 75 #define HXC_USARTX_TX_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE()
fahadmirza 0:a0c5877bd360 76
fahadmirza 0:a0c5877bd360 77 #define HXC_USARTX_FORCE_RESET() __USART1_FORCE_RESET()
fahadmirza 0:a0c5877bd360 78 #define HXC_USARTX_RELEASE_RESET() __USART1_RELEASE_RESET()
fahadmirza 0:a0c5877bd360 79
fahadmirza 0:a0c5877bd360 80 #define HXC_USARTX_TX_PIN GPIO_PIN_9
fahadmirza 0:a0c5877bd360 81 #define HXC_USARTX_TX_GPIO_PORT GPIOA
fahadmirza 0:a0c5877bd360 82 #define HXC_USARTX_TX_AF GPIO_AF4_USART1
fahadmirza 0:a0c5877bd360 83 #define HXC_USARTX_RX_PIN GPIO_PIN_10
fahadmirza 0:a0c5877bd360 84 #define HXC_USARTX_RX_GPIO_PORT GPIOA
fahadmirza 0:a0c5877bd360 85 #define HXC_USARTX_RX_AF GPIO_AF4_USART1
fahadmirza 0:a0c5877bd360 86
fahadmirza 0:a0c5877bd360 87 // Definition for USARTx's NVIC
fahadmirza 0:a0c5877bd360 88 #define HXC_USARTX_IRQn USART1_IRQn
fahadmirza 0:a0c5877bd360 89 #define HXC_USARTX_IRQHandler USART1_IRQHandler
fahadmirza 0:a0c5877bd360 90
fahadmirza 0:a0c5877bd360 91 /* --------------------------- Debug USART HW definition --------------------------*/
fahadmirza 0:a0c5877bd360 92 // Definition for UARTx clock resources
fahadmirza 0:a0c5877bd360 93 #define DBG_UARTX USART2
fahadmirza 0:a0c5877bd360 94 #define DBG_UARTX_CLK_ENABLE() __USART2_CLK_ENABLE()
fahadmirza 0:a0c5877bd360 95 #define DBG_UARTX_RX_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE()
fahadmirza 0:a0c5877bd360 96 #define DBG_UARTX_TX_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE()
fahadmirza 0:a0c5877bd360 97
fahadmirza 0:a0c5877bd360 98 #define DBG_UARTX_FORCE_RESET() __USART2_FORCE_RESET()
fahadmirza 0:a0c5877bd360 99 #define DBG_UARTX_RELEASE_RESET() __USART2_RELEASE_RESET()
fahadmirza 0:a0c5877bd360 100
fahadmirza 0:a0c5877bd360 101 #define DBG_UARTX_TX_PIN GPIO_PIN_2
fahadmirza 0:a0c5877bd360 102 #define DBG_UARTX_TX_GPIO_PORT GPIOA
fahadmirza 0:a0c5877bd360 103 #define DBG_UARTX_TX_AF GPIO_AF4_USART2
fahadmirza 0:a0c5877bd360 104 #define DBG_UARTX_RX_PIN GPIO_PIN_3
fahadmirza 0:a0c5877bd360 105 #define DBG_UARTX_RX_GPIO_PORT GPIOA
fahadmirza 0:a0c5877bd360 106 #define DBG_UARTX_RX_AF GPIO_AF4_USART2
fahadmirza 0:a0c5877bd360 107
fahadmirza 0:a0c5877bd360 108 // Definition for USARTx's NVIC
fahadmirza 0:a0c5877bd360 109 #define DBG_UARTX_IRQn USART2_IRQn
fahadmirza 0:a0c5877bd360 110 #define DBG_UARTX_IRQHandler USART2_IRQHandler
fahadmirza 0:a0c5877bd360 111
fahadmirza 0:a0c5877bd360 112 /* --------------------------- Reset pin HW definition --------------------------*/
fahadmirza 0:a0c5877bd360 113 #define HXC_RESET_PORT GPIOB
fahadmirza 0:a0c5877bd360 114 #define HXC_RESET_PIN GPIO_PIN_10
fahadmirza 0:a0c5877bd360 115 #define HXC_RESET_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
fahadmirza 0:a0c5877bd360 116
fahadmirza 0:a0c5877bd360 117 #ifdef __cplusplus
fahadmirza 0:a0c5877bd360 118 }
fahadmirza 0:a0c5877bd360 119 #endif
fahadmirza 0:a0c5877bd360 120
fahadmirza 0:a0c5877bd360 121 #endif /* __HW_CONF_H__ */
fahadmirza 0:a0c5877bd360 122
fahadmirza 0:a0c5877bd360 123 /************************ (C) COPYRIGHT Haxiot *****END OF FILE****/
fahadmirza 0:a0c5877bd360 124