Diff: MACROS.h

Revision:

28:76793a84f9e5

Parent:

27:9c93ce7cb9d8

Child:

34:e84b8ad1d98b

--- a/MACROS.h	Thu Jul 11 13:34:53 2013 +0000
+++ b/MACROS.h	Fri Jul 12 15:27:07 2013 +0000
@@ -23,69 +23,13 @@
 #ifndef MODSERIAL_MACROS_H
 #define MODSERIAL_MACROS_H
 
+#include "MODSERIAL_LPC1768.h"
+#include "MODSERIAL_LPC11U24.h"
+#include "MODSERIAL_KL25Z.h"
 
 #define MODSERIAL_TX_BUFFER_EMPTY (buffer_count[TxIrq]==0)
 #define MODSERIAL_RX_BUFFER_EMPTY (buffer_count[RxIrq]==0)
 #define MODSERIAL_TX_BUFFER_FULL  (buffer_count[TxIrq]==buffer_size[TxIrq])
 #define MODSERIAL_RX_BUFFER_FULL  (buffer_count[RxIrq]==buffer_size[RxIrq])
 
-
-#ifdef TARGET_LPC1768
-
-#define MODSERIAL_IRQ_REG ((LPC_UART_TypeDef*)_base)->IER
-#define DISABLE_TX_IRQ MODSERIAL_IRQ_REG &= ~(1UL << 1)
-#define DISABLE_RX_IRQ MODSERIAL_IRQ_REG &= ~(1UL << 0)
-#define ENABLE_TX_IRQ MODSERIAL_IRQ_REG |= (1UL << 1)
-#define ENABLE_RX_IRQ MODSERIAL_IRQ_REG |= (1UL << 0)
-
-#define RESET_TX_FIFO ((LPC_UART_TypeDef*)_base)->FCR |= (1UL<<2)
-#define RESET_RX_FIFO ((LPC_UART_TypeDef*)_base)->FCR |= (1UL<<1)
-#define ENABLE_FIFO ((LPC_UART_TypeDef*)_base)->FCR = (1UL<<0) + (1UL<<1) + (1UL<<2)
-
-#define MODSERIAL_READ_REG ((LPC_UART_TypeDef*)_base)->RBR
-#define MODSERIAL_WRITE_REG ((LPC_UART_TypeDef*)_base)->THR
-#define MODSERIAL_READABLE ((((LPC_UART_TypeDef*)_base)->LSR & (1UL<<0)) != 0)
-#define MODSERIAL_WRITABLE ((((LPC_UART_TypeDef*)_base)->LSR & (1UL<<5)) != 0)
-
-
-#endif
-
-#ifdef TARGET_LPC11U24
-
-#define MODSERIAL_IRQ_REG ((LPC_UART_TypeDef*)_base)->IER
-#define DISABLE_TX_IRQ MODSERIAL_IRQ_REG &= ~(1UL << 1)
-#define DISABLE_RX_IRQ MODSERIAL_IRQ_REG &= ~(1UL << 0)
-#define ENABLE_TX_IRQ MODSERIAL_IRQ_REG |= (1UL << 1)
-#define ENABLE_RX_IRQ MODSERIAL_IRQ_REG |= (1UL << 0)
-
-#define RESET_TX_FIFO ((LPC_UART_TypeDef*)_base)->FCR |= (1UL<<2)
-#define RESET_RX_FIFO ((LPC_UART_TypeDef*)_base)->FCR |= (1UL<<1)
-#define ENABLE_FIFO ((LPC_UART_TypeDef*)_base)->FCR = (1UL<<0) + (1UL<<1) + (1UL<<2)
-
-#define MODSERIAL_READ_REG ((LPC_UART_TypeDef*)_base)->RBR
-#define MODSERIAL_WRITE_REG ((LPC_UART_TypeDef*)_base)->THR
-#define MODSERIAL_READABLE ((((LPC_UART_TypeDef*)_base)->LSR & (1UL<<0)) != 0)
-#define MODSERIAL_WRITABLE ((((LPC_UART_TypeDef*)_base)->LSR & (1UL<<5)) != 0)
-
-#endif
-
-#ifdef TARGET_KL25Z
-
-#define MODSERIAL_IRQ_REG ((UART_Type*)_base)->C2
-#define DISABLE_TX_IRQ MODSERIAL_IRQ_REG &= ~(1UL << UART_C2_TIE_SHIFT)
-#define DISABLE_RX_IRQ MODSERIAL_IRQ_REG &= ~(1UL << UART_C2_RIE_SHIFT)
-#define ENABLE_TX_IRQ MODSERIAL_IRQ_REG |= (1UL << UART_C2_TIE_SHIFT)
-#define ENABLE_RX_IRQ MODSERIAL_IRQ_REG |= (1UL << UART_C2_RIE_SHIFT)
-
-#define RESET_TX_FIFO while(0 == 1)
-#define RESET_RX_FIFO while(0 == 1)
-#define ENABLE_FIFO while(0 == 1)
-
-#define MODSERIAL_READ_REG ((UART_Type*)_base)->D
-#define MODSERIAL_WRITE_REG ((UART_Type*)_base)->D
-#define MODSERIAL_READABLE ((((UART_Type*)_base)->S1 & (1UL<<5)) != 0)
-#define MODSERIAL_WRITABLE ((((UART_Type*)_base)->S1 & (1UL<<7)) != 0)
-
-#endif
-
-#endif
+#endif
\ No newline at end of file