version_2.0

Dependents:   cc3000_ping_demo_try_2

Fork of mbed by mbed official

Committer:
emilmont
Date:
Fri Feb 14 14:36:43 2014 +0000
Revision:
77:869cf507173a
Child:
81:7d30d6019079
Release 77 of the mbed library

Main changes:
* Add target NUCLEO_F030R8
* Add target NUCLEO_F401RE
* Add target NUCLEO_F103RB
* Add target NUCLEO_L152RE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32l1xx_spi.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V1.3.0
emilmont 77:869cf507173a 6 * @date 31-January-2014
emilmont 77:869cf507173a 7 * @brief This file contains all the functions prototypes for the SPI
emilmont 77:869cf507173a 8 * firmware library.
emilmont 77:869cf507173a 9 ******************************************************************************
emilmont 77:869cf507173a 10 * @attention
emilmont 77:869cf507173a 11 *
emilmont 77:869cf507173a 12 * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 13 *
emilmont 77:869cf507173a 14 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
emilmont 77:869cf507173a 15 * You may not use this file except in compliance with the License.
emilmont 77:869cf507173a 16 * You may obtain a copy of the License at:
emilmont 77:869cf507173a 17 *
emilmont 77:869cf507173a 18 * http://www.st.com/software_license_agreement_liberty_v2
emilmont 77:869cf507173a 19 *
emilmont 77:869cf507173a 20 * Unless required by applicable law or agreed to in writing, software
emilmont 77:869cf507173a 21 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 77:869cf507173a 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 77:869cf507173a 23 * See the License for the specific language governing permissions and
emilmont 77:869cf507173a 24 * limitations under the License.
emilmont 77:869cf507173a 25 *
emilmont 77:869cf507173a 26 ******************************************************************************
emilmont 77:869cf507173a 27 */
emilmont 77:869cf507173a 28
emilmont 77:869cf507173a 29 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 30 #ifndef __STM32L1xx_SPI_H
emilmont 77:869cf507173a 31 #define __STM32L1xx_SPI_H
emilmont 77:869cf507173a 32
emilmont 77:869cf507173a 33 #ifdef __cplusplus
emilmont 77:869cf507173a 34 extern "C" {
emilmont 77:869cf507173a 35 #endif
emilmont 77:869cf507173a 36
emilmont 77:869cf507173a 37 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 38 #include "stm32l1xx.h"
emilmont 77:869cf507173a 39
emilmont 77:869cf507173a 40 /** @addtogroup STM32L1xx_StdPeriph_Driver
emilmont 77:869cf507173a 41 * @{
emilmont 77:869cf507173a 42 */
emilmont 77:869cf507173a 43
emilmont 77:869cf507173a 44 /** @addtogroup SPI
emilmont 77:869cf507173a 45 * @{
emilmont 77:869cf507173a 46 */
emilmont 77:869cf507173a 47
emilmont 77:869cf507173a 48 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 49
emilmont 77:869cf507173a 50 /**
emilmont 77:869cf507173a 51 * @brief SPI Init structure definition
emilmont 77:869cf507173a 52 */
emilmont 77:869cf507173a 53
emilmont 77:869cf507173a 54 typedef struct
emilmont 77:869cf507173a 55 {
emilmont 77:869cf507173a 56 uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
emilmont 77:869cf507173a 57 This parameter can be a value of @ref SPI_data_direction */
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
emilmont 77:869cf507173a 60 This parameter can be a value of @ref SPI_mode */
emilmont 77:869cf507173a 61
emilmont 77:869cf507173a 62 uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
emilmont 77:869cf507173a 63 This parameter can be a value of @ref SPI_data_size */
emilmont 77:869cf507173a 64
emilmont 77:869cf507173a 65 uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
emilmont 77:869cf507173a 66 This parameter can be a value of @ref SPI_Clock_Polarity */
emilmont 77:869cf507173a 67
emilmont 77:869cf507173a 68 uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
emilmont 77:869cf507173a 69 This parameter can be a value of @ref SPI_Clock_Phase */
emilmont 77:869cf507173a 70
emilmont 77:869cf507173a 71 uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
emilmont 77:869cf507173a 72 hardware (NSS pin) or by software using the SSI bit.
emilmont 77:869cf507173a 73 This parameter can be a value of @ref SPI_Slave_Select_management */
emilmont 77:869cf507173a 74
emilmont 77:869cf507173a 75 uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
emilmont 77:869cf507173a 76 used to configure the transmit and receive SCK clock.
emilmont 77:869cf507173a 77 This parameter can be a value of @ref SPI_BaudRate_Prescaler
emilmont 77:869cf507173a 78 @note The communication clock is derived from the master
emilmont 77:869cf507173a 79 clock. The slave clock does not need to be set. */
emilmont 77:869cf507173a 80
emilmont 77:869cf507173a 81 uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
emilmont 77:869cf507173a 82 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
emilmont 77:869cf507173a 83
emilmont 77:869cf507173a 84 uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
emilmont 77:869cf507173a 85 }SPI_InitTypeDef;
emilmont 77:869cf507173a 86
emilmont 77:869cf507173a 87 /**
emilmont 77:869cf507173a 88 * @brief I2S Init structure definition
emilmont 77:869cf507173a 89 */
emilmont 77:869cf507173a 90
emilmont 77:869cf507173a 91 typedef struct
emilmont 77:869cf507173a 92 {
emilmont 77:869cf507173a 93
emilmont 77:869cf507173a 94 uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
emilmont 77:869cf507173a 95 This parameter can be a value of @ref SPI_I2S_Mode */
emilmont 77:869cf507173a 96
emilmont 77:869cf507173a 97 uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
emilmont 77:869cf507173a 98 This parameter can be a value of @ref SPI_I2S_Standard */
emilmont 77:869cf507173a 99
emilmont 77:869cf507173a 100 uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
emilmont 77:869cf507173a 101 This parameter can be a value of @ref SPI_I2S_Data_Format */
emilmont 77:869cf507173a 102
emilmont 77:869cf507173a 103 uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
emilmont 77:869cf507173a 104 This parameter can be a value of @ref SPI_I2S_MCLK_Output */
emilmont 77:869cf507173a 105
emilmont 77:869cf507173a 106 uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
emilmont 77:869cf507173a 107 This parameter can be a value of @ref SPI_I2S_Audio_Frequency */
emilmont 77:869cf507173a 108
emilmont 77:869cf507173a 109 uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
emilmont 77:869cf507173a 110 This parameter can be a value of @ref SPI_I2S_Clock_Polarity */
emilmont 77:869cf507173a 111 }I2S_InitTypeDef;
emilmont 77:869cf507173a 112
emilmont 77:869cf507173a 113 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 114
emilmont 77:869cf507173a 115 /** @defgroup SPI_Exported_Constants
emilmont 77:869cf507173a 116 * @{
emilmont 77:869cf507173a 117 */
emilmont 77:869cf507173a 118
emilmont 77:869cf507173a 119 #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
emilmont 77:869cf507173a 120 ((PERIPH) == SPI2) || \
emilmont 77:869cf507173a 121 ((PERIPH) == SPI3))
emilmont 77:869cf507173a 122 #define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
emilmont 77:869cf507173a 123 ((PERIPH) == SPI3))
emilmont 77:869cf507173a 124
emilmont 77:869cf507173a 125 /** @defgroup SPI_data_direction
emilmont 77:869cf507173a 126 * @{
emilmont 77:869cf507173a 127 */
emilmont 77:869cf507173a 128
emilmont 77:869cf507173a 129 #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
emilmont 77:869cf507173a 130 #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
emilmont 77:869cf507173a 131 #define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
emilmont 77:869cf507173a 132 #define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
emilmont 77:869cf507173a 133 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
emilmont 77:869cf507173a 134 ((MODE) == SPI_Direction_2Lines_RxOnly) || \
emilmont 77:869cf507173a 135 ((MODE) == SPI_Direction_1Line_Rx) || \
emilmont 77:869cf507173a 136 ((MODE) == SPI_Direction_1Line_Tx))
emilmont 77:869cf507173a 137 /**
emilmont 77:869cf507173a 138 * @}
emilmont 77:869cf507173a 139 */
emilmont 77:869cf507173a 140
emilmont 77:869cf507173a 141 /** @defgroup SPI_mode
emilmont 77:869cf507173a 142 * @{
emilmont 77:869cf507173a 143 */
emilmont 77:869cf507173a 144
emilmont 77:869cf507173a 145 #define SPI_Mode_Master ((uint16_t)0x0104)
emilmont 77:869cf507173a 146 #define SPI_Mode_Slave ((uint16_t)0x0000)
emilmont 77:869cf507173a 147 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
emilmont 77:869cf507173a 148 ((MODE) == SPI_Mode_Slave))
emilmont 77:869cf507173a 149 /**
emilmont 77:869cf507173a 150 * @}
emilmont 77:869cf507173a 151 */
emilmont 77:869cf507173a 152
emilmont 77:869cf507173a 153 /** @defgroup SPI_data_size
emilmont 77:869cf507173a 154 * @{
emilmont 77:869cf507173a 155 */
emilmont 77:869cf507173a 156
emilmont 77:869cf507173a 157 #define SPI_DataSize_16b ((uint16_t)0x0800)
emilmont 77:869cf507173a 158 #define SPI_DataSize_8b ((uint16_t)0x0000)
emilmont 77:869cf507173a 159 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
emilmont 77:869cf507173a 160 ((DATASIZE) == SPI_DataSize_8b))
emilmont 77:869cf507173a 161 /**
emilmont 77:869cf507173a 162 * @}
emilmont 77:869cf507173a 163 */
emilmont 77:869cf507173a 164
emilmont 77:869cf507173a 165 /** @defgroup SPI_Clock_Polarity
emilmont 77:869cf507173a 166 * @{
emilmont 77:869cf507173a 167 */
emilmont 77:869cf507173a 168
emilmont 77:869cf507173a 169 #define SPI_CPOL_Low ((uint16_t)0x0000)
emilmont 77:869cf507173a 170 #define SPI_CPOL_High ((uint16_t)0x0002)
emilmont 77:869cf507173a 171 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
emilmont 77:869cf507173a 172 ((CPOL) == SPI_CPOL_High))
emilmont 77:869cf507173a 173 /**
emilmont 77:869cf507173a 174 * @}
emilmont 77:869cf507173a 175 */
emilmont 77:869cf507173a 176
emilmont 77:869cf507173a 177 /** @defgroup SPI_Clock_Phase
emilmont 77:869cf507173a 178 * @{
emilmont 77:869cf507173a 179 */
emilmont 77:869cf507173a 180
emilmont 77:869cf507173a 181 #define SPI_CPHA_1Edge ((uint16_t)0x0000)
emilmont 77:869cf507173a 182 #define SPI_CPHA_2Edge ((uint16_t)0x0001)
emilmont 77:869cf507173a 183 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
emilmont 77:869cf507173a 184 ((CPHA) == SPI_CPHA_2Edge))
emilmont 77:869cf507173a 185 /**
emilmont 77:869cf507173a 186 * @}
emilmont 77:869cf507173a 187 */
emilmont 77:869cf507173a 188
emilmont 77:869cf507173a 189 /** @defgroup SPI_Slave_Select_management
emilmont 77:869cf507173a 190 * @{
emilmont 77:869cf507173a 191 */
emilmont 77:869cf507173a 192
emilmont 77:869cf507173a 193 #define SPI_NSS_Soft ((uint16_t)0x0200)
emilmont 77:869cf507173a 194 #define SPI_NSS_Hard ((uint16_t)0x0000)
emilmont 77:869cf507173a 195 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
emilmont 77:869cf507173a 196 ((NSS) == SPI_NSS_Hard))
emilmont 77:869cf507173a 197 /**
emilmont 77:869cf507173a 198 * @}
emilmont 77:869cf507173a 199 */
emilmont 77:869cf507173a 200
emilmont 77:869cf507173a 201 /** @defgroup SPI_BaudRate_Prescaler
emilmont 77:869cf507173a 202 * @{
emilmont 77:869cf507173a 203 */
emilmont 77:869cf507173a 204
emilmont 77:869cf507173a 205 #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
emilmont 77:869cf507173a 206 #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
emilmont 77:869cf507173a 207 #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
emilmont 77:869cf507173a 208 #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
emilmont 77:869cf507173a 209 #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
emilmont 77:869cf507173a 210 #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
emilmont 77:869cf507173a 211 #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
emilmont 77:869cf507173a 212 #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
emilmont 77:869cf507173a 213 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
emilmont 77:869cf507173a 214 ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
emilmont 77:869cf507173a 215 ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
emilmont 77:869cf507173a 216 ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
emilmont 77:869cf507173a 217 ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
emilmont 77:869cf507173a 218 ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
emilmont 77:869cf507173a 219 ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
emilmont 77:869cf507173a 220 ((PRESCALER) == SPI_BaudRatePrescaler_256))
emilmont 77:869cf507173a 221 /**
emilmont 77:869cf507173a 222 * @}
emilmont 77:869cf507173a 223 */
emilmont 77:869cf507173a 224
emilmont 77:869cf507173a 225 /** @defgroup SPI_MSB_LSB_transmission
emilmont 77:869cf507173a 226 * @{
emilmont 77:869cf507173a 227 */
emilmont 77:869cf507173a 228
emilmont 77:869cf507173a 229 #define SPI_FirstBit_MSB ((uint16_t)0x0000)
emilmont 77:869cf507173a 230 #define SPI_FirstBit_LSB ((uint16_t)0x0080)
emilmont 77:869cf507173a 231 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
emilmont 77:869cf507173a 232 ((BIT) == SPI_FirstBit_LSB))
emilmont 77:869cf507173a 233 /**
emilmont 77:869cf507173a 234 * @}
emilmont 77:869cf507173a 235 */
emilmont 77:869cf507173a 236
emilmont 77:869cf507173a 237 /** @defgroup SPI_I2S_Mode
emilmont 77:869cf507173a 238 * @{
emilmont 77:869cf507173a 239 */
emilmont 77:869cf507173a 240
emilmont 77:869cf507173a 241 #define I2S_Mode_SlaveTx ((uint16_t)0x0000)
emilmont 77:869cf507173a 242 #define I2S_Mode_SlaveRx ((uint16_t)0x0100)
emilmont 77:869cf507173a 243 #define I2S_Mode_MasterTx ((uint16_t)0x0200)
emilmont 77:869cf507173a 244 #define I2S_Mode_MasterRx ((uint16_t)0x0300)
emilmont 77:869cf507173a 245 #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
emilmont 77:869cf507173a 246 ((MODE) == I2S_Mode_SlaveRx) || \
emilmont 77:869cf507173a 247 ((MODE) == I2S_Mode_MasterTx)|| \
emilmont 77:869cf507173a 248 ((MODE) == I2S_Mode_MasterRx))
emilmont 77:869cf507173a 249 /**
emilmont 77:869cf507173a 250 * @}
emilmont 77:869cf507173a 251 */
emilmont 77:869cf507173a 252
emilmont 77:869cf507173a 253
emilmont 77:869cf507173a 254 /** @defgroup SPI_I2S_Standard
emilmont 77:869cf507173a 255 * @{
emilmont 77:869cf507173a 256 */
emilmont 77:869cf507173a 257
emilmont 77:869cf507173a 258 #define I2S_Standard_Phillips ((uint16_t)0x0000)
emilmont 77:869cf507173a 259 #define I2S_Standard_MSB ((uint16_t)0x0010)
emilmont 77:869cf507173a 260 #define I2S_Standard_LSB ((uint16_t)0x0020)
emilmont 77:869cf507173a 261 #define I2S_Standard_PCMShort ((uint16_t)0x0030)
emilmont 77:869cf507173a 262 #define I2S_Standard_PCMLong ((uint16_t)0x00B0)
emilmont 77:869cf507173a 263 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
emilmont 77:869cf507173a 264 ((STANDARD) == I2S_Standard_MSB) || \
emilmont 77:869cf507173a 265 ((STANDARD) == I2S_Standard_LSB) || \
emilmont 77:869cf507173a 266 ((STANDARD) == I2S_Standard_PCMShort) || \
emilmont 77:869cf507173a 267 ((STANDARD) == I2S_Standard_PCMLong))
emilmont 77:869cf507173a 268 /**
emilmont 77:869cf507173a 269 * @}
emilmont 77:869cf507173a 270 */
emilmont 77:869cf507173a 271
emilmont 77:869cf507173a 272 /** @defgroup SPI_I2S_Data_Format
emilmont 77:869cf507173a 273 * @{
emilmont 77:869cf507173a 274 */
emilmont 77:869cf507173a 275
emilmont 77:869cf507173a 276 #define I2S_DataFormat_16b ((uint16_t)0x0000)
emilmont 77:869cf507173a 277 #define I2S_DataFormat_16bextended ((uint16_t)0x0001)
emilmont 77:869cf507173a 278 #define I2S_DataFormat_24b ((uint16_t)0x0003)
emilmont 77:869cf507173a 279 #define I2S_DataFormat_32b ((uint16_t)0x0005)
emilmont 77:869cf507173a 280 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
emilmont 77:869cf507173a 281 ((FORMAT) == I2S_DataFormat_16bextended) || \
emilmont 77:869cf507173a 282 ((FORMAT) == I2S_DataFormat_24b) || \
emilmont 77:869cf507173a 283 ((FORMAT) == I2S_DataFormat_32b))
emilmont 77:869cf507173a 284 /**
emilmont 77:869cf507173a 285 * @}
emilmont 77:869cf507173a 286 */
emilmont 77:869cf507173a 287
emilmont 77:869cf507173a 288 /** @defgroup SPI_I2S_MCLK_Output
emilmont 77:869cf507173a 289 * @{
emilmont 77:869cf507173a 290 */
emilmont 77:869cf507173a 291
emilmont 77:869cf507173a 292 #define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
emilmont 77:869cf507173a 293 #define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
emilmont 77:869cf507173a 294 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
emilmont 77:869cf507173a 295 ((OUTPUT) == I2S_MCLKOutput_Disable))
emilmont 77:869cf507173a 296 /**
emilmont 77:869cf507173a 297 * @}
emilmont 77:869cf507173a 298 */
emilmont 77:869cf507173a 299
emilmont 77:869cf507173a 300 /** @defgroup SPI_I2S_Audio_Frequency
emilmont 77:869cf507173a 301 * @{
emilmont 77:869cf507173a 302 */
emilmont 77:869cf507173a 303
emilmont 77:869cf507173a 304 #define I2S_AudioFreq_192k ((uint32_t)192000)
emilmont 77:869cf507173a 305 #define I2S_AudioFreq_96k ((uint32_t)96000)
emilmont 77:869cf507173a 306 #define I2S_AudioFreq_48k ((uint32_t)48000)
emilmont 77:869cf507173a 307 #define I2S_AudioFreq_44k ((uint32_t)44100)
emilmont 77:869cf507173a 308 #define I2S_AudioFreq_32k ((uint32_t)32000)
emilmont 77:869cf507173a 309 #define I2S_AudioFreq_22k ((uint32_t)22050)
emilmont 77:869cf507173a 310 #define I2S_AudioFreq_16k ((uint32_t)16000)
emilmont 77:869cf507173a 311 #define I2S_AudioFreq_11k ((uint32_t)11025)
emilmont 77:869cf507173a 312 #define I2S_AudioFreq_8k ((uint32_t)8000)
emilmont 77:869cf507173a 313 #define I2S_AudioFreq_Default ((uint32_t)2)
emilmont 77:869cf507173a 314
emilmont 77:869cf507173a 315 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
emilmont 77:869cf507173a 316 ((FREQ) <= I2S_AudioFreq_192k)) || \
emilmont 77:869cf507173a 317 ((FREQ) == I2S_AudioFreq_Default))
emilmont 77:869cf507173a 318 /**
emilmont 77:869cf507173a 319 * @}
emilmont 77:869cf507173a 320 */
emilmont 77:869cf507173a 321
emilmont 77:869cf507173a 322 /** @defgroup SPI_I2S_Clock_Polarity
emilmont 77:869cf507173a 323 * @{
emilmont 77:869cf507173a 324 */
emilmont 77:869cf507173a 325
emilmont 77:869cf507173a 326 #define I2S_CPOL_Low ((uint16_t)0x0000)
emilmont 77:869cf507173a 327 #define I2S_CPOL_High ((uint16_t)0x0008)
emilmont 77:869cf507173a 328 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
emilmont 77:869cf507173a 329 ((CPOL) == I2S_CPOL_High))
emilmont 77:869cf507173a 330 /**
emilmont 77:869cf507173a 331 * @}
emilmont 77:869cf507173a 332 */
emilmont 77:869cf507173a 333
emilmont 77:869cf507173a 334 /** @defgroup SPI_I2S_DMA_transfer_requests
emilmont 77:869cf507173a 335 * @{
emilmont 77:869cf507173a 336 */
emilmont 77:869cf507173a 337
emilmont 77:869cf507173a 338 #define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
emilmont 77:869cf507173a 339 #define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
emilmont 77:869cf507173a 340 #define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
emilmont 77:869cf507173a 341 /**
emilmont 77:869cf507173a 342 * @}
emilmont 77:869cf507173a 343 */
emilmont 77:869cf507173a 344
emilmont 77:869cf507173a 345 /** @defgroup SPI_NSS_internal_software_management
emilmont 77:869cf507173a 346 * @{
emilmont 77:869cf507173a 347 */
emilmont 77:869cf507173a 348
emilmont 77:869cf507173a 349 #define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
emilmont 77:869cf507173a 350 #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
emilmont 77:869cf507173a 351 #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
emilmont 77:869cf507173a 352 ((INTERNAL) == SPI_NSSInternalSoft_Reset))
emilmont 77:869cf507173a 353 /**
emilmont 77:869cf507173a 354 * @}
emilmont 77:869cf507173a 355 */
emilmont 77:869cf507173a 356
emilmont 77:869cf507173a 357 /** @defgroup SPI_CRC_Transmit_Receive
emilmont 77:869cf507173a 358 * @{
emilmont 77:869cf507173a 359 */
emilmont 77:869cf507173a 360
emilmont 77:869cf507173a 361 #define SPI_CRC_Tx ((uint8_t)0x00)
emilmont 77:869cf507173a 362 #define SPI_CRC_Rx ((uint8_t)0x01)
emilmont 77:869cf507173a 363 #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
emilmont 77:869cf507173a 364 /**
emilmont 77:869cf507173a 365 * @}
emilmont 77:869cf507173a 366 */
emilmont 77:869cf507173a 367
emilmont 77:869cf507173a 368 /** @defgroup SPI_direction_transmit_receive
emilmont 77:869cf507173a 369 * @{
emilmont 77:869cf507173a 370 */
emilmont 77:869cf507173a 371
emilmont 77:869cf507173a 372 #define SPI_Direction_Rx ((uint16_t)0xBFFF)
emilmont 77:869cf507173a 373 #define SPI_Direction_Tx ((uint16_t)0x4000)
emilmont 77:869cf507173a 374 #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
emilmont 77:869cf507173a 375 ((DIRECTION) == SPI_Direction_Tx))
emilmont 77:869cf507173a 376 /**
emilmont 77:869cf507173a 377 * @}
emilmont 77:869cf507173a 378 */
emilmont 77:869cf507173a 379
emilmont 77:869cf507173a 380 /** @defgroup SPI_I2S_interrupts_definition
emilmont 77:869cf507173a 381 * @{
emilmont 77:869cf507173a 382 */
emilmont 77:869cf507173a 383
emilmont 77:869cf507173a 384 #define SPI_I2S_IT_TXE ((uint8_t)0x71)
emilmont 77:869cf507173a 385 #define SPI_I2S_IT_RXNE ((uint8_t)0x60)
emilmont 77:869cf507173a 386 #define SPI_I2S_IT_ERR ((uint8_t)0x50)
emilmont 77:869cf507173a 387 #define I2S_IT_UDR ((uint8_t)0x53)
emilmont 77:869cf507173a 388 #define SPI_I2S_IT_FRE ((uint8_t)0x58)
emilmont 77:869cf507173a 389
emilmont 77:869cf507173a 390 #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
emilmont 77:869cf507173a 391 ((IT) == SPI_I2S_IT_RXNE) || \
emilmont 77:869cf507173a 392 ((IT) == SPI_I2S_IT_ERR))
emilmont 77:869cf507173a 393
emilmont 77:869cf507173a 394 #define SPI_I2S_IT_OVR ((uint8_t)0x56)
emilmont 77:869cf507173a 395 #define SPI_IT_MODF ((uint8_t)0x55)
emilmont 77:869cf507173a 396 #define SPI_IT_CRCERR ((uint8_t)0x54)
emilmont 77:869cf507173a 397
emilmont 77:869cf507173a 398 #define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
emilmont 77:869cf507173a 399
emilmont 77:869cf507173a 400 #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
emilmont 77:869cf507173a 401 ((IT) == SPI_IT_CRCERR) || ((IT) == SPI_IT_MODF) || \
emilmont 77:869cf507173a 402 ((IT) == SPI_I2S_IT_OVR) || ((IT) == I2S_IT_UDR) ||\
emilmont 77:869cf507173a 403 ((IT) == SPI_I2S_IT_FRE))
emilmont 77:869cf507173a 404 /**
emilmont 77:869cf507173a 405 * @}
emilmont 77:869cf507173a 406 */
emilmont 77:869cf507173a 407
emilmont 77:869cf507173a 408 /** @defgroup SPI_I2S_flags_definition
emilmont 77:869cf507173a 409 * @{
emilmont 77:869cf507173a 410 */
emilmont 77:869cf507173a 411
emilmont 77:869cf507173a 412 #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
emilmont 77:869cf507173a 413 #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
emilmont 77:869cf507173a 414 #define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
emilmont 77:869cf507173a 415 #define I2S_FLAG_UDR ((uint16_t)0x0008)
emilmont 77:869cf507173a 416 #define SPI_FLAG_CRCERR ((uint16_t)0x0010)
emilmont 77:869cf507173a 417 #define SPI_FLAG_MODF ((uint16_t)0x0020)
emilmont 77:869cf507173a 418 #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
emilmont 77:869cf507173a 419 #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
emilmont 77:869cf507173a 420 #define SPI_I2S_FLAG_FRE ((uint16_t)0x0100)
emilmont 77:869cf507173a 421
emilmont 77:869cf507173a 422 #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
emilmont 77:869cf507173a 423 #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
emilmont 77:869cf507173a 424 ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
emilmont 77:869cf507173a 425 ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
emilmont 77:869cf507173a 426 ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE)|| \
emilmont 77:869cf507173a 427 ((FLAG) == SPI_I2S_FLAG_FRE))
emilmont 77:869cf507173a 428 /**
emilmont 77:869cf507173a 429 * @}
emilmont 77:869cf507173a 430 */
emilmont 77:869cf507173a 431
emilmont 77:869cf507173a 432 /** @defgroup SPI_CRC_polynomial
emilmont 77:869cf507173a 433 * @{
emilmont 77:869cf507173a 434 */
emilmont 77:869cf507173a 435
emilmont 77:869cf507173a 436 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
emilmont 77:869cf507173a 437 /**
emilmont 77:869cf507173a 438 * @}
emilmont 77:869cf507173a 439 */
emilmont 77:869cf507173a 440
emilmont 77:869cf507173a 441 /** @defgroup SPI_I2S_Legacy
emilmont 77:869cf507173a 442 * @{
emilmont 77:869cf507173a 443 */
emilmont 77:869cf507173a 444
emilmont 77:869cf507173a 445 #define SPI_DMAReq_Tx SPI_I2S_DMAReq_Tx
emilmont 77:869cf507173a 446 #define SPI_DMAReq_Rx SPI_I2S_DMAReq_Rx
emilmont 77:869cf507173a 447 #define SPI_IT_TXE SPI_I2S_IT_TXE
emilmont 77:869cf507173a 448 #define SPI_IT_RXNE SPI_I2S_IT_RXNE
emilmont 77:869cf507173a 449 #define SPI_IT_ERR SPI_I2S_IT_ERR
emilmont 77:869cf507173a 450 #define SPI_IT_OVR SPI_I2S_IT_OVR
emilmont 77:869cf507173a 451 #define SPI_FLAG_RXNE SPI_I2S_FLAG_RXNE
emilmont 77:869cf507173a 452 #define SPI_FLAG_TXE SPI_I2S_FLAG_TXE
emilmont 77:869cf507173a 453 #define SPI_FLAG_OVR SPI_I2S_FLAG_OVR
emilmont 77:869cf507173a 454 #define SPI_FLAG_BSY SPI_I2S_FLAG_BSY
emilmont 77:869cf507173a 455 #define SPI_DeInit SPI_I2S_DeInit
emilmont 77:869cf507173a 456 #define SPI_ITConfig SPI_I2S_ITConfig
emilmont 77:869cf507173a 457 #define SPI_DMACmd SPI_I2S_DMACmd
emilmont 77:869cf507173a 458 #define SPI_SendData SPI_I2S_SendData
emilmont 77:869cf507173a 459 #define SPI_ReceiveData SPI_I2S_ReceiveData
emilmont 77:869cf507173a 460 #define SPI_GetFlagStatus SPI_I2S_GetFlagStatus
emilmont 77:869cf507173a 461 #define SPI_ClearFlag SPI_I2S_ClearFlag
emilmont 77:869cf507173a 462 #define SPI_GetITStatus SPI_I2S_GetITStatus
emilmont 77:869cf507173a 463 #define SPI_ClearITPendingBit SPI_I2S_ClearITPendingBit
emilmont 77:869cf507173a 464 /**
emilmont 77:869cf507173a 465 * @}
emilmont 77:869cf507173a 466 */
emilmont 77:869cf507173a 467
emilmont 77:869cf507173a 468 /**
emilmont 77:869cf507173a 469 * @}
emilmont 77:869cf507173a 470 */
emilmont 77:869cf507173a 471
emilmont 77:869cf507173a 472 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 473 /* Exported functions ------------------------------------------------------- */
emilmont 77:869cf507173a 474
emilmont 77:869cf507173a 475 /* Function used to set the SPI configuration to the default reset state *****/
emilmont 77:869cf507173a 476 void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
emilmont 77:869cf507173a 477
emilmont 77:869cf507173a 478 /* Initialization and Configuration functions *********************************/
emilmont 77:869cf507173a 479 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
emilmont 77:869cf507173a 480 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
emilmont 77:869cf507173a 481 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
emilmont 77:869cf507173a 482 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
emilmont 77:869cf507173a 483 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
emilmont 77:869cf507173a 484 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
emilmont 77:869cf507173a 485 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
emilmont 77:869cf507173a 486 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
emilmont 77:869cf507173a 487 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
emilmont 77:869cf507173a 488 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
emilmont 77:869cf507173a 489
emilmont 77:869cf507173a 490 /* Data transfers functions ***************************************************/
emilmont 77:869cf507173a 491 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
emilmont 77:869cf507173a 492 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
emilmont 77:869cf507173a 493
emilmont 77:869cf507173a 494 /* Hardware CRC Calculation functions *****************************************/
emilmont 77:869cf507173a 495 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
emilmont 77:869cf507173a 496 void SPI_TransmitCRC(SPI_TypeDef* SPIx);
emilmont 77:869cf507173a 497 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
emilmont 77:869cf507173a 498 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
emilmont 77:869cf507173a 499
emilmont 77:869cf507173a 500 /* DMA transfers management functions *****************************************/
emilmont 77:869cf507173a 501 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
emilmont 77:869cf507173a 502
emilmont 77:869cf507173a 503 /* Interrupts and flags management functions **********************************/
emilmont 77:869cf507173a 504 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
emilmont 77:869cf507173a 505 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
emilmont 77:869cf507173a 506 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
emilmont 77:869cf507173a 507 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
emilmont 77:869cf507173a 508 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
emilmont 77:869cf507173a 509
emilmont 77:869cf507173a 510 #ifdef __cplusplus
emilmont 77:869cf507173a 511 }
emilmont 77:869cf507173a 512 #endif
emilmont 77:869cf507173a 513
emilmont 77:869cf507173a 514 #endif /*__STM32L1xx_SPI_H */
emilmont 77:869cf507173a 515
emilmont 77:869cf507173a 516 /**
emilmont 77:869cf507173a 517 * @}
emilmont 77:869cf507173a 518 */
emilmont 77:869cf507173a 519
emilmont 77:869cf507173a 520 /**
emilmont 77:869cf507173a 521 * @}
emilmont 77:869cf507173a 522 */
emilmont 77:869cf507173a 523
emilmont 77:869cf507173a 524 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/