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TARGET_NUCLEO_F030R8/stm32f0xx_syscfg.h@86:4f9a848d74c7, 2014-06-25 (annotated)

Committer:
erezi
Date:
Wed Jun 25 06:08:49 2014 +0000
Revision:
86:4f9a848d74c7
Parent:
81:7d30d6019079 
version_2.0

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emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f0xx_syscfg.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V1.3.0
emilmont 77:869cf507173a 6 * @date 16-January-2014
emilmont 77:869cf507173a 7 * @brief This file contains all the functions prototypes for the SYSCFG firmware
emilmont 77:869cf507173a 8 * library.
emilmont 77:869cf507173a 9 ******************************************************************************
emilmont 77:869cf507173a 10 * @attention
emilmont 77:869cf507173a 11 *
bogdanm 81:7d30d6019079 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 13 *
bogdanm 81:7d30d6019079 14 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 81:7d30d6019079 15 * are permitted provided that the following conditions are met:
bogdanm 81:7d30d6019079 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 81:7d30d6019079 17 * this list of conditions and the following disclaimer.
bogdanm 81:7d30d6019079 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 81:7d30d6019079 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 81:7d30d6019079 20 * and/or other materials provided with the distribution.
bogdanm 81:7d30d6019079 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 81:7d30d6019079 22 * may be used to endorse or promote products derived from this software
bogdanm 81:7d30d6019079 23 * without specific prior written permission.
emilmont 77:869cf507173a 24 *
bogdanm 81:7d30d6019079 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 81:7d30d6019079 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 81:7d30d6019079 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 81:7d30d6019079 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 81:7d30d6019079 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 81:7d30d6019079 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 81:7d30d6019079 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 81:7d30d6019079 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 81:7d30d6019079 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 81:7d30d6019079 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 35 *
emilmont 77:869cf507173a 36 ******************************************************************************
emilmont 77:869cf507173a 37 */
emilmont 77:869cf507173a 38
emilmont 77:869cf507173a 39 /*!< Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 40 #ifndef __STM32F0XX_SYSCFG_H
emilmont 77:869cf507173a 41 #define __STM32F0XX_SYSCFG_H
emilmont 77:869cf507173a 42
emilmont 77:869cf507173a 43 #ifdef __cplusplus
emilmont 77:869cf507173a 44 extern "C" {
emilmont 77:869cf507173a 45 #endif
emilmont 77:869cf507173a 46
emilmont 77:869cf507173a 47 /*!< Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 48 #include "stm32f0xx.h"
emilmont 77:869cf507173a 49
emilmont 77:869cf507173a 50 /** @addtogroup STM32F0xx_StdPeriph_Driver
emilmont 77:869cf507173a 51 * @{
emilmont 77:869cf507173a 52 */
emilmont 77:869cf507173a 53
emilmont 77:869cf507173a 54 /** @addtogroup SYSCFG
emilmont 77:869cf507173a 55 * @{
emilmont 77:869cf507173a 56 */
emilmont 77:869cf507173a 57 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 58 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 59
emilmont 77:869cf507173a 60 /** @defgroup SYSCFG_Exported_Constants
emilmont 77:869cf507173a 61 * @{
emilmont 77:869cf507173a 62 */
emilmont 77:869cf507173a 63
emilmont 77:869cf507173a 64 /** @defgroup SYSCFG_EXTI_Port_Sources
emilmont 77:869cf507173a 65 * @{
emilmont 77:869cf507173a 66 */
emilmont 77:869cf507173a 67 #define EXTI_PortSourceGPIOA ((uint8_t)0x00)
emilmont 77:869cf507173a 68 #define EXTI_PortSourceGPIOB ((uint8_t)0x01)
emilmont 77:869cf507173a 69 #define EXTI_PortSourceGPIOC ((uint8_t)0x02)
emilmont 77:869cf507173a 70 #define EXTI_PortSourceGPIOD ((uint8_t)0x03) /*!< not available for STM32F031 devices */
emilmont 77:869cf507173a 71 #define EXTI_PortSourceGPIOE ((uint8_t)0x04) /*!< only available for STM32F072 devices */
emilmont 77:869cf507173a 72 #define EXTI_PortSourceGPIOF ((uint8_t)0x05)
emilmont 77:869cf507173a 73
emilmont 77:869cf507173a 74 #define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
emilmont 77:869cf507173a 75 ((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
emilmont 77:869cf507173a 76 ((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
emilmont 77:869cf507173a 77 ((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
emilmont 77:869cf507173a 78 ((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
emilmont 77:869cf507173a 79 ((PORTSOURCE) == EXTI_PortSourceGPIOF))
emilmont 77:869cf507173a 80 /**
emilmont 77:869cf507173a 81 * @}
emilmont 77:869cf507173a 82 */
emilmont 77:869cf507173a 83
emilmont 77:869cf507173a 84 /** @defgroup SYSCFG_EXTI_Pin_sources
emilmont 77:869cf507173a 85 * @{
emilmont 77:869cf507173a 86 */
emilmont 77:869cf507173a 87 #define EXTI_PinSource0 ((uint8_t)0x00)
emilmont 77:869cf507173a 88 #define EXTI_PinSource1 ((uint8_t)0x01)
emilmont 77:869cf507173a 89 #define EXTI_PinSource2 ((uint8_t)0x02)
emilmont 77:869cf507173a 90 #define EXTI_PinSource3 ((uint8_t)0x03)
emilmont 77:869cf507173a 91 #define EXTI_PinSource4 ((uint8_t)0x04)
emilmont 77:869cf507173a 92 #define EXTI_PinSource5 ((uint8_t)0x05)
emilmont 77:869cf507173a 93 #define EXTI_PinSource6 ((uint8_t)0x06)
emilmont 77:869cf507173a 94 #define EXTI_PinSource7 ((uint8_t)0x07)
emilmont 77:869cf507173a 95 #define EXTI_PinSource8 ((uint8_t)0x08)
emilmont 77:869cf507173a 96 #define EXTI_PinSource9 ((uint8_t)0x09)
emilmont 77:869cf507173a 97 #define EXTI_PinSource10 ((uint8_t)0x0A)
emilmont 77:869cf507173a 98 #define EXTI_PinSource11 ((uint8_t)0x0B)
emilmont 77:869cf507173a 99 #define EXTI_PinSource12 ((uint8_t)0x0C)
emilmont 77:869cf507173a 100 #define EXTI_PinSource13 ((uint8_t)0x0D)
emilmont 77:869cf507173a 101 #define EXTI_PinSource14 ((uint8_t)0x0E)
emilmont 77:869cf507173a 102 #define EXTI_PinSource15 ((uint8_t)0x0F)
emilmont 77:869cf507173a 103
emilmont 77:869cf507173a 104 #define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
emilmont 77:869cf507173a 105 ((PINSOURCE) == EXTI_PinSource1) || \
emilmont 77:869cf507173a 106 ((PINSOURCE) == EXTI_PinSource2) || \
emilmont 77:869cf507173a 107 ((PINSOURCE) == EXTI_PinSource3) || \
emilmont 77:869cf507173a 108 ((PINSOURCE) == EXTI_PinSource4) || \
emilmont 77:869cf507173a 109 ((PINSOURCE) == EXTI_PinSource5) || \
emilmont 77:869cf507173a 110 ((PINSOURCE) == EXTI_PinSource6) || \
emilmont 77:869cf507173a 111 ((PINSOURCE) == EXTI_PinSource7) || \
emilmont 77:869cf507173a 112 ((PINSOURCE) == EXTI_PinSource8) || \
emilmont 77:869cf507173a 113 ((PINSOURCE) == EXTI_PinSource9) || \
emilmont 77:869cf507173a 114 ((PINSOURCE) == EXTI_PinSource10) || \
emilmont 77:869cf507173a 115 ((PINSOURCE) == EXTI_PinSource11) || \
emilmont 77:869cf507173a 116 ((PINSOURCE) == EXTI_PinSource12) || \
emilmont 77:869cf507173a 117 ((PINSOURCE) == EXTI_PinSource13) || \
emilmont 77:869cf507173a 118 ((PINSOURCE) == EXTI_PinSource14) || \
emilmont 77:869cf507173a 119 ((PINSOURCE) == EXTI_PinSource15))
emilmont 77:869cf507173a 120 /**
emilmont 77:869cf507173a 121 * @}
emilmont 77:869cf507173a 122 */
emilmont 77:869cf507173a 123
emilmont 77:869cf507173a 124 /** @defgroup SYSCFG_Memory_Remap_Config
emilmont 77:869cf507173a 125 * @{
emilmont 77:869cf507173a 126 */
emilmont 77:869cf507173a 127 #define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00)
emilmont 77:869cf507173a 128 #define SYSCFG_MemoryRemap_SystemMemory ((uint8_t)0x01)
emilmont 77:869cf507173a 129 #define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03)
emilmont 77:869cf507173a 130
emilmont 77:869cf507173a 131
emilmont 77:869cf507173a 132 #define IS_SYSCFG_MEMORY_REMAP(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
emilmont 77:869cf507173a 133 ((REMAP) == SYSCFG_MemoryRemap_SystemMemory) || \
emilmont 77:869cf507173a 134 ((REMAP) == SYSCFG_MemoryRemap_SRAM))
emilmont 77:869cf507173a 135
emilmont 77:869cf507173a 136 /**
emilmont 77:869cf507173a 137 * @}
emilmont 77:869cf507173a 138 */
emilmont 77:869cf507173a 139
emilmont 77:869cf507173a 140 /** @defgroup SYSCFG_DMA_Remap_Config
emilmont 77:869cf507173a 141 * @{
emilmont 77:869cf507173a 142 */
emilmont 77:869cf507173a 143 #define SYSCFG_DMARemap_TIM3 SYSCFG_CFGR1_TIM3_DMA_RMP /* Remap TIM3 DMA requests from channel4 to channel6,
emilmont 77:869cf507173a 144 available only for STM32F072 devices */
emilmont 77:869cf507173a 145 #define SYSCFG_DMARemap_TIM2 SYSCFG_CFGR1_TIM2_DMA_RMP /* Remap TIM2 DMA requests from channel3/4 to channel7,
emilmont 77:869cf507173a 146 available only for STM32F072 devices */
emilmont 77:869cf507173a 147 #define SYSCFG_DMARemap_TIM1 SYSCFG_CFGR1_TIM1_DMA_RMP /* Remap TIM1 DMA requests from channel2/3/4 to channel6,
emilmont 77:869cf507173a 148 available only for STM32F072 devices */
emilmont 77:869cf507173a 149 #define SYSCFG_DMARemap_I2C1 SYSCFG_CFGR1_I2C1_DMA_RMP /* Remap I2C1 DMA requests from channel3/2 to channel7/6,
emilmont 77:869cf507173a 150 available only for STM32F072 devices */
emilmont 77:869cf507173a 151 #define SYSCFG_DMARemap_USART3 SYSCFG_CFGR1_USART3_DMA_RMP /* Remap USART3 DMA requests from channel6/7 to channel3/2,
emilmont 77:869cf507173a 152 available only for STM32F072 devices */
emilmont 77:869cf507173a 153 #define SYSCFG_DMARemap_USART2 SYSCFG_CFGR1_USART2_DMA_RMP /* Remap USART2 DMA requests from channel4/5 to channel6/7,
emilmont 77:869cf507173a 154 available only for STM32F072 devices */
emilmont 77:869cf507173a 155 #define SYSCFG_DMARemap_SPI2 SYSCFG_CFGR1_SPI2_DMA_RMP /* Remap SPI2 DMA requests from channel4/5 to channel6/7,
emilmont 77:869cf507173a 156 available only for STM32F072 devices */
emilmont 77:869cf507173a 157 #define SYSCFG_DMARemap_TIM17_2 SYSCFG_CFGR1_TIM17_DMA_RMP2 /* Remap TIM17 DMA requests from channel1/2 to channel7,
emilmont 77:869cf507173a 158 available only for STM32F072 devices */
emilmont 77:869cf507173a 159 #define SYSCFG_DMARemap_TIM16_2 SYSCFG_CFGR1_TIM16_DMA_RMP2 /* Remap TIM16 DMA requests from channel3/4 to channel6,
emilmont 77:869cf507173a 160 available only for STM32F072 devices */
emilmont 77:869cf507173a 161 #define SYSCFG_DMARemap_TIM17 SYSCFG_CFGR1_TIM17_DMA_RMP /* Remap TIM17 DMA requests from channel1 to channel2 */
emilmont 77:869cf507173a 162 #define SYSCFG_DMARemap_TIM16 SYSCFG_CFGR1_TIM16_DMA_RMP /* Remap TIM16 DMA requests from channel3 to channel4 */
emilmont 77:869cf507173a 163 #define SYSCFG_DMARemap_USART1Rx SYSCFG_CFGR1_USART1RX_DMA_RMP /* Remap USART1 Rx DMA requests from channel3 to channel5 */
emilmont 77:869cf507173a 164 #define SYSCFG_DMARemap_USART1Tx SYSCFG_CFGR1_USART1TX_DMA_RMP /* Remap USART1 Tx DMA requests from channel2 to channel4 */
emilmont 77:869cf507173a 165 #define SYSCFG_DMARemap_ADC1 SYSCFG_CFGR1_ADC_DMA_RMP /* Remap ADC1 DMA requests from channel1 to channel2 */
emilmont 77:869cf507173a 166
emilmont 77:869cf507173a 167 #define IS_SYSCFG_DMA_REMAP(REMAP) (((REMAP) == SYSCFG_DMARemap_TIM17) || \
emilmont 77:869cf507173a 168 ((REMAP) == SYSCFG_DMARemap_TIM16) || \
emilmont 77:869cf507173a 169 ((REMAP) == SYSCFG_DMARemap_USART1Rx) || \
emilmont 77:869cf507173a 170 ((REMAP) == SYSCFG_DMARemap_USART1Tx) || \
emilmont 77:869cf507173a 171 ((REMAP) == SYSCFG_CFGR1_TIM3_DMA_RMP) || \
emilmont 77:869cf507173a 172 ((REMAP) == SYSCFG_CFGR1_TIM2_DMA_RMP) || \
emilmont 77:869cf507173a 173 ((REMAP) == SYSCFG_CFGR1_TIM1_DMA_RMP) || \
emilmont 77:869cf507173a 174 ((REMAP) == SYSCFG_CFGR1_I2C1_DMA_RMP) || \
emilmont 77:869cf507173a 175 ((REMAP) == SYSCFG_CFGR1_USART3_DMA_RMP) || \
emilmont 77:869cf507173a 176 ((REMAP) == SYSCFG_CFGR1_USART2_DMA_RMP) || \
emilmont 77:869cf507173a 177 ((REMAP) == SYSCFG_CFGR1_SPI2_DMA_RMP) || \
emilmont 77:869cf507173a 178 ((REMAP) == SYSCFG_CFGR1_TIM17_DMA_RMP2) || \
emilmont 77:869cf507173a 179 ((REMAP) == SYSCFG_CFGR1_TIM16_DMA_RMP2) || \
emilmont 77:869cf507173a 180 ((REMAP) == SYSCFG_DMARemap_ADC1))
emilmont 77:869cf507173a 181
emilmont 77:869cf507173a 182 /**
emilmont 77:869cf507173a 183 * @}
emilmont 77:869cf507173a 184 */
emilmont 77:869cf507173a 185
emilmont 77:869cf507173a 186 /** @defgroup SYSCFG_I2C_FastModePlus_Config
emilmont 77:869cf507173a 187 * @{
emilmont 77:869cf507173a 188 */
emilmont 77:869cf507173a 189 #define SYSCFG_I2CFastModePlus_PB6 SYSCFG_CFGR1_I2C_FMP_PB6 /* Enable Fast Mode Plus on PB6 */
emilmont 77:869cf507173a 190 #define SYSCFG_I2CFastModePlus_PB7 SYSCFG_CFGR1_I2C_FMP_PB7 /* Enable Fast Mode Plus on PB7 */
emilmont 77:869cf507173a 191 #define SYSCFG_I2CFastModePlus_PB8 SYSCFG_CFGR1_I2C_FMP_PB8 /* Enable Fast Mode Plus on PB8 */
emilmont 77:869cf507173a 192 #define SYSCFG_I2CFastModePlus_PB9 SYSCFG_CFGR1_I2C_FMP_PB9 /* Enable Fast Mode Plus on PB9 */
emilmont 77:869cf507173a 193 #define SYSCFG_I2CFastModePlus_I2C1 SYSCFG_CFGR1_I2C_FMP_I2C1 /* Enable Fast Mode Plus on PB10, PB11, PF6 and PF7(only for STM32F0031 and STM32F030 devices) */
emilmont 77:869cf507173a 194 #define SYSCFG_I2CFastModePlus_I2C2 SYSCFG_CFGR1_I2C_FMP_I2C2 /* Enable Fast Mode Plus on I2C2 pins, available only for STM32F072 devices */
emilmont 77:869cf507173a 195 #define SYSCFG_I2CFastModePlus_PA9 SYSCFG_CFGR1_I2C_FMP_PA9 /* Enable Fast Mode Plus on PA9 (only for STM32F031 and STM32F030 devices) */
emilmont 77:869cf507173a 196 #define SYSCFG_I2CFastModePlus_PA10 SYSCFG_CFGR1_I2C_FMP_PA10/* Enable Fast Mode Plus on PA10(only for STM32F031 and STM32F030 devices) */
emilmont 77:869cf507173a 197
emilmont 77:869cf507173a 198 #define IS_SYSCFG_I2C_FMP(PIN) (((PIN) == SYSCFG_I2CFastModePlus_PB6) || \
emilmont 77:869cf507173a 199 ((PIN) == SYSCFG_I2CFastModePlus_PB7) || \
emilmont 77:869cf507173a 200 ((PIN) == SYSCFG_I2CFastModePlus_PB8) || \
emilmont 77:869cf507173a 201 ((PIN) == SYSCFG_I2CFastModePlus_PB9) || \
emilmont 77:869cf507173a 202 ((PIN) == SYSCFG_I2CFastModePlus_I2C1) || \
emilmont 77:869cf507173a 203 ((PIN) == SYSCFG_I2CFastModePlus_I2C2) || \
emilmont 77:869cf507173a 204 ((PIN) == SYSCFG_I2CFastModePlus_PA9) || \
emilmont 77:869cf507173a 205 ((PIN) == SYSCFG_I2CFastModePlus_PA10))
emilmont 77:869cf507173a 206
emilmont 77:869cf507173a 207
emilmont 77:869cf507173a 208 /**
emilmont 77:869cf507173a 209 * @}
emilmont 77:869cf507173a 210 */
emilmont 77:869cf507173a 211
emilmont 77:869cf507173a 212 /** @defgroup SYSCFG_Lock_Config
emilmont 77:869cf507173a 213 * @{
emilmont 77:869cf507173a 214 */
emilmont 77:869cf507173a 215 #define SYSCFG_Break_PVD SYSCFG_CFGR2_PVD_LOCK /*!< Connects the PVD event to the Break Input of TIM1, not available for STM32F030 devices */
emilmont 77:869cf507173a 216 #define SYSCFG_Break_SRAMParity SYSCFG_CFGR2_SRAM_PARITY_LOCK /*!< Connects the SRAM_PARITY error signal to the Break Input of TIM1 */
emilmont 77:869cf507173a 217 #define SYSCFG_Break_Lockup SYSCFG_CFGR2_LOCKUP_LOCK /*!< Connects Lockup output of CortexM0 to the break input of TIM1 */
emilmont 77:869cf507173a 218
emilmont 77:869cf507173a 219 #define IS_SYSCFG_LOCK_CONFIG(CONFIG) (((CONFIG) == SYSCFG_Break_PVD) || \
emilmont 77:869cf507173a 220 ((CONFIG) == SYSCFG_Break_SRAMParity) || \
emilmont 77:869cf507173a 221 ((CONFIG) == SYSCFG_Break_Lockup))
emilmont 77:869cf507173a 222
emilmont 77:869cf507173a 223 /**
emilmont 77:869cf507173a 224 * @}
emilmont 77:869cf507173a 225 */
emilmont 77:869cf507173a 226
emilmont 77:869cf507173a 227 /** @defgroup SYSCFG_flags_definition
emilmont 77:869cf507173a 228 * @{
emilmont 77:869cf507173a 229 */
emilmont 77:869cf507173a 230
emilmont 77:869cf507173a 231 #define SYSCFG_FLAG_PE SYSCFG_CFGR2_SRAM_PE
emilmont 77:869cf507173a 232
emilmont 77:869cf507173a 233 #define IS_SYSCFG_FLAG(FLAG) (((FLAG) == SYSCFG_FLAG_PE))
emilmont 77:869cf507173a 234
emilmont 77:869cf507173a 235 /**
emilmont 77:869cf507173a 236 * @}
emilmont 77:869cf507173a 237 */
emilmont 77:869cf507173a 238
emilmont 77:869cf507173a 239 /**
emilmont 77:869cf507173a 240 * @}
emilmont 77:869cf507173a 241 */
emilmont 77:869cf507173a 242
emilmont 77:869cf507173a 243 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 244 /* Exported functions ------------------------------------------------------- */
emilmont 77:869cf507173a 245
emilmont 77:869cf507173a 246 /* Function used to set the SYSCFG configuration to the default reset state **/
emilmont 77:869cf507173a 247 void SYSCFG_DeInit(void);
emilmont 77:869cf507173a 248
emilmont 77:869cf507173a 249 /* SYSCFG configuration functions *********************************************/
emilmont 77:869cf507173a 250 void SYSCFG_MemoryRemapConfig(uint32_t SYSCFG_MemoryRemap);
emilmont 77:869cf507173a 251 void SYSCFG_DMAChannelRemapConfig(uint32_t SYSCFG_DMARemap, FunctionalState NewState);
emilmont 77:869cf507173a 252 void SYSCFG_I2CFastModePlusConfig(uint32_t SYSCFG_I2CFastModePlus, FunctionalState NewState);
emilmont 77:869cf507173a 253 void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
emilmont 77:869cf507173a 254 void SYSCFG_BreakConfig(uint32_t SYSCFG_Break);
emilmont 77:869cf507173a 255 FlagStatus SYSCFG_GetFlagStatus(uint32_t SYSCFG_Flag);
emilmont 77:869cf507173a 256 void SYSCFG_ClearFlag(uint32_t SYSCFG_Flag);
emilmont 77:869cf507173a 257
emilmont 77:869cf507173a 258 #ifdef __cplusplus
emilmont 77:869cf507173a 259 }
emilmont 77:869cf507173a 260 #endif
emilmont 77:869cf507173a 261
emilmont 77:869cf507173a 262 #endif /*__STM32F0XX_SYSCFG_H */
emilmont 77:869cf507173a 263
emilmont 77:869cf507173a 264 /**
emilmont 77:869cf507173a 265 * @}
emilmont 77:869cf507173a 266 */
emilmont 77:869cf507173a 267
emilmont 77:869cf507173a 268 /**
emilmont 77:869cf507173a 269 * @}
emilmont 77:869cf507173a 270 */
emilmont 77:869cf507173a 271
emilmont 77:869cf507173a 272 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/