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TARGET_NUCLEO_F411RE/stm32f4xx_ll_sdmmc.h@121:672067c3ada4, 2016-04-14 (annotated)

Committer:
elijahorr
Date:
Thu Apr 14 07:28:54 2016 +0000
Revision:
121:672067c3ada4
Parent:
110:165afa46840b 
.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 86:04dd9b1680ae 1 /**
bogdanm 86:04dd9b1680ae 2 ******************************************************************************
bogdanm 86:04dd9b1680ae 3 * @file stm32f4xx_ll_sdmmc.h
bogdanm 86:04dd9b1680ae 4 * @author MCD Application Team
Kojto 110:165afa46840b 5 * @version V1.4.1
Kojto 110:165afa46840b 6 * @date 09-October-2015
bogdanm 86:04dd9b1680ae 7 * @brief Header file of SDMMC HAL module.
bogdanm 86:04dd9b1680ae 8 ******************************************************************************
bogdanm 86:04dd9b1680ae 9 * @attention
bogdanm 86:04dd9b1680ae 10 *
Kojto 99:dbbf35b96557 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 86:04dd9b1680ae 12 *
bogdanm 86:04dd9b1680ae 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 86:04dd9b1680ae 14 * are permitted provided that the following conditions are met:
bogdanm 86:04dd9b1680ae 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 86:04dd9b1680ae 16 * this list of conditions and the following disclaimer.
bogdanm 86:04dd9b1680ae 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 86:04dd9b1680ae 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 86:04dd9b1680ae 19 * and/or other materials provided with the distribution.
bogdanm 86:04dd9b1680ae 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 86:04dd9b1680ae 21 * may be used to endorse or promote products derived from this software
bogdanm 86:04dd9b1680ae 22 * without specific prior written permission.
bogdanm 86:04dd9b1680ae 23 *
bogdanm 86:04dd9b1680ae 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 86:04dd9b1680ae 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 86:04dd9b1680ae 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 86:04dd9b1680ae 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 86:04dd9b1680ae 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 86:04dd9b1680ae 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 86:04dd9b1680ae 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 86:04dd9b1680ae 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 86:04dd9b1680ae 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 86:04dd9b1680ae 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 86:04dd9b1680ae 34 *
bogdanm 86:04dd9b1680ae 35 ******************************************************************************
bogdanm 86:04dd9b1680ae 36 */
bogdanm 86:04dd9b1680ae 37
bogdanm 86:04dd9b1680ae 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 86:04dd9b1680ae 39 #ifndef __STM32F4xx_LL_SDMMC_H
bogdanm 86:04dd9b1680ae 40 #define __STM32F4xx_LL_SDMMC_H
bogdanm 86:04dd9b1680ae 41
bogdanm 86:04dd9b1680ae 42 #ifdef __cplusplus
bogdanm 86:04dd9b1680ae 43 extern "C" {
bogdanm 86:04dd9b1680ae 44 #endif
Kojto 110:165afa46840b 45 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
Kojto 110:165afa46840b 46 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
Kojto 110:165afa46840b 47 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
Kojto 110:165afa46840b 48 defined(STM32F469xx) || defined(STM32F479xx)
bogdanm 86:04dd9b1680ae 49 /* Includes ------------------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 50 #include "stm32f4xx_hal_def.h"
bogdanm 86:04dd9b1680ae 51
bogdanm 86:04dd9b1680ae 52 /** @addtogroup STM32F4xx_Driver
bogdanm 86:04dd9b1680ae 53 * @{
bogdanm 86:04dd9b1680ae 54 */
bogdanm 86:04dd9b1680ae 55
Kojto 99:dbbf35b96557 56 /** @addtogroup SDMMC_LL
bogdanm 86:04dd9b1680ae 57 * @{
bogdanm 86:04dd9b1680ae 58 */
bogdanm 86:04dd9b1680ae 59
bogdanm 86:04dd9b1680ae 60 /* Exported types ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 61 /** @defgroup SDMMC_LL_Exported_Types SDMMC_LL Exported Types
bogdanm 86:04dd9b1680ae 62 * @{
bogdanm 86:04dd9b1680ae 63 */
bogdanm 86:04dd9b1680ae 64
bogdanm 86:04dd9b1680ae 65 /**
bogdanm 86:04dd9b1680ae 66 * @brief SDMMC Configuration Structure definition
bogdanm 86:04dd9b1680ae 67 */
bogdanm 86:04dd9b1680ae 68 typedef struct
bogdanm 86:04dd9b1680ae 69 {
bogdanm 86:04dd9b1680ae 70 uint32_t ClockEdge; /*!< Specifies the clock transition on which the bit capture is made.
bogdanm 86:04dd9b1680ae 71 This parameter can be a value of @ref SDIO_Clock_Edge */
bogdanm 86:04dd9b1680ae 72
bogdanm 86:04dd9b1680ae 73 uint32_t ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is
bogdanm 86:04dd9b1680ae 74 enabled or disabled.
bogdanm 86:04dd9b1680ae 75 This parameter can be a value of @ref SDIO_Clock_Bypass */
bogdanm 86:04dd9b1680ae 76
bogdanm 86:04dd9b1680ae 77 uint32_t ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or
bogdanm 86:04dd9b1680ae 78 disabled when the bus is idle.
bogdanm 86:04dd9b1680ae 79 This parameter can be a value of @ref SDIO_Clock_Power_Save */
bogdanm 86:04dd9b1680ae 80
bogdanm 86:04dd9b1680ae 81 uint32_t BusWide; /*!< Specifies the SDIO bus width.
bogdanm 86:04dd9b1680ae 82 This parameter can be a value of @ref SDIO_Bus_Wide */
bogdanm 86:04dd9b1680ae 83
bogdanm 86:04dd9b1680ae 84 uint32_t HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled.
bogdanm 86:04dd9b1680ae 85 This parameter can be a value of @ref SDIO_Hardware_Flow_Control */
bogdanm 86:04dd9b1680ae 86
bogdanm 86:04dd9b1680ae 87 uint32_t ClockDiv; /*!< Specifies the clock frequency of the SDIO controller.
bogdanm 86:04dd9b1680ae 88 This parameter can be a value between Min_Data = 0 and Max_Data = 255 */
bogdanm 86:04dd9b1680ae 89
bogdanm 86:04dd9b1680ae 90 }SDIO_InitTypeDef;
bogdanm 86:04dd9b1680ae 91
bogdanm 86:04dd9b1680ae 92
bogdanm 86:04dd9b1680ae 93 /**
bogdanm 86:04dd9b1680ae 94 * @brief SDIO Command Control structure
bogdanm 86:04dd9b1680ae 95 */
bogdanm 86:04dd9b1680ae 96 typedef struct
bogdanm 86:04dd9b1680ae 97 {
bogdanm 86:04dd9b1680ae 98 uint32_t Argument; /*!< Specifies the SDIO command argument which is sent
bogdanm 86:04dd9b1680ae 99 to a card as part of a command message. If a command
bogdanm 86:04dd9b1680ae 100 contains an argument, it must be loaded into this register
bogdanm 86:04dd9b1680ae 101 before writing the command to the command register. */
bogdanm 86:04dd9b1680ae 102
bogdanm 86:04dd9b1680ae 103 uint32_t CmdIndex; /*!< Specifies the SDIO command index. It must be Min_Data = 0 and
bogdanm 86:04dd9b1680ae 104 Max_Data = 64 */
bogdanm 86:04dd9b1680ae 105
bogdanm 86:04dd9b1680ae 106 uint32_t Response; /*!< Specifies the SDIO response type.
bogdanm 86:04dd9b1680ae 107 This parameter can be a value of @ref SDIO_Response_Type */
bogdanm 86:04dd9b1680ae 108
bogdanm 86:04dd9b1680ae 109 uint32_t WaitForInterrupt; /*!< Specifies whether SDIO wait for interrupt request is
bogdanm 86:04dd9b1680ae 110 enabled or disabled.
bogdanm 86:04dd9b1680ae 111 This parameter can be a value of @ref SDIO_Wait_Interrupt_State */
bogdanm 86:04dd9b1680ae 112
bogdanm 86:04dd9b1680ae 113 uint32_t CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM)
bogdanm 86:04dd9b1680ae 114 is enabled or disabled.
bogdanm 86:04dd9b1680ae 115 This parameter can be a value of @ref SDIO_CPSM_State */
bogdanm 86:04dd9b1680ae 116 }SDIO_CmdInitTypeDef;
bogdanm 86:04dd9b1680ae 117
bogdanm 86:04dd9b1680ae 118
bogdanm 86:04dd9b1680ae 119 /**
bogdanm 86:04dd9b1680ae 120 * @brief SDIO Data Control structure
bogdanm 86:04dd9b1680ae 121 */
bogdanm 86:04dd9b1680ae 122 typedef struct
bogdanm 86:04dd9b1680ae 123 {
bogdanm 86:04dd9b1680ae 124 uint32_t DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */
bogdanm 86:04dd9b1680ae 125
bogdanm 86:04dd9b1680ae 126 uint32_t DataLength; /*!< Specifies the number of data bytes to be transferred. */
bogdanm 86:04dd9b1680ae 127
bogdanm 86:04dd9b1680ae 128 uint32_t DataBlockSize; /*!< Specifies the data block size for block transfer.
bogdanm 86:04dd9b1680ae 129 This parameter can be a value of @ref SDIO_Data_Block_Size */
bogdanm 86:04dd9b1680ae 130
bogdanm 86:04dd9b1680ae 131 uint32_t TransferDir; /*!< Specifies the data transfer direction, whether the transfer
bogdanm 86:04dd9b1680ae 132 is a read or write.
bogdanm 86:04dd9b1680ae 133 This parameter can be a value of @ref SDIO_Transfer_Direction */
bogdanm 86:04dd9b1680ae 134
bogdanm 86:04dd9b1680ae 135 uint32_t TransferMode; /*!< Specifies whether data transfer is in stream or block mode.
bogdanm 86:04dd9b1680ae 136 This parameter can be a value of @ref SDIO_Transfer_Type */
bogdanm 86:04dd9b1680ae 137
bogdanm 86:04dd9b1680ae 138 uint32_t DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM)
bogdanm 86:04dd9b1680ae 139 is enabled or disabled.
bogdanm 86:04dd9b1680ae 140 This parameter can be a value of @ref SDIO_DPSM_State */
bogdanm 86:04dd9b1680ae 141 }SDIO_DataInitTypeDef;
bogdanm 86:04dd9b1680ae 142
bogdanm 86:04dd9b1680ae 143 /**
bogdanm 86:04dd9b1680ae 144 * @}
bogdanm 86:04dd9b1680ae 145 */
bogdanm 86:04dd9b1680ae 146
bogdanm 86:04dd9b1680ae 147 /* Exported constants --------------------------------------------------------*/
Kojto 99:dbbf35b96557 148 /** @defgroup SDMMC_LL_Exported_Constants SDMMC_LL Exported Constants
bogdanm 86:04dd9b1680ae 149 * @{
bogdanm 86:04dd9b1680ae 150 */
bogdanm 86:04dd9b1680ae 151
Kojto 99:dbbf35b96557 152 /** @defgroup SDIO_Clock_Edge Clock Edge
bogdanm 86:04dd9b1680ae 153 * @{
bogdanm 86:04dd9b1680ae 154 */
bogdanm 86:04dd9b1680ae 155 #define SDIO_CLOCK_EDGE_RISING ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 156 #define SDIO_CLOCK_EDGE_FALLING SDIO_CLKCR_NEGEDGE
bogdanm 86:04dd9b1680ae 157
bogdanm 86:04dd9b1680ae 158 #define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_CLOCK_EDGE_RISING) || \
bogdanm 86:04dd9b1680ae 159 ((EDGE) == SDIO_CLOCK_EDGE_FALLING))
bogdanm 86:04dd9b1680ae 160 /**
bogdanm 86:04dd9b1680ae 161 * @}
bogdanm 86:04dd9b1680ae 162 */
bogdanm 86:04dd9b1680ae 163
Kojto 99:dbbf35b96557 164 /** @defgroup SDIO_Clock_Bypass Clock Bypass
bogdanm 86:04dd9b1680ae 165 * @{
bogdanm 86:04dd9b1680ae 166 */
bogdanm 86:04dd9b1680ae 167 #define SDIO_CLOCK_BYPASS_DISABLE ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 168 #define SDIO_CLOCK_BYPASS_ENABLE SDIO_CLKCR_BYPASS
bogdanm 86:04dd9b1680ae 169
bogdanm 86:04dd9b1680ae 170 #define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_CLOCK_BYPASS_DISABLE) || \
bogdanm 86:04dd9b1680ae 171 ((BYPASS) == SDIO_CLOCK_BYPASS_ENABLE))
bogdanm 86:04dd9b1680ae 172 /**
bogdanm 86:04dd9b1680ae 173 * @}
bogdanm 86:04dd9b1680ae 174 */
bogdanm 86:04dd9b1680ae 175
Kojto 99:dbbf35b96557 176 /** @defgroup SDIO_Clock_Power_Save Clock Power Saving
bogdanm 86:04dd9b1680ae 177 * @{
bogdanm 86:04dd9b1680ae 178 */
bogdanm 86:04dd9b1680ae 179 #define SDIO_CLOCK_POWER_SAVE_DISABLE ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 180 #define SDIO_CLOCK_POWER_SAVE_ENABLE SDIO_CLKCR_PWRSAV
bogdanm 86:04dd9b1680ae 181
bogdanm 86:04dd9b1680ae 182 #define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_CLOCK_POWER_SAVE_DISABLE) || \
bogdanm 86:04dd9b1680ae 183 ((SAVE) == SDIO_CLOCK_POWER_SAVE_ENABLE))
bogdanm 86:04dd9b1680ae 184 /**
bogdanm 86:04dd9b1680ae 185 * @}
bogdanm 86:04dd9b1680ae 186 */
bogdanm 86:04dd9b1680ae 187
Kojto 99:dbbf35b96557 188 /** @defgroup SDIO_Bus_Wide Bus Width
bogdanm 86:04dd9b1680ae 189 * @{
bogdanm 86:04dd9b1680ae 190 */
bogdanm 86:04dd9b1680ae 191 #define SDIO_BUS_WIDE_1B ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 192 #define SDIO_BUS_WIDE_4B SDIO_CLKCR_WIDBUS_0
bogdanm 86:04dd9b1680ae 193 #define SDIO_BUS_WIDE_8B SDIO_CLKCR_WIDBUS_1
bogdanm 86:04dd9b1680ae 194
bogdanm 86:04dd9b1680ae 195 #define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BUS_WIDE_1B) || \
bogdanm 86:04dd9b1680ae 196 ((WIDE) == SDIO_BUS_WIDE_4B) || \
bogdanm 86:04dd9b1680ae 197 ((WIDE) == SDIO_BUS_WIDE_8B))
bogdanm 86:04dd9b1680ae 198 /**
bogdanm 86:04dd9b1680ae 199 * @}
bogdanm 86:04dd9b1680ae 200 */
bogdanm 86:04dd9b1680ae 201
Kojto 99:dbbf35b96557 202 /** @defgroup SDIO_Hardware_Flow_Control Hardware Flow Control
bogdanm 86:04dd9b1680ae 203 * @{
bogdanm 86:04dd9b1680ae 204 */
bogdanm 86:04dd9b1680ae 205 #define SDIO_HARDWARE_FLOW_CONTROL_DISABLE ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 206 #define SDIO_HARDWARE_FLOW_CONTROL_ENABLE SDIO_CLKCR_HWFC_EN
bogdanm 86:04dd9b1680ae 207
bogdanm 86:04dd9b1680ae 208 #define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HARDWARE_FLOW_CONTROL_DISABLE) || \
bogdanm 86:04dd9b1680ae 209 ((CONTROL) == SDIO_HARDWARE_FLOW_CONTROL_ENABLE))
bogdanm 86:04dd9b1680ae 210 /**
bogdanm 86:04dd9b1680ae 211 * @}
bogdanm 86:04dd9b1680ae 212 */
bogdanm 86:04dd9b1680ae 213
Kojto 99:dbbf35b96557 214 /** @defgroup SDIO_Clock_Division Clock Division
bogdanm 86:04dd9b1680ae 215 * @{
bogdanm 86:04dd9b1680ae 216 */
bogdanm 86:04dd9b1680ae 217 #define IS_SDIO_CLKDIV(DIV) ((DIV) <= 0xFF)
bogdanm 86:04dd9b1680ae 218 /**
bogdanm 86:04dd9b1680ae 219 * @}
bogdanm 86:04dd9b1680ae 220 */
bogdanm 86:04dd9b1680ae 221
Kojto 99:dbbf35b96557 222 /** @defgroup SDIO_Command_Index Command Index
bogdanm 86:04dd9b1680ae 223 * @{
bogdanm 86:04dd9b1680ae 224 */
bogdanm 86:04dd9b1680ae 225 #define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40)
bogdanm 86:04dd9b1680ae 226 /**
bogdanm 86:04dd9b1680ae 227 * @}
bogdanm 86:04dd9b1680ae 228 */
bogdanm 86:04dd9b1680ae 229
Kojto 99:dbbf35b96557 230 /** @defgroup SDIO_Response_Type Response Type
bogdanm 86:04dd9b1680ae 231 * @{
bogdanm 86:04dd9b1680ae 232 */
bogdanm 86:04dd9b1680ae 233 #define SDIO_RESPONSE_NO ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 234 #define SDIO_RESPONSE_SHORT SDIO_CMD_WAITRESP_0
bogdanm 86:04dd9b1680ae 235 #define SDIO_RESPONSE_LONG SDIO_CMD_WAITRESP
bogdanm 86:04dd9b1680ae 236
bogdanm 86:04dd9b1680ae 237 #define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_RESPONSE_NO) || \
bogdanm 86:04dd9b1680ae 238 ((RESPONSE) == SDIO_RESPONSE_SHORT) || \
bogdanm 86:04dd9b1680ae 239 ((RESPONSE) == SDIO_RESPONSE_LONG))
bogdanm 86:04dd9b1680ae 240 /**
bogdanm 86:04dd9b1680ae 241 * @}
bogdanm 86:04dd9b1680ae 242 */
bogdanm 86:04dd9b1680ae 243
Kojto 99:dbbf35b96557 244 /** @defgroup SDIO_Wait_Interrupt_State Wait Interrupt
bogdanm 86:04dd9b1680ae 245 * @{
bogdanm 86:04dd9b1680ae 246 */
bogdanm 86:04dd9b1680ae 247 #define SDIO_WAIT_NO ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 248 #define SDIO_WAIT_IT SDIO_CMD_WAITINT
bogdanm 86:04dd9b1680ae 249 #define SDIO_WAIT_PEND SDIO_CMD_WAITPEND
bogdanm 86:04dd9b1680ae 250
bogdanm 86:04dd9b1680ae 251 #define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_WAIT_NO) || \
bogdanm 86:04dd9b1680ae 252 ((WAIT) == SDIO_WAIT_IT) || \
bogdanm 86:04dd9b1680ae 253 ((WAIT) == SDIO_WAIT_PEND))
bogdanm 86:04dd9b1680ae 254 /**
bogdanm 86:04dd9b1680ae 255 * @}
bogdanm 86:04dd9b1680ae 256 */
bogdanm 86:04dd9b1680ae 257
Kojto 99:dbbf35b96557 258 /** @defgroup SDIO_CPSM_State CPSM State
bogdanm 86:04dd9b1680ae 259 * @{
bogdanm 86:04dd9b1680ae 260 */
bogdanm 86:04dd9b1680ae 261 #define SDIO_CPSM_DISABLE ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 262 #define SDIO_CPSM_ENABLE SDIO_CMD_CPSMEN
bogdanm 86:04dd9b1680ae 263
bogdanm 86:04dd9b1680ae 264 #define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_DISABLE) || \
bogdanm 86:04dd9b1680ae 265 ((CPSM) == SDIO_CPSM_ENABLE))
bogdanm 86:04dd9b1680ae 266 /**
bogdanm 86:04dd9b1680ae 267 * @}
bogdanm 86:04dd9b1680ae 268 */
bogdanm 86:04dd9b1680ae 269
Kojto 99:dbbf35b96557 270 /** @defgroup SDIO_Response_Registers Response Register
bogdanm 86:04dd9b1680ae 271 * @{
bogdanm 86:04dd9b1680ae 272 */
bogdanm 86:04dd9b1680ae 273 #define SDIO_RESP1 ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 274 #define SDIO_RESP2 ((uint32_t)0x00000004)
bogdanm 86:04dd9b1680ae 275 #define SDIO_RESP3 ((uint32_t)0x00000008)
bogdanm 86:04dd9b1680ae 276 #define SDIO_RESP4 ((uint32_t)0x0000000C)
bogdanm 86:04dd9b1680ae 277
bogdanm 86:04dd9b1680ae 278 #define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || \
bogdanm 86:04dd9b1680ae 279 ((RESP) == SDIO_RESP2) || \
bogdanm 86:04dd9b1680ae 280 ((RESP) == SDIO_RESP3) || \
bogdanm 86:04dd9b1680ae 281 ((RESP) == SDIO_RESP4))
bogdanm 86:04dd9b1680ae 282 /**
bogdanm 86:04dd9b1680ae 283 * @}
bogdanm 86:04dd9b1680ae 284 */
bogdanm 86:04dd9b1680ae 285
Kojto 99:dbbf35b96557 286 /** @defgroup SDIO_Data_Length Data Lenght
bogdanm 86:04dd9b1680ae 287 * @{
bogdanm 86:04dd9b1680ae 288 */
bogdanm 86:04dd9b1680ae 289 #define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF)
bogdanm 86:04dd9b1680ae 290 /**
bogdanm 86:04dd9b1680ae 291 * @}
bogdanm 86:04dd9b1680ae 292 */
bogdanm 86:04dd9b1680ae 293
Kojto 99:dbbf35b96557 294 /** @defgroup SDIO_Data_Block_Size Data Block Size
bogdanm 86:04dd9b1680ae 295 * @{
bogdanm 86:04dd9b1680ae 296 */
bogdanm 86:04dd9b1680ae 297 #define SDIO_DATABLOCK_SIZE_1B ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 298 #define SDIO_DATABLOCK_SIZE_2B SDIO_DCTRL_DBLOCKSIZE_0
bogdanm 86:04dd9b1680ae 299 #define SDIO_DATABLOCK_SIZE_4B SDIO_DCTRL_DBLOCKSIZE_1
bogdanm 86:04dd9b1680ae 300 #define SDIO_DATABLOCK_SIZE_8B ((uint32_t)0x00000030)
bogdanm 86:04dd9b1680ae 301 #define SDIO_DATABLOCK_SIZE_16B SDIO_DCTRL_DBLOCKSIZE_2
bogdanm 86:04dd9b1680ae 302 #define SDIO_DATABLOCK_SIZE_32B ((uint32_t)0x00000050)
bogdanm 86:04dd9b1680ae 303 #define SDIO_DATABLOCK_SIZE_64B ((uint32_t)0x00000060)
bogdanm 86:04dd9b1680ae 304 #define SDIO_DATABLOCK_SIZE_128B ((uint32_t)0x00000070)
bogdanm 86:04dd9b1680ae 305 #define SDIO_DATABLOCK_SIZE_256B SDIO_DCTRL_DBLOCKSIZE_3
bogdanm 86:04dd9b1680ae 306 #define SDIO_DATABLOCK_SIZE_512B ((uint32_t)0x00000090)
bogdanm 86:04dd9b1680ae 307 #define SDIO_DATABLOCK_SIZE_1024B ((uint32_t)0x000000A0)
bogdanm 86:04dd9b1680ae 308 #define SDIO_DATABLOCK_SIZE_2048B ((uint32_t)0x000000B0)
bogdanm 86:04dd9b1680ae 309 #define SDIO_DATABLOCK_SIZE_4096B ((uint32_t)0x000000C0)
bogdanm 86:04dd9b1680ae 310 #define SDIO_DATABLOCK_SIZE_8192B ((uint32_t)0x000000D0)
bogdanm 86:04dd9b1680ae 311 #define SDIO_DATABLOCK_SIZE_16384B ((uint32_t)0x000000E0)
bogdanm 86:04dd9b1680ae 312
bogdanm 86:04dd9b1680ae 313 #define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DATABLOCK_SIZE_1B) || \
bogdanm 86:04dd9b1680ae 314 ((SIZE) == SDIO_DATABLOCK_SIZE_2B) || \
bogdanm 86:04dd9b1680ae 315 ((SIZE) == SDIO_DATABLOCK_SIZE_4B) || \
bogdanm 86:04dd9b1680ae 316 ((SIZE) == SDIO_DATABLOCK_SIZE_8B) || \
bogdanm 86:04dd9b1680ae 317 ((SIZE) == SDIO_DATABLOCK_SIZE_16B) || \
bogdanm 86:04dd9b1680ae 318 ((SIZE) == SDIO_DATABLOCK_SIZE_32B) || \
bogdanm 86:04dd9b1680ae 319 ((SIZE) == SDIO_DATABLOCK_SIZE_64B) || \
bogdanm 86:04dd9b1680ae 320 ((SIZE) == SDIO_DATABLOCK_SIZE_128B) || \
bogdanm 86:04dd9b1680ae 321 ((SIZE) == SDIO_DATABLOCK_SIZE_256B) || \
bogdanm 86:04dd9b1680ae 322 ((SIZE) == SDIO_DATABLOCK_SIZE_512B) || \
bogdanm 86:04dd9b1680ae 323 ((SIZE) == SDIO_DATABLOCK_SIZE_1024B) || \
bogdanm 86:04dd9b1680ae 324 ((SIZE) == SDIO_DATABLOCK_SIZE_2048B) || \
bogdanm 86:04dd9b1680ae 325 ((SIZE) == SDIO_DATABLOCK_SIZE_4096B) || \
bogdanm 86:04dd9b1680ae 326 ((SIZE) == SDIO_DATABLOCK_SIZE_8192B) || \
bogdanm 86:04dd9b1680ae 327 ((SIZE) == SDIO_DATABLOCK_SIZE_16384B))
bogdanm 86:04dd9b1680ae 328 /**
bogdanm 86:04dd9b1680ae 329 * @}
bogdanm 86:04dd9b1680ae 330 */
bogdanm 86:04dd9b1680ae 331
Kojto 99:dbbf35b96557 332 /** @defgroup SDIO_Transfer_Direction Transfer Direction
bogdanm 86:04dd9b1680ae 333 * @{
bogdanm 86:04dd9b1680ae 334 */
bogdanm 86:04dd9b1680ae 335 #define SDIO_TRANSFER_DIR_TO_CARD ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 336 #define SDIO_TRANSFER_DIR_TO_SDIO SDIO_DCTRL_DTDIR
bogdanm 86:04dd9b1680ae 337
bogdanm 86:04dd9b1680ae 338 #define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TRANSFER_DIR_TO_CARD) || \
bogdanm 86:04dd9b1680ae 339 ((DIR) == SDIO_TRANSFER_DIR_TO_SDIO))
bogdanm 86:04dd9b1680ae 340 /**
bogdanm 86:04dd9b1680ae 341 * @}
bogdanm 86:04dd9b1680ae 342 */
bogdanm 86:04dd9b1680ae 343
Kojto 99:dbbf35b96557 344 /** @defgroup SDIO_Transfer_Type Transfer Type
bogdanm 86:04dd9b1680ae 345 * @{
bogdanm 86:04dd9b1680ae 346 */
bogdanm 86:04dd9b1680ae 347 #define SDIO_TRANSFER_MODE_BLOCK ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 348 #define SDIO_TRANSFER_MODE_STREAM SDIO_DCTRL_DTMODE
bogdanm 86:04dd9b1680ae 349
bogdanm 86:04dd9b1680ae 350 #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TRANSFER_MODE_BLOCK) || \
bogdanm 86:04dd9b1680ae 351 ((MODE) == SDIO_TRANSFER_MODE_STREAM))
bogdanm 86:04dd9b1680ae 352 /**
bogdanm 86:04dd9b1680ae 353 * @}
bogdanm 86:04dd9b1680ae 354 */
bogdanm 86:04dd9b1680ae 355
Kojto 99:dbbf35b96557 356 /** @defgroup SDIO_DPSM_State DPSM State
bogdanm 86:04dd9b1680ae 357 * @{
bogdanm 86:04dd9b1680ae 358 */
bogdanm 86:04dd9b1680ae 359 #define SDIO_DPSM_DISABLE ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 360 #define SDIO_DPSM_ENABLE SDIO_DCTRL_DTEN
bogdanm 86:04dd9b1680ae 361
bogdanm 86:04dd9b1680ae 362 #define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_DISABLE) ||\
bogdanm 86:04dd9b1680ae 363 ((DPSM) == SDIO_DPSM_ENABLE))
bogdanm 86:04dd9b1680ae 364 /**
bogdanm 86:04dd9b1680ae 365 * @}
bogdanm 86:04dd9b1680ae 366 */
bogdanm 86:04dd9b1680ae 367
Kojto 99:dbbf35b96557 368 /** @defgroup SDIO_Read_Wait_Mode Read Wait Mode
bogdanm 86:04dd9b1680ae 369 * @{
bogdanm 86:04dd9b1680ae 370 */
Kojto 99:dbbf35b96557 371 #define SDIO_READ_WAIT_MODE_DATA2 ((uint32_t)0x00000000)
Kojto 99:dbbf35b96557 372 #define SDIO_READ_WAIT_MODE_CLK ((uint32_t)0x00000001)
bogdanm 86:04dd9b1680ae 373
bogdanm 86:04dd9b1680ae 374 #define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_READ_WAIT_MODE_CLK) || \
bogdanm 86:04dd9b1680ae 375 ((MODE) == SDIO_READ_WAIT_MODE_DATA2))
bogdanm 86:04dd9b1680ae 376 /**
bogdanm 86:04dd9b1680ae 377 * @}
bogdanm 86:04dd9b1680ae 378 */
bogdanm 86:04dd9b1680ae 379
Kojto 99:dbbf35b96557 380 /** @defgroup SDIO_Interrupt_sources Interrupt Sources
bogdanm 86:04dd9b1680ae 381 * @{
bogdanm 86:04dd9b1680ae 382 */
bogdanm 86:04dd9b1680ae 383 #define SDIO_IT_CCRCFAIL SDIO_STA_CCRCFAIL
bogdanm 86:04dd9b1680ae 384 #define SDIO_IT_DCRCFAIL SDIO_STA_DCRCFAIL
bogdanm 86:04dd9b1680ae 385 #define SDIO_IT_CTIMEOUT SDIO_STA_CTIMEOUT
bogdanm 86:04dd9b1680ae 386 #define SDIO_IT_DTIMEOUT SDIO_STA_DTIMEOUT
bogdanm 86:04dd9b1680ae 387 #define SDIO_IT_TXUNDERR SDIO_STA_TXUNDERR
bogdanm 86:04dd9b1680ae 388 #define SDIO_IT_RXOVERR SDIO_STA_RXOVERR
bogdanm 86:04dd9b1680ae 389 #define SDIO_IT_CMDREND SDIO_STA_CMDREND
bogdanm 86:04dd9b1680ae 390 #define SDIO_IT_CMDSENT SDIO_STA_CMDSENT
bogdanm 86:04dd9b1680ae 391 #define SDIO_IT_DATAEND SDIO_STA_DATAEND
bogdanm 86:04dd9b1680ae 392 #define SDIO_IT_STBITERR SDIO_STA_STBITERR
bogdanm 86:04dd9b1680ae 393 #define SDIO_IT_DBCKEND SDIO_STA_DBCKEND
bogdanm 86:04dd9b1680ae 394 #define SDIO_IT_CMDACT SDIO_STA_CMDACT
bogdanm 86:04dd9b1680ae 395 #define SDIO_IT_TXACT SDIO_STA_TXACT
bogdanm 86:04dd9b1680ae 396 #define SDIO_IT_RXACT SDIO_STA_RXACT
bogdanm 86:04dd9b1680ae 397 #define SDIO_IT_TXFIFOHE SDIO_STA_TXFIFOHE
bogdanm 86:04dd9b1680ae 398 #define SDIO_IT_RXFIFOHF SDIO_STA_RXFIFOHF
bogdanm 86:04dd9b1680ae 399 #define SDIO_IT_TXFIFOF SDIO_STA_TXFIFOF
bogdanm 86:04dd9b1680ae 400 #define SDIO_IT_RXFIFOF SDIO_STA_RXFIFOF
bogdanm 86:04dd9b1680ae 401 #define SDIO_IT_TXFIFOE SDIO_STA_TXFIFOE
bogdanm 86:04dd9b1680ae 402 #define SDIO_IT_RXFIFOE SDIO_STA_RXFIFOE
bogdanm 86:04dd9b1680ae 403 #define SDIO_IT_TXDAVL SDIO_STA_TXDAVL
bogdanm 86:04dd9b1680ae 404 #define SDIO_IT_RXDAVL SDIO_STA_RXDAVL
bogdanm 86:04dd9b1680ae 405 #define SDIO_IT_SDIOIT SDIO_STA_SDIOIT
bogdanm 86:04dd9b1680ae 406 #define SDIO_IT_CEATAEND SDIO_STA_CEATAEND
bogdanm 86:04dd9b1680ae 407 /**
bogdanm 86:04dd9b1680ae 408 * @}
bogdanm 86:04dd9b1680ae 409 */
bogdanm 86:04dd9b1680ae 410
Kojto 99:dbbf35b96557 411 /** @defgroup SDIO_Flags Flags
bogdanm 86:04dd9b1680ae 412 * @{
bogdanm 86:04dd9b1680ae 413 */
bogdanm 86:04dd9b1680ae 414 #define SDIO_FLAG_CCRCFAIL SDIO_STA_CCRCFAIL
bogdanm 86:04dd9b1680ae 415 #define SDIO_FLAG_DCRCFAIL SDIO_STA_DCRCFAIL
bogdanm 86:04dd9b1680ae 416 #define SDIO_FLAG_CTIMEOUT SDIO_STA_CTIMEOUT
bogdanm 86:04dd9b1680ae 417 #define SDIO_FLAG_DTIMEOUT SDIO_STA_DTIMEOUT
bogdanm 86:04dd9b1680ae 418 #define SDIO_FLAG_TXUNDERR SDIO_STA_TXUNDERR
bogdanm 86:04dd9b1680ae 419 #define SDIO_FLAG_RXOVERR SDIO_STA_RXOVERR
bogdanm 86:04dd9b1680ae 420 #define SDIO_FLAG_CMDREND SDIO_STA_CMDREND
bogdanm 86:04dd9b1680ae 421 #define SDIO_FLAG_CMDSENT SDIO_STA_CMDSENT
bogdanm 86:04dd9b1680ae 422 #define SDIO_FLAG_DATAEND SDIO_STA_DATAEND
bogdanm 86:04dd9b1680ae 423 #define SDIO_FLAG_STBITERR SDIO_STA_STBITERR
bogdanm 86:04dd9b1680ae 424 #define SDIO_FLAG_DBCKEND SDIO_STA_DBCKEND
bogdanm 86:04dd9b1680ae 425 #define SDIO_FLAG_CMDACT SDIO_STA_CMDACT
bogdanm 86:04dd9b1680ae 426 #define SDIO_FLAG_TXACT SDIO_STA_TXACT
bogdanm 86:04dd9b1680ae 427 #define SDIO_FLAG_RXACT SDIO_STA_RXACT
bogdanm 86:04dd9b1680ae 428 #define SDIO_FLAG_TXFIFOHE SDIO_STA_TXFIFOHE
bogdanm 86:04dd9b1680ae 429 #define SDIO_FLAG_RXFIFOHF SDIO_STA_RXFIFOHF
bogdanm 86:04dd9b1680ae 430 #define SDIO_FLAG_TXFIFOF SDIO_STA_TXFIFOF
bogdanm 86:04dd9b1680ae 431 #define SDIO_FLAG_RXFIFOF SDIO_STA_RXFIFOF
bogdanm 86:04dd9b1680ae 432 #define SDIO_FLAG_TXFIFOE SDIO_STA_TXFIFOE
bogdanm 86:04dd9b1680ae 433 #define SDIO_FLAG_RXFIFOE SDIO_STA_RXFIFOE
bogdanm 86:04dd9b1680ae 434 #define SDIO_FLAG_TXDAVL SDIO_STA_TXDAVL
bogdanm 86:04dd9b1680ae 435 #define SDIO_FLAG_RXDAVL SDIO_STA_RXDAVL
bogdanm 86:04dd9b1680ae 436 #define SDIO_FLAG_SDIOIT SDIO_STA_SDIOIT
bogdanm 86:04dd9b1680ae 437 #define SDIO_FLAG_CEATAEND SDIO_STA_CEATAEND
Kojto 99:dbbf35b96557 438 /**
Kojto 99:dbbf35b96557 439 * @}
Kojto 99:dbbf35b96557 440 */
bogdanm 86:04dd9b1680ae 441
bogdanm 86:04dd9b1680ae 442 /**
bogdanm 86:04dd9b1680ae 443 * @}
bogdanm 86:04dd9b1680ae 444 */
Kojto 99:dbbf35b96557 445 /* Exported macro ------------------------------------------------------------*/
Kojto 99:dbbf35b96557 446 /** @defgroup SDMMC_LL_Exported_macros SDMMC_LL Exported Macros
bogdanm 86:04dd9b1680ae 447 * @{
Kojto 99:dbbf35b96557 448 */
bogdanm 86:04dd9b1680ae 449
Kojto 99:dbbf35b96557 450 /** @defgroup SDMMC_LL_Alias_Region Bit Address in the alias region
Kojto 99:dbbf35b96557 451 * @{
bogdanm 86:04dd9b1680ae 452 */
bogdanm 86:04dd9b1680ae 453 /* ------------ SDIO registers bit address in the alias region -------------- */
bogdanm 86:04dd9b1680ae 454 #define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE)
bogdanm 86:04dd9b1680ae 455
bogdanm 86:04dd9b1680ae 456 /* --- CLKCR Register ---*/
bogdanm 86:04dd9b1680ae 457 /* Alias word address of CLKEN bit */
bogdanm 86:04dd9b1680ae 458 #define CLKCR_OFFSET (SDIO_OFFSET + 0x04)
Kojto 99:dbbf35b96557 459 #define CLKEN_BITNUMBER 0x08
Kojto 99:dbbf35b96557 460 #define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32) + (CLKEN_BITNUMBER * 4))
bogdanm 86:04dd9b1680ae 461
bogdanm 86:04dd9b1680ae 462 /* --- CMD Register ---*/
bogdanm 86:04dd9b1680ae 463 /* Alias word address of SDIOSUSPEND bit */
bogdanm 86:04dd9b1680ae 464 #define CMD_OFFSET (SDIO_OFFSET + 0x0C)
Kojto 99:dbbf35b96557 465 #define SDIOSUSPEND_BITNUMBER 0x0B
Kojto 99:dbbf35b96557 466 #define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (SDIOSUSPEND_BITNUMBER * 4))
bogdanm 86:04dd9b1680ae 467
bogdanm 86:04dd9b1680ae 468 /* Alias word address of ENCMDCOMPL bit */
Kojto 99:dbbf35b96557 469 #define ENCMDCOMPL_BITNUMBER 0x0C
Kojto 99:dbbf35b96557 470 #define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ENCMDCOMPL_BITNUMBER * 4))
bogdanm 86:04dd9b1680ae 471
bogdanm 86:04dd9b1680ae 472 /* Alias word address of NIEN bit */
Kojto 99:dbbf35b96557 473 #define NIEN_BITNUMBER 0x0D
Kojto 99:dbbf35b96557 474 #define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (NIEN_BITNUMBER * 4))
bogdanm 86:04dd9b1680ae 475
bogdanm 86:04dd9b1680ae 476 /* Alias word address of ATACMD bit */
Kojto 99:dbbf35b96557 477 #define ATACMD_BITNUMBER 0x0E
Kojto 99:dbbf35b96557 478 #define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ATACMD_BITNUMBER * 4))
bogdanm 86:04dd9b1680ae 479
bogdanm 86:04dd9b1680ae 480 /* --- DCTRL Register ---*/
bogdanm 86:04dd9b1680ae 481 /* Alias word address of DMAEN bit */
bogdanm 86:04dd9b1680ae 482 #define DCTRL_OFFSET (SDIO_OFFSET + 0x2C)
Kojto 99:dbbf35b96557 483 #define DMAEN_BITNUMBER 0x03
Kojto 99:dbbf35b96557 484 #define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (DMAEN_BITNUMBER * 4))
bogdanm 86:04dd9b1680ae 485
bogdanm 86:04dd9b1680ae 486 /* Alias word address of RWSTART bit */
Kojto 99:dbbf35b96557 487 #define RWSTART_BITNUMBER 0x08
Kojto 99:dbbf35b96557 488 #define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BITNUMBER * 4))
bogdanm 86:04dd9b1680ae 489
bogdanm 86:04dd9b1680ae 490 /* Alias word address of RWSTOP bit */
Kojto 99:dbbf35b96557 491 #define RWSTOP_BITNUMBER 0x09
Kojto 99:dbbf35b96557 492 #define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTOP_BITNUMBER * 4))
bogdanm 86:04dd9b1680ae 493
bogdanm 86:04dd9b1680ae 494 /* Alias word address of RWMOD bit */
Kojto 99:dbbf35b96557 495 #define RWMOD_BITNUMBER 0x0A
Kojto 99:dbbf35b96557 496 #define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWMOD_BITNUMBER * 4))
bogdanm 86:04dd9b1680ae 497
bogdanm 86:04dd9b1680ae 498 /* Alias word address of SDIOEN bit */
Kojto 99:dbbf35b96557 499 #define SDIOEN_BITNUMBER 0x0B
Kojto 99:dbbf35b96557 500 #define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (SDIOEN_BITNUMBER * 4))
Kojto 99:dbbf35b96557 501 /**
Kojto 99:dbbf35b96557 502 * @}
Kojto 99:dbbf35b96557 503 */
Kojto 99:dbbf35b96557 504
Kojto 99:dbbf35b96557 505 /** @defgroup SDMMC_LL_Register Bits And Addresses Definitions
Kojto 99:dbbf35b96557 506 * @brief SDMMC_LL registers bit address in the alias region
Kojto 99:dbbf35b96557 507 * @{
Kojto 99:dbbf35b96557 508 */
bogdanm 86:04dd9b1680ae 509
bogdanm 86:04dd9b1680ae 510 /* ---------------------- SDIO registers bit mask --------------------------- */
bogdanm 86:04dd9b1680ae 511 /* --- CLKCR Register ---*/
bogdanm 86:04dd9b1680ae 512 /* CLKCR register clear mask */
bogdanm 86:04dd9b1680ae 513 #define CLKCR_CLEAR_MASK ((uint32_t)(SDIO_CLKCR_CLKDIV | SDIO_CLKCR_PWRSAV |\
bogdanm 86:04dd9b1680ae 514 SDIO_CLKCR_BYPASS | SDIO_CLKCR_WIDBUS |\
bogdanm 86:04dd9b1680ae 515 SDIO_CLKCR_NEGEDGE | SDIO_CLKCR_HWFC_EN))
bogdanm 86:04dd9b1680ae 516
bogdanm 86:04dd9b1680ae 517 /* --- PWRCTRL Register ---*/
bogdanm 86:04dd9b1680ae 518 /* --- DCTRL Register ---*/
bogdanm 86:04dd9b1680ae 519 /* SDIO DCTRL Clear Mask */
bogdanm 86:04dd9b1680ae 520 #define DCTRL_CLEAR_MASK ((uint32_t)(SDIO_DCTRL_DTEN | SDIO_DCTRL_DTDIR |\
bogdanm 86:04dd9b1680ae 521 SDIO_DCTRL_DTMODE | SDIO_DCTRL_DBLOCKSIZE))
bogdanm 86:04dd9b1680ae 522
bogdanm 86:04dd9b1680ae 523 /* --- CMD Register ---*/
bogdanm 86:04dd9b1680ae 524 /* CMD Register clear mask */
bogdanm 86:04dd9b1680ae 525 #define CMD_CLEAR_MASK ((uint32_t)(SDIO_CMD_CMDINDEX | SDIO_CMD_WAITRESP |\
bogdanm 86:04dd9b1680ae 526 SDIO_CMD_WAITINT | SDIO_CMD_WAITPEND |\
bogdanm 86:04dd9b1680ae 527 SDIO_CMD_CPSMEN | SDIO_CMD_SDIOSUSPEND))
bogdanm 86:04dd9b1680ae 528
bogdanm 86:04dd9b1680ae 529 /* SDIO RESP Registers Address */
bogdanm 86:04dd9b1680ae 530 #define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14))
bogdanm 86:04dd9b1680ae 531
Kojto 99:dbbf35b96557 532 /* SDIO Initialization Frequency (400KHz max) */
bogdanm 86:04dd9b1680ae 533 #define SDIO_INIT_CLK_DIV ((uint8_t)0x76)
bogdanm 86:04dd9b1680ae 534
bogdanm 86:04dd9b1680ae 535 /* SDIO Data Transfer Frequency (25MHz max) */
bogdanm 86:04dd9b1680ae 536 #define SDIO_TRANSFER_CLK_DIV ((uint8_t)0x0)
Kojto 99:dbbf35b96557 537 /**
Kojto 99:dbbf35b96557 538 * @}
Kojto 99:dbbf35b96557 539 */
bogdanm 86:04dd9b1680ae 540
Kojto 99:dbbf35b96557 541 /** @defgroup SDMMC_LL_Interrupt_Clock Interrupt And Clock Configuration
Kojto 99:dbbf35b96557 542 * @brief macros to handle interrupts and specific clock configurations
Kojto 99:dbbf35b96557 543 * @{
Kojto 99:dbbf35b96557 544 */
Kojto 99:dbbf35b96557 545
bogdanm 86:04dd9b1680ae 546 /**
bogdanm 86:04dd9b1680ae 547 * @brief Enable the SDIO device.
bogdanm 86:04dd9b1680ae 548 * @retval None
bogdanm 86:04dd9b1680ae 549 */
bogdanm 86:04dd9b1680ae 550 #define __SDIO_ENABLE() (*(__IO uint32_t *)CLKCR_CLKEN_BB = ENABLE)
bogdanm 86:04dd9b1680ae 551
bogdanm 86:04dd9b1680ae 552 /**
bogdanm 86:04dd9b1680ae 553 * @brief Disable the SDIO device.
bogdanm 86:04dd9b1680ae 554 * @retval None
bogdanm 86:04dd9b1680ae 555 */
bogdanm 86:04dd9b1680ae 556 #define __SDIO_DISABLE() (*(__IO uint32_t *)CLKCR_CLKEN_BB = DISABLE)
bogdanm 86:04dd9b1680ae 557
bogdanm 86:04dd9b1680ae 558 /**
bogdanm 86:04dd9b1680ae 559 * @brief Enable the SDIO DMA transfer.
bogdanm 86:04dd9b1680ae 560 * @retval None
bogdanm 86:04dd9b1680ae 561 */
bogdanm 86:04dd9b1680ae 562 #define __SDIO_DMA_ENABLE() (*(__IO uint32_t *)DCTRL_DMAEN_BB = ENABLE)
bogdanm 86:04dd9b1680ae 563
bogdanm 86:04dd9b1680ae 564 /**
bogdanm 86:04dd9b1680ae 565 * @brief Disable the SDIO DMA transfer.
bogdanm 86:04dd9b1680ae 566 * @retval None
bogdanm 86:04dd9b1680ae 567 */
bogdanm 86:04dd9b1680ae 568 #define __SDIO_DMA_DISABLE() (*(__IO uint32_t *)DCTRL_DMAEN_BB = DISABLE)
bogdanm 86:04dd9b1680ae 569
bogdanm 86:04dd9b1680ae 570 /**
bogdanm 86:04dd9b1680ae 571 * @brief Enable the SDIO device interrupt.
bogdanm 86:04dd9b1680ae 572 * @param __INSTANCE__ : Pointer to SDIO register base
bogdanm 86:04dd9b1680ae 573 * @param __INTERRUPT__ : specifies the SDIO interrupt sources to be enabled.
bogdanm 86:04dd9b1680ae 574 * This parameter can be one or a combination of the following values:
bogdanm 86:04dd9b1680ae 575 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 576 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 577 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 86:04dd9b1680ae 578 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 86:04dd9b1680ae 579 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 86:04dd9b1680ae 580 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 86:04dd9b1680ae 581 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 86:04dd9b1680ae 582 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 86:04dd9b1680ae 583 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 86:04dd9b1680ae 584 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 86:04dd9b1680ae 585 * bus mode interrupt
bogdanm 86:04dd9b1680ae 586 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 86:04dd9b1680ae 587 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 86:04dd9b1680ae 588 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 86:04dd9b1680ae 589 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 86:04dd9b1680ae 590 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 86:04dd9b1680ae 591 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 86:04dd9b1680ae 592 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 86:04dd9b1680ae 593 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 86:04dd9b1680ae 594 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 86:04dd9b1680ae 595 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 86:04dd9b1680ae 596 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 86:04dd9b1680ae 597 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 86:04dd9b1680ae 598 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 86:04dd9b1680ae 599 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
bogdanm 86:04dd9b1680ae 600 * @retval None
bogdanm 86:04dd9b1680ae 601 */
bogdanm 86:04dd9b1680ae 602 #define __SDIO_ENABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK |= (__INTERRUPT__))
bogdanm 86:04dd9b1680ae 603
bogdanm 86:04dd9b1680ae 604 /**
bogdanm 86:04dd9b1680ae 605 * @brief Disable the SDIO device interrupt.
bogdanm 86:04dd9b1680ae 606 * @param __INSTANCE__ : Pointer to SDIO register base
bogdanm 86:04dd9b1680ae 607 * @param __INTERRUPT__ : specifies the SDIO interrupt sources to be disabled.
bogdanm 86:04dd9b1680ae 608 * This parameter can be one or a combination of the following values:
bogdanm 86:04dd9b1680ae 609 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 610 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 611 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 86:04dd9b1680ae 612 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 86:04dd9b1680ae 613 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 86:04dd9b1680ae 614 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 86:04dd9b1680ae 615 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 86:04dd9b1680ae 616 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 86:04dd9b1680ae 617 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 86:04dd9b1680ae 618 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 86:04dd9b1680ae 619 * bus mode interrupt
bogdanm 86:04dd9b1680ae 620 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 86:04dd9b1680ae 621 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 86:04dd9b1680ae 622 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 86:04dd9b1680ae 623 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 86:04dd9b1680ae 624 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 86:04dd9b1680ae 625 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 86:04dd9b1680ae 626 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 86:04dd9b1680ae 627 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 86:04dd9b1680ae 628 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 86:04dd9b1680ae 629 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 86:04dd9b1680ae 630 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 86:04dd9b1680ae 631 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 86:04dd9b1680ae 632 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 86:04dd9b1680ae 633 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
bogdanm 86:04dd9b1680ae 634 * @retval None
bogdanm 86:04dd9b1680ae 635 */
bogdanm 86:04dd9b1680ae 636 #define __SDIO_DISABLE_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->MASK &= ~(__INTERRUPT__))
bogdanm 86:04dd9b1680ae 637
bogdanm 86:04dd9b1680ae 638 /**
bogdanm 86:04dd9b1680ae 639 * @brief Checks whether the specified SDIO flag is set or not.
bogdanm 86:04dd9b1680ae 640 * @param __INSTANCE__ : Pointer to SDIO register base
bogdanm 86:04dd9b1680ae 641 * @param __FLAG__: specifies the flag to check.
bogdanm 86:04dd9b1680ae 642 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 643 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
bogdanm 86:04dd9b1680ae 644 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
bogdanm 86:04dd9b1680ae 645 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
bogdanm 86:04dd9b1680ae 646 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
bogdanm 86:04dd9b1680ae 647 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
bogdanm 86:04dd9b1680ae 648 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
bogdanm 86:04dd9b1680ae 649 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
bogdanm 86:04dd9b1680ae 650 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
bogdanm 86:04dd9b1680ae 651 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
bogdanm 86:04dd9b1680ae 652 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode.
bogdanm 86:04dd9b1680ae 653 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
bogdanm 86:04dd9b1680ae 654 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
bogdanm 86:04dd9b1680ae 655 * @arg SDIO_FLAG_TXACT: Data transmit in progress
bogdanm 86:04dd9b1680ae 656 * @arg SDIO_FLAG_RXACT: Data receive in progress
bogdanm 86:04dd9b1680ae 657 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
bogdanm 86:04dd9b1680ae 658 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
bogdanm 86:04dd9b1680ae 659 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
bogdanm 86:04dd9b1680ae 660 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
bogdanm 86:04dd9b1680ae 661 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
bogdanm 86:04dd9b1680ae 662 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
bogdanm 86:04dd9b1680ae 663 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
bogdanm 86:04dd9b1680ae 664 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
bogdanm 86:04dd9b1680ae 665 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
bogdanm 86:04dd9b1680ae 666 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
bogdanm 86:04dd9b1680ae 667 * @retval The new state of SDIO_FLAG (SET or RESET).
bogdanm 86:04dd9b1680ae 668 */
bogdanm 86:04dd9b1680ae 669 #define __SDIO_GET_FLAG(__INSTANCE__, __FLAG__) (((__INSTANCE__)->STA &(__FLAG__)) != RESET)
bogdanm 86:04dd9b1680ae 670
bogdanm 86:04dd9b1680ae 671
bogdanm 86:04dd9b1680ae 672 /**
bogdanm 86:04dd9b1680ae 673 * @brief Clears the SDIO pending flags.
bogdanm 86:04dd9b1680ae 674 * @param __INSTANCE__ : Pointer to SDIO register base
bogdanm 86:04dd9b1680ae 675 * @param __FLAG__: specifies the flag to clear.
bogdanm 86:04dd9b1680ae 676 * This parameter can be one or a combination of the following values:
bogdanm 86:04dd9b1680ae 677 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
bogdanm 86:04dd9b1680ae 678 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
bogdanm 86:04dd9b1680ae 679 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
bogdanm 86:04dd9b1680ae 680 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
bogdanm 86:04dd9b1680ae 681 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
bogdanm 86:04dd9b1680ae 682 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
bogdanm 86:04dd9b1680ae 683 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
bogdanm 86:04dd9b1680ae 684 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
bogdanm 86:04dd9b1680ae 685 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
bogdanm 86:04dd9b1680ae 686 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode
bogdanm 86:04dd9b1680ae 687 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
bogdanm 86:04dd9b1680ae 688 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
bogdanm 86:04dd9b1680ae 689 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
bogdanm 86:04dd9b1680ae 690 * @retval None
bogdanm 86:04dd9b1680ae 691 */
bogdanm 86:04dd9b1680ae 692 #define __SDIO_CLEAR_FLAG(__INSTANCE__, __FLAG__) ((__INSTANCE__)->ICR = (__FLAG__))
bogdanm 86:04dd9b1680ae 693
bogdanm 86:04dd9b1680ae 694 /**
bogdanm 86:04dd9b1680ae 695 * @brief Checks whether the specified SDIO interrupt has occurred or not.
bogdanm 86:04dd9b1680ae 696 * @param __INSTANCE__ : Pointer to SDIO register base
bogdanm 86:04dd9b1680ae 697 * @param __INTERRUPT__: specifies the SDIO interrupt source to check.
bogdanm 86:04dd9b1680ae 698 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 699 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 700 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 701 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 86:04dd9b1680ae 702 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 86:04dd9b1680ae 703 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 86:04dd9b1680ae 704 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 86:04dd9b1680ae 705 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 86:04dd9b1680ae 706 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 86:04dd9b1680ae 707 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
bogdanm 86:04dd9b1680ae 708 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 86:04dd9b1680ae 709 * bus mode interrupt
bogdanm 86:04dd9b1680ae 710 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
bogdanm 86:04dd9b1680ae 711 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
bogdanm 86:04dd9b1680ae 712 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
bogdanm 86:04dd9b1680ae 713 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
bogdanm 86:04dd9b1680ae 714 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
bogdanm 86:04dd9b1680ae 715 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
bogdanm 86:04dd9b1680ae 716 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
bogdanm 86:04dd9b1680ae 717 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
bogdanm 86:04dd9b1680ae 718 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
bogdanm 86:04dd9b1680ae 719 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
bogdanm 86:04dd9b1680ae 720 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
bogdanm 86:04dd9b1680ae 721 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
bogdanm 86:04dd9b1680ae 722 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 86:04dd9b1680ae 723 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
bogdanm 86:04dd9b1680ae 724 * @retval The new state of SDIO_IT (SET or RESET).
bogdanm 86:04dd9b1680ae 725 */
bogdanm 86:04dd9b1680ae 726 #define __SDIO_GET_IT (__INSTANCE__, __INTERRUPT__) (((__INSTANCE__)->STA &(__INTERRUPT__)) == (__INTERRUPT__))
bogdanm 86:04dd9b1680ae 727
bogdanm 86:04dd9b1680ae 728 /**
bogdanm 86:04dd9b1680ae 729 * @brief Clears the SDIO's interrupt pending bits.
bogdanm 86:04dd9b1680ae 730 * @param __INSTANCE__ : Pointer to SDIO register base
bogdanm 86:04dd9b1680ae 731 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
bogdanm 86:04dd9b1680ae 732 * This parameter can be one or a combination of the following values:
bogdanm 86:04dd9b1680ae 733 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 734 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
bogdanm 86:04dd9b1680ae 735 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
bogdanm 86:04dd9b1680ae 736 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
bogdanm 86:04dd9b1680ae 737 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
bogdanm 86:04dd9b1680ae 738 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
bogdanm 86:04dd9b1680ae 739 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
bogdanm 86:04dd9b1680ae 740 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
bogdanm 86:04dd9b1680ae 741 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
bogdanm 86:04dd9b1680ae 742 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
bogdanm 86:04dd9b1680ae 743 * bus mode interrupt
bogdanm 86:04dd9b1680ae 744 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
bogdanm 86:04dd9b1680ae 745 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
bogdanm 86:04dd9b1680ae 746 * @retval None
bogdanm 86:04dd9b1680ae 747 */
bogdanm 86:04dd9b1680ae 748 #define __SDIO_CLEAR_IT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->ICR = (__INTERRUPT__))
bogdanm 86:04dd9b1680ae 749
bogdanm 86:04dd9b1680ae 750 /**
bogdanm 86:04dd9b1680ae 751 * @brief Enable Start the SD I/O Read Wait operation.
bogdanm 86:04dd9b1680ae 752 * @retval None
bogdanm 86:04dd9b1680ae 753 */
bogdanm 86:04dd9b1680ae 754 #define __SDIO_START_READWAIT_ENABLE() (*(__IO uint32_t *) DCTRL_RWSTART_BB = ENABLE)
bogdanm 86:04dd9b1680ae 755
bogdanm 86:04dd9b1680ae 756 /**
bogdanm 86:04dd9b1680ae 757 * @brief Disable Start the SD I/O Read Wait operations.
bogdanm 86:04dd9b1680ae 758 * @retval None
bogdanm 86:04dd9b1680ae 759 */
bogdanm 86:04dd9b1680ae 760 #define __SDIO_START_READWAIT_DISABLE() (*(__IO uint32_t *) DCTRL_RWSTART_BB = DISABLE)
bogdanm 86:04dd9b1680ae 761
bogdanm 86:04dd9b1680ae 762 /**
bogdanm 86:04dd9b1680ae 763 * @brief Enable Start the SD I/O Read Wait operation.
bogdanm 86:04dd9b1680ae 764 * @retval None
bogdanm 86:04dd9b1680ae 765 */
bogdanm 86:04dd9b1680ae 766 #define __SDIO_STOP_READWAIT_ENABLE() (*(__IO uint32_t *) DCTRL_RWSTOP_BB = ENABLE)
bogdanm 86:04dd9b1680ae 767
bogdanm 86:04dd9b1680ae 768 /**
bogdanm 86:04dd9b1680ae 769 * @brief Disable Stop the SD I/O Read Wait operations.
bogdanm 86:04dd9b1680ae 770 * @retval None
bogdanm 86:04dd9b1680ae 771 */
bogdanm 86:04dd9b1680ae 772 #define __SDIO_STOP_READWAIT_DISABLE() (*(__IO uint32_t *) DCTRL_RWSTOP_BB = DISABLE)
bogdanm 86:04dd9b1680ae 773
bogdanm 86:04dd9b1680ae 774 /**
bogdanm 86:04dd9b1680ae 775 * @brief Enable the SD I/O Mode Operation.
bogdanm 86:04dd9b1680ae 776 * @retval None
bogdanm 86:04dd9b1680ae 777 */
bogdanm 86:04dd9b1680ae 778 #define __SDIO_OPERATION_ENABLE() (*(__IO uint32_t *) DCTRL_SDIOEN_BB = ENABLE)
bogdanm 86:04dd9b1680ae 779
bogdanm 86:04dd9b1680ae 780 /**
bogdanm 86:04dd9b1680ae 781 * @brief Disable the SD I/O Mode Operation.
bogdanm 86:04dd9b1680ae 782 * @retval None
bogdanm 86:04dd9b1680ae 783 */
bogdanm 86:04dd9b1680ae 784 #define __SDIO_OPERATION_DISABLE() (*(__IO uint32_t *) DCTRL_SDIOEN_BB = DISABLE)
bogdanm 86:04dd9b1680ae 785
bogdanm 86:04dd9b1680ae 786 /**
bogdanm 86:04dd9b1680ae 787 * @brief Enable the SD I/O Suspend command sending.
bogdanm 86:04dd9b1680ae 788 * @retval None
bogdanm 86:04dd9b1680ae 789 */
bogdanm 86:04dd9b1680ae 790 #define __SDIO_SUSPEND_CMD_ENABLE() (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = ENABLE)
bogdanm 86:04dd9b1680ae 791
bogdanm 86:04dd9b1680ae 792 /**
bogdanm 86:04dd9b1680ae 793 * @brief Disable the SD I/O Suspend command sending.
bogdanm 86:04dd9b1680ae 794 * @retval None
bogdanm 86:04dd9b1680ae 795 */
bogdanm 86:04dd9b1680ae 796 #define __SDIO_SUSPEND_CMD_DISABLE() (*(__IO uint32_t *) CMD_SDIOSUSPEND_BB = DISABLE)
Kojto 99:dbbf35b96557 797
Kojto 110:165afa46840b 798 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
Kojto 110:165afa46840b 799 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
Kojto 110:165afa46840b 800 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE)
bogdanm 86:04dd9b1680ae 801 /**
bogdanm 86:04dd9b1680ae 802 * @brief Enable the command completion signal.
bogdanm 86:04dd9b1680ae 803 * @retval None
bogdanm 86:04dd9b1680ae 804 */
bogdanm 86:04dd9b1680ae 805 #define __SDIO_CEATA_CMD_COMPLETION_ENABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = ENABLE)
bogdanm 86:04dd9b1680ae 806
bogdanm 86:04dd9b1680ae 807 /**
bogdanm 86:04dd9b1680ae 808 * @brief Disable the command completion signal.
bogdanm 86:04dd9b1680ae 809 * @retval None
bogdanm 86:04dd9b1680ae 810 */
bogdanm 86:04dd9b1680ae 811 #define __SDIO_CEATA_CMD_COMPLETION_DISABLE() (*(__IO uint32_t *) CMD_ENCMDCOMPL_BB = DISABLE)
bogdanm 86:04dd9b1680ae 812
bogdanm 86:04dd9b1680ae 813 /**
bogdanm 86:04dd9b1680ae 814 * @brief Enable the CE-ATA interrupt.
bogdanm 86:04dd9b1680ae 815 * @retval None
bogdanm 86:04dd9b1680ae 816 */
bogdanm 86:04dd9b1680ae 817 #define __SDIO_CEATA_ENABLE_IT() (*(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)0)
bogdanm 86:04dd9b1680ae 818
bogdanm 86:04dd9b1680ae 819 /**
bogdanm 86:04dd9b1680ae 820 * @brief Disable the CE-ATA interrupt.
bogdanm 86:04dd9b1680ae 821 * @retval None
bogdanm 86:04dd9b1680ae 822 */
bogdanm 86:04dd9b1680ae 823 #define __SDIO_CEATA_DISABLE_IT() (*(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)1)
bogdanm 86:04dd9b1680ae 824
bogdanm 86:04dd9b1680ae 825 /**
bogdanm 86:04dd9b1680ae 826 * @brief Enable send CE-ATA command (CMD61).
bogdanm 86:04dd9b1680ae 827 * @retval None
bogdanm 86:04dd9b1680ae 828 */
bogdanm 86:04dd9b1680ae 829 #define __SDIO_CEATA_SENDCMD_ENABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = ENABLE)
bogdanm 86:04dd9b1680ae 830
bogdanm 86:04dd9b1680ae 831 /**
bogdanm 86:04dd9b1680ae 832 * @brief Disable send CE-ATA command (CMD61).
bogdanm 86:04dd9b1680ae 833 * @retval None
bogdanm 86:04dd9b1680ae 834 */
bogdanm 86:04dd9b1680ae 835 #define __SDIO_CEATA_SENDCMD_DISABLE() (*(__IO uint32_t *) CMD_ATACMD_BB = DISABLE)
Kojto 110:165afa46840b 836 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F411xE ||\
Kojto 110:165afa46840b 837 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
bogdanm 86:04dd9b1680ae 838 /**
bogdanm 86:04dd9b1680ae 839 * @}
bogdanm 86:04dd9b1680ae 840 */
bogdanm 86:04dd9b1680ae 841
bogdanm 86:04dd9b1680ae 842 /**
bogdanm 86:04dd9b1680ae 843 * @}
bogdanm 86:04dd9b1680ae 844 */
bogdanm 86:04dd9b1680ae 845
bogdanm 86:04dd9b1680ae 846 /* Exported functions --------------------------------------------------------*/
Kojto 99:dbbf35b96557 847 /** @addtogroup SDMMC_LL_Exported_Functions
bogdanm 86:04dd9b1680ae 848 * @{
bogdanm 86:04dd9b1680ae 849 */
bogdanm 86:04dd9b1680ae 850
bogdanm 86:04dd9b1680ae 851 /* Initialization/de-initialization functions **********************************/
Kojto 99:dbbf35b96557 852 /** @addtogroup HAL_SDMMC_LL_Group1
bogdanm 86:04dd9b1680ae 853 * @{
bogdanm 86:04dd9b1680ae 854 */
bogdanm 86:04dd9b1680ae 855 HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init);
bogdanm 86:04dd9b1680ae 856 /**
bogdanm 86:04dd9b1680ae 857 * @}
bogdanm 86:04dd9b1680ae 858 */
bogdanm 86:04dd9b1680ae 859
bogdanm 86:04dd9b1680ae 860 /* I/O operation functions *****************************************************/
Kojto 99:dbbf35b96557 861 /** @addtogroup HAL_SDMMC_LL_Group2
bogdanm 86:04dd9b1680ae 862 * @{
bogdanm 86:04dd9b1680ae 863 */
bogdanm 86:04dd9b1680ae 864 /* Blocking mode: Polling */
bogdanm 86:04dd9b1680ae 865 uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx);
bogdanm 86:04dd9b1680ae 866 HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData);
bogdanm 86:04dd9b1680ae 867 /**
bogdanm 86:04dd9b1680ae 868 * @}
bogdanm 86:04dd9b1680ae 869 */
bogdanm 86:04dd9b1680ae 870
bogdanm 86:04dd9b1680ae 871 /* Peripheral Control functions ************************************************/
Kojto 99:dbbf35b96557 872 /** @addtogroup HAL_SDMMC_LL_Group3
bogdanm 86:04dd9b1680ae 873 * @{
bogdanm 86:04dd9b1680ae 874 */
bogdanm 86:04dd9b1680ae 875 HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx);
bogdanm 86:04dd9b1680ae 876 HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx);
bogdanm 86:04dd9b1680ae 877 uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx);
bogdanm 86:04dd9b1680ae 878
bogdanm 86:04dd9b1680ae 879 /* Command path state machine (CPSM) management functions */
bogdanm 86:04dd9b1680ae 880 HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *SDIO_CmdInitStruct);
bogdanm 86:04dd9b1680ae 881 uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx);
bogdanm 86:04dd9b1680ae 882 uint32_t SDIO_GetResponse(uint32_t SDIO_RESP);
bogdanm 86:04dd9b1680ae 883
bogdanm 86:04dd9b1680ae 884 /* Data path state machine (DPSM) management functions */
bogdanm 86:04dd9b1680ae 885 HAL_StatusTypeDef SDIO_DataConfig(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* SDIO_DataInitStruct);
bogdanm 86:04dd9b1680ae 886 uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx);
bogdanm 86:04dd9b1680ae 887 uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx);
bogdanm 86:04dd9b1680ae 888
bogdanm 86:04dd9b1680ae 889 /* SDIO IO Cards mode management functions */
bogdanm 86:04dd9b1680ae 890 HAL_StatusTypeDef SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode);
bogdanm 86:04dd9b1680ae 891
bogdanm 86:04dd9b1680ae 892 /**
bogdanm 86:04dd9b1680ae 893 * @}
bogdanm 86:04dd9b1680ae 894 */
bogdanm 86:04dd9b1680ae 895
bogdanm 86:04dd9b1680ae 896 /**
bogdanm 86:04dd9b1680ae 897 * @}
bogdanm 86:04dd9b1680ae 898 */
bogdanm 86:04dd9b1680ae 899
bogdanm 86:04dd9b1680ae 900 /**
bogdanm 86:04dd9b1680ae 901 * @}
bogdanm 86:04dd9b1680ae 902 */
bogdanm 86:04dd9b1680ae 903
bogdanm 86:04dd9b1680ae 904 /**
bogdanm 86:04dd9b1680ae 905 * @}
bogdanm 86:04dd9b1680ae 906 */
Kojto 110:165afa46840b 907 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
Kojto 110:165afa46840b 908 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx */
bogdanm 86:04dd9b1680ae 909 #ifdef __cplusplus
bogdanm 86:04dd9b1680ae 910 }
bogdanm 86:04dd9b1680ae 911 #endif
bogdanm 86:04dd9b1680ae 912
bogdanm 86:04dd9b1680ae 913 #endif /* __STM32F4xx_LL_SDMMC_H */
bogdanm 86:04dd9b1680ae 914
bogdanm 86:04dd9b1680ae 915 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/