mbed os with nrf51 internal bandgap enabled to read battery level
Dependents: BLE_file_test BLE_Blink ExternalEncoder
targets/TARGET_NORDIC/TARGET_NRF5/gpio_api.c@0:f269e3021894, 2016-10-23 (annotated)
- Committer:
- elessair
- Date:
- Sun Oct 23 15:10:02 2016 +0000
- Revision:
- 0:f269e3021894
Initial commit
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
elessair | 0:f269e3021894 | 1 | /* mbed Microcontroller Library |
elessair | 0:f269e3021894 | 2 | * Copyright (c) 2006-2013 ARM Limited |
elessair | 0:f269e3021894 | 3 | * |
elessair | 0:f269e3021894 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
elessair | 0:f269e3021894 | 5 | * you may not use this file except in compliance with the License. |
elessair | 0:f269e3021894 | 6 | * You may obtain a copy of the License at |
elessair | 0:f269e3021894 | 7 | * |
elessair | 0:f269e3021894 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
elessair | 0:f269e3021894 | 9 | * |
elessair | 0:f269e3021894 | 10 | * Unless required by applicable law or agreed to in writing, software |
elessair | 0:f269e3021894 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
elessair | 0:f269e3021894 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
elessair | 0:f269e3021894 | 13 | * See the License for the specific language governing permissions and |
elessair | 0:f269e3021894 | 14 | * limitations under the License. |
elessair | 0:f269e3021894 | 15 | */ |
elessair | 0:f269e3021894 | 16 | #include "mbed_assert.h" |
elessair | 0:f269e3021894 | 17 | #include "gpio_api.h" |
elessair | 0:f269e3021894 | 18 | #include "gpio_irq_api.h" |
elessair | 0:f269e3021894 | 19 | #include "pinmap.h" |
elessair | 0:f269e3021894 | 20 | #include "nrf_drv_gpiote.h" |
elessair | 0:f269e3021894 | 21 | |
elessair | 0:f269e3021894 | 22 | |
elessair | 0:f269e3021894 | 23 | #if defined(TARGET_MCU_NRF51822) |
elessair | 0:f269e3021894 | 24 | #define GPIO_PIN_COUNT 31 |
elessair | 0:f269e3021894 | 25 | #else |
elessair | 0:f269e3021894 | 26 | #define GPIO_PIN_COUNT 32 |
elessair | 0:f269e3021894 | 27 | #endif |
elessair | 0:f269e3021894 | 28 | |
elessair | 0:f269e3021894 | 29 | typedef struct { |
elessair | 0:f269e3021894 | 30 | bool used_as_gpio : 1; |
elessair | 0:f269e3021894 | 31 | PinDirection direction : 1; |
elessair | 0:f269e3021894 | 32 | bool init_high : 1; |
elessair | 0:f269e3021894 | 33 | PinMode pull : 2; |
elessair | 0:f269e3021894 | 34 | bool used_as_irq : 1; |
elessair | 0:f269e3021894 | 35 | bool irq_fall : 1; |
elessair | 0:f269e3021894 | 36 | bool irq_rise : 1; |
elessair | 0:f269e3021894 | 37 | } gpio_cfg_t; |
elessair | 0:f269e3021894 | 38 | |
elessair | 0:f269e3021894 | 39 | uint32_t m_gpio_initialized; |
elessair | 0:f269e3021894 | 40 | gpio_cfg_t m_gpio_cfg[GPIO_PIN_COUNT]; |
elessair | 0:f269e3021894 | 41 | |
elessair | 0:f269e3021894 | 42 | |
elessair | 0:f269e3021894 | 43 | /*********** |
elessair | 0:f269e3021894 | 44 | GPIO IRQ |
elessair | 0:f269e3021894 | 45 | ***********/ |
elessair | 0:f269e3021894 | 46 | |
elessair | 0:f269e3021894 | 47 | static gpio_irq_handler m_irq_handler; |
elessair | 0:f269e3021894 | 48 | static uint32_t m_channel_ids[GPIO_PIN_COUNT] = {0}; |
elessair | 0:f269e3021894 | 49 | uint32_t m_gpio_irq_enabled; |
elessair | 0:f269e3021894 | 50 | |
elessair | 0:f269e3021894 | 51 | |
elessair | 0:f269e3021894 | 52 | static void gpiote_irq_handler(nrf_drv_gpiote_pin_t pin, nrf_gpiote_polarity_t action) |
elessair | 0:f269e3021894 | 53 | { |
elessair | 0:f269e3021894 | 54 | nrf_gpio_pin_sense_t sense = nrf_gpio_pin_sense_get(pin); |
elessair | 0:f269e3021894 | 55 | gpio_irq_event event = (sense == NRF_GPIO_PIN_SENSE_LOW) ? IRQ_RISE : IRQ_FALL; |
elessair | 0:f269e3021894 | 56 | |
elessair | 0:f269e3021894 | 57 | if (m_gpio_irq_enabled & (1UL << pin)) { |
elessair | 0:f269e3021894 | 58 | if (((event == IRQ_RISE) && m_gpio_cfg[pin].irq_rise) |
elessair | 0:f269e3021894 | 59 | || ((event == IRQ_FALL) && m_gpio_cfg[pin].irq_fall)) { |
elessair | 0:f269e3021894 | 60 | m_irq_handler(m_channel_ids[pin], event); |
elessair | 0:f269e3021894 | 61 | } |
elessair | 0:f269e3021894 | 62 | } |
elessair | 0:f269e3021894 | 63 | } |
elessair | 0:f269e3021894 | 64 | |
elessair | 0:f269e3021894 | 65 | |
elessair | 0:f269e3021894 | 66 | void gpio_init(gpio_t *obj, PinName pin) |
elessair | 0:f269e3021894 | 67 | { |
elessair | 0:f269e3021894 | 68 | obj->pin = pin; |
elessair | 0:f269e3021894 | 69 | if (pin == (PinName)NC) { |
elessair | 0:f269e3021894 | 70 | return; |
elessair | 0:f269e3021894 | 71 | } |
elessair | 0:f269e3021894 | 72 | MBED_ASSERT((uint32_t)pin < GPIO_PIN_COUNT); |
elessair | 0:f269e3021894 | 73 | (void) nrf_drv_gpiote_init(); |
elessair | 0:f269e3021894 | 74 | |
elessair | 0:f269e3021894 | 75 | m_gpio_cfg[obj->pin].used_as_gpio = true; |
elessair | 0:f269e3021894 | 76 | } |
elessair | 0:f269e3021894 | 77 | |
elessair | 0:f269e3021894 | 78 | |
elessair | 0:f269e3021894 | 79 | int gpio_read(gpio_t *obj) |
elessair | 0:f269e3021894 | 80 | { |
elessair | 0:f269e3021894 | 81 | MBED_ASSERT(obj->pin != (PinName)NC); |
elessair | 0:f269e3021894 | 82 | if (m_gpio_cfg[obj->pin].direction == PIN_OUTPUT) { |
elessair | 0:f269e3021894 | 83 | return ((NRF_GPIO->OUTSET & (1UL << obj->pin)) ? 1 : 0); |
elessair | 0:f269e3021894 | 84 | } else { |
elessair | 0:f269e3021894 | 85 | return nrf_gpio_pin_read(obj->pin); |
elessair | 0:f269e3021894 | 86 | } |
elessair | 0:f269e3021894 | 87 | } |
elessair | 0:f269e3021894 | 88 | |
elessair | 0:f269e3021894 | 89 | |
elessair | 0:f269e3021894 | 90 | static void gpio_apply_config(uint8_t pin) |
elessair | 0:f269e3021894 | 91 | { |
elessair | 0:f269e3021894 | 92 | if (m_gpio_initialized & (1UL << pin)) { |
elessair | 0:f269e3021894 | 93 | if ((m_gpio_cfg[pin].direction == PIN_OUTPUT) && (!m_gpio_cfg[pin].used_as_irq)) { |
elessair | 0:f269e3021894 | 94 | nrf_drv_gpiote_out_uninit(pin); |
elessair | 0:f269e3021894 | 95 | } |
elessair | 0:f269e3021894 | 96 | else { |
elessair | 0:f269e3021894 | 97 | nrf_drv_gpiote_in_uninit(pin); |
elessair | 0:f269e3021894 | 98 | } |
elessair | 0:f269e3021894 | 99 | } |
elessair | 0:f269e3021894 | 100 | |
elessair | 0:f269e3021894 | 101 | if (m_gpio_cfg[pin].used_as_gpio || m_gpio_cfg[pin].used_as_irq) { |
elessair | 0:f269e3021894 | 102 | if ((m_gpio_cfg[pin].direction == PIN_INPUT) |
elessair | 0:f269e3021894 | 103 | || (m_gpio_cfg[pin].used_as_irq)) { |
elessair | 0:f269e3021894 | 104 | //Configure as input. |
elessair | 0:f269e3021894 | 105 | nrf_drv_gpiote_in_config_t cfg; |
elessair | 0:f269e3021894 | 106 | |
elessair | 0:f269e3021894 | 107 | cfg.hi_accuracy = false; |
elessair | 0:f269e3021894 | 108 | cfg.is_watcher = false; |
elessair | 0:f269e3021894 | 109 | cfg.sense = NRF_GPIOTE_POLARITY_TOGGLE; |
elessair | 0:f269e3021894 | 110 | if (m_gpio_cfg[pin].used_as_irq) { |
elessair | 0:f269e3021894 | 111 | cfg.pull = NRF_GPIO_PIN_PULLUP; |
elessair | 0:f269e3021894 | 112 | nrf_drv_gpiote_in_init(pin, &cfg, gpiote_irq_handler); |
elessair | 0:f269e3021894 | 113 | if ((m_gpio_irq_enabled & (1 << pin)) |
elessair | 0:f269e3021894 | 114 | && (m_gpio_cfg[pin].irq_rise || m_gpio_cfg[pin].irq_fall)) |
elessair | 0:f269e3021894 | 115 | { |
elessair | 0:f269e3021894 | 116 | nrf_drv_gpiote_in_event_enable(pin, true); |
elessair | 0:f269e3021894 | 117 | } |
elessair | 0:f269e3021894 | 118 | } |
elessair | 0:f269e3021894 | 119 | else { |
elessair | 0:f269e3021894 | 120 | switch(m_gpio_cfg[pin].pull) { |
elessair | 0:f269e3021894 | 121 | case PullUp: |
elessair | 0:f269e3021894 | 122 | cfg.pull = NRF_GPIO_PIN_PULLUP; |
elessair | 0:f269e3021894 | 123 | break; |
elessair | 0:f269e3021894 | 124 | case PullDown: |
elessair | 0:f269e3021894 | 125 | cfg.pull = NRF_GPIO_PIN_PULLDOWN; |
elessair | 0:f269e3021894 | 126 | break; |
elessair | 0:f269e3021894 | 127 | default: |
elessair | 0:f269e3021894 | 128 | cfg.pull = NRF_GPIO_PIN_NOPULL; |
elessair | 0:f269e3021894 | 129 | break; |
elessair | 0:f269e3021894 | 130 | } |
elessair | 0:f269e3021894 | 131 | nrf_drv_gpiote_in_init(pin, &cfg, NULL); |
elessair | 0:f269e3021894 | 132 | } |
elessair | 0:f269e3021894 | 133 | } |
elessair | 0:f269e3021894 | 134 | else { |
elessair | 0:f269e3021894 | 135 | // Configure as output. |
elessair | 0:f269e3021894 | 136 | nrf_drv_gpiote_out_config_t cfg = GPIOTE_CONFIG_OUT_SIMPLE(m_gpio_cfg[pin].init_high); |
elessair | 0:f269e3021894 | 137 | nrf_drv_gpiote_out_init(pin, &cfg); |
elessair | 0:f269e3021894 | 138 | } |
elessair | 0:f269e3021894 | 139 | m_gpio_initialized |= (1UL << pin); |
elessair | 0:f269e3021894 | 140 | } |
elessair | 0:f269e3021894 | 141 | else { |
elessair | 0:f269e3021894 | 142 | m_gpio_initialized &= ~(1UL << pin); |
elessair | 0:f269e3021894 | 143 | } |
elessair | 0:f269e3021894 | 144 | } |
elessair | 0:f269e3021894 | 145 | |
elessair | 0:f269e3021894 | 146 | |
elessair | 0:f269e3021894 | 147 | void gpio_mode(gpio_t *obj, PinMode mode) |
elessair | 0:f269e3021894 | 148 | { |
elessair | 0:f269e3021894 | 149 | MBED_ASSERT(obj->pin <= GPIO_PIN_COUNT); |
elessair | 0:f269e3021894 | 150 | m_gpio_cfg[obj->pin].pull = mode; |
elessair | 0:f269e3021894 | 151 | gpio_apply_config(obj->pin); |
elessair | 0:f269e3021894 | 152 | } |
elessair | 0:f269e3021894 | 153 | |
elessair | 0:f269e3021894 | 154 | |
elessair | 0:f269e3021894 | 155 | void gpio_dir(gpio_t *obj, PinDirection direction) |
elessair | 0:f269e3021894 | 156 | { |
elessair | 0:f269e3021894 | 157 | MBED_ASSERT(obj->pin <= GPIO_PIN_COUNT); |
elessair | 0:f269e3021894 | 158 | m_gpio_cfg[obj->pin].direction = direction; |
elessair | 0:f269e3021894 | 159 | gpio_apply_config(obj->pin); |
elessair | 0:f269e3021894 | 160 | } |
elessair | 0:f269e3021894 | 161 | |
elessair | 0:f269e3021894 | 162 | |
elessair | 0:f269e3021894 | 163 | /*********** |
elessair | 0:f269e3021894 | 164 | GPIO IRQ |
elessair | 0:f269e3021894 | 165 | ***********/ |
elessair | 0:f269e3021894 | 166 | |
elessair | 0:f269e3021894 | 167 | int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) |
elessair | 0:f269e3021894 | 168 | { |
elessair | 0:f269e3021894 | 169 | if (pin == NC) { |
elessair | 0:f269e3021894 | 170 | return -1; |
elessair | 0:f269e3021894 | 171 | } |
elessair | 0:f269e3021894 | 172 | MBED_ASSERT((uint32_t)pin < GPIO_PIN_COUNT); |
elessair | 0:f269e3021894 | 173 | (void) nrf_drv_gpiote_init(); |
elessair | 0:f269e3021894 | 174 | |
elessair | 0:f269e3021894 | 175 | m_gpio_cfg[pin].used_as_irq = true; |
elessair | 0:f269e3021894 | 176 | m_channel_ids[pin] = id; |
elessair | 0:f269e3021894 | 177 | obj->ch = pin; |
elessair | 0:f269e3021894 | 178 | m_irq_handler = handler; |
elessair | 0:f269e3021894 | 179 | m_channel_ids[pin] = id; |
elessair | 0:f269e3021894 | 180 | |
elessair | 0:f269e3021894 | 181 | gpio_apply_config(pin); |
elessair | 0:f269e3021894 | 182 | return 1; |
elessair | 0:f269e3021894 | 183 | } |
elessair | 0:f269e3021894 | 184 | |
elessair | 0:f269e3021894 | 185 | |
elessair | 0:f269e3021894 | 186 | void gpio_irq_free(gpio_irq_t *obj) |
elessair | 0:f269e3021894 | 187 | { |
elessair | 0:f269e3021894 | 188 | nrf_drv_gpiote_in_uninit(obj->ch); |
elessair | 0:f269e3021894 | 189 | m_gpio_cfg[obj->ch].used_as_irq = false; |
elessair | 0:f269e3021894 | 190 | m_channel_ids[obj->ch] = 0; |
elessair | 0:f269e3021894 | 191 | |
elessair | 0:f269e3021894 | 192 | gpio_apply_config(obj->ch); |
elessair | 0:f269e3021894 | 193 | } |
elessair | 0:f269e3021894 | 194 | |
elessair | 0:f269e3021894 | 195 | |
elessair | 0:f269e3021894 | 196 | void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) |
elessair | 0:f269e3021894 | 197 | { |
elessair | 0:f269e3021894 | 198 | gpio_cfg_t* cfg = &m_gpio_cfg[obj->ch]; |
elessair | 0:f269e3021894 | 199 | bool irq_enabled_before = |
elessair | 0:f269e3021894 | 200 | (m_gpio_irq_enabled & (1 << obj->ch)) && |
elessair | 0:f269e3021894 | 201 | (cfg->irq_rise || cfg->irq_fall); |
elessair | 0:f269e3021894 | 202 | |
elessair | 0:f269e3021894 | 203 | if (event == IRQ_RISE) { |
elessair | 0:f269e3021894 | 204 | cfg->irq_rise = enable ? true : false; |
elessair | 0:f269e3021894 | 205 | } |
elessair | 0:f269e3021894 | 206 | else if (event == IRQ_FALL) { |
elessair | 0:f269e3021894 | 207 | cfg->irq_fall = enable ? true : false; |
elessair | 0:f269e3021894 | 208 | } |
elessair | 0:f269e3021894 | 209 | |
elessair | 0:f269e3021894 | 210 | bool irq_enabled_after = cfg->irq_rise || cfg->irq_fall; |
elessair | 0:f269e3021894 | 211 | |
elessair | 0:f269e3021894 | 212 | if (irq_enabled_before != irq_enabled_after) { |
elessair | 0:f269e3021894 | 213 | if (irq_enabled_after) { |
elessair | 0:f269e3021894 | 214 | gpio_irq_enable(obj); |
elessair | 0:f269e3021894 | 215 | } else { |
elessair | 0:f269e3021894 | 216 | gpio_irq_disable(obj); |
elessair | 0:f269e3021894 | 217 | } |
elessair | 0:f269e3021894 | 218 | } |
elessair | 0:f269e3021894 | 219 | } |
elessair | 0:f269e3021894 | 220 | |
elessair | 0:f269e3021894 | 221 | |
elessair | 0:f269e3021894 | 222 | void gpio_irq_enable(gpio_irq_t *obj) |
elessair | 0:f269e3021894 | 223 | { |
elessair | 0:f269e3021894 | 224 | m_gpio_irq_enabled |= (1 << obj->ch); |
elessair | 0:f269e3021894 | 225 | if (m_gpio_cfg[obj->ch].irq_rise || m_gpio_cfg[obj->ch].irq_fall) { |
elessair | 0:f269e3021894 | 226 | nrf_drv_gpiote_in_event_enable(obj->ch, true); |
elessair | 0:f269e3021894 | 227 | } |
elessair | 0:f269e3021894 | 228 | } |
elessair | 0:f269e3021894 | 229 | |
elessair | 0:f269e3021894 | 230 | |
elessair | 0:f269e3021894 | 231 | void gpio_irq_disable(gpio_irq_t *obj) |
elessair | 0:f269e3021894 | 232 | { |
elessair | 0:f269e3021894 | 233 | m_gpio_irq_enabled &= ~(1 << obj->ch); |
elessair | 0:f269e3021894 | 234 | nrf_drv_gpiote_in_event_disable(obj->ch); |
elessair | 0:f269e3021894 | 235 | } |