Library for the MAX11300

Committer:
elelthvd
Date:
Thu Aug 06 08:22:37 2020 +0000
Revision:
20:d4ef18312354
Parent:
19:2d747d4b424b
wait() is deprecated.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
j3 7:8669a53acd0d 1 /**********************************************************************
j3 7:8669a53acd0d 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
j3 7:8669a53acd0d 3 *
j3 7:8669a53acd0d 4 * Permission is hereby granted, free of charge, to any person obtaining a
j3 7:8669a53acd0d 5 * copy of this software and associated documentation files (the "Software"),
j3 7:8669a53acd0d 6 * to deal in the Software without restriction, including without limitation
j3 7:8669a53acd0d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 7:8669a53acd0d 8 * and/or sell copies of the Software, and to permit persons to whom the
j3 7:8669a53acd0d 9 * Software is furnished to do so, subject to the following conditions:
j3 7:8669a53acd0d 10 *
j3 7:8669a53acd0d 11 * The above copyright notice and this permission notice shall be included
j3 7:8669a53acd0d 12 * in all copies or substantial portions of the Software.
j3 7:8669a53acd0d 13 *
j3 7:8669a53acd0d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 7:8669a53acd0d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 7:8669a53acd0d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 7:8669a53acd0d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 7:8669a53acd0d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 7:8669a53acd0d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 7:8669a53acd0d 20 * OTHER DEALINGS IN THE SOFTWARE.
j3 7:8669a53acd0d 21 *
j3 7:8669a53acd0d 22 * Except as contained in this notice, the name of Maxim Integrated
j3 7:8669a53acd0d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 7:8669a53acd0d 24 * Products, Inc. Branding Policy.
j3 7:8669a53acd0d 25 *
j3 7:8669a53acd0d 26 * The mere transfer of this software does not imply any licenses
j3 7:8669a53acd0d 27 * of trade secrets, proprietary technology, copyrights, patents,
j3 7:8669a53acd0d 28 * trademarks, maskwork rights, or any other form of intellectual
j3 7:8669a53acd0d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 7:8669a53acd0d 30 * ownership rights.
j3 7:8669a53acd0d 31 **********************************************************************/
j3 7:8669a53acd0d 32
j3 7:8669a53acd0d 33
j3 7:8669a53acd0d 34 #ifndef _MAX113XX_PIXI_H_
j3 7:8669a53acd0d 35 #define _MAX113XX_PIXI_H_
j3 7:8669a53acd0d 36
j3 9:094df3de3616 37
j3 7:8669a53acd0d 38 #include "mbed.h"
elelthvd 19:2d747d4b424b 39 #include "MAX11300Hex.h"
j3 9:094df3de3616 40
j3 7:8669a53acd0d 41
j3 7:8669a53acd0d 42 /**
j3 8:4291f7e54863 43 @brief MAX113XX - PIXI, 20/12-Port Programmable Mixed-Signal I/O with
j3 7:8669a53acd0d 44 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO
j3 7:8669a53acd0d 45
j3 8:4291f7e54863 46 The MAX113XX family integrates a PIXI™, 12-bit, multichannel, analog-to-digital
j3 7:8669a53acd0d 47 converter (ADC) and a 12-bit, multichannel, buffered digital-to-analog
j3 8:4291f7e54863 48 converter (DAC) in a single integrated circuit (IC). These devices offers
j3 8:4291f7e54863 49 20/12 mixed-signal high-voltage, bipolar ports, which are configurable as an
j3 7:8669a53acd0d 50 ADC analog input, a DAC analog output, a general-purpose input port (GPI),
j3 7:8669a53acd0d 51 a general-purpose output port (GPO), or an analog switch terminal.
j3 7:8669a53acd0d 52 One internal and two external temperature sensors track junction and
j3 7:8669a53acd0d 53 environmental temperature, respectively. Adjacent pairs of ports are
j3 7:8669a53acd0d 54 configurable as a logic-level translator for open-drain devices or an
j3 7:8669a53acd0d 55 analog switch.
j3 7:8669a53acd0d 56
j3 7:8669a53acd0d 57 Use configuration software found at
j3 7:8669a53acd0d 58 https://www.maximintegrated.com/en/products/analog/data-converters/analog-to-digital-converters/MAX11300.html/tb_tab2
j3 9:094df3de3616 59 to generate MAX113XXHex.h file
j3 7:8669a53acd0d 60 */
j3 7:8669a53acd0d 61 class MAX113XX_Pixi
j3 7:8669a53acd0d 62 {
j3 7:8669a53acd0d 63 public:
j3 7:8669a53acd0d 64
j3 10:6efe114ef882 65 ///Pixi devices
j3 9:094df3de3616 66 enum Device_e
j3 9:094df3de3616 67 {
j3 14:cc5349db13a3 68 ///20 Port SPI
j3 9:094df3de3616 69 MAX11300 = 0,
j3 14:cc5349db13a3 70 ///20 Port I2C
j3 9:094df3de3616 71 MAX11301,
j3 14:cc5349db13a3 72 ///12 Port SPI
j3 9:094df3de3616 73 MAX11311,
j3 14:cc5349db13a3 74 ///12 Port I2C
j3 9:094df3de3616 75 MAX11312
j3 9:094df3de3616 76 };
j3 9:094df3de3616 77
j3 9:094df3de3616 78 ///MAX113XX Ports
j3 9:094df3de3616 79 enum Ports_e
j3 7:8669a53acd0d 80 {
j3 14:cc5349db13a3 81 PORT0 = 0,
j3 7:8669a53acd0d 82 PORT1,
j3 7:8669a53acd0d 83 PORT2,
j3 7:8669a53acd0d 84 PORT3,
j3 7:8669a53acd0d 85 PORT4,
j3 7:8669a53acd0d 86 PORT5,
j3 7:8669a53acd0d 87 PORT6,
j3 7:8669a53acd0d 88 PORT7,
j3 7:8669a53acd0d 89 PORT8,
j3 7:8669a53acd0d 90 PORT9,
j3 7:8669a53acd0d 91 PORT10,
j3 7:8669a53acd0d 92 PORT11,
j3 7:8669a53acd0d 93 PORT12,
j3 7:8669a53acd0d 94 PORT13,
j3 7:8669a53acd0d 95 PORT14,
j3 7:8669a53acd0d 96 PORT15,
j3 7:8669a53acd0d 97 PORT16,
j3 7:8669a53acd0d 98 PORT17,
j3 7:8669a53acd0d 99 PORT18,
j3 7:8669a53acd0d 100 PORT19
j3 7:8669a53acd0d 101 };
j3 7:8669a53acd0d 102
j3 9:094df3de3616 103 ///MAX113XX Port Modes
j3 9:094df3de3616 104 enum PortModes_e
j3 7:8669a53acd0d 105 {
j3 7:8669a53acd0d 106 ///HIGH_Z
j3 14:cc5349db13a3 107 MODE_0 = 0,
j3 7:8669a53acd0d 108 ///Digital input with programmable threshold, GPI
j3 7:8669a53acd0d 109 MODE_1,
j3 7:8669a53acd0d 110 ///Bidirectional level translator terminal
j3 7:8669a53acd0d 111 MODE_2,
j3 7:8669a53acd0d 112 ///Register-driven digital output with DAC-controlled level, GPO
j3 7:8669a53acd0d 113 MODE_3,
j3 7:8669a53acd0d 114 ///Unidirectional path output with DAC-controlled level, GPO
j3 7:8669a53acd0d 115 MODE_4,
j3 7:8669a53acd0d 116 ///Analog output for DAC
j3 7:8669a53acd0d 117 MODE_5,
j3 7:8669a53acd0d 118 ///Analog output for DAC with ADC monitoring
j3 7:8669a53acd0d 119 MODE_6,
j3 7:8669a53acd0d 120 ///Positive analog input to single-ended ADC
j3 7:8669a53acd0d 121 MODE_7,
j3 7:8669a53acd0d 122 ///Positive analog input to differential ADC
j3 7:8669a53acd0d 123 MODE_8,
j3 7:8669a53acd0d 124 ///Negative analog input to differential ADC
j3 7:8669a53acd0d 125 MODE_9,
j3 7:8669a53acd0d 126 ///Analog output for DAC and negative analog input to differential ADC
j3 7:8669a53acd0d 127 MODE_10,
j3 7:8669a53acd0d 128 ///Terminal to GPI-controlled analog switch
j3 7:8669a53acd0d 129 MODE_11,
j3 7:8669a53acd0d 130 ///Terminal to register-controlled analog switch
j3 7:8669a53acd0d 131 MODE_12
j3 7:8669a53acd0d 132 };
j3 7:8669a53acd0d 133
j3 14:cc5349db13a3 134 ///ADC Conversion Modes
j3 14:cc5349db13a3 135 enum ADCConversionModes_e
j3 14:cc5349db13a3 136 {
j3 14:cc5349db13a3 137 ///The ADC does not perform any conversion
j3 14:cc5349db13a3 138 Idle = 0,
j3 14:cc5349db13a3 139 ///The ADC sweeps through all ADC converted ports once on cnvt
j3 14:cc5349db13a3 140 SingleSweep,
j3 14:cc5349db13a3 141 ///The ADC does a single conversion for the current port in the sequence
j3 14:cc5349db13a3 142 ///of ADC configured ports. Must keep track of which port was last and
j3 14:cc5349db13a3 143 ///how many ADC configured ports
j3 14:cc5349db13a3 144 SingleConversion,
j3 14:cc5349db13a3 145 ///ADC continuously sweeps through configured ports, cnvt isn't used
j3 14:cc5349db13a3 146 ContinuousSweep
j3 14:cc5349db13a3 147 };
j3 14:cc5349db13a3 148
j3 14:cc5349db13a3 149 ///DAC operational modes
j3 14:cc5349db13a3 150 enum DACModes_e
j3 14:cc5349db13a3 151 {
j3 14:cc5349db13a3 152 ///DAC configured ports are updated sequentially
j3 14:cc5349db13a3 153 SequentialUpdate = 0,
j3 14:cc5349db13a3 154 ///DAC with new data is updated, then DAC returns to sequence
j3 14:cc5349db13a3 155 ImmediateUpdate,
j3 14:cc5349db13a3 156 ///All DAC configured ports use the data in DACPRSTDAT1
j3 14:cc5349db13a3 157 SameData1,
j3 14:cc5349db13a3 158 ///All DAC configured ports use the data in DACPRSTDAT2
j3 14:cc5349db13a3 159 SameData2
j3 14:cc5349db13a3 160 };
j3 14:cc5349db13a3 161
j3 13:546dd29b1c7a 162 ///Temperature sensors
j3 13:546dd29b1c7a 163 enum TempSensor_e
j3 13:546dd29b1c7a 164 {
j3 14:cc5349db13a3 165 ///Internal Die Temp
j3 14:cc5349db13a3 166 Internal = 0,
j3 14:cc5349db13a3 167 ///Diode connected Q1
j3 13:546dd29b1c7a 168 External1,
j3 14:cc5349db13a3 169 ///Diode connected Q2
j3 13:546dd29b1c7a 170 External2
j3 13:546dd29b1c7a 171 };
j3 18:8ee1928ffe6c 172
j3 18:8ee1928ffe6c 173 static const uint8_t MAX_REGISTER_ADRS = 0x73;
j3 13:546dd29b1c7a 174
j3 10:6efe114ef882 175 ///Command results
j3 7:8669a53acd0d 176 enum CmdResult_e
j3 7:8669a53acd0d 177 {
j3 7:8669a53acd0d 178 ///Failed operation
j3 14:cc5349db13a3 179 OpFailure = 0,
j3 7:8669a53acd0d 180 ///Successful operation
j3 7:8669a53acd0d 181 Success
j3 7:8669a53acd0d 182 };
j3 7:8669a53acd0d 183
j3 13:546dd29b1c7a 184 MAX113XX_Pixi(Device_e device, PinName cnvt=NC);
j3 7:8669a53acd0d 185
j3 14:cc5349db13a3 186 ///@brief Read single ended ADC configured port.\n
j3 14:cc5349db13a3 187 ///Library supports single sweep, or continuous sweep ADC modes only
j3 12:8054ee101bad 188 ///@param[in] port - single ended ADC configured port
j3 12:8054ee101bad 189 ///@param[out] data - contents of ADC data register
j3 12:8054ee101bad 190 ///@return Result of operation
j3 12:8054ee101bad 191 CmdResult_e singleEndedADCRead(Ports_e port, uint16_t &data);
j3 12:8054ee101bad 192
j3 14:cc5349db13a3 193 ///@brief Read differential ADC configured port\n
j3 14:cc5349db13a3 194 ///Library supports single sweep, or continuous sweep ADC modes only
j3 12:8054ee101bad 195 ///@param[in] posPort - positive port
j3 13:546dd29b1c7a 196 ///@param[out] data - contents of positive port ADC data register
j3 12:8054ee101bad 197 ///@return Result of operation
j3 13:546dd29b1c7a 198 CmdResult_e differentialADCRead(Ports_e posPort, int16_t &data);
j3 12:8054ee101bad 199
j3 12:8054ee101bad 200 ///@brief Write DAC configured port
j3 12:8054ee101bad 201 ///@param[in] port - DAC configured port
j3 12:8054ee101bad 202 ///@param[in] data - value to be written to DAC data register
j3 12:8054ee101bad 203 ///@return Result of operation
j3 12:8054ee101bad 204 CmdResult_e dacWrite(Ports_e port, const uint16_t data);
j3 7:8669a53acd0d 205
j3 14:cc5349db13a3 206 ///@brief Write DAC configured port and read ADC for port\n
j3 14:cc5349db13a3 207 ///Library supports single sweep, or continuous sweep ADC modes only
j3 13:546dd29b1c7a 208 ///@param[in] port - DAC w/ADC Monitor configured port
j3 13:546dd29b1c7a 209 ///@param[in] data - value to be written to DAC data register
j3 13:546dd29b1c7a 210 ///@param[out] adcData - value read from adc
j3 13:546dd29b1c7a 211 ///@return Result of operation
j3 13:546dd29b1c7a 212 CmdResult_e dacWriteADCMonitor(Ports_e port, const uint16_t data,
j3 13:546dd29b1c7a 213 uint16_t &adcData);
j3 13:546dd29b1c7a 214
j3 7:8669a53acd0d 215 ///@brief Reads gpi configured port
j3 7:8669a53acd0d 216 ///@param[in] port - gpi congigured port to be read
j3 7:8669a53acd0d 217 ///@param[out] state - lsb of state matches port state
j3 7:8669a53acd0d 218 ///@return Result of operation
j3 9:094df3de3616 219 CmdResult_e gpioRead(Ports_e port, uint8_t &state);
j3 7:8669a53acd0d 220
j3 12:8054ee101bad 221 ///@brief Writes gpo configured port with lsb of state
j3 12:8054ee101bad 222 ///@param[in] port - gpo congigured port to be written
j3 12:8054ee101bad 223 ///@param[in] state - lsb of state is written to port
j3 12:8054ee101bad 224 ///@return Result of operation
j3 12:8054ee101bad 225 CmdResult_e gpioWrite(Ports_e port, const uint8_t state);
j3 7:8669a53acd0d 226
j3 12:8054ee101bad 227 ///@brief Sets the state of a software controlled analog switch
j3 13:546dd29b1c7a 228 ///@param[in] lowPort - Port with lowest index
j3 13:546dd29b1c7a 229 ///@param[in] state - True for closed, false for hi-z
j3 12:8054ee101bad 230 ///@return Result of operation
j3 13:546dd29b1c7a 231 CmdResult_e setAnalogSwitchState(Ports_e lowPort, bool state);
j3 13:546dd29b1c7a 232
j3 13:546dd29b1c7a 233 ///@brief Reads temperature sensor
j3 13:546dd29b1c7a 234 ///@param[in] sensor - internal, or external sensor one or two
j3 13:546dd29b1c7a 235 ///@return Result of operation
j3 13:546dd29b1c7a 236 CmdResult_e readTempSensor(TempSensor_e sensor, float &data);
j3 7:8669a53acd0d 237
elelthvd 19:2d747d4b424b 238 ///@brief Dumps pixi memory to provided BufferedSerial object
j3 10:6efe114ef882 239 ///@param[in] ser - output device
j3 10:6efe114ef882 240 ///@return None
elelthvd 19:2d747d4b424b 241 void dumpMemory(BufferedSerial &ser);
j3 7:8669a53acd0d 242
j3 7:8669a53acd0d 243 protected:
j3 7:8669a53acd0d 244
j3 9:094df3de3616 245 Device_e m_device;
j3 7:8669a53acd0d 246 DigitalOut m_cnvt;
j3 7:8669a53acd0d 247
j3 7:8669a53acd0d 248 ///@brief Writes given register with data
j3 7:8669a53acd0d 249 ///@param[in] reg - register to be written
j3 7:8669a53acd0d 250 ///@param[in] data - data to write
j3 7:8669a53acd0d 251 ///@return none
j3 9:094df3de3616 252 virtual void writeRegister(uint8_t reg, const uint16_t data) = 0;
j3 7:8669a53acd0d 253
j3 7:8669a53acd0d 254 ///@brief Reads given register
j3 7:8669a53acd0d 255 ///@param[in] reg - register to read
j3 7:8669a53acd0d 256 ///@return contents of register
j3 9:094df3de3616 257 virtual uint16_t readRegister(uint8_t reg) = 0;
j3 7:8669a53acd0d 258
j3 7:8669a53acd0d 259 ///@brief Writes a block of data starting at given register
j3 7:8669a53acd0d 260 ///@param[in] reg - register to start writing at
j3 7:8669a53acd0d 261 ///@param[in] data - pointer to data buffer
j3 7:8669a53acd0d 262 ///@param[in] num_reg - number of registers to be written
j3 7:8669a53acd0d 263 ///@return none
j3 9:094df3de3616 264 virtual void blockWrite(uint8_t reg, const uint16_t *data,
j3 9:094df3de3616 265 const uint8_t num_reg) = 0;
j3 7:8669a53acd0d 266
j3 7:8669a53acd0d 267 ///@brief Reads a block of data starting at given register
j3 7:8669a53acd0d 268 ///@param[in] reg - register to start reading at
j3 7:8669a53acd0d 269 ///@param[in] data - pointer to data buffer
j3 7:8669a53acd0d 270 ///@param[in] num_reg - number of registers to be read
j3 7:8669a53acd0d 271 ///@return none
j3 9:094df3de3616 272 virtual void blockRead(uint8_t reg, uint16_t *data,
j3 9:094df3de3616 273 const uint8_t num_reg) = 0;
j3 7:8669a53acd0d 274 };
j3 7:8669a53acd0d 275
j3 7:8669a53acd0d 276
j3 7:8669a53acd0d 277 /**
j3 7:8669a53acd0d 278 @brief SPI Declaration for MAX113XX parts
j3 7:8669a53acd0d 279 */
j3 7:8669a53acd0d 280 class MAX113XX_SPI: public MAX113XX_Pixi
j3 7:8669a53acd0d 281 {
j3 7:8669a53acd0d 282
j3 7:8669a53acd0d 283 public:
j3 7:8669a53acd0d 284
j3 7:8669a53acd0d 285 ///@brief MAX113XX_SPI Constructor
j3 7:8669a53acd0d 286 ///@param[in] spiBus - reference to SPI bus for this device
j3 7:8669a53acd0d 287 ///@param[in] cs - pin to be used for chip select
j3 10:6efe114ef882 288 ///@param[in] device - pixi device; MAX11300, MAX11301,...
j3 7:8669a53acd0d 289 ///@param[in] cnvrt - pin to be used for convert
j3 9:094df3de3616 290 MAX113XX_SPI(SPI & spiBus, PinName cs, MAX113XX_Pixi::Device_e device,
j3 13:546dd29b1c7a 291 PinName cnvt=NC);
j3 7:8669a53acd0d 292
j3 7:8669a53acd0d 293 ///@brief MAX113XX_SPI Destructor
j3 7:8669a53acd0d 294 ~MAX113XX_SPI();
j3 7:8669a53acd0d 295
j3 7:8669a53acd0d 296 private:
j3 7:8669a53acd0d 297
j3 7:8669a53acd0d 298 SPI & m_spiBus;
j3 7:8669a53acd0d 299 DigitalOut m_cs;
j3 7:8669a53acd0d 300
j3 9:094df3de3616 301 virtual void writeRegister(uint8_t reg, const uint16_t data);
j3 7:8669a53acd0d 302
j3 9:094df3de3616 303 virtual uint16_t readRegister(uint8_t reg);
j3 7:8669a53acd0d 304
j3 9:094df3de3616 305 virtual void blockWrite(uint8_t reg, const uint16_t *data,
j3 7:8669a53acd0d 306 const uint8_t num_reg);
j3 7:8669a53acd0d 307
j3 9:094df3de3616 308 virtual void blockRead(uint8_t reg, uint16_t *data, const uint8_t num_reg);
j3 7:8669a53acd0d 309 };
j3 7:8669a53acd0d 310
j3 7:8669a53acd0d 311
j3 7:8669a53acd0d 312 /**
j3 7:8669a53acd0d 313 @brief I2C Declaration for MAX113XX parts
j3 7:8669a53acd0d 314 */
j3 7:8669a53acd0d 315 class MAX113XX_I2C: public MAX113XX_Pixi
j3 7:8669a53acd0d 316 {
j3 7:8669a53acd0d 317
j3 7:8669a53acd0d 318 public:
j3 7:8669a53acd0d 319
j3 17:658202c79f33 320 ///I2C Addresses
j3 17:658202c79f33 321 static const uint8_t I2C_ADRS0 = 0x38;
j3 17:658202c79f33 322 static const uint8_t I2C_ADRS1 = 0x39;
j3 17:658202c79f33 323 static const uint8_t I2C_ADRS2 = 0x3A;
j3 17:658202c79f33 324 static const uint8_t I2C_ADRS3 = 0x3B;
j3 17:658202c79f33 325 static const uint8_t I2C_ADRS4 = 0x3C;
j3 17:658202c79f33 326 static const uint8_t I2C_ADRS5 = 0x3D;
j3 17:658202c79f33 327 static const uint8_t I2C_ADRS6 = 0x3E;
j3 17:658202c79f33 328 static const uint8_t I2C_ADRS7 = 0x3F;
j3 17:658202c79f33 329
j3 7:8669a53acd0d 330 ///@brief MAX113XX_I2C Constructor
j3 7:8669a53acd0d 331 ///@param[in] i2cBus - reference to I2C bus for this device
j3 10:6efe114ef882 332 ///@param[in] device - pixi device; MAX11300, MAX11301,...
j3 7:8669a53acd0d 333 ///@param[in] cnvrt - pin to be used for convert
j3 17:658202c79f33 334 MAX113XX_I2C(I2C &i2cBus, MAX113XX_Pixi::Device_e device, uint8_t i2cAdrs,
j3 17:658202c79f33 335 PinName cnvt=NC);
j3 7:8669a53acd0d 336
j3 7:8669a53acd0d 337 ///@brief MAX113XX_I2C Destructor
j3 7:8669a53acd0d 338 ~MAX113XX_I2C();
j3 7:8669a53acd0d 339
j3 7:8669a53acd0d 340 private:
j3 7:8669a53acd0d 341
j3 7:8669a53acd0d 342 I2C &m_i2cBus;
j3 17:658202c79f33 343 uint8_t m_w_adrs, m_r_adrs;
j3 7:8669a53acd0d 344
j3 9:094df3de3616 345 virtual void writeRegister(uint8_t reg, const uint16_t data);
j3 7:8669a53acd0d 346
j3 9:094df3de3616 347 virtual uint16_t readRegister(uint8_t reg);
j3 7:8669a53acd0d 348
j3 9:094df3de3616 349 virtual void blockWrite(uint8_t reg, const uint16_t *data,
j3 7:8669a53acd0d 350 const uint8_t num_reg);
j3 7:8669a53acd0d 351
j3 9:094df3de3616 352 virtual void blockRead(uint8_t reg, uint16_t *data, const uint8_t num_reg);
j3 7:8669a53acd0d 353 };
j3 7:8669a53acd0d 354
j3 7:8669a53acd0d 355
j3 18:8ee1928ffe6c 356 #endif /* _MAX113XX_PIXI_H_ */