L VD / MAX113XX_Pixi

Library for the MAX11300

MAX113XX_Pixi.h@8:4291f7e54863, 2017-05-05 (annotated)

Committer:
j3
Date:
Fri May 05 19:23:16 2017 +0000
Revision:
8:4291f7e54863
Parent:
7:8669a53acd0d
Child:
9:094df3de3616
Fixed base class brief

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j3 7:8669a53acd0d 1 /**********************************************************************
j3 7:8669a53acd0d 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
j3 7:8669a53acd0d 3 *
j3 7:8669a53acd0d 4 * Permission is hereby granted, free of charge, to any person obtaining a
j3 7:8669a53acd0d 5 * copy of this software and associated documentation files (the "Software"),
j3 7:8669a53acd0d 6 * to deal in the Software without restriction, including without limitation
j3 7:8669a53acd0d 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
j3 7:8669a53acd0d 8 * and/or sell copies of the Software, and to permit persons to whom the
j3 7:8669a53acd0d 9 * Software is furnished to do so, subject to the following conditions:
j3 7:8669a53acd0d 10 *
j3 7:8669a53acd0d 11 * The above copyright notice and this permission notice shall be included
j3 7:8669a53acd0d 12 * in all copies or substantial portions of the Software.
j3 7:8669a53acd0d 13 *
j3 7:8669a53acd0d 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
j3 7:8669a53acd0d 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
j3 7:8669a53acd0d 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
j3 7:8669a53acd0d 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
j3 7:8669a53acd0d 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
j3 7:8669a53acd0d 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
j3 7:8669a53acd0d 20 * OTHER DEALINGS IN THE SOFTWARE.
j3 7:8669a53acd0d 21 *
j3 7:8669a53acd0d 22 * Except as contained in this notice, the name of Maxim Integrated
j3 7:8669a53acd0d 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
j3 7:8669a53acd0d 24 * Products, Inc. Branding Policy.
j3 7:8669a53acd0d 25 *
j3 7:8669a53acd0d 26 * The mere transfer of this software does not imply any licenses
j3 7:8669a53acd0d 27 * of trade secrets, proprietary technology, copyrights, patents,
j3 7:8669a53acd0d 28 * trademarks, maskwork rights, or any other form of intellectual
j3 7:8669a53acd0d 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
j3 7:8669a53acd0d 30 * ownership rights.
j3 7:8669a53acd0d 31 **********************************************************************/
j3 7:8669a53acd0d 32
j3 7:8669a53acd0d 33
j3 7:8669a53acd0d 34 #ifndef _MAX113XX_PIXI_H_
j3 7:8669a53acd0d 35 #define _MAX113XX_PIXI_H_
j3 7:8669a53acd0d 36
j3 7:8669a53acd0d 37 #include "mbed.h"
j3 7:8669a53acd0d 38 #include "MAX113XX_Pixi_Config.h"
j3 7:8669a53acd0d 39
j3 7:8669a53acd0d 40 /**
j3 8:4291f7e54863 41 @brief MAX113XX - PIXI, 20/12-Port Programmable Mixed-Signal I/O with
j3 7:8669a53acd0d 42 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO
j3 7:8669a53acd0d 43
j3 8:4291f7e54863 44 The MAX113XX family integrates a PIXI™, 12-bit, multichannel, analog-to-digital
j3 7:8669a53acd0d 45 converter (ADC) and a 12-bit, multichannel, buffered digital-to-analog
j3 8:4291f7e54863 46 converter (DAC) in a single integrated circuit (IC). These devices offers
j3 8:4291f7e54863 47 20/12 mixed-signal high-voltage, bipolar ports, which are configurable as an
j3 7:8669a53acd0d 48 ADC analog input, a DAC analog output, a general-purpose input port (GPI),
j3 7:8669a53acd0d 49 a general-purpose output port (GPO), or an analog switch terminal.
j3 7:8669a53acd0d 50 One internal and two external temperature sensors track junction and
j3 7:8669a53acd0d 51 environmental temperature, respectively. Adjacent pairs of ports are
j3 7:8669a53acd0d 52 configurable as a logic-level translator for open-drain devices or an
j3 7:8669a53acd0d 53 analog switch.
j3 7:8669a53acd0d 54
j3 7:8669a53acd0d 55 Use configuration software found at
j3 7:8669a53acd0d 56 https://www.maximintegrated.com/en/products/analog/data-converters/analog-to-digital-converters/MAX11300.html/tb_tab2
j3 8:4291f7e54863 57 to generate MAX113XX_Pixi_Config.h file
j3 7:8669a53acd0d 58 */
j3 7:8669a53acd0d 59 class MAX113XX_Pixi
j3 7:8669a53acd0d 60 {
j3 7:8669a53acd0d 61 public:
j3 7:8669a53acd0d 62
j3 7:8669a53acd0d 63 ///MAX11300 Ports
j3 7:8669a53acd0d 64 enum MAX113XX_Ports_e
j3 7:8669a53acd0d 65 {
j3 7:8669a53acd0d 66 PORT0,
j3 7:8669a53acd0d 67 PORT1,
j3 7:8669a53acd0d 68 PORT2,
j3 7:8669a53acd0d 69 PORT3,
j3 7:8669a53acd0d 70 PORT4,
j3 7:8669a53acd0d 71 PORT5,
j3 7:8669a53acd0d 72 PORT6,
j3 7:8669a53acd0d 73 PORT7,
j3 7:8669a53acd0d 74 PORT8,
j3 7:8669a53acd0d 75 PORT9,
j3 7:8669a53acd0d 76 PORT10,
j3 7:8669a53acd0d 77 PORT11,
j3 7:8669a53acd0d 78 PORT12,
j3 7:8669a53acd0d 79 PORT13,
j3 7:8669a53acd0d 80 PORT14,
j3 7:8669a53acd0d 81 PORT15,
j3 7:8669a53acd0d 82 PORT16,
j3 7:8669a53acd0d 83 PORT17,
j3 7:8669a53acd0d 84 PORT18,
j3 7:8669a53acd0d 85 PORT19
j3 7:8669a53acd0d 86 };
j3 7:8669a53acd0d 87
j3 7:8669a53acd0d 88 ///MAX11300 Port Modes
j3 7:8669a53acd0d 89 enum MAX113XX_PortModes_e
j3 7:8669a53acd0d 90 {
j3 7:8669a53acd0d 91 ///HIGH_Z
j3 7:8669a53acd0d 92 MODE_0,
j3 7:8669a53acd0d 93 ///Digital input with programmable threshold, GPI
j3 7:8669a53acd0d 94 MODE_1,
j3 7:8669a53acd0d 95 ///Bidirectional level translator terminal
j3 7:8669a53acd0d 96 MODE_2,
j3 7:8669a53acd0d 97 ///Register-driven digital output with DAC-controlled level, GPO
j3 7:8669a53acd0d 98 MODE_3,
j3 7:8669a53acd0d 99 ///Unidirectional path output with DAC-controlled level, GPO
j3 7:8669a53acd0d 100 MODE_4,
j3 7:8669a53acd0d 101 ///Analog output for DAC
j3 7:8669a53acd0d 102 MODE_5,
j3 7:8669a53acd0d 103 ///Analog output for DAC with ADC monitoring
j3 7:8669a53acd0d 104 MODE_6,
j3 7:8669a53acd0d 105 ///Positive analog input to single-ended ADC
j3 7:8669a53acd0d 106 MODE_7,
j3 7:8669a53acd0d 107 ///Positive analog input to differential ADC
j3 7:8669a53acd0d 108 MODE_8,
j3 7:8669a53acd0d 109 ///Negative analog input to differential ADC
j3 7:8669a53acd0d 110 MODE_9,
j3 7:8669a53acd0d 111 ///Analog output for DAC and negative analog input to differential ADC
j3 7:8669a53acd0d 112 MODE_10,
j3 7:8669a53acd0d 113 ///Terminal to GPI-controlled analog switch
j3 7:8669a53acd0d 114 MODE_11,
j3 7:8669a53acd0d 115 ///Terminal to register-controlled analog switch
j3 7:8669a53acd0d 116 MODE_12
j3 7:8669a53acd0d 117 };
j3 7:8669a53acd0d 118
j3 7:8669a53acd0d 119 enum CmdResult_e
j3 7:8669a53acd0d 120 {
j3 7:8669a53acd0d 121 ///Failed operation
j3 7:8669a53acd0d 122 OpFailure,
j3 7:8669a53acd0d 123 ///Successful operation
j3 7:8669a53acd0d 124 Success
j3 7:8669a53acd0d 125 };
j3 7:8669a53acd0d 126
j3 7:8669a53acd0d 127 MAX113XX_Pixi(PinName cnvt);
j3 7:8669a53acd0d 128
j3 7:8669a53acd0d 129 ///@brief Writes gpo configured port with lsb of state
j3 7:8669a53acd0d 130 ///@param[in] port - gpo congigured port to be written
j3 7:8669a53acd0d 131 ///@param[in] state - lsb of state is written to port
j3 7:8669a53acd0d 132 ///@return Result of operation
j3 7:8669a53acd0d 133 CmdResult_e gpioWrite(MAX113XX_Ports_e port, const uint8_t state);
j3 7:8669a53acd0d 134
j3 7:8669a53acd0d 135 ///@brief Reads gpi configured port
j3 7:8669a53acd0d 136 ///@param[in] port - gpi congigured port to be read
j3 7:8669a53acd0d 137 ///@param[out] state - lsb of state matches port state
j3 7:8669a53acd0d 138 ///@return Result of operation
j3 7:8669a53acd0d 139 CmdResult_e gpioRead(MAX113XX_Ports_e port, uint8_t &state);
j3 7:8669a53acd0d 140
j3 7:8669a53acd0d 141 ///@brief Read single ended ADC configured port
j3 7:8669a53acd0d 142 ///@param[in] port - single ended ADC configured port
j3 7:8669a53acd0d 143 ///@param[out] data - contents of ADC data register
j3 7:8669a53acd0d 144 ///@return Result of operation
j3 7:8669a53acd0d 145 CmdResult_e singleEndedADCRead(MAX113XX_Ports_e port, uint16_t &data);
j3 7:8669a53acd0d 146
j3 7:8669a53acd0d 147 ///@brief Write single ended DAC configured port
j3 7:8669a53acd0d 148 ///@param[in] port - single ended DAC configured port
j3 7:8669a53acd0d 149 ///@param[in] data - value to be written to DAC data register
j3 7:8669a53acd0d 150 ///@return Result of operation
j3 7:8669a53acd0d 151 CmdResult_e singleEndedDACWrite(MAX113XX_Ports_e port,
j3 7:8669a53acd0d 152 const uint16_t data);
j3 7:8669a53acd0d 153
j3 7:8669a53acd0d 154 void dumpPixiMemory(Serial &ser, MAX113XX_Pixi &pixi);
j3 7:8669a53acd0d 155
j3 7:8669a53acd0d 156 protected:
j3 7:8669a53acd0d 157
j3 7:8669a53acd0d 158 DigitalOut m_cnvt;
j3 7:8669a53acd0d 159
j3 7:8669a53acd0d 160 ///@brief Writes given register with data
j3 7:8669a53acd0d 161 ///@param[in] reg - register to be written
j3 7:8669a53acd0d 162 ///@param[in] data - data to write
j3 7:8669a53acd0d 163 ///@return none
j3 7:8669a53acd0d 164 virtual void writeRegister(MAX11300RegAddress_t reg,
j3 7:8669a53acd0d 165 const uint16_t data) = 0;
j3 7:8669a53acd0d 166
j3 7:8669a53acd0d 167 ///@brief Reads given register
j3 7:8669a53acd0d 168 ///@param[in] reg - register to read
j3 7:8669a53acd0d 169 ///@return contents of register
j3 7:8669a53acd0d 170 virtual uint16_t readRegister(MAX11300RegAddress_t reg) = 0;
j3 7:8669a53acd0d 171
j3 7:8669a53acd0d 172 ///@brief Writes a block of data starting at given register
j3 7:8669a53acd0d 173 ///@param[in] reg - register to start writing at
j3 7:8669a53acd0d 174 ///@param[in] data - pointer to data buffer
j3 7:8669a53acd0d 175 ///@param[in] num_reg - number of registers to be written
j3 7:8669a53acd0d 176 ///@return none
j3 7:8669a53acd0d 177 virtual void blockWrite(MAX11300RegAddress_t reg, const uint16_t *data,
j3 7:8669a53acd0d 178 const uint8_t num_reg) = 0;
j3 7:8669a53acd0d 179
j3 7:8669a53acd0d 180 ///@brief Reads a block of data starting at given register
j3 7:8669a53acd0d 181 ///@param[in] reg - register to start reading at
j3 7:8669a53acd0d 182 ///@param[in] data - pointer to data buffer
j3 7:8669a53acd0d 183 ///@param[in] num_reg - number of registers to be read
j3 7:8669a53acd0d 184 ///@return none
j3 7:8669a53acd0d 185 virtual void blockRead(MAX11300RegAddress_t reg, uint16_t *data,
j3 7:8669a53acd0d 186 const uint8_t num_reg) = 0;
j3 7:8669a53acd0d 187 };
j3 7:8669a53acd0d 188
j3 7:8669a53acd0d 189
j3 7:8669a53acd0d 190 /**
j3 7:8669a53acd0d 191 @brief SPI Declaration for MAX113XX parts
j3 7:8669a53acd0d 192 */
j3 7:8669a53acd0d 193 class MAX113XX_SPI: public MAX113XX_Pixi
j3 7:8669a53acd0d 194 {
j3 7:8669a53acd0d 195
j3 7:8669a53acd0d 196 public:
j3 7:8669a53acd0d 197
j3 7:8669a53acd0d 198 ///@brief MAX113XX_SPI Constructor
j3 7:8669a53acd0d 199 ///@param[in] spiBus - reference to SPI bus for this device
j3 7:8669a53acd0d 200 ///@param[in] cs - pin to be used for chip select
j3 7:8669a53acd0d 201 ///@param[in] cnvrt - pin to be used for convert
j3 7:8669a53acd0d 202 MAX113XX_SPI(SPI & spiBus, PinName cs, PinName cnvt);
j3 7:8669a53acd0d 203
j3 7:8669a53acd0d 204 ///@brief MAX113XX_SPI Destructor
j3 7:8669a53acd0d 205 ~MAX113XX_SPI();
j3 7:8669a53acd0d 206
j3 7:8669a53acd0d 207 private:
j3 7:8669a53acd0d 208
j3 7:8669a53acd0d 209 SPI & m_spiBus;
j3 7:8669a53acd0d 210 DigitalOut m_cs;
j3 7:8669a53acd0d 211
j3 7:8669a53acd0d 212 virtual void writeRegister(MAX11300RegAddress_t reg,
j3 7:8669a53acd0d 213 const uint16_t data);
j3 7:8669a53acd0d 214
j3 7:8669a53acd0d 215 virtual uint16_t readRegister(MAX11300RegAddress_t reg);
j3 7:8669a53acd0d 216
j3 7:8669a53acd0d 217 virtual void blockWrite(MAX11300RegAddress_t reg, const uint16_t *data,
j3 7:8669a53acd0d 218 const uint8_t num_reg);
j3 7:8669a53acd0d 219
j3 7:8669a53acd0d 220 virtual void blockRead(MAX11300RegAddress_t reg, uint16_t *data,
j3 7:8669a53acd0d 221 const uint8_t num_reg);
j3 7:8669a53acd0d 222 };
j3 7:8669a53acd0d 223
j3 7:8669a53acd0d 224
j3 7:8669a53acd0d 225 /**
j3 7:8669a53acd0d 226 @brief I2C Declaration for MAX113XX parts
j3 7:8669a53acd0d 227 */
j3 7:8669a53acd0d 228 class MAX113XX_I2C: public MAX113XX_Pixi
j3 7:8669a53acd0d 229 {
j3 7:8669a53acd0d 230
j3 7:8669a53acd0d 231 public:
j3 7:8669a53acd0d 232
j3 7:8669a53acd0d 233 ///@brief MAX113XX_I2C Constructor
j3 7:8669a53acd0d 234 ///@param[in] i2cBus - reference to I2C bus for this device
j3 7:8669a53acd0d 235 ///@param[in] cnvrt - pin to be used for convert
j3 7:8669a53acd0d 236 MAX113XX_I2C(I2C &i2cBus, PinName cnvt);
j3 7:8669a53acd0d 237
j3 7:8669a53acd0d 238 ///@brief MAX113XX_I2C Destructor
j3 7:8669a53acd0d 239 ~MAX113XX_I2C();
j3 7:8669a53acd0d 240
j3 7:8669a53acd0d 241 private:
j3 7:8669a53acd0d 242
j3 7:8669a53acd0d 243 I2C &m_i2cBus;
j3 7:8669a53acd0d 244
j3 7:8669a53acd0d 245 virtual void writeRegister(MAX11300RegAddress_t reg,
j3 7:8669a53acd0d 246 const uint16_t data);
j3 7:8669a53acd0d 247
j3 7:8669a53acd0d 248 virtual uint16_t readRegister(MAX11300RegAddress_t reg);
j3 7:8669a53acd0d 249
j3 7:8669a53acd0d 250 virtual void blockWrite(MAX11300RegAddress_t reg, const uint16_t *data,
j3 7:8669a53acd0d 251 const uint8_t num_reg);
j3 7:8669a53acd0d 252
j3 7:8669a53acd0d 253 virtual void blockRead(MAX11300RegAddress_t reg, uint16_t *data,
j3 7:8669a53acd0d 254 const uint8_t num_reg);
j3 7:8669a53acd0d 255 };
j3 7:8669a53acd0d 256
j3 7:8669a53acd0d 257
j3 7:8669a53acd0d 258 #endif /* _MAX113XX_PIXI_H_ */