shubham c / Mbed 2 deprecated CDMS_CODE

Repository for CDMS code

Dependencies:   SimpleDMA mbed-rtos mbed eeprom

Fork of COM_MNG_TMTC_SIMPLE by Shreesha S

DefinitionsAndGlobals.h@214:6848a51af734, 2016-07-03 (annotated)

Committer:
chaithanyarss
Date:
Sun Jul 03 09:33:33 2016 +0000
Revision:
214:6848a51af734
Parent:
209:63e9c8f8b5d2 
Reset CDMS added;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shreeshas95 0:f016e9e8d48b 1 // **************DEFINITIONS*********************
aniruddhv 69:20f09a0c3fd2 2
ee12b079 197:1369ef45b49e 3 #define bypass_adf 1
aniruddhv 69:20f09a0c3fd2 4
shreeshas95 0:f016e9e8d48b 5 // COM_RX
chaithanyarss 214:6848a51af734 6 #define RX_TIMEOUT_LIMIT 0.5
chaithanyarss 214:6848a51af734 7 //#define COM_RX_UART_TX PTE20 // For bypassing RX1M (SET BAUD RATE 1200) #define COM_RX_UART_TX USBTX
chaithanyarss 214:6848a51af734 8 //#define COM_RX_UART_RX PTE21 // For bypassing RX1M (SET BAUD RATE 1200) #define COM_RX_UART_RX USBRX
chaithanyarss 214:6848a51af734 9
chaithanyarss 214:6848a51af734 10 #define COM_RX_UART_TX USBTX
chaithanyarss 214:6848a51af734 11 #define COM_RX_UART_RX USBRX
chaithanyarss 214:6848a51af734 12
shreeshas95 0:f016e9e8d48b 13 // COMMON SPI
chaithanyarss 214:6848a51af734 14 #define SPI_MOSI PTE1
chaithanyarss 214:6848a51af734 15 #define SPI_MISO PTE3
chaithanyarss 214:6848a51af734 16 #define SPI_CLK PTE2
chaithanyarss 214:6848a51af734 17 #define SPI_CS_ADF PTA15
chaithanyarss 214:6848a51af734 18 #define SPI_CS_SDC PIN20
chaithanyarss 214:6848a51af734 19 #define SPI_CS_RTC PIN26
chaithanyarss 214:6848a51af734 20
shreeshas95 4:104dd82c99b8 21 // COM_TX
chaithanyarss 214:6848a51af734 22 #define COM_TX_CONFIG_LIMIT 3
chaithanyarss 214:6848a51af734 23 #define COM_TX_TICKER_LIMIT 32
shreeshas95 4:104dd82c99b8 24
ee12b079 209:63e9c8f8b5d2 25 // ADF INTERRUPT
chaithanyarss 214:6848a51af734 26 #define ADF_IRQ PTA14
chaithanyarss 214:6848a51af734 27
ee12b079 162:48fda0b8d573 28 //I2C - Payload to CDMS (need to change while using CDMS hardware);
chaithanyarss 214:6848a51af734 29 I2C master(PIN32,PIN31);
chaithanyarss 214:6848a51af734 30 DigitalIn PL_I2C_Intr(PTC13);
chaithanyarss 214:6848a51af734 31 DigitalOut PL_I2C_GPIO(PTC1);
chaithanyarss 214:6848a51af734 32
ee12b079 162:48fda0b8d573 33 //I2C - CDMS to BAE
chaithanyarss 214:6848a51af734 34 DigitalIn BAE_I2C_GPIO(PIN39);
chaithanyarss 214:6848a51af734 35 DigitalOut CDMS_I2C_GPIO(PIN67);
ee12b079 162:48fda0b8d573 36
shreeshas95 0:f016e9e8d48b 37 // TC LIST
chaithanyarss 214:6848a51af734 38 #define TCL_STATE_INCOMPLETE 0x00
chaithanyarss 214:6848a51af734 39 #define TCL_STATE_ABORTED 0x03
chaithanyarss 214:6848a51af734 40 #define TCL_STATE_EXECUTING 0x04
chaithanyarss 214:6848a51af734 41 #define TCL_STATE_COMPLETED 0x05
chaithanyarss 214:6848a51af734 42 #define TCL_STATE_EXCEEDED_LIMIT 0x06
shreeshas95 0:f016e9e8d48b 43
shreeshas95 0:f016e9e8d48b 44 // LIST OF FLAGS
chaithanyarss 214:6848a51af734 45 #define UART_INT_FLAG 0x0001
chaithanyarss 214:6848a51af734 46 #define NEW_TC_RECEIVED 0x0002
chaithanyarss 214:6848a51af734 47 #define COM_SESSION_FLAG 0x0004
chaithanyarss 214:6848a51af734 48 #define COM_RX_FLAG 0x0008
chaithanyarss 214:6848a51af734 49 #define COM_MNG_TMTC_RUNNING_FLAG 0x0010
chaithanyarss 214:6848a51af734 50 #define COM_SESSION_VALIDITY 0x0020
chaithanyarss 214:6848a51af734 51 #define ALL_CRC_PASS_FLAG 0x0040
chaithanyarss 214:6848a51af734 52 #define COM_PA_HOT_FLAG 0x0080
chaithanyarss 214:6848a51af734 53 #define COM_TX_FLAG 0x0100
chaithanyarss 214:6848a51af734 54 #define COM_SESSION_TIMEOUT_FLAG 0x0200
chaithanyarss 214:6848a51af734 55 #define COM_AUTO_POWER_OFF_BAE_FLAG 0x0400
chaithanyarss 214:6848a51af734 56 #define BAE_SW_EN_FLAG 0x0800
chaithanyarss 214:6848a51af734 57 #define RF_SW_STATUS_FLAG 0x1000
chaithanyarss 214:6848a51af734 58 #define COM_INIT_STATUS_FLAG 0x2000
chaithanyarss 214:6848a51af734 59 #define COM_TX_STATUS_FLAG 0x4000
ee12b079 209:63e9c8f8b5d2 60
ee12b079 209:63e9c8f8b5d2 61 //RF relay STATUS
chaithanyarss 214:6848a51af734 62 #define RF_COM_TX 0
chaithanyarss 214:6848a51af734 63 #define RF_BCN 1
shreeshas95 0:f016e9e8d48b 64
shreeshas95 0:f016e9e8d48b 65 // COM_MNG_TMTC THREAD
chaithanyarss 214:6848a51af734 66 #define SESSION_TIME_LIMIT 1500
chaithanyarss 214:6848a51af734 67 #define COM_MNG_TMTC_SIGNAL_UART_INT 0x01
chaithanyarss 214:6848a51af734 68 #define COM_MNG_TMTC_SIGNAL_ADF_NSD 0x02
chaithanyarss 214:6848a51af734 69 #define COM_MNG_TMTC_SIGNAL_ADF_SD 0x03
chaithanyarss 214:6848a51af734 70 #define SCIENCE_SIGNAL 0x04
shreeshas95 0:f016e9e8d48b 71 // COM_MNG_TMTC
chaithanyarss 214:6848a51af734 72 #define COM_PA_COOLING_TIME_LIMIT 20
chaithanyarss 214:6848a51af734 73 #define COM_MAX_TC_LIMIT 200
chaithanyarss 214:6848a51af734 74 #define TM_ACK_CODE_INDEX 2
chaithanyarss 214:6848a51af734 75 #define CRC_FAIL_NACK_CODE 0x01
chaithanyarss 214:6848a51af734 76
chaithanyarss 214:6848a51af734 77 // call sign
chaithanyarss 214:6848a51af734 78 #define PSC_CALLSIGN 0x00
chaithanyarss 214:6848a51af734 79 #define APID_CALLSIGN 0x00
chaithanyarss 214:6848a51af734 80
chaithanyarss 214:6848a51af734 81 // max value of telecommands in a tcl
chaithanyarss 214:6848a51af734 82 #define TCL_OVERFLOW_CONSTANT 256
chaithanyarss 214:6848a51af734 83 #define TM_OVERFLOW_CONSTANT 256
chaithanyarss 214:6848a51af734 84
chaithanyarss 214:6848a51af734 85 // starting value of packet sequence count at each pass
chaithanyarss 214:6848a51af734 86 #define PSC_START_VALUE 1
shreeshas95 2:2caf2a9a13aa 87
chaithanyarss 214:6848a51af734 88 // APID list
chaithanyarss 214:6848a51af734 89 #define APID_COM 0
chaithanyarss 214:6848a51af734 90 #define APID_BAE 1
chaithanyarss 214:6848a51af734 91 #define APID_CDMS 2
chaithanyarss 214:6848a51af734 92 #define APID_SPEED 3
chaithanyarss 214:6848a51af734 93
chaithanyarss 214:6848a51af734 94 //SERVICE
chaithanyarss 214:6848a51af734 95 #define SERVICE_OBOSC 0xB
chaithanyarss 214:6848a51af734 96 #define SERVICE_OBSRS 0xF
chaithanyarss 214:6848a51af734 97
chaithanyarss 214:6848a51af734 98 // HIGH PRIORITY TC - priority list
chaithanyarss 214:6848a51af734 99 // not correct values here
chaithanyarss 214:6848a51af734 100 #define HPTC1 5
chaithanyarss 214:6848a51af734 101 #define HPTC2 6
chaithanyarss 214:6848a51af734 102 // Add more entries above
chaithanyarss 214:6848a51af734 103
chaithanyarss 214:6848a51af734 104 // SIZE of tc in bytes
chaithanyarss 214:6848a51af734 105 #define TC_SHORT_SIZE 11
chaithanyarss 214:6848a51af734 106 #define TC_LONG_SIZE 135
chaithanyarss 214:6848a51af734 107
chaithanyarss 214:6848a51af734 108 // TMID list
chaithanyarss 214:6848a51af734 109 #define TMID_ACK_L1 0xA
chaithanyarss 214:6848a51af734 110 #define TMID_ACK_L234 0xB
chaithanyarss 214:6848a51af734 111 #define TMID_TCL 0x7
chaithanyarss 214:6848a51af734 112 #define TMID_CALL_SIGN 0xE
shreeshas95 0:f016e9e8d48b 113
shreeshas95 0:f016e9e8d48b 114 // OBOSC SERVICE SUBTYPE
chaithanyarss 214:6848a51af734 115 #define OBOSC_TCL_MAX_SHORT_SIZE 11
chaithanyarss 214:6848a51af734 116 #define OBOSC_LONG_TC_FIRST_HALF_SIZE 67
chaithanyarss 214:6848a51af734 117 #define OBOSC_LONG_TC_SECOND_HALF_SIZE 68
chaithanyarss 214:6848a51af734 118 #define OBOSC_TCL_TAG_LONG_FIRST_HALF 0x10
chaithanyarss 214:6848a51af734 119 #define OBOSC_TCL_TAG_LONG_SECOND_HALF 0x11
shreeshas95 4:104dd82c99b8 120
chaithanyarss 214:6848a51af734 121 #define OBOSC_SUB_DISABLE 0x01
chaithanyarss 214:6848a51af734 122 #define OBOSC_SUB_RETRY 0x05
chaithanyarss 214:6848a51af734 123 #define OBOSC_SUB_REP_TCLD 0x06
chaithanyarss 214:6848a51af734 124 #define OBOSC_SUB_REP_LE 0x0F
chaithanyarss 214:6848a51af734 125 #define OBOSC_SUB_RESET 0x07
chaithanyarss 214:6848a51af734 126
shreeshas95 101:bece931236a2 127 // PAYLOAD or SCIENCE
chaithanyarss 214:6848a51af734 128 #define PAYLOAD_BUFFER_LENGTH 6723
chaithanyarss 214:6848a51af734 129 #define PAY_SPI_MOSI PTE18
chaithanyarss 214:6848a51af734 130 #define PAY_SPI_MISO PTE19
chaithanyarss 214:6848a51af734 131 #define PAY_SPI_CLK PTE17
chaithanyarss 214:6848a51af734 132 #define PAY_SPI_CS PTE16
ee12b079 209:63e9c8f8b5d2 133
ee12b079 209:63e9c8f8b5d2 134 //BEACON
chaithanyarss 214:6848a51af734 135 #define BCN_APID_SOURCE 0x41
chaithanyarss 214:6848a51af734 136 #define BCN_SERVICE 0x81
chaithanyarss 214:6848a51af734 137
ee12b079 209:63e9c8f8b5d2 138 //BAE
chaithanyarss 214:6848a51af734 139 #define BAE_APID_SOURCE 0x81
chaithanyarss 214:6848a51af734 140 #define BAE_SERVICE 0x81
chaithanyarss 214:6848a51af734 141 #define BAE_POWER_ON_PID 0x13
chaithanyarss 214:6848a51af734 142 #define BAE_POWER_OFF_PID 0x23
chaithanyarss 214:6848a51af734 143 #define BAE_RESET_PID 0x33
ee12b079 209:63e9c8f8b5d2 144
ee12b079 209:63e9c8f8b5d2 145 //RF RELAY
chaithanyarss 214:6848a51af734 146 #define RF_RELAY_CNTRL_TX PTA7
chaithanyarss 214:6848a51af734 147 #define RF_RELAY_CNTRL_BCN PTA12
ee12b079 209:63e9c8f8b5d2 148
chaithanyarss 214:6848a51af734 149
shreeshas95 0:f016e9e8d48b 150 // ****************GLOBAL VARIABLES******************
shreeshas95 0:f016e9e8d48b 151 // DEBUG
shreeshas95 0:f016e9e8d48b 152 Serial gPC( USBTX, USBRX );
shreeshas95 4:104dd82c99b8 153 DigitalOut gLEDR(LED_RED);
shreeshas95 4:104dd82c99b8 154 DigitalOut gLEDG(LED_GREEN);
shreeshas95 0:f016e9e8d48b 155
shreeshas95 0:f016e9e8d48b 156 // COM_RX
shreeshas95 0:f016e9e8d48b 157 RawSerial RX1M( COM_RX_UART_TX, COM_RX_UART_RX );
shreeshas95 0:f016e9e8d48b 158 COM_RX_DATA_NODE *gRX_HEAD_DATA_NODE = NULL;
shreeshas95 0:f016e9e8d48b 159 COM_RX_DATA_NODE *gRX_CURRENT_DATA_NODE = NULL;
shreeshas95 2:2caf2a9a13aa 160 // uint8_t *gRX_CURRENT_PTR = NULL;
shreeshas95 0:f016e9e8d48b 161 uint32_t gRX_COUNT = 0;
shreeshas95 0:f016e9e8d48b 162 uint16_t gTOTAL_INCORRECT_SIZE_TC = 0x00;
shreeshas95 0:f016e9e8d48b 163 uint16_t gTOTAL_CRC_FAIL_TC = 0x00;
shreeshas95 2:2caf2a9a13aa 164 uint16_t gTOTAL_REPEATED_TC = 0x00;
shreeshas95 0:f016e9e8d48b 165
shreeshas95 0:f016e9e8d48b 166 // COMMON SPI
shreeshas95 0:f016e9e8d48b 167 SPI spi( SPI_MOSI, SPI_MISO, SPI_CLK );
shreeshas95 1:a0055b3280c8 168 DigitalOut gCS_ADF(SPI_CS_ADF);
ee12b079 86:a26f5f22631d 169 DigitalOut cs_sd(SPI_CS_SDC);
shreeshas95 2:2caf2a9a13aa 170 DigitalOut gCS_RTC(SPI_CS_RTC);
shreeshas95 0:f016e9e8d48b 171 Mutex SPI_mutex;
shreeshas95 0:f016e9e8d48b 172
ee12b079 209:63e9c8f8b5d2 173 //I2C
ee12b079 209:63e9c8f8b5d2 174 Mutex BAE_I2C_mutex;
ee12b079 209:63e9c8f8b5d2 175
ee12b079 209:63e9c8f8b5d2 176 //RF Relay
ee12b079 209:63e9c8f8b5d2 177 DigitalOut RF_SW_CNTRL_BCN(RF_RELAY_CNTRL_BCN);
ee12b079 209:63e9c8f8b5d2 178 DigitalOut RF_SW_CNTRL_TX(RF_RELAY_CNTRL_TX);
ee12b079 209:63e9c8f8b5d2 179
ee12b079 209:63e9c8f8b5d2 180 //COM_RX
ee12b079 209:63e9c8f8b5d2 181 DigitalOut COM_RX_CNTRL(PIN72);
ee12b079 209:63e9c8f8b5d2 182 DigitalOut COM_TX_CNTRL(PIN56);
ee12b079 209:63e9c8f8b5d2 183
shreeshas95 0:f016e9e8d48b 184 // TC LIST
shreeshas95 0:f016e9e8d48b 185 Base_tc* gHEAD_NODE_TCL = NULL;
shreeshas95 0:f016e9e8d48b 186 Base_tc* gLAST_NODE_TCL = NULL;
shreeshas95 2:2caf2a9a13aa 187 uint8_t gMASTER_STATE = TCL_STATE_INCOMPLETE;
shreeshas95 2:2caf2a9a13aa 188 uint16_t gFLAGS = 0x0000;
shreeshas95 0:f016e9e8d48b 189
shreeshas95 0:f016e9e8d48b 190 // COM_MNG_TMTC THREAD
shreeshas95 0:f016e9e8d48b 191 Thread* gCOM_MNG_TMTC_THREAD = NULL;
shreeshas95 0:f016e9e8d48b 192 Timeout gRX_TIMEOUT;
shreeshas95 0:f016e9e8d48b 193 Timeout gSESSION_TIMEOUT;
shreeshas95 0:f016e9e8d48b 194
shreeshas95 0:f016e9e8d48b 195 // COM_MNG_TMTC
shreeshas95 2:2caf2a9a13aa 196
ee12b079 209:63e9c8f8b5d2 197
ee12b079 209:63e9c8f8b5d2 198
shreeshas95 2:2caf2a9a13aa 199 // PA cooling timeout
shreeshas95 4:104dd82c99b8 200 Timeout gCOM_PA_COOLING_TIMEOUT;
shreeshas95 2:2caf2a9a13aa 201
shreeshas95 2:2caf2a9a13aa 202 // GS code for verification
aniruddhv 37:c9a739750806 203 const uint8_t gGSCODE[] = {0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
shreeshas95 2:2caf2a9a13aa 204
shreeshas95 0:f016e9e8d48b 205 uint8_t gTOTAL_VALID_TC = 0x00;
shreeshas95 0:f016e9e8d48b 206 // USE LAST_L1_ACK FOR GENERATING REPORT
shreeshas95 4:104dd82c99b8 207 uint8_t gLAST_TM[TM_LONG_SIZE];
shreeshas95 4:104dd82c99b8 208 uint8_t gLAST_TM_SHORT_OR_LONG = SHORT_TM_CODE;
shreeshas95 3:6c81fc8834e2 209
shreeshas95 101:bece931236a2 210 // PAYLOAD OR SCIENCE_THREAD
shreeshas95 3:6c81fc8834e2 211 Thread* gSCIENCE_THREAD = NULL;
shreeshas95 101:bece931236a2 212 dmaSPISlave gPAY_SPI(PAY_SPI_MOSI, PAY_SPI_MISO, PAY_SPI_CLK, PAY_SPI_CS);
ee12b079 191:0636c8391407 213 uint8_t gPAYLOAD_BUFFER[PAYLOAD_BUFFER_LENGTH] = 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ee12b079 192:f0d5fde60221 214 RtosTimer *PL_wo_dma;
shreeshas95 4:104dd82c99b8 215
ee12b079 209:63e9c8f8b5d2 216
shreeshas95 4:104dd82c99b8 217 // CALL SIGN TM
shreeshas95 103:b55559925dc1 218 const uint8_t gCALL_SIGN_STRING[TM_SHORT_SIZE] = {0xE0, 0x00, 0x00, 0x00, 0x56, 0x55, 0x32, 0x4E, 0x43, 0x46, 0x00, 0xAC, 0x11};
shreeshas95 103:b55559925dc1 219
shreeshas95 103:b55559925dc1 220 // CDMS HK
ee12b079 209:63e9c8f8b5d2 221 uint8_t CDMS_STANDBY;
ee12b079 209:63e9c8f8b5d2 222 uint8_t CDMS_HEALTH_DATA[128];
ee12b079 209:63e9c8f8b5d2 223 uint8_t CDMS_RAM[59];
ee12b079 209:63e9c8f8b5d2 224 uint16_t GPIO_STATUS;
chaithanyarss 214:6848a51af734 225 uint8_t CDMS_HK_MAIN_STATUS;
ee12b079 209:63e9c8f8b5d2 226 uint8_t COMRX_STATUS;
ee12b079 209:63e9c8f8b5d2 227 uint8_t RTC_FAULTCOUNT;
ee12b079 209:63e9c8f8b5d2 228 uint16_t SD_FAULTCOUNT;
ee12b079 209:63e9c8f8b5d2 229 uint8_t SD_STATUS;
ee12b079 209:63e9c8f8b5d2 230 uint8_t BAE_FAULTCOUNT;
ee12b079 209:63e9c8f8b5d2 231 uint8_t BAE_STATUS;
ee12b079 209:63e9c8f8b5d2 232 uint8_t PL_STATUS;
ee12b079 209:63e9c8f8b5d2 233 uint16_t PL_FAULTCOUNT;
ee12b079 209:63e9c8f8b5d2 234 bool BAE_HK_I2C;
ee12b079 209:63e9c8f8b5d2 235 uint8_t RTC_STATUS;
ee12b079 209:63e9c8f8b5d2 236 float RSSI_volatge;
ee12b079 209:63e9c8f8b5d2 237
shreeshas95 103:b55559925dc1 238 CDMS_HK_actual actual_data;
shreeshas95 103:b55559925dc1 239 CDMS_HK_quant quant_data;
shreeshas95 103:b55559925dc1 240 CDMS_HK_min_max min_max_data;
ee12b079 194:ab528911780d 241 bool firstCount=true;
ee12b079 194:ab528911780d 242
ee12b079 209:63e9c8f8b5d2 243 //GPIO PINS
ee12b079 209:63e9c8f8b5d2 244 DigitalIn V_A_PGOOD (PIN88);
ee12b079 209:63e9c8f8b5d2 245 DigitalIn V_B_PGOOD_1 (PIN6);
ee12b079 209:63e9c8f8b5d2 246 DigitalIn V_B_PGOOD_2 (PIN7);
ee12b079 209:63e9c8f8b5d2 247 DigitalIn V_C_PGOOD (PIN54);
ee12b079 209:63e9c8f8b5d2 248 DigitalIn COMRX_OC_FAULT (PIN68);
ee12b079 209:63e9c8f8b5d2 249 DigitalIn COMTX_OC_FAULT (PIN69);
ee12b079 209:63e9c8f8b5d2 250 DigitalIn BAE_OC_FAULT (PIN92);
ee12b079 209:63e9c8f8b5d2 251 DigitalIn PL_GPIO_1_STATUS (PIN71);
ee12b079 209:63e9c8f8b5d2 252 DigitalIn PL_GPIO_2_STATUS (PIN81);
ee12b079 209:63e9c8f8b5d2 253 DigitalIn PL_GPIO_3_STATUS (PIN80);
ee12b079 209:63e9c8f8b5d2 254 DigitalIn PL_BEE_SW_OC_FAULT (PIN4);
ee12b079 209:63e9c8f8b5d2 255 DigitalIn PL_EPS_LATCH_SW_OC_FAULT ();
ee12b079 209:63e9c8f8b5d2 256 DigitalIn V_C_EN_STATUS ();
ee12b079 209:63e9c8f8b5d2 257 DigitalIn V_D_EN_STATUS ();
ee12b079 209:63e9c8f8b5d2 258
ee12b079 209:63e9c8f8b5d2 259
ee12b079 209:63e9c8f8b5d2 260 DigitalIn SD_OC_FAULT (PIN90);
ee12b079 209:63e9c8f8b5d2 261 DigitalOut SD_SW_EN_DS (PIN97);
ee12b079 209:63e9c8f8b5d2 262 DigitalOut BAE_SW_EN_DS (PIN47);
ee12b079 209:63e9c8f8b5d2 263 DigitalOut PL_SW_EN_DS (PIN73);
ee12b079 209:63e9c8f8b5d2 264
ee12b079 194:ab528911780d 265 //SD HK
ee12b079 194:ab528911780d 266 uint32_t FSC_CURRENT[6];
ee12b079 195:6a549c0e9287 267 uint32_t FSC_LAST[6];
ee12b079 209:63e9c8f8b5d2 268 uint8_t SD_RD_ERROR;
ee12b079 209:63e9c8f8b5d2 269
ee12b079 209:63e9c8f8b5d2 270 //Time's
ee12b079 209:63e9c8f8b5d2 271 uint32_t TIME_LATEST_RTC;
ee12b079 209:63e9c8f8b5d2 272 uint32_t TIME_LATEST_I2C_BAE;
ee12b079 209:63e9c8f8b5d2 273 uint32_t TIME_LATEST_I2C_SPEED;
ee12b079 209:63e9c8f8b5d2 274 uint32_t TIME_LATEST_SD_WR;
ee12b079 209:63e9c8f8b5d2 275 uint32_t TIME_LATEST_SD_RD;
ee12b079 209:63e9c8f8b5d2 276 uint32_t TIME_LATEST_SPI_SPEED;
ee12b079 209:63e9c8f8b5d2 277
ee12b079 209:63e9c8f8b5d2 278 //Counter's
ee12b079 209:63e9c8f8b5d2 279 uint16_t CDMS_I2C_ERR_SPEED_COUNTER;
ee12b079 209:63e9c8f8b5d2 280 uint16_t CDMS_I2C_ERR_BAE_COUNTER;
ee12b079 209:63e9c8f8b5d2 281 uint16_t CDMS_HK_MAIN_COUNTER;
ee12b079 209:63e9c8f8b5d2 282 uint16_t COMRX_RESET_COUNTER;
ee12b079 209:63e9c8f8b5d2 283 uint16_t PL_MAIN_COUNTER;
ee12b079 209:63e9c8f8b5d2 284 uint16_t PL_RCV_SC_DATA_COUNTER;
ee12b079 209:63e9c8f8b5d2 285
ee12b079 209:63e9c8f8b5d2 286 //CDMS RAM parameters
ee12b079 209:63e9c8f8b5d2 287 uint8_t PL_INIT_STATUS;
ee12b079 209:63e9c8f8b5d2 288 uint8_t PL_MAIN_STATUS;
ee12b079 209:63e9c8f8b5d2 289 uint8_t PL_LOW_POWER;
ee12b079 209:63e9c8f8b5d2 290 uint8_t PL_STATE;
ee12b079 209:63e9c8f8b5d2 291 uint8_t PL_RCV_SC_DATA_STATUS;
ee12b079 209:63e9c8f8b5d2 292 uint8_t COM_SESSION;
ee12b079 209:63e9c8f8b5d2 293 uint8_t COM_RX;
ee12b079 209:63e9c8f8b5d2 294 uint8_t RF_SW_STATUS;
ee12b079 209:63e9c8f8b5d2 295 uint8_t COM_TX;
ee12b079 209:63e9c8f8b5d2 296 uint8_t COM_TX_STATUS;
ee12b079 209:63e9c8f8b5d2 297 uint8_t COM_MNG_TMTC;
ee12b079 209:63e9c8f8b5d2 298 uint8_t CDMS_STANDBY_HK;
ee12b079 209:63e9c8f8b5d2 299 uint8_t CDMS_STANDBY_PL;
ee12b079 209:63e9c8f8b5d2 300 uint8_t CDMS_INIT_STATUS;
ee12b079 209:63e9c8f8b5d2 301 uint8_t CDMS_HK_STATUS;
chaithanyarss 214:6848a51af734 302 uint8_t CDMS_RTC_BL;
chaithanyarss 214:6848a51af734 303
chaithanyarss 214:6848a51af734 304 //FLASH parameters
chaithanyarss 214:6848a51af734 305 uint8_t EPS_V_A_EN_STATUS;
chaithanyarss 214:6848a51af734 306 uint8_t BAE_SW_STATUS;
chaithanyarss 214:6848a51af734 307 uint8_t CDMS_SD_SW_STATUS;
chaithanyarss 214:6848a51af734 308 uint8_t PL_BEE_SW_STATUS =0 ;
chaithanyarss 214:6848a51af734 309 uint8_t PL_EPS_LATCH_SW_EN;
chaithanyarss 214:6848a51af734 310 uint8_t RTC_INIT_STATUS;
chaithanyarss 214:6848a51af734 311 uint8_t CDMS_RTC_DISABLE;
chaithanyarss 214:6848a51af734 312 uint8_t CDMS_RESET_COUNTER;
chaithanyarss 214:6848a51af734 313 uint8_t TIME_LATEST_CDSMS_RESET;
chaithanyarss 214:6848a51af734 314 uint8_t COM_TC_BYTES_LIMIT;
chaithanyarss 214:6848a51af734 315 uint8_t COM_RX_CURRENT_MAX;
chaithanyarss 214:6848a51af734 316 uint8_t COM_RX_DISABLE_TIMEOUT;
chaithanyarss 214:6848a51af734 317 uint8_t COM_PA_TMP_HIGH;
chaithanyarss 214:6848a51af734 318 uint8_t COM_PA_RECOVERY_TIMEOUT;
chaithanyarss 214:6848a51af734 319 uint8_t COM_SESSION_TIMEOUT;
chaithanyarss 214:6848a51af734 320 uint8_t COM_RSSI_MIN;
chaithanyarss 214:6848a51af734 321 uint8_t SD_LIB_BLK_CURRENT_NMBR;