Repository for CDMS code
Dependencies: SimpleDMA mbed-rtos mbed eeprom
Fork of COM_MNG_TMTC_SIMPLE by
DefinitionsAndGlobals.h@171:31bdf83591a1, 2016-04-20 (annotated)
- Committer:
- ee12b079
- Date:
- Wed Apr 20 12:58:58 2016 +0000
- Revision:
- 171:31bdf83591a1
- Parent:
- 164:be3b4b760d0c
- Child:
- 184:d75cea6f5d49
Testing OBSRS TC
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
shreeshas95 | 0:f016e9e8d48b | 1 | // **************DEFINITIONS********************* |
aniruddhv | 69:20f09a0c3fd2 | 2 | |
ee12b079 | 164:be3b4b760d0c | 3 | #define bypass_adf 0 |
aniruddhv | 69:20f09a0c3fd2 | 4 | |
shreeshas95 | 0:f016e9e8d48b | 5 | // COM_RX |
shreeshas95 | 5:ab276a17ca07 | 6 | #define RX_TIMEOUT_LIMIT 0.5 |
ee12b079 | 164:be3b4b760d0c | 7 | #define COM_RX_UART_TX PTE20 // For bypassing RX1M (SET BAUD RATE 1200) #define COM_RX_UART_TX USBTX |
ee12b079 | 164:be3b4b760d0c | 8 | #define COM_RX_UART_RX PTE21 // For bypassing RX1M (SET BAUD RATE 1200) #define COM_RX_UART_RX USBRX |
ee12b079 | 81:1a39e9e14771 | 9 | |
ee12b079 | 164:be3b4b760d0c | 10 | //#define COM_RX_UART_TX USBTX |
ee12b079 | 164:be3b4b760d0c | 11 | //#define COM_RX_UART_RX USBRX |
aniruddhv | 56:a88e16f6c18e | 12 | |
shreeshas95 | 0:f016e9e8d48b | 13 | // COMMON SPI |
shreeshas95 | 0:f016e9e8d48b | 14 | #define SPI_MOSI PTE1 |
shreeshas95 | 0:f016e9e8d48b | 15 | #define SPI_MISO PTE3 |
shreeshas95 | 0:f016e9e8d48b | 16 | #define SPI_CLK PTE2 |
shreeshas95 | 1:a0055b3280c8 | 17 | #define SPI_CS_ADF PTA15 |
ee12b079 | 114:9fb55057b13f | 18 | #define SPI_CS_SDC PIN20 |
ee12b079 | 114:9fb55057b13f | 19 | #define SPI_CS_RTC PIN26 |
shreeshas95 | 2:2caf2a9a13aa | 20 | |
shreeshas95 | 4:104dd82c99b8 | 21 | // COM_TX |
shreeshas95 | 4:104dd82c99b8 | 22 | #define COM_TX_CONFIG_LIMIT 3 |
aniruddhv | 52:0bd68655c651 | 23 | #define COM_TX_TICKER_LIMIT 32 |
shreeshas95 | 4:104dd82c99b8 | 24 | |
shreeshas95 | 2:2caf2a9a13aa | 25 | // ADF INTERRUPUT |
shreeshas95 | 2:2caf2a9a13aa | 26 | #define ADF_IRQ PTA14 |
ee12b079 | 161:a63672bf4423 | 27 | |
ee12b079 | 161:a63672bf4423 | 28 | |
ee12b079 | 162:48fda0b8d573 | 29 | //I2C - Payload to CDMS (need to change while using CDMS hardware); |
ee12b079 | 162:48fda0b8d573 | 30 | I2C master(PIN32,PIN31); |
ee12b079 | 171:31bdf83591a1 | 31 | InterruptIn PYLD_I2C_Int(PTC13); |
shreeshas95 | 0:f016e9e8d48b | 32 | |
ee12b079 | 162:48fda0b8d573 | 33 | //I2C - CDMS to BAE |
ee12b079 | 162:48fda0b8d573 | 34 | DigitalIn BAE_I2C_GPIO(PIN39); |
ee12b079 | 162:48fda0b8d573 | 35 | DigitalOut CDMS_I2C_GPIO(PIN67); |
ee12b079 | 162:48fda0b8d573 | 36 | |
shreeshas95 | 0:f016e9e8d48b | 37 | // TC LIST |
shreeshas95 | 2:2caf2a9a13aa | 38 | #define TCL_STATE_INCOMPLETE 0x00 |
shreeshas95 | 5:ab276a17ca07 | 39 | #define TCL_STATE_ABORTED 0x03 |
shreeshas95 | 5:ab276a17ca07 | 40 | #define TCL_STATE_EXECUTING 0x04 |
shreeshas95 | 5:ab276a17ca07 | 41 | #define TCL_STATE_COMPLETED 0x05 |
shreeshas95 | 5:ab276a17ca07 | 42 | #define TCL_STATE_EXCEEDED_LIMIT 0x06 |
shreeshas95 | 0:f016e9e8d48b | 43 | |
shreeshas95 | 0:f016e9e8d48b | 44 | // LIST OF FLAGS |
shreeshas95 | 2:2caf2a9a13aa | 45 | #define UART_INT_FLAG 0x0001 |
shreeshas95 | 2:2caf2a9a13aa | 46 | #define NEW_TC_RECEIVED 0x0002 |
shreeshas95 | 2:2caf2a9a13aa | 47 | #define COM_SESSION_FLAG 0x0004 |
shreeshas95 | 2:2caf2a9a13aa | 48 | #define COM_RX_FLAG 0x0008 |
shreeshas95 | 2:2caf2a9a13aa | 49 | #define COM_MNG_TMTC_RUNNING_FLAG 0x0010 |
shreeshas95 | 2:2caf2a9a13aa | 50 | #define COM_SESSION_VALIDITY 0x0020 |
shreeshas95 | 2:2caf2a9a13aa | 51 | #define ALL_CRC_PASS_FLAG 0x0040 |
shreeshas95 | 2:2caf2a9a13aa | 52 | #define COM_PA_HOT_FLAG 0x0080 |
shreeshas95 | 2:2caf2a9a13aa | 53 | #define COM_TX_FLAG 0x0100 |
shreeshas95 | 6:79d422d1ed42 | 54 | #define COM_SESSION_TIMEOUT_FLAG 0x0200 |
shreeshas95 | 0:f016e9e8d48b | 55 | |
shreeshas95 | 0:f016e9e8d48b | 56 | // COM_MNG_TMTC THREAD |
shreeshas95 | 6:79d422d1ed42 | 57 | #define SESSION_TIME_LIMIT 1500 |
shreeshas95 | 0:f016e9e8d48b | 58 | #define COM_MNG_TMTC_SIGNAL_UART_INT 0x01 |
shreeshas95 | 0:f016e9e8d48b | 59 | #define COM_MNG_TMTC_SIGNAL_ADF_NSD 0x02 |
shreeshas95 | 0:f016e9e8d48b | 60 | #define COM_MNG_TMTC_SIGNAL_ADF_SD 0x03 |
ee12b079 | 93:4d76de54a699 | 61 | #define SCIENCE_SIGNAL 0x04 |
shreeshas95 | 0:f016e9e8d48b | 62 | // COM_MNG_TMTC |
shreeshas95 | 2:2caf2a9a13aa | 63 | #define COM_PA_COOLING_TIME_LIMIT 20 |
shreeshas95 | 4:104dd82c99b8 | 64 | #define COM_MAX_TC_LIMIT 200 |
shreeshas95 | 4:104dd82c99b8 | 65 | #define TM_ACK_CODE_INDEX 2 |
shreeshas95 | 5:ab276a17ca07 | 66 | #define CRC_FAIL_NACK_CODE 0x01 |
shreeshas95 | 2:2caf2a9a13aa | 67 | |
shreeshas95 | 2:2caf2a9a13aa | 68 | // call sign |
shreeshas95 | 2:2caf2a9a13aa | 69 | #define PSC_CALLSIGN 0x00 |
shreeshas95 | 2:2caf2a9a13aa | 70 | #define APID_CALLSIGN 0x00 |
shreeshas95 | 2:2caf2a9a13aa | 71 | |
shreeshas95 | 2:2caf2a9a13aa | 72 | // max value of telecommands in a tcl |
shreeshas95 | 2:2caf2a9a13aa | 73 | #define TCL_OVERFLOW_CONSTANT 256 |
shreeshas95 | 4:104dd82c99b8 | 74 | #define TM_OVERFLOW_CONSTANT 256 |
shreeshas95 | 2:2caf2a9a13aa | 75 | |
shreeshas95 | 0:f016e9e8d48b | 76 | // starting value of packet sequence count at each pass |
shreeshas95 | 0:f016e9e8d48b | 77 | #define PSC_START_VALUE 1 |
shreeshas95 | 0:f016e9e8d48b | 78 | |
shreeshas95 | 0:f016e9e8d48b | 79 | // APID list |
aniruddhv | 52:0bd68655c651 | 80 | #define APID_COM 0 |
shreeshas95 | 0:f016e9e8d48b | 81 | #define APID_BAE 1 |
shreeshas95 | 0:f016e9e8d48b | 82 | #define APID_CDMS 2 |
shreeshas95 | 0:f016e9e8d48b | 83 | #define APID_SPEED 3 |
shreeshas95 | 0:f016e9e8d48b | 84 | |
aniruddhv | 52:0bd68655c651 | 85 | //SERVICE |
aniruddhv | 52:0bd68655c651 | 86 | #define SERVICE_OBOSC 0xB |
aniruddhv | 52:0bd68655c651 | 87 | #define SERVICE_OBSRS 0xF |
aniruddhv | 52:0bd68655c651 | 88 | |
shreeshas95 | 0:f016e9e8d48b | 89 | // HIGH PRIORITY TC - priority list |
shreeshas95 | 0:f016e9e8d48b | 90 | // not correct values here |
shreeshas95 | 0:f016e9e8d48b | 91 | #define HPTC1 5 |
shreeshas95 | 0:f016e9e8d48b | 92 | #define HPTC2 6 |
shreeshas95 | 0:f016e9e8d48b | 93 | // Add more entries above |
shreeshas95 | 0:f016e9e8d48b | 94 | |
shreeshas95 | 0:f016e9e8d48b | 95 | // SIZE of tc in bytes |
shreeshas95 | 0:f016e9e8d48b | 96 | #define TC_SHORT_SIZE 11 |
shreeshas95 | 0:f016e9e8d48b | 97 | #define TC_LONG_SIZE 135 |
shreeshas95 | 0:f016e9e8d48b | 98 | |
shreeshas95 | 0:f016e9e8d48b | 99 | // TMID list |
shreeshas95 | 0:f016e9e8d48b | 100 | #define TMID_ACK_L1 0xA |
shreeshas95 | 4:104dd82c99b8 | 101 | #define TMID_ACK_L234 0xB |
shreeshas95 | 4:104dd82c99b8 | 102 | #define TMID_TCL 0x7 |
shreeshas95 | 4:104dd82c99b8 | 103 | #define TMID_CALL_SIGN 0xE |
shreeshas95 | 0:f016e9e8d48b | 104 | |
shreeshas95 | 0:f016e9e8d48b | 105 | // OBOSC SERVICE SUBTYPE |
shreeshas95 | 4:104dd82c99b8 | 106 | #define OBOSC_TCL_MAX_SHORT_SIZE 11 |
shreeshas95 | 4:104dd82c99b8 | 107 | #define OBOSC_LONG_TC_FIRST_HALF_SIZE 67 |
shreeshas95 | 4:104dd82c99b8 | 108 | #define OBOSC_LONG_TC_SECOND_HALF_SIZE 68 |
shreeshas95 | 4:104dd82c99b8 | 109 | #define OBOSC_TCL_TAG_LONG_FIRST_HALF 0x10 |
shreeshas95 | 4:104dd82c99b8 | 110 | #define OBOSC_TCL_TAG_LONG_SECOND_HALF 0x11 |
shreeshas95 | 4:104dd82c99b8 | 111 | |
shreeshas95 | 0:f016e9e8d48b | 112 | #define OBOSC_SUB_DISABLE 0x01 |
shreeshas95 | 0:f016e9e8d48b | 113 | #define OBOSC_SUB_RETRY 0x05 |
shreeshas95 | 4:104dd82c99b8 | 114 | #define OBOSC_SUB_REP_TCLD 0x06 |
shreeshas95 | 0:f016e9e8d48b | 115 | #define OBOSC_SUB_REP_LE 0x0F |
shreeshas95 | 0:f016e9e8d48b | 116 | #define OBOSC_SUB_RESET 0x07 |
shreeshas95 | 0:f016e9e8d48b | 117 | |
shreeshas95 | 101:bece931236a2 | 118 | // PAYLOAD or SCIENCE |
shreeshas95 | 101:bece931236a2 | 119 | #define PAYLOAD_BUFFER_LENGTH 6723 |
ee12b079 | 113:b8991d9e3b6c | 120 | #define PAY_SPI_MOSI PTE18 |
ee12b079 | 113:b8991d9e3b6c | 121 | #define PAY_SPI_MISO PTE19 |
ee12b079 | 113:b8991d9e3b6c | 122 | #define PAY_SPI_CLK PTE17 |
ee12b079 | 113:b8991d9e3b6c | 123 | #define PAY_SPI_CS PTE16 |
shreeshas95 | 101:bece931236a2 | 124 | |
shreeshas95 | 3:6c81fc8834e2 | 125 | |
shreeshas95 | 0:f016e9e8d48b | 126 | // ****************GLOBAL VARIABLES****************** |
shreeshas95 | 0:f016e9e8d48b | 127 | // DEBUG |
shreeshas95 | 0:f016e9e8d48b | 128 | Serial gPC( USBTX, USBRX ); |
shreeshas95 | 4:104dd82c99b8 | 129 | DigitalOut gLEDR(LED_RED); |
shreeshas95 | 4:104dd82c99b8 | 130 | DigitalOut gLEDG(LED_GREEN); |
shreeshas95 | 0:f016e9e8d48b | 131 | |
shreeshas95 | 0:f016e9e8d48b | 132 | // COM_RX |
shreeshas95 | 0:f016e9e8d48b | 133 | RawSerial RX1M( COM_RX_UART_TX, COM_RX_UART_RX ); |
shreeshas95 | 0:f016e9e8d48b | 134 | COM_RX_DATA_NODE *gRX_HEAD_DATA_NODE = NULL; |
shreeshas95 | 0:f016e9e8d48b | 135 | COM_RX_DATA_NODE *gRX_CURRENT_DATA_NODE = NULL; |
shreeshas95 | 2:2caf2a9a13aa | 136 | // uint8_t *gRX_CURRENT_PTR = NULL; |
shreeshas95 | 0:f016e9e8d48b | 137 | uint32_t gRX_COUNT = 0; |
shreeshas95 | 0:f016e9e8d48b | 138 | uint16_t gTOTAL_INCORRECT_SIZE_TC = 0x00; |
shreeshas95 | 0:f016e9e8d48b | 139 | uint16_t gTOTAL_CRC_FAIL_TC = 0x00; |
shreeshas95 | 2:2caf2a9a13aa | 140 | uint16_t gTOTAL_REPEATED_TC = 0x00; |
shreeshas95 | 0:f016e9e8d48b | 141 | |
shreeshas95 | 0:f016e9e8d48b | 142 | // COMMON SPI |
shreeshas95 | 0:f016e9e8d48b | 143 | SPI spi( SPI_MOSI, SPI_MISO, SPI_CLK ); |
shreeshas95 | 1:a0055b3280c8 | 144 | DigitalOut gCS_ADF(SPI_CS_ADF); |
ee12b079 | 86:a26f5f22631d | 145 | DigitalOut cs_sd(SPI_CS_SDC); |
shreeshas95 | 2:2caf2a9a13aa | 146 | DigitalOut gCS_RTC(SPI_CS_RTC); |
shreeshas95 | 0:f016e9e8d48b | 147 | Mutex SPI_mutex; |
shreeshas95 | 0:f016e9e8d48b | 148 | |
shreeshas95 | 0:f016e9e8d48b | 149 | // TC LIST |
shreeshas95 | 0:f016e9e8d48b | 150 | Base_tc* gHEAD_NODE_TCL = NULL; |
shreeshas95 | 0:f016e9e8d48b | 151 | Base_tc* gLAST_NODE_TCL = NULL; |
shreeshas95 | 2:2caf2a9a13aa | 152 | uint8_t gMASTER_STATE = TCL_STATE_INCOMPLETE; |
shreeshas95 | 2:2caf2a9a13aa | 153 | uint16_t gFLAGS = 0x0000; |
shreeshas95 | 0:f016e9e8d48b | 154 | |
shreeshas95 | 0:f016e9e8d48b | 155 | // COM_MNG_TMTC THREAD |
shreeshas95 | 0:f016e9e8d48b | 156 | Thread* gCOM_MNG_TMTC_THREAD = NULL; |
shreeshas95 | 0:f016e9e8d48b | 157 | Timeout gRX_TIMEOUT; |
shreeshas95 | 0:f016e9e8d48b | 158 | Timeout gSESSION_TIMEOUT; |
shreeshas95 | 0:f016e9e8d48b | 159 | |
shreeshas95 | 0:f016e9e8d48b | 160 | // COM_MNG_TMTC |
shreeshas95 | 2:2caf2a9a13aa | 161 | |
shreeshas95 | 2:2caf2a9a13aa | 162 | // PA cooling timeout |
shreeshas95 | 4:104dd82c99b8 | 163 | Timeout gCOM_PA_COOLING_TIMEOUT; |
shreeshas95 | 2:2caf2a9a13aa | 164 | |
shreeshas95 | 2:2caf2a9a13aa | 165 | // GS code for verification |
aniruddhv | 37:c9a739750806 | 166 | const uint8_t gGSCODE[] = {0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; |
shreeshas95 | 2:2caf2a9a13aa | 167 | |
shreeshas95 | 0:f016e9e8d48b | 168 | uint8_t gTOTAL_VALID_TC = 0x00; |
shreeshas95 | 0:f016e9e8d48b | 169 | // USE LAST_L1_ACK FOR GENERATING REPORT |
shreeshas95 | 4:104dd82c99b8 | 170 | uint8_t gLAST_TM[TM_LONG_SIZE]; |
shreeshas95 | 4:104dd82c99b8 | 171 | uint8_t gLAST_TM_SHORT_OR_LONG = SHORT_TM_CODE; |
shreeshas95 | 3:6c81fc8834e2 | 172 | |
shreeshas95 | 101:bece931236a2 | 173 | // PAYLOAD OR SCIENCE_THREAD |
shreeshas95 | 3:6c81fc8834e2 | 174 | Thread* gSCIENCE_THREAD = NULL; |
shreeshas95 | 101:bece931236a2 | 175 | dmaSPISlave gPAY_SPI(PAY_SPI_MOSI, PAY_SPI_MISO, PAY_SPI_CLK, PAY_SPI_CS); |
shreeshas95 | 4:104dd82c99b8 | 176 | uint8_t gPAYLOAD_BUFFER[PAYLOAD_BUFFER_LENGTH]; |
shreeshas95 | 4:104dd82c99b8 | 177 | |
shreeshas95 | 4:104dd82c99b8 | 178 | // CALL SIGN TM |
shreeshas95 | 103:b55559925dc1 | 179 | const uint8_t gCALL_SIGN_STRING[TM_SHORT_SIZE] = {0xE0, 0x00, 0x00, 0x00, 0x56, 0x55, 0x32, 0x4E, 0x43, 0x46, 0x00, 0xAC, 0x11}; |
shreeshas95 | 103:b55559925dc1 | 180 | |
shreeshas95 | 103:b55559925dc1 | 181 | // CDMS HK |
shreeshas95 | 103:b55559925dc1 | 182 | CDMS_HK_actual actual_data; |
shreeshas95 | 103:b55559925dc1 | 183 | CDMS_HK_quant quant_data; |
shreeshas95 | 103:b55559925dc1 | 184 | CDMS_HK_min_max min_max_data; |
shreeshas95 | 103:b55559925dc1 | 185 | bool firstCount=true; |