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ADF_test_6_Manual_Automatic_NOWait_CMDBitVerification
ADFTEST
Fork of ADF_test by
Revision 10:fd7810c14615, committed 2016-04-10
- Comitter:
- ee12b079
- Date:
- Sun Apr 10 17:43:03 2016 +0000
- Parent:
- 9:80284ab81e74
- Commit message:
- CMD_BIT_VERIFICATION
Changed in this revision
main.cpp | Show annotated file Show diff for this revision Revisions of this file |
diff -r 80284ab81e74 -r fd7810c14615 main.cpp --- a/main.cpp Fri Apr 01 18:35:28 2016 +0000 +++ b/main.cpp Sun Apr 10 17:43:03 2016 +0000 @@ -4,6 +4,10 @@ //Last modified 30 March 2016 5:34PM : Changes made :-Infinite verification of BBRAM_CHECK , REG_CHECK, Verification of connection, Verificatioin of interrupt //Last modified 31 March 2016 5:34PM : Changes made :-User Interface of commands and Status verification. //Last modified 01 April 2016 5:34PM : Changes made :-Correction in register verification, inclusion of dual setup. Manual as well as automatic, Data registers verification, Automatic Tx_RX Turnaround to be put off(in BBRAM), +//Last Modified 02 April 2016 8:00PM : Changes made :-Data Register verificaation, assert_IRQ_LOW function, +//Last Modified 02 April 2016 8:00PM : Changes made :-Verificatin of Device ID, Checking CMD_Ready Bit, + +//Future Plans: Verify IRQ once again, Change IRQ Mask according to our convinience. Optimise the code by using the rudimentary status return by the ADF7023 //Changes to be made: Delete Initial ADF Check. and create other function to verify ADF //without reset feature , with state checks. #include<iostream> @@ -27,6 +31,7 @@ #define CMD_PHY_OFF 0xB0 #define CMD_PHY_TX 0xB5 #define CMD_CONFIG_DEV 0xBB +#define SPI_NOP 0xFF /*******Defining Status***************************/ #define PHY_OFF 0xB1 #define PHY_ON 0xB2 @@ -42,6 +47,23 @@ #define SPI_MISO PTE3 #define SPI_CLK PTE2 #define SPI_CS_ADF PTA15 +/*********MEM_RW_CMD*******************/ +#define SPI_MEM_RD_MCR 0x3B +#define SPI_MEM_RD_BBRAM 0x39 +#define SPI_MEM_RD_BUFFER 0x38 +#define SPI_MEMR_RD_MCR 0x2B +#define SPI_MEMR_RD_BBRAM 0x29 +#define SPI_MEMR_RD_BUFFER 0x28 +#define SPI_MEM_WR_MCR 0x1B +#define SPI_MEM_WR_BBRAM 0x19 +#define SPI_MEM_WR_BUFFER 0x18 +#define SPI_MEMR_WR_MCR 0x0B +#define SPI_MEMR_WR_BBRAM 0x09 +#define SPI_MEMR_WR_BUFFER 0x08 + +/**********MISC*********************/ +#define DEVICE_ID_MSB 0x70 +#define DEVICE_ID_LSB 0x23 /**********Variables-**********/ unsigned int Adf_data_counter=0; @@ -52,6 +74,7 @@ unsigned int miso_err_cnt=0; unsigned int hw_reset_err_cnt=0; unsigned int counter =0; +unsigned int data_bytes_transmitted=112; int err[64]; bool bcn_flag=0; bool bbram_flag=0; @@ -94,11 +117,79 @@ } } } +bool cmd_stat=false; +#define check_status {\ + unsigned char stat=0;\ + wait_ms(3);\ + gCS_ADF=0;\ + spi.write(0xFF);\ + stat = spi.write(0xFF);\ + gCS_ADF=1;\ + status = stat;\ +} +#define TIMING_LEN 100 +unsigned char timing[TIMING_LEN]; +#define temp_timing {\ + wait_ms(40);\ + gCS_ADF=0;\ + for(int i=0;i<TIMING_LEN;i++){\ + timing[i]=spi.write(SPI_NOP);\ + }\ + gCS_ADF=1;\ + for(int i=0;i<TIMING_LEN;i++){\ + gPC.printf("%x\t",(int)timing[i]);\ + }\ + for(int i=0;i<TIMING_LEN;i++){\ + timing[i]=0;\ + }\ + gPC.printf("\r\n\r\n");\ + }\ + +#define restart_ADF {\ + gCS_ADF=0;\ + spi.write(CMD_PHY_ON);\ + gCS_ADF=1;\ + assert_IRQ_LOW;\ + gCS_ADF=0;\ + spi.write(CMD_PHY_TX);\ + gCS_ADF=1;\ + }\ +#define cmd_ready_check {\ + cmd_stat=false;\ + check_status;\ + cmd_stat=(status&0x20);\ + }\ + +bool cmd_ready_check_f(){ + check_status; + return (status&0x20); + } + +bool spi_stat=false; +#define spi_ready_check {\ + spi_stat=false;\ + check_status;\ + spi_stat=(status&0x80);\ + }\ +unsigned char irq_src_0=0x00; +unsigned char irq_src_1=0x00; +/*******Not used now**********/ +#define read_irq_src_0 {\ + irq_src_0=0x00;\ + irq_src_1=0x00;\ + gCS_ADF =0;\ + spi.write(SPI_MEM_RD_MCR);\ + spi.write(0x00);\ + spi.write(0xFF);\ + irq_src_0=spi.write(0xFF);\ + irq_src_1=spi.write(0xFF);\ + gCS_ADF =1;\ + }\ +/********************************/ #define bbram_write {\ gCS_ADF=0;\ spi.write(0xB0);\ - wait_us(300);\ gCS_ADF=1;\ gCS_ADF=0;\ for(int i=0;i<66;i++){\ @@ -107,15 +198,24 @@ gCS_ADF=1;\ } -#define check_status {\ - unsigned char stat=0;\ +bool device_id_stat=false; +unsigned char device_id_MSB =0x00,device_id_LSB = 0x00; +#define device_id_verify {\ + device_id_stat=false;\ + device_id_MSB =0x00;\ + device_id_LSB = 0x00;\ gCS_ADF=0;\ - spi.write(0xFF);\ - stat = spi.write(0xFF);\ + spi.write(0x38);\ + spi.write(0x01);\ + spi.write(0xFF);\ + device_id_MSB = spi.write(0xFF);\ + device_id_LSB = spi.write(0xFF);\ gCS_ADF=1;\ - status = stat;\ - gPC.printf("State= %x \r\n",(int)stat);\ -} + if(device_id_MSB == DEVICE_ID_MSB && device_id_LSB == DEVICE_ID_LSB){\ + device_id_stat=true;\ + }\ + }\ + int err_arr[64]; #define bbram_check gCS_ADF=0;\ for(int i=0;i<64;i++){\ @@ -138,7 +238,7 @@ }\ gCS_ADF=1;\ for(int i=0;i<64;i++){\ - gPC.printf("%d ",err[i]);\ + gPC.printf("%x ",err[i]);\ }\ gPC.printf("Write \t read \r\n");\ for(int i=0;i<64;i++){\ @@ -178,9 +278,9 @@ reg_check(0x28,0x14,TRANSMIT_LEN_1);\ }\ if(reg_err)\ - printf("Reg_err_ignored %d \r\n",(int)temp);\ + printf("Reg_err_ignored %x \r\n",(int)temp);\ else\ - printf("reg written successful %d \r\n",(int)temp);\ + printf("reg written successful %x \r\n",(int)temp);\ reg_err=true;\ for(reg_err_cnt=0;reg_err_cnt<REG_ERR_THRS && reg_err;reg_err_cnt++){\ gCS_ADF=0;\ @@ -191,30 +291,39 @@ reg_check(0x28,0x15,TRANSMIT_LEN_2);\ }\ if(reg_err)\ - printf("Reg_err_ignored %d \r\n",(int)temp);\ + printf("Reg_err_ignored %x \r\n",(int)temp);\ else\ - printf("reg written successful %d \r\n",(int)temp);\ + printf("reg written successful %x \r\n",(int)temp);\ reg_err=true;\ - }\ int v_cnt=0; bool temp_state_err=false; bool temp_spi_err=false; void check_SPI() { + for(int i=0;i<TIMING_LEN;i++){ + timing[i]=0; + }/*to be removed**/ temp_spi_err=false; temp_state_err=true; while(temp_state_err){ v_cnt++; - gPC.printf("\r\n\nWelcome to ADF_SPI_Verification %d\r\n",v_cnt); + gPC.printf("\r\n\nWelcome to ADF_SPI_Verification %x\r\n",v_cnt); gCS_ADF=0; spi.write(CMD_HW_RESET); gCS_ADF=1; + //temp_timing; + wait_ms(100); + gCS_ADF=0; + spi.write(SPI_NOP); + spi.write(SPI_NOP); + gCS_ADF=1; wait(1); gCS_ADF=0; spi.write(CMD_PHY_OFF); gCS_ADF=1; - wait(1); + //temp_timing; + //wait(1); check_status; if((status&0x1F)!=S_PHY_OFF){ gPC.printf("HW_reset_failed.SPI Communication failed. State transited to %x \r\n",(int)status); @@ -228,43 +337,66 @@ initiate; gCS_ADF=0; spi.write(CMD_CONFIG_DEV); + //temp_timing; gCS_ADF=1; - wait(1); + //wait(1); } } - gCS_ADF=0; - spi.write(CMD_PHY_ON); - gCS_ADF=1; - wait(1); + while(1){ + if(cmd_ready_check_f()){ + gCS_ADF=0; + spi.write(CMD_PHY_ON); + gCS_ADF=1; + break; + } + else{ + gPC.printf("CMD_NOT_READY\r\n"); + wait_ms(1); + } + } + + //temp_timing; + //wait(1); check_status; if((status&0x1F)!=S_PHY_ON){ - gPC.printf("PHY_OFF->ON State_transition.SPI Communication failed.State transited to %d \r\n",(int)status); + gPC.printf("PHY_OFF->ON State_transition.SPI Communication failed.State transited to %x \r\n",(int)status); temp_spi_err=true; } else{ gPC.printf("PHY_OFF->ON Succesful\r\n"); } - - gCS_ADF=0; - spi.write(CMD_PHY_TX); - gCS_ADF=1; - wait(1); + while(1){ + if(cmd_ready_check_f()){ + gCS_ADF=0; + spi.write(CMD_PHY_TX); + gCS_ADF=1; + break; + } + else{ + gPC.printf("CMD_NOT_READY\r\n"); + wait_ms(1); + } + }//temp_timing; + //temp_timing; + //temp_timing; + //temp_timing; + //wait(1); check_status; if((status&0x1F)!=S_PHY_TX){ - gPC.printf("PHY_ON->TX State_transition failed .SPI Communication failed.State transited to %d \r\n",(int)status); + gPC.printf("PHY_ON->TX State_transition failed .SPI Communication failed.State transited to %x \r\n",(int)status); temp_spi_err=true; //Remove this /*gPC.printf("Resetting Hardware\r\n"); gCS_ADF=0; spi.write(CMD_HW_RESET); gCS_ADF=1; - wait(1); + //wait(1); check_status; gCS_ADF=0; spi.write(CMD_PHY_OFF); gCS_ADF=1; - wait(1); + //wait(1); check_status; gPC.printf("Writing BBRAM\r\n"); bbram_write; @@ -273,19 +405,19 @@ gCS_ADF=0; spi.write(CMD_CONFIG_DEV); gCS_ADF=1; - wait(1); + //wait(1); check_status; gPC.printf("PHY_ONning\r\n"); gCS_ADF=0; spi.write(CMD_PHY_ON); gCS_ADF=1; - wait(1); + //wait(1); check_status;//Problem is after here gPC.printf("PHY_TXing\r\n"); gCS_ADF=0; spi.write(CMD_PHY_TX); gCS_ADF=1; - wait(1); + //wait(1); check_status; */ } @@ -297,23 +429,33 @@ gCS_ADF=0; spi.write(CMD_PHY_ON); gCS_ADF=1; - wait(1); + //temp_timing; + //wait(1); check_status; if((status&0x1F)!=S_PHY_ON){ - gPC.printf("PHY_TX->ON State_transition failed .State transited to %d \r\n",(int)status); + gPC.printf("PHY_TX->ON State_transition failed .State transited to %x \r\n",(int)status); temp_spi_err=true; } else{ gPC.printf("PHY_TX->ON Succesful\r\n"); } - - gCS_ADF=0; - spi.write(CMD_PHY_OFF); - gCS_ADF=1; - wait(1); + while(1){ + if(cmd_ready_check_f()){ + gCS_ADF=0; + spi.write(CMD_PHY_OFF); + gCS_ADF=1; + break; + } + else{ + gPC.printf("CMD_NOT_READY\r\n"); + wait_ms(1); + } + } + //temp_timing; + //wait(1); check_status; if((status&0x1F)!=S_PHY_OFF){ - gPC.printf("PHY_ON->OFFState_transition failed .State transited to %d \r\n",(int)status); + gPC.printf("PHY_ON->OFFState_transition failed .State transited to %x \r\n",(int)status); temp_spi_err=true; } else{ @@ -350,15 +492,12 @@ gCS_ADF=0;\ spi.write(CMD_PHY_OFF);\ gCS_ADF=1;\ - wait_us(PHY_OFF_EXEC_TIME);\ state_err_cnt++;\ }\ else if(status&0x80==0x00){\ - wait_ms(5);\ spi_err_cnt++;\ }\ else {\ - wait_ms(1);\ cmd_err_cnt++;\ }\ }\ @@ -398,7 +537,7 @@ gCS_ADF=0; spi.write(CMD_HW_RESET); gCS_ADF=1; - wait_ms(2);// Typically 1 ms + //wait_ms(2);// Typically 1 ms int count=0; int temp_return = 0; while(count<10 && miso_err_cnt<10){ @@ -410,7 +549,7 @@ count++; } else{ - wait_us(50); + //wait_us(50); miso_err_cnt++; } } @@ -421,14 +560,25 @@ //--------------------------------------------------------------------------- //Change made here: register verification +#define assert_IRQ_LOW while(IRQ){\ + gCS_ADF=0;\ + spi.write(0x0B);\ + spi.write(0x36);\ + spi.write(0xFF);\ + gCS_ADF=1;\ + }\ -#define write_data {\ - counter++;\ - gCS_ADF=0;\ - spi.write(0x0B);\ - spi.write(0x36);\ - spi.write(0xFF);\ - gCS_ADF=1;\ + +bool data_err= false; +unsigned char temp_byte=0x00; +unsigned char data_err1[112]; +unsigned char data_err_cnt=0; +#define DATA_ERR_THRS 20 +#define write_data {counter++;\ + assert_IRQ_LOW;\ + data_err_cnt=0;\ + data_err=true;\ + while(data_err && (data_err_cnt<DATA_ERR_THRS)){\ gCS_ADF=0;\ if(buffer_state){\ spi.write(0x18);\ @@ -445,16 +595,38 @@ }\ }\ gCS_ADF=1;\ + data_err=false;\ + gCS_ADF=0;\ + spi.write(0x38);\ + spi.write(0x90);\ + spi.write(0xFF);\ + for(unsigned char i=0; i<112;i++){\ + temp_byte=spi.write(0xFF);\ + if(buffer_112[i]!=temp_byte){\ + data_err1[i]=1;\ + data_err=true;\ + }\ + }\ + gCS_ADF=1;\ buffer_state = !buffer_state;\ -} + data_err_cnt++;\ + }\ + data_bytes_transmitted+=112;\ + if(data_bytes_transmitted>65535){\ + restart_ADF;\ + }\ +}\ + void send_tm_from_SD_card(){ } + void check(){ if(IRQ){ if(!ADF_off){ if(stop_transmission){ write_data; + //prnt_data_Tx_results; ADF_off=true; } @@ -464,7 +636,7 @@ } } else{ - wait_ms(20); + //wait_ms(20); ticker.detach(); gCS_ADF=0; spi.write(0xB1); @@ -503,7 +675,6 @@ gCS_ADF=0;\ spi.write(0xB1);\ gCS_ADF=1;\ - wait_us(300);\ gCS_ADF=0;\ spi.write(0xFF);\ spi.write(0xFF);\ @@ -511,7 +682,6 @@ gCS_ADF=0;\ spi.write(0xB5);\ gCS_ADF=1;\ - wait_us(300);\ gCS_ADF=0;\ spi.write(0xFF);\ spi.write(0xFF);\ @@ -541,26 +711,28 @@ } void prnt_status(){ - switch(status){ - case 0xB1: + switch(status&0x1F){ + case 0x11: gPC.printf("PHY_OFF\r\n"); break; - case 0xb2: + case 0x12: gPC.printf("PHY_ON\r\n"); break; - case 0xB3: + case 0x13: gPC.printf("PHY_RX\r\n"); break; - case 0xB4: + case 0x14: gPC.printf("PHY_TX\r\n"); break; } } +/**********Check : How will you ensure data is not lost, How do you ensure correct data is written*****************/ + void command_in(){ int in=0; - gPC.scanf("%d",&in); + gPC.scanf("%x",&in); switch(in){ case 0 : @@ -572,21 +744,25 @@ gCS_ADF=0; spi.write(CMD_HW_RESET); gCS_ADF=1; - wait(1); + //wait(1); + gCS_ADF=0; + spi.write(0xFF); + spi.write(0xFF); + gCS_ADF=1; break; case 2 : gPC.printf("CMD_PHY_OFF\r\n"); gCS_ADF=0; spi.write(CMD_PHY_OFF); gCS_ADF=1; - wait(1); + //wait(1); break; case 7 : gPC.printf("CMD_PHY_ON"); gCS_ADF=0; spi.write(CMD_PHY_ON); gCS_ADF=1; - wait(1); + //wait(1); break; case 8 : @@ -594,7 +770,8 @@ gCS_ADF=0; spi.write(CMD_PHY_TX); gCS_ADF=1; - wait(1); + check_status; + //wait(1); break; case 3 : gPC.printf("BBRAM_Write"); @@ -610,20 +787,48 @@ gCS_ADF=0; spi.write(CMD_CONFIG_DEV); gCS_ADF=1; - wait(1); + //wait(1); break; case 5: initiate; break; - case 9: + case 10: check_SPI(); break; - case 10: + case 9: data_length = sizeof(Adf_data); cout<<data_length<<endl; adf_not_SDcard(); break; + case 11: + //clearing the interrupt + gCS_ADF=0;\ + spi.write(0x0B);\ + spi.write(0x36);\ + spi.write(0xFF);\ + gCS_ADF=1;\ + check_status; + break; + case 12: + spi_ready_check; + gPC.printf("%x",(int)spi_stat); + break; + case 13: + cmd_ready_check; + gPC.printf("%x",(int)cmd_stat); + break; + case 14: + device_id_verify; + gPC.printf("%x%x",(int)device_id_MSB,(int)device_id_LSB); + break; + case 15: + restart_ADF; + break; + case 17: + write_data; + printf("%x %x\t",(int)data_err,(int)data_err_cnt); + break; } } @@ -639,7 +844,7 @@ led = !led; // toggle led command_in(); //check_SPI(); - wait(0.2f); + //wait(0.2f); } gPC.puts("transmission done\r\n"); } \ No newline at end of file