UART console application for testing SX1272/SX1276

Dependencies:   SX127x

/media/uploads/dudmuck/lora.png

This is a UART console test application for using SX127x library driver for SX1272/SX1276 radio transceivers. Serial console is provided at 57600bps. Refer to Serial Communication with a PC for information about using the serial port with your PC.

Using this command interface, you can exercise the functionality of radio chip without needing specialized software application for your PC.

Commands which can be used include ? to list available commands, or . to query status from radio chip, for example. The serial console allows you to configure the radio chip, such as setting spreading factor, bandwidth, operating frequency, etc.

A simple chat application is provided to try communications between two boards. The SX127x library object is instantiated with pin assignments generic arduino headers, but can be easily reassigned for any mbed board.

The same driver library can operate for both SX1272 and SX1276. Upon starting, the driver auto-detects whether SX1272 or SX1276 transceiver chip is connected by attempting to change the LowFrequencyModeOn bit in RegOpMode register. If this bit can be changed, then the radio device is SX1276. This bit is not implemented in SX1272. A few of the radio driver functions select behavior based on this detection. The differences between these two devices is small, from a software perspective.

Using with SX1276MB1xAS Shield

This component plugs into any board with arduino uno headers.

There are two different version of this shield. European version (MAS), and North American (LAS). The LAS shield uses PA_BOOST transmit pin to permit +20dBm power. The MAS version uses RFO transmit pin in Europe. This software reads RF switch pin (A4 pin) pulling resistor to determine which type of shield is installed.


Using with your own production board

This software is useful for validating RF performance your own LoRa board design, because only two external pins needs to be provided to PC (UART TX/RX). You can select an mbed platform which matches the CPU on your own board. If the memory size doesnt match exactly, you can export the program to an offline toolchain and edit the target type or linker file there.

Transmitter Test Guidelines

FSK mode is used for transmitter testing, because an unmodulated carrier can be sent, permitting easy measurement of TX power and frequency error.

commands used for transmitter testing:

  • frf915.0 change to your desired RF center frequency (in this case 915MHz)
  • L to toggle the radio chip into FSK mode.
  • fdev0 to configure TX frequency deviation to zero, to put the transmitted carrier on the center frequency.
  • pas to select which TX pin is connected to antenna matching (RFO vs PA_BOOST).
  • op<dBm> to configure TX power.
  • If you desire to test higher power PA_BOOST, use ocp<mA>
  • w 01 03 put radio chip into transmit mode (skips writing to FIFO). This will cause radio to transmit preamble, because the FIFO is empty in TX mode. Since Fdev is zero, an unmodulated carrier is sent.
  • Spectrum analyzer can now be used to to observe TX power, harmonics, power consumption, or frequency error.
  • stby to end transmission, or use h to reset radio chip to default condition.
  • Use period . command at any time to review current radio configuration.

LoRa transmitter testing

  • use L command to toggle radio into LoRa, if necessary.
  • Normally the tx command is used to manually send single packets.
  • txc will toggle TxContinuousMode in LoRa modem to send continuous modulated transmission.
  • Useful for checking adjacent channel power.
  • enter txc again to end transmission.

Receiver Test Guidelines

FSK mode is used for receiver sensitivity testing, allowing the use of a BERT signal generator (such as R/S SMIQ03B). Using this method provides real-time indication of receiver sensitivity, useful for tuning and impedance matching. The radio chip outputs DCLK and DATA digital signals which are connected back to BERT signal generator.

commands used for receiver testing:

  • L to toggle the radio chip into FSK mode.
  • datam to toggle FSK modem into continuous mode. This disables packet engine and gives direct access to demodulator.
  • configure DIO1 pin to DCLK function, and DIO2 pin to DATA function:
    • dio command to list current DIO pin asignments
    • d1 to cycle DIO1 function until Dclk is selected
    • d2 for DIO2, only Data function is available in FSK continuous mode
  • frf915.0 change to your desired RF center frequency (in this case 915MHz)
  • rx to start receiver
  • stby to disable receiver

Full command list

Arguments shown in square brackets [] indicate required. <> are optional, where leaving off the argument usually causes a read of the item, and providing the value causes a write operation. You should always have the radio chip datasheet on-hand when using these commands.

Hitting <enter> key by itself will repeat last command.
<Ctrl-C> will cancel an operation in progress.

command list: common commands (both LoRa and FSK)

commanddescription
. (period)print current radio status
?list available commands
Ltoggle active radio modem (LoRa vs FSK)
hhardware reset, put radio into default power-on condition
frf<MHz>get/set RF operating frequency
rxstart radio receiver (any received packets are printed onto your serial terminal)
rssiread instantaneous RSSI (level read at the time command is issued)
tx<%d>transmit test packet. Packet length value can be provided as argument, or uses last value if not provided
payl<%d>get/set payload length
bw<KHz>get/set bandwidth. In LoRa mode, both receive and transmit bandwidth are changed. For FSK, only receive bandwidth is affected. bwa accesses AFC bandwidth in FSK
pastoggle RFO / PA_BOOST transmit pin output selection
op<dBm>get/set TX output power. Value is provided in dBm. Special case is value of 20dBm (on PA_BOOST), which causes increase in TX DAC voltage
ocp<mA>get/set TX current limit, in milliamps. Necessary adjustment when +20dBm is used
dioshow DIO pin assignments
d<0-5>change DIO pin assignment, the pin number is given as arguement. Each pin has up to 4 possible functions
pres<%d>set preamble length. LoRa: number of symbols. FSK: number of bytes
crcontoggle crcOn
lnabcycle LNA-boost setting (receiver performance adjustment)
Rread all radio registers (use only while reading chip datasheet)
r[%x]read single radio register (use only while reading chip datasheet)
w[%x %x]write single radio register (use only while reading chip datasheet)
pllbwchange PLL bandwidth
stbyset chip mode to standby
sleepset chip mode to sleep
fstxset chip mode to fstx
fsrxset chip mode to fsrx
Eiger range test commandsdescription
pid<%d>get set ID number in range test payload
pertx<%d>start Eiger PER transmit. The count of packets to send is provided as arguement
perrxstart Eiger PER receive
txpd<%d>get/set tx delay between PER packets transmitted

command list: LoRa modem commands

LoRa commandLoRa description
iqinvtoggle RX IQ invert
cintoggle TX IQ invert
lhp<%d>(RX) get/set hop period
sync<%x>get/set sync (post-preamble gap, single byte)
cr<1-4>get/set codingRate
lhmtoggle explicit/implicit (explicit mode sends payload length with each packet)
sf<%d>get/set spreadingFactor (SF7 to SF12)
ldrtoggle LowDataRateOptimize (changes payload encoding, for long packets)
txctoggle TxContinuousMode
rxt<%d>get/set SymbTimeout
rxsstart RX_SINGLE (receives only for SymbTimeout symbols)
cad<%d num tries>run channel activity detection

command list: FSK modem commands

FSK commandFSK description
c<%d>get/set test cases. Several FSK bitrates/bandwidths pre-configured to give optimal performance.
fdev<kHz>(TX) get/set frequency deviation
mods(TX) increment modulation shaping
par(TX) increment paRamp
datamtoggle DataMode (packet/continuous)
fifottoggle TxStartCondition (FifoThreshold level vs FifoNotEmpty)
br<%f kbps>get/set bitrate
dcfincrement DcFree (manchester / whitening)
pktftoggle PacketFormat fixed/variable length
syncontoggle SyncOn (frame sync, SFD enable)
bitsynctoggle BitSyncOn (continuous mode only)
syncw<hex bytes>get/set syncword. Sync bytes are provided by hex octects separated by spaces.
fei(RX) read FEI
rxt(RX) increment RxTrigger (RX start on rssi vs. preamble detect)
rssit<-dBm>(RX) get/set rssi threshold (trigger level for RSSI interrupt)
rssis<%d>(RX) get/set rssi smoothing
rssio<%d>(RX) get/set rssi offset
agcauto(RX) toggle AgcAutoOn (true = LNA gain set automatically)
afcauto(RX) toggle AfcAutoOn
ac(RX) AfcClear
ar(RX) increment AutoRestartRxMode
alc(RX) toggle AfcAutoClearOn (only if AfcAutoOn is set)
prep(RX) toggle PreamblePolarity (0xAA vs 0x55)
pde(RX) toggle PreambleDetectorOn
pds<%d>(RX) get/set PreambleDetectorSize
pdt<%d>(RX) get/set PreambleDetectorTol
mp(RX) toggle MapPreambleDetect (DIO function RSSI vs PreambleDetect)
thr<%d>get/set FifoThreshold (triggers FifoLevel interrupt)
polltoggle poll_irq_en. Radio events read from DIO pins vs polling of IrqFlags register
Eempty out FIFO
clkoutincrement ClkOut divider
ookenter OOK mode
ooktincrement OokThreshType
ooksincrement OokPeakTheshStep
sqlch<%d>get/set OokFixedThresh
Committer:
dudmuck
Date:
Fri Apr 14 20:33:24 2017 +0000
Revision:
22:2005df80c8a8
Parent:
21:b84a77dfb43c
Child:
23:821b4f426ee6
support TypeABZ module

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dudmuck 1:1cd0afbed23c 1 #include "sx127x_lora.h"
dudmuck 1:1cd0afbed23c 2 #include "sx127x_fsk.h"
dudmuck 19:be8a8b0e7320 3 #define __STDC_FORMAT_MACROS
dudmuck 19:be8a8b0e7320 4 #include <inttypes.h>
dudmuck 22:2005df80c8a8 5
dudmuck 18:9530d682fd9a 6 //#include "kermit.h"
dudmuck 0:be215de91a68 7
dudmuck 13:c73caaee93a5 8 //#define FSK_PER
dudmuck 10:d9bb2ce57f05 9 //#define START_EIGER_RX
dudmuck 10:d9bb2ce57f05 10 //#define START_EIGER_TX
dudmuck 21:b84a77dfb43c 11 //#define START_OOK_TX_TEST
dudmuck 10:d9bb2ce57f05 12
dudmuck 22:2005df80c8a8 13 /* on B-L072Z-LRWAN1 use target NUCLEO-L073RX, and for correct baudrate must install SB36 and remove C24 */
dudmuck 22:2005df80c8a8 14 //#define TYPE_ABZ
dudmuck 22:2005df80c8a8 15
dudmuck 10:d9bb2ce57f05 16 DigitalOut led1(LED1);
dudmuck 0:be215de91a68 17 Serial pc(USBTX, USBRX);
dudmuck 0:be215de91a68 18
dudmuck 0:be215de91a68 19 uint8_t tx_cnt;
dudmuck 0:be215de91a68 20 char pcbuf[64];
dudmuck 5:360069ec9953 21 int pcbuf_len;
dudmuck 0:be215de91a68 22
dudmuck 0:be215de91a68 23 typedef enum {
dudmuck 0:be215de91a68 24 APP_NONE = 0,
dudmuck 0:be215de91a68 25 APP_CHAT
dudmuck 0:be215de91a68 26 } app_e;
dudmuck 0:be215de91a68 27
dudmuck 0:be215de91a68 28 app_e app = APP_NONE;
dudmuck 0:be215de91a68 29
dudmuck 18:9530d682fd9a 30 #define FSK_LARGE_PKT_THRESHOLD 0x3f
dudmuck 7:c3c54f222ced 31
dudmuck 21:b84a77dfb43c 32 bool crc32_en; // ethcrc
dudmuck 21:b84a77dfb43c 33
dudmuck 21:b84a77dfb43c 34 /*********** cmd_ulrx()... ************/
dudmuck 21:b84a77dfb43c 35 typedef enum {
dudmuck 21:b84a77dfb43c 36 ULRX_STATE_OFF = 0,
dudmuck 21:b84a77dfb43c 37 ULRX_STATE_NEED_LENGTH,
dudmuck 21:b84a77dfb43c 38 ULRX_STATE_PAYLOAD,
dudmuck 21:b84a77dfb43c 39 ULRX_STATE_SYNC1
dudmuck 21:b84a77dfb43c 40 } ulrx_state_e;
dudmuck 21:b84a77dfb43c 41 ulrx_state_e ulrx_state = ULRX_STATE_OFF;
dudmuck 21:b84a77dfb43c 42 bool ulrx_enable;
dudmuck 21:b84a77dfb43c 43 /*********** ...cmd_ulrx() ************/
dudmuck 21:b84a77dfb43c 44
dudmuck 21:b84a77dfb43c 45 uint8_t rx_payload_idx;
dudmuck 21:b84a77dfb43c 46
dudmuck 21:b84a77dfb43c 47 /************** fsk modeReady isr... **********/
dudmuck 21:b84a77dfb43c 48 bool rx_payloadReady_int_en; // cmd_prrx()
dudmuck 21:b84a77dfb43c 49 #define N_RX_PKTS 32
dudmuck 21:b84a77dfb43c 50 #define RX_PKT_SIZE_LIMIT 32
dudmuck 21:b84a77dfb43c 51 uint8_t rx_pkts[N_RX_PKTS][RX_PKT_SIZE_LIMIT];
dudmuck 21:b84a77dfb43c 52 uint8_t n_rx_pkts;
dudmuck 21:b84a77dfb43c 53 /************** ...fsk modeReady isr **********/
dudmuck 21:b84a77dfb43c 54
dudmuck 21:b84a77dfb43c 55 #ifdef TARGET_STM
dudmuck 21:b84a77dfb43c 56 CRC_HandleTypeDef CrcHandle;
dudmuck 21:b84a77dfb43c 57 #endif /* TARGET_STM */
dudmuck 21:b84a77dfb43c 58
dudmuck 21:b84a77dfb43c 59 int rssi_polling_thresh; // 0 = polling off
dudmuck 18:9530d682fd9a 60 bool ook_test_en;
dudmuck 18:9530d682fd9a 61 bool poll_irq_en;
dudmuck 20:b11592c9ba5f 62 volatile RegIrqFlags2_t fsk_RegIrqFlags2_prev;
dudmuck 20:b11592c9ba5f 63 volatile RegIrqFlags1_t fsk_RegIrqFlags1_prev;
dudmuck 20:b11592c9ba5f 64 Timer rx_start_timer;
dudmuck 20:b11592c9ba5f 65 uint32_t secs_rx_start;
dudmuck 1:1cd0afbed23c 66
dudmuck 8:227605e4a760 67 /***************************** eiger per: *************************************************/
dudmuck 8:227605e4a760 68
dudmuck 18:9530d682fd9a 69 uint32_t num_cads;
dudmuck 18:9530d682fd9a 70 bool cadper_enable;
dudmuck 8:227605e4a760 71 bool per_en;
dudmuck 8:227605e4a760 72 float per_tx_delay = 0.1;
dudmuck 8:227605e4a760 73 int per_id;
dudmuck 18:9530d682fd9a 74 uint32_t PacketTxCnt, PacketTxCntEnd;
dudmuck 8:227605e4a760 75 uint32_t PacketPerOkCnt;
dudmuck 8:227605e4a760 76 int PacketRxSequencePrev;
dudmuck 8:227605e4a760 77 uint32_t PacketPerKoCnt;
dudmuck 8:227605e4a760 78 uint32_t PacketNormalCnt;
dudmuck 8:227605e4a760 79 Timeout per_timeout;
dudmuck 8:227605e4a760 80
dudmuck 18:9530d682fd9a 81
dudmuck 18:9530d682fd9a 82
dudmuck 0:be215de91a68 83 /******************************************************************************/
dudmuck 9:2f13a9ef27b4 84 #ifdef TARGET_MTS_MDOT_F411RE
dudmuck 9:2f13a9ef27b4 85 // mosi, miso, sclk, cs, rst, dio0, dio1
dudmuck 9:2f13a9ef27b4 86 SX127x radio(LORA_MOSI, LORA_MISO, LORA_SCK, LORA_NSS, LORA_RESET, LORA_DIO0, LORA_DIO1);
dudmuck 9:2f13a9ef27b4 87
dudmuck 9:2f13a9ef27b4 88 DigitalOut txctl(LORA_TXCTL);
dudmuck 9:2f13a9ef27b4 89 DigitalOut rxctl(LORA_RXCTL);
dudmuck 9:2f13a9ef27b4 90
dudmuck 9:2f13a9ef27b4 91 void rfsw_callback()
dudmuck 9:2f13a9ef27b4 92 {
dudmuck 9:2f13a9ef27b4 93 /* SKY13350 */
dudmuck 9:2f13a9ef27b4 94 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) { // start of transmission
dudmuck 9:2f13a9ef27b4 95 txctl = 1;
dudmuck 9:2f13a9ef27b4 96 rxctl = 0;
dudmuck 9:2f13a9ef27b4 97 } else { // reception:
dudmuck 9:2f13a9ef27b4 98 txctl = 0;
dudmuck 9:2f13a9ef27b4 99 rxctl = 1;
dudmuck 9:2f13a9ef27b4 100 }
dudmuck 9:2f13a9ef27b4 101 }
dudmuck 9:2f13a9ef27b4 102
dudmuck 15:c69b942685ea 103 #define FSK_RSSI_OFFSET 0
dudmuck 15:c69b942685ea 104 #define FSK_RSSI_SMOOTHING 2
dudmuck 20:b11592c9ba5f 105 DigitalIn dio2(LORA_DIO2);
dudmuck 20:b11592c9ba5f 106 DigitalIn dio4(LORA_DIO4);
dudmuck 15:c69b942685ea 107
dudmuck 22:2005df80c8a8 108 #elif defined(TARGET_NUCLEO_L073RZ) && defined(TYPE_ABZ) /********************* ...mDot **********************/
dudmuck 22:2005df80c8a8 109 /* Murata TypeABZ discovery board */
dudmuck 22:2005df80c8a8 110 // mosi, miso, sclk, cs, rst, dio0, dio1
dudmuck 22:2005df80c8a8 111 SX127x radio(PA_7, PA_6, PB_3, PA_15, PC_0, PB_4, PB_1);
dudmuck 22:2005df80c8a8 112 DigitalIn dio2(PB_0);
dudmuck 22:2005df80c8a8 113 DigitalIn dio3(PC_13);
dudmuck 22:2005df80c8a8 114 #define FSK_RSSI_OFFSET 0
dudmuck 22:2005df80c8a8 115 #define FSK_RSSI_SMOOTHING 2
dudmuck 22:2005df80c8a8 116 #define CRF1 PA_1
dudmuck 22:2005df80c8a8 117 #define CRF2 PC_2
dudmuck 22:2005df80c8a8 118 #define CRF3 PC_1
dudmuck 22:2005df80c8a8 119 DigitalOut Vctl1(CRF1);
dudmuck 22:2005df80c8a8 120 DigitalOut Vctl2(CRF2);
dudmuck 22:2005df80c8a8 121 DigitalOut Vctl3(CRF3);
dudmuck 22:2005df80c8a8 122
dudmuck 22:2005df80c8a8 123 void rfsw_callback()
dudmuck 22:2005df80c8a8 124 {
dudmuck 22:2005df80c8a8 125 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) {
dudmuck 22:2005df80c8a8 126 Vctl1 = 0;
dudmuck 22:2005df80c8a8 127 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 22:2005df80c8a8 128 Vctl2 = 0;
dudmuck 22:2005df80c8a8 129 Vctl3 = 1;
dudmuck 22:2005df80c8a8 130 } else {
dudmuck 22:2005df80c8a8 131 Vctl2 = 1;
dudmuck 22:2005df80c8a8 132 Vctl3 = 0;
dudmuck 22:2005df80c8a8 133 }
dudmuck 22:2005df80c8a8 134 } else {
dudmuck 22:2005df80c8a8 135 if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER || radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER_SINGLE)
dudmuck 22:2005df80c8a8 136 Vctl1 = 1;
dudmuck 22:2005df80c8a8 137 else
dudmuck 22:2005df80c8a8 138 Vctl1 = 0;
dudmuck 22:2005df80c8a8 139
dudmuck 22:2005df80c8a8 140 Vctl2 = 0;
dudmuck 22:2005df80c8a8 141 Vctl3 = 0;
dudmuck 22:2005df80c8a8 142 }
dudmuck 22:2005df80c8a8 143 }
dudmuck 22:2005df80c8a8 144 #else /***************** ..Type-ABZ and L073RZ *************/
dudmuck 5:360069ec9953 145 // pin: 3 8 1 7 10 12 5
dudmuck 5:360069ec9953 146 // mosi, miso, sclk, cs, rst, dio0, dio1
dudmuck 6:fe16f96ee335 147 SX127x radio(D11, D12, D13, D10, A0, D2, D3); // sx1276 arduino shield
dudmuck 0:be215de91a68 148
dudmuck 15:c69b942685ea 149 // for SX1276 arduino shield:
dudmuck 7:c3c54f222ced 150 #ifdef TARGET_LPC11U6X
dudmuck 15:c69b942685ea 151 //DigitalOut rfsw(P0_23);
dudmuck 15:c69b942685ea 152 DigitalInOut rfsw(P0_23);
dudmuck 7:c3c54f222ced 153 #else
dudmuck 15:c69b942685ea 154 //DigitalOut rfsw(A4);
dudmuck 15:c69b942685ea 155 DigitalInOut rfsw(A4);
dudmuck 7:c3c54f222ced 156 #endif
dudmuck 6:fe16f96ee335 157
dudmuck 21:b84a77dfb43c 158 InterruptIn dio0int(D2);
dudmuck 21:b84a77dfb43c 159 InterruptIn dio1int(D3);
dudmuck 21:b84a77dfb43c 160 InterruptIn dio2int(D4);
dudmuck 21:b84a77dfb43c 161 InterruptIn dio4int(D8);
dudmuck 14:c57ea544dc18 162 DigitalIn dio2(D4);
dudmuck 21:b84a77dfb43c 163 DigitalIn dio3(D5);
dudmuck 20:b11592c9ba5f 164 DigitalIn dio4(D8);
dudmuck 22:2005df80c8a8 165 DigitalIn dio5(D9);
dudmuck 22:2005df80c8a8 166
dudmuck 22:2005df80c8a8 167 #if defined(TARGET_STM)
dudmuck 21:b84a77dfb43c 168 DigitalOut pc3(PC_3); // nucleo corner pin for misc indication
dudmuck 21:b84a77dfb43c 169 #endif
dudmuck 21:b84a77dfb43c 170
dudmuck 6:fe16f96ee335 171 void rfsw_callback()
dudmuck 6:fe16f96ee335 172 {
dudmuck 6:fe16f96ee335 173 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER)
dudmuck 6:fe16f96ee335 174 rfsw = 1;
dudmuck 6:fe16f96ee335 175 else
dudmuck 6:fe16f96ee335 176 rfsw = 0;
dudmuck 6:fe16f96ee335 177 }
dudmuck 6:fe16f96ee335 178
dudmuck 15:c69b942685ea 179 #define FSK_RSSI_OFFSET 5
dudmuck 15:c69b942685ea 180 #define FSK_RSSI_SMOOTHING 2
dudmuck 15:c69b942685ea 181
dudmuck 15:c69b942685ea 182 typedef enum {
dudmuck 15:c69b942685ea 183 SHIELD_TYPE_NONE = 0,
dudmuck 15:c69b942685ea 184 SHIELD_TYPE_LAS,
dudmuck 15:c69b942685ea 185 SHIELD_TYPE_MAS,
dudmuck 15:c69b942685ea 186 } shield_type_e;
dudmuck 15:c69b942685ea 187 shield_type_e shield_type;
dudmuck 15:c69b942685ea 188
dudmuck 9:2f13a9ef27b4 189 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 9:2f13a9ef27b4 190
dudmuck 9:2f13a9ef27b4 191 SX127x_fsk fsk(radio);
dudmuck 9:2f13a9ef27b4 192 SX127x_lora lora(radio);
dudmuck 18:9530d682fd9a 193 //Kermit kermit(lora);
dudmuck 9:2f13a9ef27b4 194
dudmuck 22:2005df80c8a8 195 #ifndef TYPE_ABZ
dudmuck 20:b11592c9ba5f 196 volatile bool saved_dio4;
dudmuck 22:2005df80c8a8 197 #endif
dudmuck 20:b11592c9ba5f 198
dudmuck 21:b84a77dfb43c 199 uint32_t crcTable[256];
dudmuck 21:b84a77dfb43c 200 void make_crc_table()
dudmuck 21:b84a77dfb43c 201 {
dudmuck 21:b84a77dfb43c 202 const uint32_t POLYNOMIAL = 0xEDB88320;
dudmuck 21:b84a77dfb43c 203 uint32_t remainder;
dudmuck 21:b84a77dfb43c 204 uint8_t b = 0;
dudmuck 21:b84a77dfb43c 205 do{
dudmuck 21:b84a77dfb43c 206 // Start with the data byte
dudmuck 21:b84a77dfb43c 207 remainder = b;
dudmuck 21:b84a77dfb43c 208 for (unsigned long bit = 8; bit > 0; --bit)
dudmuck 21:b84a77dfb43c 209 {
dudmuck 21:b84a77dfb43c 210 if (remainder & 1)
dudmuck 21:b84a77dfb43c 211 remainder = (remainder >> 1) ^ POLYNOMIAL;
dudmuck 21:b84a77dfb43c 212 else
dudmuck 21:b84a77dfb43c 213 remainder = (remainder >> 1);
dudmuck 21:b84a77dfb43c 214 }
dudmuck 21:b84a77dfb43c 215 crcTable[(size_t)b] = remainder;
dudmuck 21:b84a77dfb43c 216 } while(0 != ++b);
dudmuck 21:b84a77dfb43c 217 }
dudmuck 21:b84a77dfb43c 218
dudmuck 21:b84a77dfb43c 219 uint32_t gen_crc(const uint8_t *p, size_t n)
dudmuck 21:b84a77dfb43c 220 {
dudmuck 21:b84a77dfb43c 221 uint32_t crc = 0xffffffff;
dudmuck 21:b84a77dfb43c 222 size_t i;
dudmuck 21:b84a77dfb43c 223 for(i = 0; i < n; i++) {
dudmuck 21:b84a77dfb43c 224 crc = crcTable[*p++ ^ (crc&0xff)] ^ (crc>>8);
dudmuck 21:b84a77dfb43c 225 }
dudmuck 21:b84a77dfb43c 226
dudmuck 21:b84a77dfb43c 227 return(~crc);
dudmuck 21:b84a77dfb43c 228 }
dudmuck 21:b84a77dfb43c 229
dudmuck 21:b84a77dfb43c 230
dudmuck 0:be215de91a68 231 void printLoraIrqs_(bool clear)
dudmuck 0:be215de91a68 232 {
dudmuck 0:be215de91a68 233 //in radio class -- RegIrqFlags_t RegIrqFlags;
dudmuck 0:be215de91a68 234
dudmuck 0:be215de91a68 235 //already read RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 0:be215de91a68 236 printf("\r\nIrqFlags:");
dudmuck 1:1cd0afbed23c 237 if (lora.RegIrqFlags.bits.CadDetected)
dudmuck 0:be215de91a68 238 printf("CadDetected ");
dudmuck 1:1cd0afbed23c 239 if (lora.RegIrqFlags.bits.FhssChangeChannel) {
dudmuck 0:be215de91a68 240 //radio.RegHopChannel.octet = radio.read_reg(REG_LR_HOPCHANNEL);
dudmuck 1:1cd0afbed23c 241 printf("FhssChangeChannel:%d ", lora.RegHopChannel.bits.FhssPresentChannel);
dudmuck 0:be215de91a68 242 }
dudmuck 1:1cd0afbed23c 243 if (lora.RegIrqFlags.bits.CadDone)
dudmuck 0:be215de91a68 244 printf("CadDone ");
dudmuck 1:1cd0afbed23c 245 if (lora.RegIrqFlags.bits.TxDone)
dudmuck 0:be215de91a68 246 printf("TxDone ");
dudmuck 1:1cd0afbed23c 247 if (lora.RegIrqFlags.bits.ValidHeader)
dudmuck 0:be215de91a68 248 printf("ValidHeader ");
dudmuck 1:1cd0afbed23c 249 if (lora.RegIrqFlags.bits.PayloadCrcError)
dudmuck 0:be215de91a68 250 printf("PayloadCrcError ");
dudmuck 1:1cd0afbed23c 251 if (lora.RegIrqFlags.bits.RxDone)
dudmuck 0:be215de91a68 252 printf("RxDone ");
dudmuck 1:1cd0afbed23c 253 if (lora.RegIrqFlags.bits.RxTimeout)
dudmuck 0:be215de91a68 254 printf("RxTimeout ");
dudmuck 0:be215de91a68 255
dudmuck 0:be215de91a68 256 printf("\r\n");
dudmuck 0:be215de91a68 257
dudmuck 0:be215de91a68 258 if (clear)
dudmuck 1:1cd0afbed23c 259 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 0:be215de91a68 260
dudmuck 0:be215de91a68 261 }
dudmuck 0:be215de91a68 262
dudmuck 1:1cd0afbed23c 263 void lora_printCodingRate(bool from_rx)
dudmuck 0:be215de91a68 264 {
dudmuck 1:1cd0afbed23c 265 uint8_t d = lora.getCodingRate(from_rx);
dudmuck 0:be215de91a68 266 printf("CodingRate:");
dudmuck 0:be215de91a68 267 switch (d) {
dudmuck 0:be215de91a68 268 case 1: printf("4/5 "); break;
dudmuck 0:be215de91a68 269 case 2: printf("4/6 "); break;
dudmuck 0:be215de91a68 270 case 3: printf("4/7 "); break;
dudmuck 0:be215de91a68 271 case 4: printf("4/8 "); break;
dudmuck 0:be215de91a68 272 default:
dudmuck 0:be215de91a68 273 printf("%d ", d);
dudmuck 0:be215de91a68 274 break;
dudmuck 0:be215de91a68 275 }
dudmuck 0:be215de91a68 276 }
dudmuck 0:be215de91a68 277
dudmuck 1:1cd0afbed23c 278 void lora_printHeaderMode()
dudmuck 0:be215de91a68 279 {
dudmuck 1:1cd0afbed23c 280 if (lora.getHeaderMode())
dudmuck 0:be215de91a68 281 printf("implicit ");
dudmuck 0:be215de91a68 282 else
dudmuck 0:be215de91a68 283 printf("explicit ");
dudmuck 0:be215de91a68 284 }
dudmuck 0:be215de91a68 285
dudmuck 1:1cd0afbed23c 286 void lora_printBw()
dudmuck 0:be215de91a68 287 {
dudmuck 19:be8a8b0e7320 288 (void)lora.getBw();
dudmuck 0:be215de91a68 289
dudmuck 0:be215de91a68 290 printf("Bw:");
dudmuck 0:be215de91a68 291 if (radio.type == SX1276) {
dudmuck 1:1cd0afbed23c 292 switch (lora.RegModemConfig.sx1276bits.Bw) {
dudmuck 0:be215de91a68 293 case 0: printf("7.8KHz "); break;
dudmuck 0:be215de91a68 294 case 1: printf("10.4KHz "); break;
dudmuck 0:be215de91a68 295 case 2: printf("15.6KHz "); break;
dudmuck 0:be215de91a68 296 case 3: printf("20.8KHz "); break;
dudmuck 0:be215de91a68 297 case 4: printf("31.25KHz "); break;
dudmuck 0:be215de91a68 298 case 5: printf("41.7KHz "); break;
dudmuck 0:be215de91a68 299 case 6: printf("62.5KHz "); break;
dudmuck 0:be215de91a68 300 case 7: printf("125KHz "); break;
dudmuck 0:be215de91a68 301 case 8: printf("250KHz "); break;
dudmuck 0:be215de91a68 302 case 9: printf("500KHz "); break;
dudmuck 1:1cd0afbed23c 303 default: printf("%x ", lora.RegModemConfig.sx1276bits.Bw); break;
dudmuck 0:be215de91a68 304 }
dudmuck 0:be215de91a68 305 } else if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 306 switch (lora.RegModemConfig.sx1272bits.Bw) {
dudmuck 0:be215de91a68 307 case 0: printf("125KHz "); break;
dudmuck 0:be215de91a68 308 case 1: printf("250KHz "); break;
dudmuck 0:be215de91a68 309 case 2: printf("500KHz "); break;
dudmuck 0:be215de91a68 310 case 3: printf("11b "); break;
dudmuck 0:be215de91a68 311 }
dudmuck 0:be215de91a68 312 }
dudmuck 0:be215de91a68 313 }
dudmuck 0:be215de91a68 314
dudmuck 1:1cd0afbed23c 315 void lora_printAllBw()
dudmuck 0:be215de91a68 316 {
dudmuck 0:be215de91a68 317 int i, s;
dudmuck 0:be215de91a68 318
dudmuck 0:be215de91a68 319 if (radio.type == SX1276) {
dudmuck 1:1cd0afbed23c 320 s = lora.RegModemConfig.sx1276bits.Bw;
dudmuck 0:be215de91a68 321 for (i = 0; i < 10; i++ ) {
dudmuck 1:1cd0afbed23c 322 lora.RegModemConfig.sx1276bits.Bw = i;
dudmuck 0:be215de91a68 323 printf("%d ", i);
dudmuck 1:1cd0afbed23c 324 lora_printBw();
dudmuck 0:be215de91a68 325 printf("\r\n");
dudmuck 0:be215de91a68 326 }
dudmuck 1:1cd0afbed23c 327 lora.RegModemConfig.sx1276bits.Bw = s;
dudmuck 0:be215de91a68 328 } else if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 329 s = lora.RegModemConfig.sx1272bits.Bw;
dudmuck 0:be215de91a68 330 for (i = 0; i < 3; i++ ) {
dudmuck 1:1cd0afbed23c 331 lora.RegModemConfig.sx1272bits.Bw = i;
dudmuck 0:be215de91a68 332 printf("%d ", i);
dudmuck 1:1cd0afbed23c 333 lora_printBw();
dudmuck 0:be215de91a68 334 printf("\r\n");
dudmuck 0:be215de91a68 335 }
dudmuck 1:1cd0afbed23c 336 lora.RegModemConfig.sx1272bits.Bw = s;
dudmuck 0:be215de91a68 337 }
dudmuck 0:be215de91a68 338 }
dudmuck 0:be215de91a68 339
dudmuck 1:1cd0afbed23c 340 void lora_printSf()
dudmuck 0:be215de91a68 341 {
dudmuck 0:be215de91a68 342 // spreading factor same between sx127[26]
dudmuck 1:1cd0afbed23c 343 printf("sf:%d ", lora.getSf());
dudmuck 0:be215de91a68 344 }
dudmuck 0:be215de91a68 345
dudmuck 1:1cd0afbed23c 346 void lora_printRxPayloadCrcOn()
dudmuck 0:be215de91a68 347 {
dudmuck 1:1cd0afbed23c 348 bool on = lora.getRxPayloadCrcOn();
dudmuck 18:9530d682fd9a 349 printf("RxPayloadCrcOn:%d = ", on);
dudmuck 18:9530d682fd9a 350 if (lora.getHeaderMode())
dudmuck 18:9530d682fd9a 351 printf("Rx/"); // implicit mode
dudmuck 18:9530d682fd9a 352
dudmuck 0:be215de91a68 353 if (on)
dudmuck 18:9530d682fd9a 354 printf("Tx CRC Enabled\r\n");
dudmuck 0:be215de91a68 355 else
dudmuck 18:9530d682fd9a 356 printf("Tx CRC disabled\r\n");
dudmuck 0:be215de91a68 357 }
dudmuck 0:be215de91a68 358
dudmuck 1:1cd0afbed23c 359 void lora_printTxContinuousMode()
dudmuck 0:be215de91a68 360 {
dudmuck 1:1cd0afbed23c 361 printf("TxContinuousMode:%d ", lora.RegModemConfig2.sx1276bits.TxContinuousMode); // same for sx1272 and sx1276
dudmuck 0:be215de91a68 362 }
dudmuck 0:be215de91a68 363
dudmuck 1:1cd0afbed23c 364 void lora_printAgcAutoOn()
dudmuck 0:be215de91a68 365 {
dudmuck 1:1cd0afbed23c 366 printf("AgcAutoOn:%d", lora.getAgcAutoOn());
dudmuck 0:be215de91a68 367 }
dudmuck 0:be215de91a68 368
dudmuck 1:1cd0afbed23c 369 void lora_print_dio()
dudmuck 0:be215de91a68 370 {
dudmuck 1:1cd0afbed23c 371 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 0:be215de91a68 372 printf("DIO5:");
dudmuck 0:be215de91a68 373 switch (radio.RegDioMapping2.bits.Dio5Mapping) {
dudmuck 0:be215de91a68 374 case 0: printf("ModeReady"); break;
dudmuck 0:be215de91a68 375 case 1: printf("ClkOut"); break;
dudmuck 0:be215de91a68 376 case 2: printf("ClkOut"); break;
dudmuck 0:be215de91a68 377 }
dudmuck 0:be215de91a68 378 printf(" DIO4:");
dudmuck 0:be215de91a68 379 switch (radio.RegDioMapping2.bits.Dio4Mapping) {
dudmuck 0:be215de91a68 380 case 0: printf("CadDetected"); break;
dudmuck 0:be215de91a68 381 case 1: printf("PllLock"); break;
dudmuck 0:be215de91a68 382 case 2: printf("PllLock"); break;
dudmuck 0:be215de91a68 383 }
dudmuck 0:be215de91a68 384 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 0:be215de91a68 385 printf(" DIO3:");
dudmuck 0:be215de91a68 386 switch (radio.RegDioMapping1.bits.Dio3Mapping) {
dudmuck 0:be215de91a68 387 case 0: printf("CadDone"); break;
dudmuck 0:be215de91a68 388 case 1: printf("ValidHeader"); break;
dudmuck 0:be215de91a68 389 case 2: printf("PayloadCrcError"); break;
dudmuck 0:be215de91a68 390 }
dudmuck 0:be215de91a68 391 printf(" DIO2:");
dudmuck 0:be215de91a68 392 switch (radio.RegDioMapping1.bits.Dio2Mapping) {
dudmuck 0:be215de91a68 393 case 0:
dudmuck 0:be215de91a68 394 case 1:
dudmuck 0:be215de91a68 395 case 2:
dudmuck 0:be215de91a68 396 printf("FhssChangeChannel");
dudmuck 0:be215de91a68 397 break;
dudmuck 0:be215de91a68 398 }
dudmuck 0:be215de91a68 399 printf(" DIO1:");
dudmuck 0:be215de91a68 400 switch (radio.RegDioMapping1.bits.Dio1Mapping) {
dudmuck 0:be215de91a68 401 case 0: printf("RxTimeout"); break;
dudmuck 0:be215de91a68 402 case 1: printf("FhssChangeChannel"); break;
dudmuck 0:be215de91a68 403 case 2: printf("CadDetected"); break;
dudmuck 0:be215de91a68 404 }
dudmuck 0:be215de91a68 405 printf(" DIO0:");
dudmuck 0:be215de91a68 406 switch (radio.RegDioMapping1.bits.Dio0Mapping) {
dudmuck 0:be215de91a68 407 case 0: printf("RxDone"); break;
dudmuck 0:be215de91a68 408 case 1: printf("TxDone"); break;
dudmuck 0:be215de91a68 409 case 2: printf("CadDone"); break;
dudmuck 0:be215de91a68 410 }
dudmuck 0:be215de91a68 411
dudmuck 0:be215de91a68 412 printf("\r\n");
dudmuck 0:be215de91a68 413 }
dudmuck 0:be215de91a68 414
dudmuck 1:1cd0afbed23c 415 void fsk_print_dio()
dudmuck 1:1cd0afbed23c 416 {
dudmuck 1:1cd0afbed23c 417 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 1:1cd0afbed23c 418
dudmuck 2:c6b23a43a9d9 419 printf("DIO5:");
dudmuck 1:1cd0afbed23c 420 switch (radio.RegDioMapping2.bits.Dio5Mapping) {
dudmuck 1:1cd0afbed23c 421 case 0: printf("ClkOut"); break;
dudmuck 1:1cd0afbed23c 422 case 1: printf("PllLock"); break;
dudmuck 1:1cd0afbed23c 423 case 2:
dudmuck 1:1cd0afbed23c 424 if (fsk.RegPktConfig2.bits.DataModePacket)
dudmuck 1:1cd0afbed23c 425 printf("data");
dudmuck 1:1cd0afbed23c 426 else {
dudmuck 1:1cd0afbed23c 427 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 428 printf("preamble");
dudmuck 1:1cd0afbed23c 429 else
dudmuck 1:1cd0afbed23c 430 printf("rssi");
dudmuck 1:1cd0afbed23c 431 }
dudmuck 1:1cd0afbed23c 432 break;
dudmuck 1:1cd0afbed23c 433 case 3: printf("ModeReady"); break;
dudmuck 1:1cd0afbed23c 434 }
dudmuck 1:1cd0afbed23c 435
dudmuck 2:c6b23a43a9d9 436 printf(" DIO4:");
dudmuck 1:1cd0afbed23c 437 switch (radio.RegDioMapping2.bits.Dio4Mapping) {
dudmuck 1:1cd0afbed23c 438 case 0: printf("temp/eol"); break;
dudmuck 1:1cd0afbed23c 439 case 1: printf("PllLock"); break;
dudmuck 1:1cd0afbed23c 440 case 2: printf("TimeOut"); break;
dudmuck 1:1cd0afbed23c 441 case 3:
dudmuck 1:1cd0afbed23c 442 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 443 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 444 printf("preamble");
dudmuck 1:1cd0afbed23c 445 else
dudmuck 1:1cd0afbed23c 446 printf("rssi");
dudmuck 1:1cd0afbed23c 447 } else
dudmuck 1:1cd0afbed23c 448 printf("ModeReady");
dudmuck 1:1cd0afbed23c 449 break;
dudmuck 1:1cd0afbed23c 450 }
dudmuck 1:1cd0afbed23c 451
dudmuck 1:1cd0afbed23c 452 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 1:1cd0afbed23c 453
dudmuck 2:c6b23a43a9d9 454 printf(" DIO3:");
dudmuck 21:b84a77dfb43c 455 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 21:b84a77dfb43c 456 if (radio.RegDioMapping1.bits.Dio3Mapping == 1)
dudmuck 21:b84a77dfb43c 457 printf("TxReady");
dudmuck 21:b84a77dfb43c 458 else
dudmuck 21:b84a77dfb43c 459 printf("FifoEmpty");
dudmuck 21:b84a77dfb43c 460 } else {
dudmuck 21:b84a77dfb43c 461 switch (radio.RegDioMapping1.bits.Dio3Mapping) {
dudmuck 21:b84a77dfb43c 462 case 0: printf("Timeout"); break;
dudmuck 21:b84a77dfb43c 463 case 1:
dudmuck 21:b84a77dfb43c 464 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 21:b84a77dfb43c 465 printf("preamble");
dudmuck 21:b84a77dfb43c 466 else
dudmuck 21:b84a77dfb43c 467 printf("rssi");
dudmuck 21:b84a77dfb43c 468 break;
dudmuck 21:b84a77dfb43c 469 case 2: printf("?automode_status?"); break;
dudmuck 21:b84a77dfb43c 470 case 3: printf("TempChange/LowBat"); break;
dudmuck 21:b84a77dfb43c 471 }
dudmuck 1:1cd0afbed23c 472 }
dudmuck 1:1cd0afbed23c 473
dudmuck 2:c6b23a43a9d9 474 printf(" DIO2:");
dudmuck 1:1cd0afbed23c 475 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 476 switch (radio.RegDioMapping1.bits.Dio2Mapping) {
dudmuck 1:1cd0afbed23c 477 case 0: printf("FifoFull"); break;
dudmuck 1:1cd0afbed23c 478 case 1: printf("RxReady"); break;
dudmuck 1:1cd0afbed23c 479 case 2: printf("FifoFull/rx-timeout"); break;
dudmuck 1:1cd0afbed23c 480 case 3: printf("FifoFull/rx-syncadrs"); break;
dudmuck 1:1cd0afbed23c 481 }
dudmuck 1:1cd0afbed23c 482 } else {
dudmuck 1:1cd0afbed23c 483 printf("Data");
dudmuck 1:1cd0afbed23c 484 }
dudmuck 1:1cd0afbed23c 485
dudmuck 2:c6b23a43a9d9 486 printf(" DIO1:");
dudmuck 1:1cd0afbed23c 487 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 488 switch (radio.RegDioMapping1.bits.Dio1Mapping) {
dudmuck 1:1cd0afbed23c 489 case 0: printf("FifoThresh"); break;
dudmuck 1:1cd0afbed23c 490 case 1: printf("FifoEmpty"); break;
dudmuck 1:1cd0afbed23c 491 case 2: printf("FifoFull"); break;
dudmuck 1:1cd0afbed23c 492 case 3: printf("-3-"); break;
dudmuck 1:1cd0afbed23c 493 }
dudmuck 1:1cd0afbed23c 494 } else {
dudmuck 1:1cd0afbed23c 495 switch (radio.RegDioMapping1.bits.Dio1Mapping) {
dudmuck 1:1cd0afbed23c 496 case 0: printf("Dclk"); break;
dudmuck 1:1cd0afbed23c 497 case 1:
dudmuck 1:1cd0afbed23c 498 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 499 printf("preamble");
dudmuck 1:1cd0afbed23c 500 else
dudmuck 1:1cd0afbed23c 501 printf("rssi");
dudmuck 1:1cd0afbed23c 502 break;
dudmuck 1:1cd0afbed23c 503 case 2: printf("-2-"); break;
dudmuck 1:1cd0afbed23c 504 case 3: printf("-3-"); break;
dudmuck 1:1cd0afbed23c 505 }
dudmuck 1:1cd0afbed23c 506 }
dudmuck 1:1cd0afbed23c 507
dudmuck 2:c6b23a43a9d9 508 printf(" DIO0:");
dudmuck 1:1cd0afbed23c 509 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 510 switch (radio.RegDioMapping1.bits.Dio0Mapping) {
dudmuck 1:1cd0afbed23c 511 case 0: printf("PayloadReady/PacketSent"); break;
dudmuck 1:1cd0afbed23c 512 case 1: printf("CrcOk"); break;
dudmuck 1:1cd0afbed23c 513 case 2: printf("-2-"); break;
dudmuck 1:1cd0afbed23c 514 case 3: printf("TempChange/LowBat"); break;
dudmuck 1:1cd0afbed23c 515 }
dudmuck 1:1cd0afbed23c 516 } else {
dudmuck 1:1cd0afbed23c 517 switch (radio.RegDioMapping1.bits.Dio0Mapping) {
dudmuck 1:1cd0afbed23c 518 case 0: printf("SyncAdrs/TxReady"); break;
dudmuck 1:1cd0afbed23c 519 case 1:
dudmuck 1:1cd0afbed23c 520 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 1:1cd0afbed23c 521 printf("preamble");
dudmuck 1:1cd0afbed23c 522 else
dudmuck 1:1cd0afbed23c 523 printf("rssi");
dudmuck 1:1cd0afbed23c 524 break;
dudmuck 1:1cd0afbed23c 525 case 2: printf("RxReady"); break;
dudmuck 1:1cd0afbed23c 526 case 3: printf("-3-"); break;
dudmuck 1:1cd0afbed23c 527 }
dudmuck 1:1cd0afbed23c 528 }
dudmuck 1:1cd0afbed23c 529 printf("\r\n");
dudmuck 1:1cd0afbed23c 530 }
dudmuck 1:1cd0afbed23c 531
dudmuck 0:be215de91a68 532 void lora_print_status()
dudmuck 15:c69b942685ea 533 {
dudmuck 0:be215de91a68 534 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 0:be215de91a68 535 if (!radio.RegOpMode.bits.LongRangeMode) {
dudmuck 0:be215de91a68 536 printf("FSK\r\n");
dudmuck 0:be215de91a68 537 return;
dudmuck 0:be215de91a68 538 }
dudmuck 0:be215de91a68 539
dudmuck 1:1cd0afbed23c 540 lora_print_dio();
dudmuck 0:be215de91a68 541 printf("LoRa ");
dudmuck 0:be215de91a68 542
dudmuck 0:be215de91a68 543 // printing LoRa registers at 0x0d -> 0x3f
dudmuck 0:be215de91a68 544
dudmuck 1:1cd0afbed23c 545 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 1:1cd0afbed23c 546 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 0:be215de91a68 547
dudmuck 1:1cd0afbed23c 548 lora_printCodingRate(false); // false: transmitted coding rate
dudmuck 1:1cd0afbed23c 549 lora_printHeaderMode();
dudmuck 1:1cd0afbed23c 550 lora_printBw();
dudmuck 1:1cd0afbed23c 551 lora_printSf();
dudmuck 1:1cd0afbed23c 552 lora_printRxPayloadCrcOn();
dudmuck 0:be215de91a68 553 // RegModemStat
dudmuck 0:be215de91a68 554 printf("ModemStat:0x%02x\r\n", radio.read_reg(REG_LR_MODEMSTAT));
dudmuck 0:be215de91a68 555
dudmuck 0:be215de91a68 556 // fifo ptrs:
dudmuck 1:1cd0afbed23c 557 lora.RegPayloadLength = radio.read_reg(REG_LR_PAYLOADLENGTH);
dudmuck 1:1cd0afbed23c 558 lora.RegRxMaxPayloadLength = radio.read_reg(REG_LR_RX_MAX_PAYLOADLENGTH);
dudmuck 0:be215de91a68 559 printf("fifoptr=0x%02x txbase=0x%02x rxbase=0x%02x payloadLength=0x%02x maxlen=0x%02x",
dudmuck 0:be215de91a68 560 radio.read_reg(REG_LR_FIFOADDRPTR),
dudmuck 0:be215de91a68 561 radio.read_reg(REG_LR_FIFOTXBASEADDR),
dudmuck 0:be215de91a68 562 radio.read_reg(REG_LR_FIFORXBASEADDR),
dudmuck 1:1cd0afbed23c 563 lora.RegPayloadLength,
dudmuck 1:1cd0afbed23c 564 lora.RegRxMaxPayloadLength
dudmuck 0:be215de91a68 565 );
dudmuck 0:be215de91a68 566
dudmuck 1:1cd0afbed23c 567 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 0:be215de91a68 568 printLoraIrqs_(false);
dudmuck 0:be215de91a68 569
dudmuck 1:1cd0afbed23c 570 lora.RegHopPeriod = radio.read_reg(REG_LR_HOPPERIOD);
dudmuck 1:1cd0afbed23c 571 if (lora.RegHopPeriod != 0) {
dudmuck 1:1cd0afbed23c 572 printf("\r\nHopPeriod:0x%02x\r\n", lora.RegHopPeriod);
dudmuck 0:be215de91a68 573 }
dudmuck 0:be215de91a68 574
dudmuck 18:9530d682fd9a 575 printf("SymbTimeout:%d ", radio.read_u16(REG_LR_MODEMCONFIG2) & 0x3ff);
dudmuck 0:be215de91a68 576
dudmuck 1:1cd0afbed23c 577 lora.RegPreamble = radio.read_u16(REG_LR_PREAMBLEMSB);
dudmuck 4:7a9007dfc0e5 578 printf("PreambleLength:%d ", lora.RegPreamble);
dudmuck 0:be215de91a68 579
dudmuck 0:be215de91a68 580 if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER || radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER_SINGLE) {
dudmuck 15:c69b942685ea 581 printf("rssi:%ddBm ", lora.get_current_rssi());
dudmuck 0:be215de91a68 582 }
dudmuck 0:be215de91a68 583
dudmuck 1:1cd0afbed23c 584 lora_printTxContinuousMode();
dudmuck 0:be215de91a68 585
dudmuck 0:be215de91a68 586 printf("\r\n");
dudmuck 1:1cd0afbed23c 587 lora_printAgcAutoOn();
dudmuck 0:be215de91a68 588 if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 589 printf(" LowDataRateOptimize:%d\r\n", lora.RegModemConfig.sx1272bits.LowDataRateOptimize);
dudmuck 0:be215de91a68 590 }
dudmuck 0:be215de91a68 591
dudmuck 0:be215de91a68 592 printf("\r\nHeaderCount:%d PacketCount:%d, ",
dudmuck 0:be215de91a68 593 radio.read_u16(REG_LR_RXHEADERCNTVALUE_MSB), radio.read_u16(REG_LR_RXPACKETCNTVALUE_MSB));
dudmuck 0:be215de91a68 594
dudmuck 0:be215de91a68 595 printf("Lora detection threshold:%02x\r\n", radio.read_reg(REG_LR_DETECTION_THRESHOLD));
dudmuck 1:1cd0afbed23c 596 lora.RegTest31.octet = radio.read_reg(REG_LR_TEST31);
dudmuck 1:1cd0afbed23c 597 printf("detect_trig_same_peaks_nb:%d\r\n", lora.RegTest31.bits.detect_trig_same_peaks_nb);
dudmuck 0:be215de91a68 598
dudmuck 0:be215de91a68 599 if (radio.type == SX1272) {
dudmuck 1:1cd0afbed23c 600 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 6:fe16f96ee335 601 printf("LowDataRateOptimize:%d ", lora.RegModemConfig.sx1272bits.LowDataRateOptimize);
dudmuck 0:be215de91a68 602 } else if (radio.type == SX1276) {
dudmuck 1:1cd0afbed23c 603 lora.RegModemConfig3.octet = radio.read_reg(REG_LR_MODEMCONFIG3);
dudmuck 6:fe16f96ee335 604 printf("LowDataRateOptimize:%d ", lora.RegModemConfig3.sx1276bits.LowDataRateOptimize);
dudmuck 0:be215de91a68 605 }
dudmuck 0:be215de91a68 606
dudmuck 6:fe16f96ee335 607 printf(" invert: rx=%d tx=%d\r\n", lora.RegTest33.bits.invert_i_q, !lora.RegTest33.bits.chirp_invert_tx);
dudmuck 6:fe16f96ee335 608
dudmuck 0:be215de91a68 609 printf("\r\n");
dudmuck 0:be215de91a68 610 //printf("A %02x\r\n", radio.RegModemConfig2.octet);
dudmuck 0:be215de91a68 611 }
dudmuck 0:be215de91a68 612
dudmuck 1:1cd0afbed23c 613 uint16_t
dudmuck 1:1cd0afbed23c 614 fsk_get_PayloadLength(void)
dudmuck 1:1cd0afbed23c 615 {
dudmuck 1:1cd0afbed23c 616 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 1:1cd0afbed23c 617
dudmuck 1:1cd0afbed23c 618 return fsk.RegPktConfig2.bits.PayloadLength;
dudmuck 1:1cd0afbed23c 619 }
dudmuck 1:1cd0afbed23c 620
dudmuck 1:1cd0afbed23c 621 void fsk_printAddressFiltering()
dudmuck 1:1cd0afbed23c 622 {
dudmuck 1:1cd0afbed23c 623 uint8_t FSKRegNodeAdrs, FSKRegBroadcastAdrs;
dudmuck 1:1cd0afbed23c 624
dudmuck 1:1cd0afbed23c 625 printf(" AddressFiltering:");
dudmuck 1:1cd0afbed23c 626 switch (fsk.RegPktConfig1.bits.AddressFiltering) {
dudmuck 1:1cd0afbed23c 627 case 0: printf("off"); break;
dudmuck 1:1cd0afbed23c 628 case 1: // NodeAddress
dudmuck 1:1cd0afbed23c 629 FSKRegNodeAdrs = radio.read_reg(REG_FSK_NODEADRS);
dudmuck 6:fe16f96ee335 630 printf("NodeAdrs:%02x\r\n", FSKRegNodeAdrs);
dudmuck 1:1cd0afbed23c 631 break;
dudmuck 1:1cd0afbed23c 632 case 2: // NodeAddress & BroadcastAddress
dudmuck 1:1cd0afbed23c 633 FSKRegNodeAdrs = radio.read_reg(REG_FSK_NODEADRS);
dudmuck 1:1cd0afbed23c 634 printf("NodeAdrs:%02x ", FSKRegNodeAdrs);
dudmuck 1:1cd0afbed23c 635 FSKRegBroadcastAdrs = radio.read_reg(REG_FSK_BROADCASTADRS);
dudmuck 6:fe16f96ee335 636 printf("BroadcastAdrs:%02x\r\n", FSKRegBroadcastAdrs );
dudmuck 1:1cd0afbed23c 637 break;
dudmuck 1:1cd0afbed23c 638 default:
dudmuck 1:1cd0afbed23c 639 printf("%d", fsk.RegPktConfig1.bits.AddressFiltering);
dudmuck 1:1cd0afbed23c 640 break;
dudmuck 1:1cd0afbed23c 641 }
dudmuck 1:1cd0afbed23c 642 }
dudmuck 1:1cd0afbed23c 643
dudmuck 1:1cd0afbed23c 644 void fsk_print_IrqFlags2()
dudmuck 1:1cd0afbed23c 645 {
dudmuck 2:c6b23a43a9d9 646 RegIrqFlags2_t RegIrqFlags2;
dudmuck 1:1cd0afbed23c 647
dudmuck 1:1cd0afbed23c 648 printf("IrqFlags2: ");
dudmuck 2:c6b23a43a9d9 649 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 2:c6b23a43a9d9 650 if (RegIrqFlags2.bits.FifoFull)
dudmuck 1:1cd0afbed23c 651 printf("FifoFull ");
dudmuck 2:c6b23a43a9d9 652 if (RegIrqFlags2.bits.FifoEmpty)
dudmuck 1:1cd0afbed23c 653 printf("FifoEmpty ");
dudmuck 2:c6b23a43a9d9 654 if (RegIrqFlags2.bits.FifoLevel)
dudmuck 1:1cd0afbed23c 655 printf("FifoLevel ");
dudmuck 2:c6b23a43a9d9 656 if (RegIrqFlags2.bits.FifoOverrun)
dudmuck 1:1cd0afbed23c 657 printf("FifoOverrun ");
dudmuck 2:c6b23a43a9d9 658 if (RegIrqFlags2.bits.PacketSent)
dudmuck 1:1cd0afbed23c 659 printf("PacketSent ");
dudmuck 2:c6b23a43a9d9 660 if (RegIrqFlags2.bits.PayloadReady)
dudmuck 1:1cd0afbed23c 661 printf("PayloadReady ");
dudmuck 2:c6b23a43a9d9 662 if (RegIrqFlags2.bits.CrcOk)
dudmuck 1:1cd0afbed23c 663 printf("CrcOk ");
dudmuck 2:c6b23a43a9d9 664 if (RegIrqFlags2.bits.LowBat)
dudmuck 1:1cd0afbed23c 665 printf("LowBat ");
dudmuck 2:c6b23a43a9d9 666 printf("\r\n");
dudmuck 1:1cd0afbed23c 667 }
dudmuck 1:1cd0afbed23c 668
dudmuck 1:1cd0afbed23c 669 void
dudmuck 1:1cd0afbed23c 670 fsk_print_status()
dudmuck 1:1cd0afbed23c 671 {
dudmuck 1:1cd0afbed23c 672 //uint16_t s;
dudmuck 2:c6b23a43a9d9 673 RegIrqFlags1_t RegIrqFlags1;
dudmuck 1:1cd0afbed23c 674
dudmuck 1:1cd0afbed23c 675 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 1:1cd0afbed23c 676 printf("LoRa\r\n");
dudmuck 1:1cd0afbed23c 677 return;
dudmuck 1:1cd0afbed23c 678 }
dudmuck 1:1cd0afbed23c 679
dudmuck 1:1cd0afbed23c 680 if (radio.RegOpMode.bits.ModulationType == 0) {
dudmuck 1:1cd0afbed23c 681 printf("FSK ");
dudmuck 1:1cd0afbed23c 682 switch (radio.RegOpMode.bits.ModulationShaping) {
dudmuck 1:1cd0afbed23c 683 case 1: printf("BT1.0 "); break;
dudmuck 1:1cd0afbed23c 684 case 2: printf("BT0.5 "); break;
dudmuck 1:1cd0afbed23c 685 case 3: printf("BT0.3 "); break;
dudmuck 1:1cd0afbed23c 686 }
dudmuck 1:1cd0afbed23c 687 } else if (radio.RegOpMode.bits.ModulationType == 1) {
dudmuck 1:1cd0afbed23c 688 printf("OOK ");
dudmuck 18:9530d682fd9a 689 switch (radio.RegOpMode.bits.ModulationShaping) {
dudmuck 18:9530d682fd9a 690 case 1: printf("Fcutoff=bitrate"); break;
dudmuck 18:9530d682fd9a 691 case 2: printf("Fcutoff=2*bitrate"); break;
dudmuck 18:9530d682fd9a 692 case 3: printf("?"); break;
dudmuck 18:9530d682fd9a 693 }
dudmuck 1:1cd0afbed23c 694 }
dudmuck 1:1cd0afbed23c 695
dudmuck 19:be8a8b0e7320 696 printf("%" PRIu32 "bps fdev:%" PRIu32 "Hz\r\n", fsk.get_bitrate(), fsk.get_tx_fdev_hz());
dudmuck 1:1cd0afbed23c 697
dudmuck 1:1cd0afbed23c 698 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 1:1cd0afbed23c 699
dudmuck 1:1cd0afbed23c 700 fsk_print_dio();
dudmuck 1:1cd0afbed23c 701
dudmuck 19:be8a8b0e7320 702 printf("rxbw:%" PRIu32 "Hz ", fsk.get_rx_bw_hz(REG_FSK_RXBW));
dudmuck 19:be8a8b0e7320 703 printf("afcbw:%" PRIu32 "Hz\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW));
dudmuck 1:1cd0afbed23c 704
dudmuck 1:1cd0afbed23c 705 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 1:1cd0afbed23c 706 printf("RssiOffset:%ddB smoothing:%dsamples\r\n", fsk.RegRssiConfig.bits.RssiOffset, 1 << (fsk.RegRssiConfig.bits.RssiSmoothing+1));
dudmuck 1:1cd0afbed23c 707
dudmuck 1:1cd0afbed23c 708
dudmuck 1:1cd0afbed23c 709 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 1:1cd0afbed23c 710
dudmuck 1:1cd0afbed23c 711 if (fsk.RegPktConfig2.bits.DataModePacket) {
dudmuck 1:1cd0afbed23c 712 uint16_t len;
dudmuck 1:1cd0afbed23c 713 /* packet mode */
dudmuck 1:1cd0afbed23c 714 len = fsk_get_PayloadLength();
dudmuck 1:1cd0afbed23c 715 printf("packet RegPayloadLength:0x%03x ", len);
dudmuck 1:1cd0afbed23c 716
dudmuck 1:1cd0afbed23c 717 if (fsk.RegPktConfig2.bits.BeaconOn)
dudmuck 1:1cd0afbed23c 718 printf("BeaconOn ");
dudmuck 1:1cd0afbed23c 719
dudmuck 1:1cd0afbed23c 720 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 1:1cd0afbed23c 721 printf("FifoThreshold:%d TxStartCondition:", fsk.RegFifoThreshold.bits.FifoThreshold);
dudmuck 1:1cd0afbed23c 722 if (fsk.RegFifoThreshold.bits.TxStartCondition)
dudmuck 1:1cd0afbed23c 723 printf("!FifoEmpty");
dudmuck 1:1cd0afbed23c 724 else
dudmuck 1:1cd0afbed23c 725 printf("FifoLevel");
dudmuck 1:1cd0afbed23c 726
dudmuck 1:1cd0afbed23c 727 printf("\r\nAutoRestartRxMode:");
dudmuck 1:1cd0afbed23c 728 switch (fsk.RegSyncConfig.bits.AutoRestartRxMode) {
dudmuck 1:1cd0afbed23c 729 case 0: printf("off "); break;
dudmuck 1:1cd0afbed23c 730 case 1: printf("no-pll-wait "); break;
dudmuck 1:1cd0afbed23c 731 case 2: printf("pll-wait "); break;
dudmuck 1:1cd0afbed23c 732 case 3: printf("3 "); break;
dudmuck 1:1cd0afbed23c 733 }
dudmuck 1:1cd0afbed23c 734 //...todo
dudmuck 1:1cd0afbed23c 735
dudmuck 1:1cd0afbed23c 736 printf("PreambleSize:%d ", radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 1:1cd0afbed23c 737
dudmuck 1:1cd0afbed23c 738 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 1:1cd0afbed23c 739 if (fsk.RegOokPeak.bits.barker_en)
dudmuck 1:1cd0afbed23c 740 printf("barker ");
dudmuck 1:1cd0afbed23c 741 if (!fsk.RegOokPeak.bits.BitSyncOn)
dudmuck 1:1cd0afbed23c 742 printf("BitSyncOff ");
dudmuck 1:1cd0afbed23c 743 //...todo
dudmuck 1:1cd0afbed23c 744
dudmuck 1:1cd0afbed23c 745 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 1:1cd0afbed23c 746 if (fsk.RegPktConfig1.bits.PacketFormatVariable)
dudmuck 1:1cd0afbed23c 747 printf("variable");
dudmuck 1:1cd0afbed23c 748 else
dudmuck 1:1cd0afbed23c 749 printf("fixed");
dudmuck 1:1cd0afbed23c 750 printf("-length\r\ncrc");
dudmuck 1:1cd0afbed23c 751 if (fsk.RegPktConfig1.bits.CrcOn) {
dudmuck 1:1cd0afbed23c 752 printf("On");
dudmuck 1:1cd0afbed23c 753 } else
dudmuck 1:1cd0afbed23c 754 printf("Off");
dudmuck 1:1cd0afbed23c 755 printf(" crctype:");
dudmuck 1:1cd0afbed23c 756 if (fsk.RegPktConfig1.bits.CrCWhiteningType)
dudmuck 1:1cd0afbed23c 757 printf("IBM");
dudmuck 1:1cd0afbed23c 758 else
dudmuck 1:1cd0afbed23c 759 printf("CCITT");
dudmuck 1:1cd0afbed23c 760 printf(" dcFree:");
dudmuck 1:1cd0afbed23c 761 switch (fsk.RegPktConfig1.bits.DcFree) {
dudmuck 1:1cd0afbed23c 762 case 0: printf("none "); break;
dudmuck 1:1cd0afbed23c 763 case 1: printf("Manchester "); break;
dudmuck 1:1cd0afbed23c 764 case 2: printf("Whitening "); break;
dudmuck 1:1cd0afbed23c 765 case 3: printf("reserved "); break;
dudmuck 1:1cd0afbed23c 766 }
dudmuck 1:1cd0afbed23c 767 fsk_printAddressFiltering();
dudmuck 1:1cd0afbed23c 768
dudmuck 1:1cd0afbed23c 769 printf("\r\n");
dudmuck 1:1cd0afbed23c 770 fsk_print_IrqFlags2();
dudmuck 1:1cd0afbed23c 771 } else {
dudmuck 1:1cd0afbed23c 772 /* continuous mode */
dudmuck 1:1cd0afbed23c 773 printf("continuous ");
dudmuck 1:1cd0afbed23c 774 }
dudmuck 1:1cd0afbed23c 775
dudmuck 1:1cd0afbed23c 776 fsk.RegPreambleDetect.octet = radio.read_reg(REG_FSK_PREAMBLEDETECT);
dudmuck 1:1cd0afbed23c 777 printf("PreambleDetect:");
dudmuck 1:1cd0afbed23c 778 if (fsk.RegPreambleDetect.bits.PreambleDetectorOn) {
dudmuck 1:1cd0afbed23c 779 printf("size=%d,tol=%d ",
dudmuck 1:1cd0afbed23c 780 fsk.RegPreambleDetect.bits.PreambleDetectorSize,
dudmuck 1:1cd0afbed23c 781 fsk.RegPreambleDetect.bits.PreambleDetectorTol);
dudmuck 1:1cd0afbed23c 782 } else
dudmuck 1:1cd0afbed23c 783 printf("Off ");
dudmuck 1:1cd0afbed23c 784
dudmuck 18:9530d682fd9a 785 if (fsk.RegSyncConfig.bits.SyncOn) {
dudmuck 18:9530d682fd9a 786 printf(" syncsize:%d ", fsk.RegSyncConfig.bits.SyncSize);
dudmuck 18:9530d682fd9a 787 printf(" : %02x ", radio.read_reg(REG_FSK_SYNCVALUE1));
dudmuck 18:9530d682fd9a 788 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE2));
dudmuck 18:9530d682fd9a 789 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE3));
dudmuck 18:9530d682fd9a 790 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE4));
dudmuck 18:9530d682fd9a 791 } else
dudmuck 18:9530d682fd9a 792 printf("Sync Off");
dudmuck 1:1cd0afbed23c 793 printf("\r\n"); // end sync config
dudmuck 1:1cd0afbed23c 794
dudmuck 1:1cd0afbed23c 795 fsk.RegAfcFei.octet = radio.read_reg(REG_FSK_AFCFEI);
dudmuck 1:1cd0afbed23c 796 printf("afcAutoClear:");
dudmuck 1:1cd0afbed23c 797 if (fsk.RegAfcFei.bits.AfcAutoClearOn)
dudmuck 1:1cd0afbed23c 798 printf("On");
dudmuck 1:1cd0afbed23c 799 else
dudmuck 1:1cd0afbed23c 800 printf("OFF");
dudmuck 1:1cd0afbed23c 801 printf(" afc:%dHz ", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB)));
dudmuck 1:1cd0afbed23c 802
dudmuck 1:1cd0afbed23c 803 printf("fei:%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_FEIMSB)));
dudmuck 1:1cd0afbed23c 804
dudmuck 1:1cd0afbed23c 805 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 1:1cd0afbed23c 806 printf("RxTrigger:");
dudmuck 1:1cd0afbed23c 807 switch (fsk.RegRxConfig.bits.RxTrigger) {
dudmuck 1:1cd0afbed23c 808 case 0: printf("none "); break;
dudmuck 1:1cd0afbed23c 809 case 1: printf("rssi "); break;
dudmuck 1:1cd0afbed23c 810 case 6: printf("preamble "); break;
dudmuck 1:1cd0afbed23c 811 case 7: printf("both "); break;
dudmuck 1:1cd0afbed23c 812 default: printf("-%d- ", fsk.RegRxConfig.bits.RxTrigger); break;
dudmuck 1:1cd0afbed23c 813 }
dudmuck 1:1cd0afbed23c 814 printf("AfcAuto:");
dudmuck 1:1cd0afbed23c 815 if (fsk.RegRxConfig.bits.AfcAutoOn)
dudmuck 1:1cd0afbed23c 816 printf("On ");
dudmuck 1:1cd0afbed23c 817 else
dudmuck 1:1cd0afbed23c 818 printf("OFF ");
dudmuck 15:c69b942685ea 819
dudmuck 15:c69b942685ea 820 radio.RegLna.octet = radio.read_reg(REG_LNA);
dudmuck 1:1cd0afbed23c 821 if (!fsk.RegRxConfig.bits.AgcAutoOn) {
dudmuck 1:1cd0afbed23c 822 printf("AgcAutoOff:G%d ", radio.RegLna.bits.LnaGain);
dudmuck 1:1cd0afbed23c 823 }
dudmuck 15:c69b942685ea 824 printf("LnaBoostHF:%d ", radio.RegLna.bits.LnaBoostHF);
dudmuck 1:1cd0afbed23c 825
dudmuck 1:1cd0afbed23c 826 fsk.RegTimerResol.octet = radio.read_reg(REG_FSK_TIMERRESOL);
dudmuck 1:1cd0afbed23c 827 if (fsk.RegTimerResol.bits.hlm_started)
dudmuck 1:1cd0afbed23c 828 printf("hlm_started ");
dudmuck 1:1cd0afbed23c 829 else
dudmuck 1:1cd0afbed23c 830 printf("hlm_stopped ");
dudmuck 1:1cd0afbed23c 831
dudmuck 1:1cd0afbed23c 832 fsk.RegRssiThresh = radio.read_reg(REG_FSK_RSSITHRESH);
dudmuck 1:1cd0afbed23c 833 printf("rssiThreshold:-%.1f@%02x ", fsk.RegRssiThresh / 2.0, REG_FSK_RSSITHRESH);
dudmuck 1:1cd0afbed23c 834
dudmuck 1:1cd0afbed23c 835 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 1:1cd0afbed23c 836 if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER ||
dudmuck 1:1cd0afbed23c 837 radio.RegOpMode.bits.Mode == RF_OPMODE_SYNTHESIZER_RX)
dudmuck 1:1cd0afbed23c 838 {
dudmuck 1:1cd0afbed23c 839 printf("rssi:-%.1f ", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0);
dudmuck 1:1cd0afbed23c 840 }
dudmuck 1:1cd0afbed23c 841
dudmuck 1:1cd0afbed23c 842 fsk.RegSeqConfig1.octet = radio.read_reg(REG_FSK_SEQCONFIG1);
dudmuck 1:1cd0afbed23c 843 printf("\r\nsequencer: ");
dudmuck 1:1cd0afbed23c 844 printf("FromStart:");
dudmuck 1:1cd0afbed23c 845 switch (fsk.RegSeqConfig1.bits.FromStart) {
dudmuck 1:1cd0afbed23c 846 case 0:
dudmuck 1:1cd0afbed23c 847 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 848 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 849 printf("idle");
dudmuck 1:1cd0afbed23c 850 else
dudmuck 1:1cd0afbed23c 851 printf("sequencerOff");
dudmuck 1:1cd0afbed23c 852 break;
dudmuck 1:1cd0afbed23c 853 case 1: printf("rx"); break;
dudmuck 1:1cd0afbed23c 854 case 2: printf("tx"); break;
dudmuck 1:1cd0afbed23c 855 case 3: printf("tx on fifolevel"); break;
dudmuck 1:1cd0afbed23c 856 }
dudmuck 1:1cd0afbed23c 857 printf(" lowPowerSelection:");
dudmuck 1:1cd0afbed23c 858 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 859 printf("idle");
dudmuck 1:1cd0afbed23c 860 else
dudmuck 1:1cd0afbed23c 861 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 862 if (fsk.RegSeqConfig1.bits.FromStart != 0 &&
dudmuck 1:1cd0afbed23c 863 fsk.RegSeqConfig1.bits.LowPowerSelection != 0)
dudmuck 1:1cd0afbed23c 864 { // if sequencer enabled:
dudmuck 1:1cd0afbed23c 865 printf("\r\nsequencer: IdleMode:");
dudmuck 1:1cd0afbed23c 866 if (fsk.RegSeqConfig1.bits.IdleMode)
dudmuck 1:1cd0afbed23c 867 printf("Sleep");
dudmuck 1:1cd0afbed23c 868 else
dudmuck 1:1cd0afbed23c 869 printf("standby");
dudmuck 1:1cd0afbed23c 870 printf("\r\nsequencer: FromIdle to:");
dudmuck 1:1cd0afbed23c 871 if (fsk.RegSeqConfig1.bits.FromIdle)
dudmuck 1:1cd0afbed23c 872 printf("rx");
dudmuck 1:1cd0afbed23c 873 else
dudmuck 1:1cd0afbed23c 874 printf("tx");
dudmuck 1:1cd0afbed23c 875 printf("\r\nsequencer: FromTransmit to:");
dudmuck 1:1cd0afbed23c 876 if (fsk.RegSeqConfig1.bits.FromTransmit)
dudmuck 1:1cd0afbed23c 877 printf("rx-on-PacketSent");
dudmuck 1:1cd0afbed23c 878 else {
dudmuck 1:1cd0afbed23c 879 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 880 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 881 printf("idle");
dudmuck 1:1cd0afbed23c 882 else
dudmuck 1:1cd0afbed23c 883 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 884 printf("-on-PacketSent");
dudmuck 1:1cd0afbed23c 885 }
dudmuck 1:1cd0afbed23c 886 fsk.RegSeqConfig2.octet = radio.read_reg(REG_FSK_SEQCONFIG2);
dudmuck 1:1cd0afbed23c 887 printf("\r\nsequencer: FromReceive:");
dudmuck 1:1cd0afbed23c 888 switch (fsk.RegSeqConfig2.bits.FromReceive) {
dudmuck 1:1cd0afbed23c 889 case 1: printf("PacketRecevied on PayloadReady"); break;
dudmuck 1:1cd0afbed23c 890 case 2:
dudmuck 1:1cd0afbed23c 891 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 892 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 893 printf("idle");
dudmuck 1:1cd0afbed23c 894 else
dudmuck 1:1cd0afbed23c 895 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 896 printf("-on-payloadReady");
dudmuck 1:1cd0afbed23c 897 break;
dudmuck 1:1cd0afbed23c 898 case 3: printf("PacketRecevied-on-CrcOk"); break;
dudmuck 1:1cd0afbed23c 899 case 4: printf("SequencerOff-on-Rssi"); break;
dudmuck 1:1cd0afbed23c 900 case 5: printf("SequencerOff-on-SyncAddress"); break;
dudmuck 1:1cd0afbed23c 901 case 6: printf("SequencerOff-PreambleDetect"); break;
dudmuck 1:1cd0afbed23c 902 default: printf("-%d-", fsk.RegSeqConfig2.bits.FromReceive); break;
dudmuck 1:1cd0afbed23c 903 }
dudmuck 1:1cd0afbed23c 904 printf("\r\nsequencer: FromRxTimeout:");
dudmuck 1:1cd0afbed23c 905 switch (fsk.RegSeqConfig2.bits.FromRxTimeout) {
dudmuck 1:1cd0afbed23c 906 case 0: printf("rx"); break;
dudmuck 1:1cd0afbed23c 907 case 1: printf("tx"); break;
dudmuck 1:1cd0afbed23c 908 case 2:
dudmuck 1:1cd0afbed23c 909 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 910 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 911 printf("idle");
dudmuck 1:1cd0afbed23c 912 else
dudmuck 1:1cd0afbed23c 913 printf("SequencerOff");
dudmuck 1:1cd0afbed23c 914 break;
dudmuck 1:1cd0afbed23c 915 case 3: printf("SequencerOff"); break;
dudmuck 1:1cd0afbed23c 916 }
dudmuck 1:1cd0afbed23c 917 printf("\r\nsequencer: FromPacketReceived to:");
dudmuck 1:1cd0afbed23c 918 switch (fsk.RegSeqConfig2.bits.FromPacketReceived) {
dudmuck 1:1cd0afbed23c 919 case 0: printf("SequencerOff"); break;
dudmuck 1:1cd0afbed23c 920 case 1: printf("tx on FifoEmpty"); break;
dudmuck 1:1cd0afbed23c 921 case 2:
dudmuck 1:1cd0afbed23c 922 printf("lowPowerSelection-");
dudmuck 1:1cd0afbed23c 923 if (fsk.RegSeqConfig1.bits.LowPowerSelection)
dudmuck 1:1cd0afbed23c 924 printf("idle");
dudmuck 1:1cd0afbed23c 925 else
dudmuck 1:1cd0afbed23c 926 printf("sequencerOff");
dudmuck 1:1cd0afbed23c 927 break;
dudmuck 1:1cd0afbed23c 928 case 3: printf("rx via fs"); break;
dudmuck 1:1cd0afbed23c 929 case 4: printf("rx"); break;
dudmuck 1:1cd0afbed23c 930 }
dudmuck 1:1cd0afbed23c 931
dudmuck 1:1cd0afbed23c 932 fsk.RegTimerResol.octet = radio.read_reg(REG_FSK_TIMERRESOL);
dudmuck 1:1cd0afbed23c 933 printf("\r\nsequencer: timer1:");
dudmuck 1:1cd0afbed23c 934 switch (fsk.RegTimerResol.bits.timer1_resol) {
dudmuck 1:1cd0afbed23c 935 case 0: printf("off"); break;
dudmuck 1:1cd0afbed23c 936 case 1: printf("%dus", radio.read_reg(REG_FSK_TIMER1COEF) * 64); break;
dudmuck 1:1cd0afbed23c 937 case 2: printf("%.1fms", radio.read_reg(REG_FSK_TIMER1COEF) * 4.1); break;
dudmuck 1:1cd0afbed23c 938 case 3: printf("%.1fs", radio.read_reg(REG_FSK_TIMER1COEF) * 0.262); break;
dudmuck 1:1cd0afbed23c 939 }
dudmuck 1:1cd0afbed23c 940
dudmuck 1:1cd0afbed23c 941 printf(" timer2:");
dudmuck 1:1cd0afbed23c 942 switch (fsk.RegTimerResol.bits.timer2_resol) {
dudmuck 1:1cd0afbed23c 943 case 0: printf("off"); break;
dudmuck 1:1cd0afbed23c 944 case 1: printf("%dus", radio.read_reg(REG_FSK_TIMER2COEF) * 64); break;
dudmuck 1:1cd0afbed23c 945 case 2: printf("%.1fms", radio.read_reg(REG_FSK_TIMER2COEF) * 4.1); break;
dudmuck 1:1cd0afbed23c 946 case 3: printf("%.1fs", radio.read_reg(REG_FSK_TIMER2COEF) * 0.262); break;
dudmuck 1:1cd0afbed23c 947 }
dudmuck 1:1cd0afbed23c 948 } // ..if sequencer enabled
dudmuck 1:1cd0afbed23c 949
dudmuck 1:1cd0afbed23c 950 printf("\r\nIrqFlags1:");
dudmuck 2:c6b23a43a9d9 951 RegIrqFlags1.octet = radio.read_reg(REG_FSK_IRQFLAGS1);
dudmuck 2:c6b23a43a9d9 952 if (RegIrqFlags1.bits.ModeReady)
dudmuck 1:1cd0afbed23c 953 printf("ModeReady ");
dudmuck 2:c6b23a43a9d9 954 if (RegIrqFlags1.bits.RxReady)
dudmuck 1:1cd0afbed23c 955 printf("RxReady ");
dudmuck 2:c6b23a43a9d9 956 if (RegIrqFlags1.bits.TxReady)
dudmuck 1:1cd0afbed23c 957 printf("TxReady ");
dudmuck 2:c6b23a43a9d9 958 if (RegIrqFlags1.bits.PllLock)
dudmuck 1:1cd0afbed23c 959 printf("PllLock ");
dudmuck 2:c6b23a43a9d9 960 if (RegIrqFlags1.bits.Rssi)
dudmuck 1:1cd0afbed23c 961 printf("Rssi ");
dudmuck 2:c6b23a43a9d9 962 if (RegIrqFlags1.bits.Timeout)
dudmuck 1:1cd0afbed23c 963 printf("Timeout ");
dudmuck 2:c6b23a43a9d9 964 if (RegIrqFlags1.bits.PreambleDetect)
dudmuck 1:1cd0afbed23c 965 printf("PreambleDetect ");
dudmuck 2:c6b23a43a9d9 966 if (RegIrqFlags1.bits.SyncAddressMatch)
dudmuck 1:1cd0afbed23c 967 printf("SyncAddressMatch ");
dudmuck 1:1cd0afbed23c 968
dudmuck 1:1cd0afbed23c 969 printf("\r\n");
dudmuck 1:1cd0afbed23c 970
dudmuck 1:1cd0afbed23c 971 /* TODO if (!SX1272FSK->RegPktConfig1.bits.PacketFormatVariable) { // if fixed-length packet format:
dudmuck 1:1cd0afbed23c 972 s = fsk_get_PayloadLength();
dudmuck 1:1cd0afbed23c 973 if (s > FSK_LARGE_PKT_THRESHOLD)
dudmuck 1:1cd0afbed23c 974 flags.fifo_flow_ctl = 1;
dudmuck 1:1cd0afbed23c 975 else
dudmuck 1:1cd0afbed23c 976 flags.fifo_flow_ctl = 0;
dudmuck 1:1cd0afbed23c 977 }*/
dudmuck 1:1cd0afbed23c 978
dudmuck 1:1cd0afbed23c 979 fsk.RegImageCal.octet = radio.read_reg(REG_FSK_IMAGECAL);
dudmuck 1:1cd0afbed23c 980 if (fsk.RegImageCal.bits.TempMonitorOff) {
dudmuck 1:1cd0afbed23c 981 printf("TempMonitorOff[\r0m\n");
dudmuck 1:1cd0afbed23c 982 } else {
dudmuck 1:1cd0afbed23c 983 printf("TempThreshold:");
dudmuck 1:1cd0afbed23c 984 switch (fsk.RegImageCal.bits.TempThreshold) {
dudmuck 1:1cd0afbed23c 985 case 0: printf("5C"); break;
dudmuck 1:1cd0afbed23c 986 case 1: printf("10C"); break;
dudmuck 1:1cd0afbed23c 987 case 2: printf("15C"); break;
dudmuck 1:1cd0afbed23c 988 case 3: printf("20C"); break;
dudmuck 1:1cd0afbed23c 989 }
dudmuck 1:1cd0afbed23c 990 printf("\r\n");
dudmuck 1:1cd0afbed23c 991 }
dudmuck 1:1cd0afbed23c 992 if (fsk.RegImageCal.bits.ImageCalRunning)
dudmuck 1:1cd0afbed23c 993 printf("ImageCalRunning[\r0m\n");
dudmuck 21:b84a77dfb43c 994
dudmuck 21:b84a77dfb43c 995 if (rx_payloadReady_int_en) {
dudmuck 22:2005df80c8a8 996 #ifdef TYPE_ABZ
dudmuck 22:2005df80c8a8 997 printf("n_rx_pkts:%u, dio:%u,%u,%u,%u\r\n", n_rx_pkts, dio3.read(), dio2.read(), radio.dio1.read(), radio.dio0.read());
dudmuck 22:2005df80c8a8 998 #else
dudmuck 21:b84a77dfb43c 999 printf("n_rx_pkts:%u, dio:%u,%u,%u,%u,%u\r\n", n_rx_pkts, dio4.read(), dio3.read(), dio2.read(), radio.dio1.read(), radio.dio0.read());
dudmuck 22:2005df80c8a8 1000 #endif
dudmuck 21:b84a77dfb43c 1001 }
dudmuck 1:1cd0afbed23c 1002 }
dudmuck 1:1cd0afbed23c 1003
dudmuck 0:be215de91a68 1004 void printOpMode()
dudmuck 0:be215de91a68 1005 {
dudmuck 0:be215de91a68 1006 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 0:be215de91a68 1007 switch (radio.RegOpMode.bits.Mode) {
dudmuck 0:be215de91a68 1008 case RF_OPMODE_SLEEP: printf("sleep"); break;
dudmuck 0:be215de91a68 1009 case RF_OPMODE_STANDBY: printf("stby"); break;
dudmuck 0:be215de91a68 1010 case RF_OPMODE_SYNTHESIZER_TX: printf("fstx"); break;
dudmuck 0:be215de91a68 1011 case RF_OPMODE_TRANSMITTER: printf("tx"); break;
dudmuck 0:be215de91a68 1012 case RF_OPMODE_SYNTHESIZER_RX: printf("fsrx"); break;
dudmuck 0:be215de91a68 1013 case RF_OPMODE_RECEIVER: printf("rx"); break;
dudmuck 0:be215de91a68 1014 case 6:
dudmuck 0:be215de91a68 1015 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 0:be215de91a68 1016 printf("rxs");
dudmuck 0:be215de91a68 1017 else
dudmuck 0:be215de91a68 1018 printf("-6-");
dudmuck 0:be215de91a68 1019 break; // todo: different lora/fsk
dudmuck 0:be215de91a68 1020 case 7:
dudmuck 0:be215de91a68 1021 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 0:be215de91a68 1022 printf("cad");
dudmuck 0:be215de91a68 1023 else
dudmuck 0:be215de91a68 1024 printf("-7-");
dudmuck 0:be215de91a68 1025 break; // todo: different lora/fsk
dudmuck 0:be215de91a68 1026 }
dudmuck 0:be215de91a68 1027 }
dudmuck 0:be215de91a68 1028
dudmuck 0:be215de91a68 1029 void
dudmuck 0:be215de91a68 1030 printPa()
dudmuck 0:be215de91a68 1031 {
dudmuck 0:be215de91a68 1032 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 0:be215de91a68 1033 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 0:be215de91a68 1034 float output_dBm = 17 - (15-radio.RegPaConfig.bits.OutputPower);
dudmuck 0:be215de91a68 1035 printf(" PABOOST OutputPower=%.1fdBm", output_dBm);
dudmuck 0:be215de91a68 1036 } else {
dudmuck 0:be215de91a68 1037 float pmax = (0.6*radio.RegPaConfig.bits.MaxPower) + 10.8;
dudmuck 0:be215de91a68 1038 float output_dBm = pmax - (15-radio.RegPaConfig.bits.OutputPower);
dudmuck 20:b11592c9ba5f 1039 #ifdef TARGET_MTS_MDOT_F411RE
dudmuck 20:b11592c9ba5f 1040 printf(" \x1b[31mRFO pmax=%.1fdBm OutputPower=%.1fdBm\x1b[0m", pmax, output_dBm); // not connected
dudmuck 20:b11592c9ba5f 1041 #else
dudmuck 0:be215de91a68 1042 printf(" RFO pmax=%.1fdBm OutputPower=%.1fdBm", pmax, output_dBm);
dudmuck 20:b11592c9ba5f 1043 #endif
dudmuck 0:be215de91a68 1044 }
dudmuck 0:be215de91a68 1045 }
dudmuck 0:be215de91a68 1046
dudmuck 0:be215de91a68 1047 void /* things always present, whether lora or fsk */
dudmuck 0:be215de91a68 1048 common_print_status()
dudmuck 0:be215de91a68 1049 {
dudmuck 0:be215de91a68 1050 printf("version:0x%02x %.3fMHz ", radio.read_reg(REG_VERSION), radio.get_frf_MHz());
dudmuck 0:be215de91a68 1051 printOpMode();
dudmuck 0:be215de91a68 1052
dudmuck 0:be215de91a68 1053 printPa();
dudmuck 0:be215de91a68 1054
dudmuck 0:be215de91a68 1055 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 0:be215de91a68 1056 if (radio.RegOcp.bits.OcpOn) {
dudmuck 0:be215de91a68 1057 int imax = 0;
dudmuck 0:be215de91a68 1058 if (radio.RegOcp.bits.OcpTrim < 16)
dudmuck 0:be215de91a68 1059 imax = 45 + (5 * radio.RegOcp.bits.OcpTrim);
dudmuck 0:be215de91a68 1060 else if (radio.RegOcp.bits.OcpTrim < 28)
dudmuck 0:be215de91a68 1061 imax = -30 + (10 * radio.RegOcp.bits.OcpTrim);
dudmuck 0:be215de91a68 1062 else
dudmuck 0:be215de91a68 1063 imax = 240;
dudmuck 0:be215de91a68 1064 printf(" OcpOn %dmA ", imax);
dudmuck 0:be215de91a68 1065 } else
dudmuck 0:be215de91a68 1066 printf(" OcpOFF ");
dudmuck 0:be215de91a68 1067
dudmuck 0:be215de91a68 1068 printf("\r\n");
dudmuck 8:227605e4a760 1069
dudmuck 8:227605e4a760 1070 if (per_en) {
dudmuck 18:9530d682fd9a 1071 if (cadper_enable) {
dudmuck 19:be8a8b0e7320 1072 printf("cadper %" PRIu32 ", ", num_cads);
dudmuck 18:9530d682fd9a 1073 }
dudmuck 8:227605e4a760 1074 printf("per_tx_delay:%f\r\n", per_tx_delay);
dudmuck 8:227605e4a760 1075 printf("PER device ID:%d\r\n", per_id);
dudmuck 8:227605e4a760 1076 }
dudmuck 18:9530d682fd9a 1077
dudmuck 20:b11592c9ba5f 1078 if (poll_irq_en) {
dudmuck 18:9530d682fd9a 1079 printf("poll_irq_en\r\n");
dudmuck 20:b11592c9ba5f 1080 if (!radio.RegOpMode.bits.LongRangeMode) {
dudmuck 20:b11592c9ba5f 1081 printf("saved irqs: %02x %02x\r\n", fsk_RegIrqFlags1_prev.octet, fsk_RegIrqFlags2_prev.octet);
dudmuck 20:b11592c9ba5f 1082 }
dudmuck 20:b11592c9ba5f 1083 }
dudmuck 0:be215de91a68 1084
dudmuck 0:be215de91a68 1085 }
dudmuck 0:be215de91a68 1086
dudmuck 0:be215de91a68 1087 void print_rx_buf(int len)
dudmuck 0:be215de91a68 1088 {
dudmuck 0:be215de91a68 1089 int i;
dudmuck 0:be215de91a68 1090
dudmuck 0:be215de91a68 1091 printf("000:");
dudmuck 0:be215de91a68 1092 for (i = 0; i < len; i++) {
dudmuck 0:be215de91a68 1093 //printf("(%d)%02x ", i % 16, rx_buf[i]);
dudmuck 0:be215de91a68 1094 printf("%02x ", radio.rx_buf[i]);
dudmuck 0:be215de91a68 1095 if (i % 16 == 15 && i != len-1)
dudmuck 0:be215de91a68 1096 printf("\r\n%03d:", i+1);
dudmuck 0:be215de91a68 1097
dudmuck 0:be215de91a68 1098 }
dudmuck 0:be215de91a68 1099 printf("\r\n");
dudmuck 0:be215de91a68 1100 }
dudmuck 0:be215de91a68 1101
dudmuck 21:b84a77dfb43c 1102 void lora_print_rx_verbose(uint8_t dlen)
dudmuck 7:c3c54f222ced 1103 {
dudmuck 7:c3c54f222ced 1104 float dbm;
dudmuck 7:c3c54f222ced 1105 printLoraIrqs_(false);
dudmuck 7:c3c54f222ced 1106 if (lora.RegHopPeriod > 0) {
dudmuck 7:c3c54f222ced 1107 lora.RegHopChannel.octet = radio.read_reg(REG_LR_HOPCHANNEL);
dudmuck 7:c3c54f222ced 1108 printf("HopCH:%d ", lora.RegHopChannel.bits.FhssPresentChannel);
dudmuck 7:c3c54f222ced 1109 }
dudmuck 7:c3c54f222ced 1110 printf("%dHz ", lora.get_freq_error_Hz());
dudmuck 7:c3c54f222ced 1111 lora_printCodingRate(true); // true: of received packet
dudmuck 7:c3c54f222ced 1112 dbm = lora.get_pkt_rssi();
dudmuck 7:c3c54f222ced 1113 printf(" crc%s %.1fdB %.1fdBm\r\n",
dudmuck 7:c3c54f222ced 1114 lora.RegHopChannel.bits.RxPayloadCrcOn ? "On" : "OFF",
dudmuck 7:c3c54f222ced 1115 lora.RegPktSnrValue / 4.0,
dudmuck 7:c3c54f222ced 1116 dbm
dudmuck 7:c3c54f222ced 1117 );
dudmuck 7:c3c54f222ced 1118 print_rx_buf(dlen);
dudmuck 18:9530d682fd9a 1119 }
dudmuck 7:c3c54f222ced 1120
dudmuck 18:9530d682fd9a 1121 void set_per_en(bool en)
dudmuck 18:9530d682fd9a 1122 {
dudmuck 18:9530d682fd9a 1123 if (en) {
dudmuck 18:9530d682fd9a 1124 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 1125 if (radio.type == SX1272) {
dudmuck 18:9530d682fd9a 1126 lora.RegModemConfig.sx1272bits.LowDataRateOptimize = 1;
dudmuck 18:9530d682fd9a 1127 radio.write_reg(REG_LR_MODEMCONFIG, lora.RegModemConfig.octet);
dudmuck 18:9530d682fd9a 1128 } else if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 1129 lora.RegModemConfig3.sx1276bits.LowDataRateOptimize = 1;
dudmuck 18:9530d682fd9a 1130 radio.write_reg(REG_LR_MODEMCONFIG3, lora.RegModemConfig3.octet);
dudmuck 18:9530d682fd9a 1131 }
dudmuck 18:9530d682fd9a 1132 lora.RegPayloadLength = 9;
dudmuck 18:9530d682fd9a 1133 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1134 radio.RegDioMapping1.bits.Dio3Mapping = 1; // to ValidHeader
dudmuck 18:9530d682fd9a 1135 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 1136 } else { // fsk..
dudmuck 18:9530d682fd9a 1137 //fsk_tx_length = 9;
dudmuck 7:c3c54f222ced 1138 }
dudmuck 20:b11592c9ba5f 1139 PacketRxSequencePrev = 0; // transmitter side PacketTxCnt is 1 at first TX
dudmuck 18:9530d682fd9a 1140 //PacketRxSequence = 0;
dudmuck 18:9530d682fd9a 1141 PacketPerKoCnt = 0;
dudmuck 18:9530d682fd9a 1142 PacketPerOkCnt = 0;
dudmuck 18:9530d682fd9a 1143 PacketNormalCnt = 0;
dudmuck 18:9530d682fd9a 1144 } // ..if (per_en)
dudmuck 18:9530d682fd9a 1145 else {
dudmuck 18:9530d682fd9a 1146 per_timeout.detach();
dudmuck 18:9530d682fd9a 1147 }
dudmuck 18:9530d682fd9a 1148
dudmuck 18:9530d682fd9a 1149 per_en = en;
dudmuck 18:9530d682fd9a 1150 }
dudmuck 7:c3c54f222ced 1151
dudmuck 8:227605e4a760 1152 void per_cb()
dudmuck 8:227605e4a760 1153 {
dudmuck 8:227605e4a760 1154 int i;
dudmuck 8:227605e4a760 1155
dudmuck 8:227605e4a760 1156 PacketTxCnt++;
dudmuck 8:227605e4a760 1157
dudmuck 8:227605e4a760 1158 radio.tx_buf[0] = per_id;
dudmuck 8:227605e4a760 1159 radio.tx_buf[1] = PacketTxCnt >> 24;
dudmuck 8:227605e4a760 1160 radio.tx_buf[2] = PacketTxCnt >> 16;
dudmuck 8:227605e4a760 1161 radio.tx_buf[3] = PacketTxCnt >> 8;
dudmuck 8:227605e4a760 1162 radio.tx_buf[4] = PacketTxCnt;
dudmuck 8:227605e4a760 1163 radio.tx_buf[5] = 'P';
dudmuck 8:227605e4a760 1164 radio.tx_buf[6] = 'E';
dudmuck 8:227605e4a760 1165 radio.tx_buf[7] = 'R';
dudmuck 8:227605e4a760 1166 radio.tx_buf[8] = 0;
dudmuck 8:227605e4a760 1167 for (i = 0; i < 8; i++)
dudmuck 8:227605e4a760 1168 radio.tx_buf[8] += radio.tx_buf[i];
dudmuck 8:227605e4a760 1169
dudmuck 13:c73caaee93a5 1170 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 13:c73caaee93a5 1171 lora.start_tx(lora.RegPayloadLength);
dudmuck 13:c73caaee93a5 1172 } else {
dudmuck 13:c73caaee93a5 1173 fsk.start_tx(9);
dudmuck 13:c73caaee93a5 1174 }
dudmuck 10:d9bb2ce57f05 1175
dudmuck 10:d9bb2ce57f05 1176 led1 = !led1.read();
dudmuck 18:9530d682fd9a 1177
dudmuck 18:9530d682fd9a 1178 if (PacketTxCnt == PacketTxCntEnd) {
dudmuck 18:9530d682fd9a 1179 set_per_en(false);
dudmuck 18:9530d682fd9a 1180 return;
dudmuck 18:9530d682fd9a 1181 }
dudmuck 8:227605e4a760 1182 }
dudmuck 8:227605e4a760 1183
dudmuck 13:c73caaee93a5 1184 int per_parse_rx(uint8_t len)
dudmuck 13:c73caaee93a5 1185 {
dudmuck 13:c73caaee93a5 1186 if (len > 8 && radio.rx_buf[5] == 'P' && radio.rx_buf[6] == 'E' && radio.rx_buf[7] == 'R') {
dudmuck 13:c73caaee93a5 1187 int i;
dudmuck 13:c73caaee93a5 1188 float per;
dudmuck 13:c73caaee93a5 1189
dudmuck 13:c73caaee93a5 1190 /* this is PER packet */
dudmuck 19:be8a8b0e7320 1191 int PacketRxSequence = (radio.rx_buf[1] << 24) | (radio.rx_buf[2] << 16) | (radio.rx_buf[3] << 8) | radio.rx_buf[4];
dudmuck 13:c73caaee93a5 1192 PacketPerOkCnt++;
dudmuck 13:c73caaee93a5 1193
dudmuck 13:c73caaee93a5 1194 if( PacketRxSequence <= PacketRxSequencePrev )
dudmuck 13:c73caaee93a5 1195 { // Sequence went back => resynchronization
dudmuck 13:c73caaee93a5 1196 // dont count missed packets this time
dudmuck 13:c73caaee93a5 1197 i = 0;
dudmuck 13:c73caaee93a5 1198 }
dudmuck 13:c73caaee93a5 1199 else
dudmuck 13:c73caaee93a5 1200 {
dudmuck 13:c73caaee93a5 1201 // determine number of missed packets
dudmuck 13:c73caaee93a5 1202 i = PacketRxSequence - PacketRxSequencePrev - 1;
dudmuck 13:c73caaee93a5 1203 }
dudmuck 13:c73caaee93a5 1204
dudmuck 13:c73caaee93a5 1205 led1 = !led1.read();
dudmuck 13:c73caaee93a5 1206 // be ready for the next
dudmuck 13:c73caaee93a5 1207 PacketRxSequencePrev = PacketRxSequence;
dudmuck 13:c73caaee93a5 1208 // increment 'missed' counter for the RX session
dudmuck 13:c73caaee93a5 1209 PacketPerKoCnt += i;
dudmuck 18:9530d682fd9a 1210 per = ( (float)1.0 - ( float )PacketPerOkCnt / ( float )( PacketPerOkCnt + PacketPerKoCnt ) ) * (float)100.0;
dudmuck 19:be8a8b0e7320 1211 printf("%d, ok=%" PRIu32 " missed=%" PRIu32 " normal=%" PRIu32 " per:%.3f ", PacketRxSequence, PacketPerOkCnt, PacketPerKoCnt, PacketNormalCnt, per);
dudmuck 15:c69b942685ea 1212 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 15:c69b942685ea 1213 printf("pkt:%ddBm, snr:%.1fdB, %ddBm\r\n", lora.get_pkt_rssi(), lora.RegPktSnrValue / 4.0, lora.get_current_rssi());
dudmuck 15:c69b942685ea 1214 else {
dudmuck 16:b9d36c60f2d3 1215 wait_us(10000);
dudmuck 15:c69b942685ea 1216 printf(" -%.1fdBm\r\n", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0);
dudmuck 15:c69b942685ea 1217 }
dudmuck 15:c69b942685ea 1218
dudmuck 13:c73caaee93a5 1219 return 1;
dudmuck 13:c73caaee93a5 1220 } else {
dudmuck 13:c73caaee93a5 1221 return 0;
dudmuck 13:c73caaee93a5 1222 }
dudmuck 13:c73caaee93a5 1223 }
dudmuck 13:c73caaee93a5 1224
dudmuck 18:9530d682fd9a 1225 typedef enum {
dudmuck 18:9530d682fd9a 1226 ON_TXDONE_STATE_NONE = 0,
dudmuck 18:9530d682fd9a 1227 ON_TXDONE_STATE_SYNC_HI_NIBBLE,
dudmuck 18:9530d682fd9a 1228 ON_TXDONE_STATE_SYNC_LO_NIBBLE,
dudmuck 18:9530d682fd9a 1229 ON_TXDONE_STATE_PAYLOAD_LENGTH,
dudmuck 18:9530d682fd9a 1230 } on_txdone_state_e;
dudmuck 18:9530d682fd9a 1231
dudmuck 18:9530d682fd9a 1232 on_txdone_state_e on_txdone_state;
dudmuck 18:9530d682fd9a 1233
dudmuck 18:9530d682fd9a 1234 uint8_t lora_sync_byte;
dudmuck 18:9530d682fd9a 1235 float on_txdone_delay;
dudmuck 18:9530d682fd9a 1236 Timeout on_txdone_timeout;
dudmuck 18:9530d682fd9a 1237 uint8_t on_txdone_repeat_cnt;
dudmuck 18:9530d682fd9a 1238
dudmuck 18:9530d682fd9a 1239 void txdone_timeout_cb()
dudmuck 18:9530d682fd9a 1240 {
dudmuck 18:9530d682fd9a 1241 uint8_t nib;
dudmuck 18:9530d682fd9a 1242
dudmuck 18:9530d682fd9a 1243 switch (on_txdone_state) {
dudmuck 18:9530d682fd9a 1244 case ON_TXDONE_STATE_SYNC_HI_NIBBLE:
dudmuck 18:9530d682fd9a 1245 nib = lora_sync_byte >> 4;
dudmuck 18:9530d682fd9a 1246 if (nib >= 15) {
dudmuck 18:9530d682fd9a 1247 on_txdone_state = ON_TXDONE_STATE_SYNC_LO_NIBBLE;
dudmuck 18:9530d682fd9a 1248 lora_sync_byte = 0x00;
dudmuck 18:9530d682fd9a 1249 } else
dudmuck 18:9530d682fd9a 1250 nib++;
dudmuck 18:9530d682fd9a 1251
dudmuck 18:9530d682fd9a 1252 lora_sync_byte = nib << 4;
dudmuck 18:9530d682fd9a 1253
dudmuck 18:9530d682fd9a 1254 radio.write_reg(REG_LR_SYNC_BYTE, lora_sync_byte);
dudmuck 18:9530d682fd9a 1255 printf("upper %02x\r\n", lora_sync_byte);
dudmuck 18:9530d682fd9a 1256 break;
dudmuck 18:9530d682fd9a 1257 case ON_TXDONE_STATE_SYNC_LO_NIBBLE:
dudmuck 18:9530d682fd9a 1258 nib = lora_sync_byte & 0x0f;
dudmuck 18:9530d682fd9a 1259 if (nib >= 15) {
dudmuck 18:9530d682fd9a 1260 on_txdone_state = ON_TXDONE_STATE_SYNC_LO_NIBBLE;
dudmuck 18:9530d682fd9a 1261 lora_sync_byte = 0x00;
dudmuck 18:9530d682fd9a 1262 } else
dudmuck 18:9530d682fd9a 1263 nib++;
dudmuck 18:9530d682fd9a 1264
dudmuck 18:9530d682fd9a 1265 lora_sync_byte = nib & 0x0f;
dudmuck 18:9530d682fd9a 1266
dudmuck 18:9530d682fd9a 1267 radio.write_reg(REG_LR_SYNC_BYTE, lora_sync_byte);
dudmuck 18:9530d682fd9a 1268 printf("lower %02x\r\n", lora_sync_byte);
dudmuck 18:9530d682fd9a 1269 break;
dudmuck 18:9530d682fd9a 1270 case ON_TXDONE_STATE_PAYLOAD_LENGTH:
dudmuck 18:9530d682fd9a 1271 if (++on_txdone_repeat_cnt >= 10) {
dudmuck 18:9530d682fd9a 1272 on_txdone_repeat_cnt = 0;
dudmuck 18:9530d682fd9a 1273 if (lora.RegPayloadLength == 255) {
dudmuck 18:9530d682fd9a 1274 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 1275 printf("done\r\n");
dudmuck 18:9530d682fd9a 1276 on_txdone_state = ON_TXDONE_STATE_NONE;
dudmuck 18:9530d682fd9a 1277 return;
dudmuck 18:9530d682fd9a 1278 }
dudmuck 18:9530d682fd9a 1279 lora.RegPayloadLength++;
dudmuck 18:9530d682fd9a 1280 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1281 printf("pl %d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1282 }
dudmuck 18:9530d682fd9a 1283 tx_cnt++;
dudmuck 18:9530d682fd9a 1284 radio.tx_buf[0] = tx_cnt;
dudmuck 18:9530d682fd9a 1285 radio.tx_buf[1] = ~tx_cnt;
dudmuck 18:9530d682fd9a 1286 break;
dudmuck 18:9530d682fd9a 1287 default:
dudmuck 18:9530d682fd9a 1288 return;
dudmuck 18:9530d682fd9a 1289 } // ..switch (on_txdone_state)
dudmuck 18:9530d682fd9a 1290
dudmuck 18:9530d682fd9a 1291 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1292 }
dudmuck 18:9530d682fd9a 1293
dudmuck 20:b11592c9ba5f 1294
dudmuck 18:9530d682fd9a 1295 void
dudmuck 18:9530d682fd9a 1296 poll_service_radio()
dudmuck 18:9530d682fd9a 1297 {
dudmuck 18:9530d682fd9a 1298 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 1299 } else { // fsk:
dudmuck 21:b84a77dfb43c 1300 if (rx_payloadReady_int_en)
dudmuck 21:b84a77dfb43c 1301 return;
dudmuck 21:b84a77dfb43c 1302
dudmuck 20:b11592c9ba5f 1303 /*RegIrqFlags2_t RegIrqFlags2;
dudmuck 18:9530d682fd9a 1304 if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) {
dudmuck 18:9530d682fd9a 1305 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 18:9530d682fd9a 1306 if (RegIrqFlags2.bits.PacketSent) {
dudmuck 18:9530d682fd9a 1307 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 18:9530d682fd9a 1308 printf("poll mode fsk tx done\r\n");
dudmuck 18:9530d682fd9a 1309 }
dudmuck 20:b11592c9ba5f 1310 }*/
dudmuck 20:b11592c9ba5f 1311 static uint8_t rssi;
dudmuck 20:b11592c9ba5f 1312 RegIrqFlags2_t RegIrqFlags2;
dudmuck 20:b11592c9ba5f 1313 RegIrqFlags1_t RegIrqFlags1;
dudmuck 20:b11592c9ba5f 1314 RegIrqFlags1.octet = radio.read_reg(REG_FSK_IRQFLAGS1);
dudmuck 20:b11592c9ba5f 1315 if (RegIrqFlags1.octet != fsk_RegIrqFlags1_prev.octet) {
dudmuck 20:b11592c9ba5f 1316 printf("iF1:");
dudmuck 20:b11592c9ba5f 1317 if (RegIrqFlags1.bits.ModeReady ^ fsk_RegIrqFlags1_prev.bits.ModeReady) {
dudmuck 20:b11592c9ba5f 1318 printf("ModeReady-");
dudmuck 20:b11592c9ba5f 1319 if (RegIrqFlags1.bits.ModeReady)
dudmuck 20:b11592c9ba5f 1320 printf("on ");
dudmuck 20:b11592c9ba5f 1321 else
dudmuck 20:b11592c9ba5f 1322 printf("off ");
dudmuck 20:b11592c9ba5f 1323 }
dudmuck 20:b11592c9ba5f 1324 if (RegIrqFlags1.bits.RxReady ^ fsk_RegIrqFlags1_prev.bits.RxReady) {
dudmuck 20:b11592c9ba5f 1325 printf("RxReady-");
dudmuck 20:b11592c9ba5f 1326 if (RegIrqFlags1.bits.RxReady)
dudmuck 20:b11592c9ba5f 1327 printf("on ");
dudmuck 20:b11592c9ba5f 1328 else
dudmuck 20:b11592c9ba5f 1329 printf("off ");
dudmuck 20:b11592c9ba5f 1330 }
dudmuck 20:b11592c9ba5f 1331 if (RegIrqFlags1.bits.TxReady ^ fsk_RegIrqFlags1_prev.bits.TxReady) {
dudmuck 20:b11592c9ba5f 1332 printf("TxReady-");
dudmuck 20:b11592c9ba5f 1333 if (RegIrqFlags1.bits.TxReady)
dudmuck 20:b11592c9ba5f 1334 printf("on ");
dudmuck 20:b11592c9ba5f 1335 else
dudmuck 20:b11592c9ba5f 1336 printf("off ");
dudmuck 20:b11592c9ba5f 1337 }
dudmuck 20:b11592c9ba5f 1338 if (RegIrqFlags1.bits.PllLock ^ fsk_RegIrqFlags1_prev.bits.PllLock) {
dudmuck 20:b11592c9ba5f 1339 printf("PllLock-");
dudmuck 20:b11592c9ba5f 1340 if (RegIrqFlags1.bits.PllLock)
dudmuck 20:b11592c9ba5f 1341 printf("on ");
dudmuck 20:b11592c9ba5f 1342 else
dudmuck 20:b11592c9ba5f 1343 printf("off ");
dudmuck 20:b11592c9ba5f 1344 }
dudmuck 20:b11592c9ba5f 1345 if (RegIrqFlags1.bits.Rssi ^ fsk_RegIrqFlags1_prev.bits.Rssi) {
dudmuck 20:b11592c9ba5f 1346 printf("Rssi-");
dudmuck 20:b11592c9ba5f 1347 if (RegIrqFlags1.bits.Rssi)
dudmuck 20:b11592c9ba5f 1348 printf("on ");
dudmuck 20:b11592c9ba5f 1349 else
dudmuck 20:b11592c9ba5f 1350 printf("off ");
dudmuck 20:b11592c9ba5f 1351 }
dudmuck 20:b11592c9ba5f 1352 if (RegIrqFlags1.bits.Timeout ^ fsk_RegIrqFlags1_prev.bits.Timeout) {
dudmuck 20:b11592c9ba5f 1353 printf("Timeout-");
dudmuck 20:b11592c9ba5f 1354 if (RegIrqFlags1.bits.Timeout)
dudmuck 20:b11592c9ba5f 1355 printf("on ");
dudmuck 20:b11592c9ba5f 1356 else
dudmuck 20:b11592c9ba5f 1357 printf("off ");
dudmuck 20:b11592c9ba5f 1358 }
dudmuck 20:b11592c9ba5f 1359 if (RegIrqFlags1.bits.PreambleDetect ^ fsk_RegIrqFlags1_prev.bits.PreambleDetect) {
dudmuck 20:b11592c9ba5f 1360 printf("PreambleDetect-");
dudmuck 20:b11592c9ba5f 1361 if (RegIrqFlags1.bits.PreambleDetect)
dudmuck 20:b11592c9ba5f 1362 printf("on ");
dudmuck 20:b11592c9ba5f 1363 else
dudmuck 20:b11592c9ba5f 1364 printf("off ");
dudmuck 20:b11592c9ba5f 1365 }
dudmuck 20:b11592c9ba5f 1366 if (RegIrqFlags1.bits.SyncAddressMatch ^ fsk_RegIrqFlags1_prev.bits.SyncAddressMatch) {
dudmuck 20:b11592c9ba5f 1367 printf("SyncAddressMatch-");
dudmuck 20:b11592c9ba5f 1368 if (RegIrqFlags1.bits.SyncAddressMatch)
dudmuck 20:b11592c9ba5f 1369 printf("on ");
dudmuck 20:b11592c9ba5f 1370 else
dudmuck 20:b11592c9ba5f 1371 printf("off ");
dudmuck 20:b11592c9ba5f 1372 }
dudmuck 20:b11592c9ba5f 1373 fsk_RegIrqFlags1_prev.octet = RegIrqFlags1.octet;
dudmuck 20:b11592c9ba5f 1374 printf("\r\n");
dudmuck 20:b11592c9ba5f 1375 fflush(stdout);
dudmuck 20:b11592c9ba5f 1376 }
dudmuck 20:b11592c9ba5f 1377 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 20:b11592c9ba5f 1378 if (RegIrqFlags2.octet != fsk_RegIrqFlags2_prev.octet) {
dudmuck 20:b11592c9ba5f 1379 printf("iF2:");
dudmuck 20:b11592c9ba5f 1380 if (RegIrqFlags2.bits.FifoFull ^ fsk_RegIrqFlags2_prev.bits.FifoFull) {
dudmuck 20:b11592c9ba5f 1381 printf("FifoFull-");
dudmuck 20:b11592c9ba5f 1382 if (RegIrqFlags2.bits.FifoFull)
dudmuck 20:b11592c9ba5f 1383 printf("on ");
dudmuck 20:b11592c9ba5f 1384 else
dudmuck 20:b11592c9ba5f 1385 printf("off ");
dudmuck 20:b11592c9ba5f 1386 }
dudmuck 20:b11592c9ba5f 1387 if (RegIrqFlags2.bits.FifoEmpty ^ fsk_RegIrqFlags2_prev.bits.FifoEmpty) {
dudmuck 20:b11592c9ba5f 1388 printf("FifoEmpty-");
dudmuck 20:b11592c9ba5f 1389 if (RegIrqFlags2.bits.FifoEmpty)
dudmuck 20:b11592c9ba5f 1390 printf("on ");
dudmuck 20:b11592c9ba5f 1391 else {
dudmuck 20:b11592c9ba5f 1392 printf("off ");
dudmuck 20:b11592c9ba5f 1393 rssi = radio.read_reg(REG_FSK_RSSIVALUE);
dudmuck 20:b11592c9ba5f 1394 }
dudmuck 20:b11592c9ba5f 1395 }
dudmuck 20:b11592c9ba5f 1396 if (RegIrqFlags2.bits.FifoLevel ^ fsk_RegIrqFlags2_prev.bits.FifoLevel) {
dudmuck 20:b11592c9ba5f 1397 printf("FifoLevel-");
dudmuck 20:b11592c9ba5f 1398 if (RegIrqFlags2.bits.FifoLevel)
dudmuck 20:b11592c9ba5f 1399 printf("on ");
dudmuck 20:b11592c9ba5f 1400 else
dudmuck 20:b11592c9ba5f 1401 printf("off ");
dudmuck 20:b11592c9ba5f 1402 }
dudmuck 20:b11592c9ba5f 1403 if (RegIrqFlags2.bits.FifoOverrun ^ fsk_RegIrqFlags2_prev.bits.FifoOverrun) {
dudmuck 20:b11592c9ba5f 1404 printf("FifoOverrun-");
dudmuck 20:b11592c9ba5f 1405 if (RegIrqFlags2.bits.FifoOverrun)
dudmuck 20:b11592c9ba5f 1406 printf("on ");
dudmuck 20:b11592c9ba5f 1407 else
dudmuck 20:b11592c9ba5f 1408 printf("off ");
dudmuck 20:b11592c9ba5f 1409 }
dudmuck 20:b11592c9ba5f 1410 if (RegIrqFlags2.bits.PacketSent ^ fsk_RegIrqFlags2_prev.bits.PacketSent) {
dudmuck 20:b11592c9ba5f 1411 printf("PacketSent-");
dudmuck 20:b11592c9ba5f 1412 if (RegIrqFlags2.bits.PacketSent) {
dudmuck 20:b11592c9ba5f 1413 printf("on ");
dudmuck 20:b11592c9ba5f 1414 } else
dudmuck 20:b11592c9ba5f 1415 printf("off ");
dudmuck 20:b11592c9ba5f 1416 }
dudmuck 20:b11592c9ba5f 1417 if (RegIrqFlags2.bits.PayloadReady ^ fsk_RegIrqFlags2_prev.bits.PayloadReady) {
dudmuck 20:b11592c9ba5f 1418 printf("PayloadReady-");
dudmuck 20:b11592c9ba5f 1419 if (RegIrqFlags2.bits.PayloadReady)
dudmuck 20:b11592c9ba5f 1420 printf("on ");
dudmuck 20:b11592c9ba5f 1421 else
dudmuck 20:b11592c9ba5f 1422 printf("off ");
dudmuck 20:b11592c9ba5f 1423 }
dudmuck 20:b11592c9ba5f 1424 if (RegIrqFlags2.bits.CrcOk ^ fsk_RegIrqFlags2_prev.bits.CrcOk) {
dudmuck 20:b11592c9ba5f 1425 printf("CrcOk-");
dudmuck 20:b11592c9ba5f 1426 if (RegIrqFlags2.bits.CrcOk)
dudmuck 20:b11592c9ba5f 1427 printf("on ");
dudmuck 20:b11592c9ba5f 1428 else
dudmuck 20:b11592c9ba5f 1429 printf("off ");
dudmuck 20:b11592c9ba5f 1430 }
dudmuck 20:b11592c9ba5f 1431 if (RegIrqFlags2.bits.LowBat ^ fsk_RegIrqFlags2_prev.bits.LowBat) {
dudmuck 20:b11592c9ba5f 1432 printf("LowBat-");
dudmuck 20:b11592c9ba5f 1433 if (RegIrqFlags2.bits.LowBat)
dudmuck 20:b11592c9ba5f 1434 printf("on ");
dudmuck 20:b11592c9ba5f 1435 else
dudmuck 20:b11592c9ba5f 1436 printf("off ");
dudmuck 20:b11592c9ba5f 1437 }
dudmuck 20:b11592c9ba5f 1438 fsk_RegIrqFlags2_prev.octet = RegIrqFlags2.octet;
dudmuck 20:b11592c9ba5f 1439 printf("\r\n");
dudmuck 20:b11592c9ba5f 1440 fflush(stdout);
dudmuck 20:b11592c9ba5f 1441
dudmuck 20:b11592c9ba5f 1442 if (RegIrqFlags2.bits.PacketSent) {
dudmuck 20:b11592c9ba5f 1443 if (fsk.tx_done_sleep)
dudmuck 20:b11592c9ba5f 1444 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 20:b11592c9ba5f 1445 else
dudmuck 20:b11592c9ba5f 1446 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 20:b11592c9ba5f 1447 }
dudmuck 20:b11592c9ba5f 1448
dudmuck 20:b11592c9ba5f 1449 if (RegIrqFlags2.bits.CrcOk || RegIrqFlags2.bits.PayloadReady) {
dudmuck 20:b11592c9ba5f 1450 if (fsk.RegRxConfig.bits.AfcAutoOn) {
dudmuck 20:b11592c9ba5f 1451 fsk.RegAfcValue = radio.read_s16(REG_FSK_AFCMSB);
dudmuck 20:b11592c9ba5f 1452 printf("%dHz ", (int)(FREQ_STEP_HZ * fsk.RegAfcValue));
dudmuck 20:b11592c9ba5f 1453 if (rssi != 0) {
dudmuck 20:b11592c9ba5f 1454 printf("pkt:-%.1fdBm ", rssi / 2.0);
dudmuck 20:b11592c9ba5f 1455 rssi = 0;
dudmuck 20:b11592c9ba5f 1456 }
dudmuck 20:b11592c9ba5f 1457 }
dudmuck 20:b11592c9ba5f 1458 if (fsk.RegPktConfig1.bits.PacketFormatVariable) {
dudmuck 20:b11592c9ba5f 1459 fsk.rx_buf_length = radio.read_reg(REG_FIFO);
dudmuck 20:b11592c9ba5f 1460 } else {
dudmuck 20:b11592c9ba5f 1461 fsk.rx_buf_length = fsk.RegPktConfig2.bits.PayloadLength;
dudmuck 20:b11592c9ba5f 1462 }
dudmuck 20:b11592c9ba5f 1463
dudmuck 20:b11592c9ba5f 1464 radio.m_cs = 0;
dudmuck 20:b11592c9ba5f 1465 radio.m_spi.write(REG_FIFO); // bit7 is low for reading from radio
dudmuck 20:b11592c9ba5f 1466 for (int i = 0; i < fsk.rx_buf_length; i++) {
dudmuck 20:b11592c9ba5f 1467 radio.rx_buf[i] = radio.m_spi.write(0);
dudmuck 20:b11592c9ba5f 1468 }
dudmuck 20:b11592c9ba5f 1469 radio.m_cs = 1;
dudmuck 20:b11592c9ba5f 1470 /****/
dudmuck 20:b11592c9ba5f 1471 if (per_en) {
dudmuck 20:b11592c9ba5f 1472 if (!per_parse_rx(fsk.rx_buf_length)) {
dudmuck 20:b11592c9ba5f 1473 PacketNormalCnt++;
dudmuck 20:b11592c9ba5f 1474 print_rx_buf(fsk.rx_buf_length);
dudmuck 20:b11592c9ba5f 1475 }
dudmuck 20:b11592c9ba5f 1476 } else {
dudmuck 20:b11592c9ba5f 1477 print_rx_buf(fsk.rx_buf_length);
dudmuck 20:b11592c9ba5f 1478 }
dudmuck 20:b11592c9ba5f 1479 fflush(stdout);
dudmuck 20:b11592c9ba5f 1480 } // ..if CrcOk or PayloadReady
dudmuck 20:b11592c9ba5f 1481 } // ..if RegIrqFlags2 changed
dudmuck 20:b11592c9ba5f 1482 } // ...fsk
dudmuck 18:9530d682fd9a 1483 }
dudmuck 18:9530d682fd9a 1484
dudmuck 18:9530d682fd9a 1485 void cadper_service()
dudmuck 18:9530d682fd9a 1486 {
dudmuck 18:9530d682fd9a 1487 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1488
dudmuck 18:9530d682fd9a 1489
dudmuck 18:9530d682fd9a 1490 if (lora.RegIrqFlags.bits.CadDetected) {
dudmuck 18:9530d682fd9a 1491 lora.start_rx(RF_OPMODE_RECEIVER_SINGLE);
dudmuck 18:9530d682fd9a 1492 do {
dudmuck 18:9530d682fd9a 1493 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1494 if (lora.RegIrqFlags.bits.RxDone) {
dudmuck 18:9530d682fd9a 1495 service_action_e act = lora.service();
dudmuck 18:9530d682fd9a 1496 if (act == SERVICE_READ_FIFO) {
dudmuck 18:9530d682fd9a 1497 if (!per_parse_rx(lora.RegRxNbBytes)) {
dudmuck 18:9530d682fd9a 1498 PacketNormalCnt++;
dudmuck 21:b84a77dfb43c 1499 lora_print_rx_verbose(lora.RegRxNbBytes);
dudmuck 18:9530d682fd9a 1500 }
dudmuck 18:9530d682fd9a 1501 }
dudmuck 18:9530d682fd9a 1502 break;
dudmuck 18:9530d682fd9a 1503 }
dudmuck 18:9530d682fd9a 1504 } while (!lora.RegIrqFlags.bits.RxTimeout);
dudmuck 18:9530d682fd9a 1505 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 1506 }
dudmuck 18:9530d682fd9a 1507
dudmuck 18:9530d682fd9a 1508 if (lora.RegIrqFlags.bits.CadDone) {
dudmuck 18:9530d682fd9a 1509 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 1510 num_cads++;
dudmuck 18:9530d682fd9a 1511 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 1512 }
dudmuck 18:9530d682fd9a 1513
dudmuck 18:9530d682fd9a 1514 }
dudmuck 18:9530d682fd9a 1515
dudmuck 20:b11592c9ba5f 1516 void cmd_restart_rx(uint8_t);
dudmuck 22:2005df80c8a8 1517 int preamble_to_sync_us;
dudmuck 22:2005df80c8a8 1518 #ifndef TYPE_ABZ
dudmuck 20:b11592c9ba5f 1519 Timeout timeout_syncAddress;
dudmuck 20:b11592c9ba5f 1520 bool get_syncAddress;
dudmuck 22:2005df80c8a8 1521 #endif
dudmuck 20:b11592c9ba5f 1522 float preamble_detect_at;
dudmuck 20:b11592c9ba5f 1523
dudmuck 20:b11592c9ba5f 1524 void callback_sa_timeout()
dudmuck 20:b11592c9ba5f 1525 {
dudmuck 20:b11592c9ba5f 1526 printf("syncAddress timeout ");
dudmuck 20:b11592c9ba5f 1527 if (dio2.read() == 0) {
dudmuck 20:b11592c9ba5f 1528 //cmd_restart_rx(0);
dudmuck 20:b11592c9ba5f 1529 rx_start_timer.reset();
dudmuck 20:b11592c9ba5f 1530 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 20:b11592c9ba5f 1531 printf("(false preamble detect at %f, secs:%u)\r\n", preamble_detect_at, time(NULL) - secs_rx_start);
dudmuck 20:b11592c9ba5f 1532 secs_rx_start = time(NULL);
dudmuck 20:b11592c9ba5f 1533 radio.set_opmode(RF_OPMODE_RECEIVER);
dudmuck 20:b11592c9ba5f 1534 } else
dudmuck 20:b11592c9ba5f 1535 printf("\r\n");
dudmuck 20:b11592c9ba5f 1536 }
dudmuck 20:b11592c9ba5f 1537
dudmuck 0:be215de91a68 1538 void
dudmuck 0:be215de91a68 1539 service_radio()
dudmuck 0:be215de91a68 1540 {
dudmuck 1:1cd0afbed23c 1541 service_action_e act;
dudmuck 14:c57ea544dc18 1542 static uint8_t rssi = 0;
dudmuck 1:1cd0afbed23c 1543
dudmuck 1:1cd0afbed23c 1544 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 21:b84a77dfb43c 1545 if (rssi_polling_thresh != 0 && radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) {
dudmuck 21:b84a77dfb43c 1546 int rssi = lora.get_current_rssi(); // dBm returned, negative value
dudmuck 22:2005df80c8a8 1547 #if defined(TARGET_STM) && !defined(TYPE_ABZ)
dudmuck 21:b84a77dfb43c 1548 if (rssi < rssi_polling_thresh)
dudmuck 21:b84a77dfb43c 1549 pc3 = 0; // signal weaker than threshold
dudmuck 21:b84a77dfb43c 1550 else
dudmuck 21:b84a77dfb43c 1551 pc3 = 1; // signal stronger than threshold
dudmuck 21:b84a77dfb43c 1552 #endif
dudmuck 21:b84a77dfb43c 1553 }
dudmuck 21:b84a77dfb43c 1554
dudmuck 18:9530d682fd9a 1555 if (cadper_enable) {
dudmuck 18:9530d682fd9a 1556 cadper_service();
dudmuck 18:9530d682fd9a 1557 }
dudmuck 4:7a9007dfc0e5 1558
dudmuck 1:1cd0afbed23c 1559 act = lora.service();
dudmuck 0:be215de91a68 1560
dudmuck 1:1cd0afbed23c 1561 switch (act) {
dudmuck 1:1cd0afbed23c 1562 case SERVICE_READ_FIFO:
dudmuck 8:227605e4a760 1563 if (app == APP_NONE) {
dudmuck 8:227605e4a760 1564 if (per_en) {
dudmuck 13:c73caaee93a5 1565 if (!per_parse_rx(lora.RegRxNbBytes)) {
dudmuck 8:227605e4a760 1566 PacketNormalCnt++;
dudmuck 21:b84a77dfb43c 1567 lora_print_rx_verbose(lora.RegRxNbBytes);
dudmuck 8:227605e4a760 1568 }
dudmuck 8:227605e4a760 1569 } else
dudmuck 21:b84a77dfb43c 1570 lora_print_rx_verbose(lora.RegRxNbBytes);
dudmuck 15:c69b942685ea 1571 fflush(stdout);
dudmuck 1:1cd0afbed23c 1572 } else if (app == APP_CHAT) {
dudmuck 1:1cd0afbed23c 1573 if (lora.RegHopChannel.bits.RxPayloadCrcOn) {
dudmuck 1:1cd0afbed23c 1574 if (lora.RegIrqFlags.bits.PayloadCrcError)
dudmuck 1:1cd0afbed23c 1575 printf("crcError\r\n");
dudmuck 1:1cd0afbed23c 1576 else {
dudmuck 1:1cd0afbed23c 1577 int n = lora.RegRxNbBytes;
dudmuck 1:1cd0afbed23c 1578 radio.rx_buf[n++] = '\r';
dudmuck 1:1cd0afbed23c 1579 radio.rx_buf[n++] = '\n';
dudmuck 1:1cd0afbed23c 1580 radio.rx_buf[n] = 0; // null terminate
dudmuck 1:1cd0afbed23c 1581 printf((char *)radio.rx_buf);
dudmuck 1:1cd0afbed23c 1582 }
dudmuck 1:1cd0afbed23c 1583 } else
dudmuck 1:1cd0afbed23c 1584 printf("crcOff\r\n");
dudmuck 1:1cd0afbed23c 1585
dudmuck 1:1cd0afbed23c 1586 // clear Irq flags
dudmuck 1:1cd0afbed23c 1587 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 1:1cd0afbed23c 1588 // should still be in receive mode
dudmuck 0:be215de91a68 1589 }
dudmuck 1:1cd0afbed23c 1590 break;
dudmuck 1:1cd0afbed23c 1591 case SERVICE_TX_DONE:
dudmuck 1:1cd0afbed23c 1592 if (app == APP_CHAT) {
dudmuck 18:9530d682fd9a 1593 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 8:227605e4a760 1594 } else if (per_en) {
dudmuck 18:9530d682fd9a 1595 per_timeout.attach(&per_cb, per_tx_delay); // start next TX
dudmuck 18:9530d682fd9a 1596 } else if (on_txdone_state != ON_TXDONE_STATE_NONE) {
dudmuck 18:9530d682fd9a 1597 on_txdone_timeout.attach(&txdone_timeout_cb, on_txdone_delay);
dudmuck 1:1cd0afbed23c 1598 }
dudmuck 1:1cd0afbed23c 1599 break;
dudmuck 1:1cd0afbed23c 1600 case SERVICE_ERROR:
dudmuck 1:1cd0afbed23c 1601 printf("error\r\n");
dudmuck 1:1cd0afbed23c 1602 break;
dudmuck 19:be8a8b0e7320 1603 case SERVICE_NONE:
dudmuck 19:be8a8b0e7320 1604 break;
dudmuck 1:1cd0afbed23c 1605 } // ...switch (act)
dudmuck 1:1cd0afbed23c 1606 } else {
dudmuck 1:1cd0afbed23c 1607 /* FSK: */
dudmuck 21:b84a77dfb43c 1608
dudmuck 21:b84a77dfb43c 1609 if (rx_payloadReady_int_en)
dudmuck 21:b84a77dfb43c 1610 return; // radio service by ISR only
dudmuck 21:b84a77dfb43c 1611
dudmuck 21:b84a77dfb43c 1612 if (ulrx_enable)
dudmuck 21:b84a77dfb43c 1613 return;
dudmuck 21:b84a77dfb43c 1614
dudmuck 1:1cd0afbed23c 1615 act = fsk.service();
dudmuck 1:1cd0afbed23c 1616
dudmuck 1:1cd0afbed23c 1617 switch (act) {
dudmuck 1:1cd0afbed23c 1618 case SERVICE_READ_FIFO:
dudmuck 2:c6b23a43a9d9 1619 if (app == APP_CHAT) {
dudmuck 2:c6b23a43a9d9 1620 int n = fsk.rx_buf_length;
dudmuck 2:c6b23a43a9d9 1621 radio.rx_buf[n++] = '\r';
dudmuck 2:c6b23a43a9d9 1622 radio.rx_buf[n++] = '\n';
dudmuck 2:c6b23a43a9d9 1623 radio.rx_buf[n] = 0; // null terminate
dudmuck 2:c6b23a43a9d9 1624 printf((char *)radio.rx_buf);
dudmuck 2:c6b23a43a9d9 1625 } else {
dudmuck 21:b84a77dfb43c 1626 if (fsk.RegRxConfig.bits.AfcAutoOn) {
dudmuck 14:c57ea544dc18 1627 printf("%dHz ", (int)(FREQ_STEP_HZ * fsk.RegAfcValue));
dudmuck 14:c57ea544dc18 1628 if (rssi != 0) {
dudmuck 15:c69b942685ea 1629 printf("pkt:-%.1fdBm ", rssi / 2.0);
dudmuck 14:c57ea544dc18 1630 rssi = 0;
dudmuck 15:c69b942685ea 1631 }
dudmuck 21:b84a77dfb43c 1632 }
dudmuck 13:c73caaee93a5 1633 if (per_en) {
dudmuck 13:c73caaee93a5 1634 if (!per_parse_rx(fsk.rx_buf_length)) {
dudmuck 13:c73caaee93a5 1635 PacketNormalCnt++;
dudmuck 13:c73caaee93a5 1636 print_rx_buf(fsk.rx_buf_length);
dudmuck 13:c73caaee93a5 1637 }
dudmuck 13:c73caaee93a5 1638 } else {
dudmuck 13:c73caaee93a5 1639 print_rx_buf(fsk.rx_buf_length);
dudmuck 13:c73caaee93a5 1640 }
dudmuck 21:b84a77dfb43c 1641
dudmuck 2:c6b23a43a9d9 1642 }
dudmuck 21:b84a77dfb43c 1643 if (crc32_en) {
dudmuck 21:b84a77dfb43c 1644 uint32_t c, *u32_ptr = (uint32_t*)&radio.rx_buf[fsk.rx_buf_length-4];
dudmuck 21:b84a77dfb43c 1645 printf("rx crc:%08x, ", *u32_ptr);
dudmuck 21:b84a77dfb43c 1646 c = gen_crc(radio.rx_buf, fsk.rx_buf_length-4);
dudmuck 21:b84a77dfb43c 1647 printf("calc crc:%08x\r\n", c);
dudmuck 21:b84a77dfb43c 1648 }
dudmuck 21:b84a77dfb43c 1649 fflush(stdout);
dudmuck 1:1cd0afbed23c 1650 break;
dudmuck 2:c6b23a43a9d9 1651 case SERVICE_TX_DONE:
dudmuck 18:9530d682fd9a 1652 if (ook_test_en)
dudmuck 18:9530d682fd9a 1653 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 2:c6b23a43a9d9 1654 if (app == APP_CHAT) {
dudmuck 2:c6b23a43a9d9 1655 fsk.start_rx();
dudmuck 13:c73caaee93a5 1656 } else if (per_en) {
dudmuck 13:c73caaee93a5 1657 per_timeout.attach(&per_cb, per_tx_delay); // start next TX
dudmuck 13:c73caaee93a5 1658 }
dudmuck 2:c6b23a43a9d9 1659 break;
dudmuck 19:be8a8b0e7320 1660 case SERVICE_ERROR:
dudmuck 19:be8a8b0e7320 1661 case SERVICE_NONE:
dudmuck 19:be8a8b0e7320 1662 break;
dudmuck 20:b11592c9ba5f 1663 } // ...switch (act)
dudmuck 22:2005df80c8a8 1664
dudmuck 22:2005df80c8a8 1665 #ifndef TYPE_ABZ
dudmuck 20:b11592c9ba5f 1666 /* FSK receiver handling of preamble detection */
dudmuck 20:b11592c9ba5f 1667 if (radio.RegDioMapping2.bits.MapPreambleDetect && radio.RegDioMapping2.bits.Dio4Mapping == 3) {
dudmuck 20:b11592c9ba5f 1668 if (saved_dio4 != dio4.read()) {
dudmuck 20:b11592c9ba5f 1669 //printf("predet-dio4:%d\r\n", dio4.read());
dudmuck 20:b11592c9ba5f 1670 /* FSK: preamble detect state change */
dudmuck 20:b11592c9ba5f 1671 if (dio4.read()) {
dudmuck 20:b11592c9ba5f 1672 if (radio.RegDioMapping1.bits.Dio2Mapping == 3) { // if we can see SyncAddress
dudmuck 20:b11592c9ba5f 1673 get_syncAddress = true;
dudmuck 20:b11592c9ba5f 1674 timeout_syncAddress.attach_us(callback_sa_timeout, preamble_to_sync_us);
dudmuck 20:b11592c9ba5f 1675 }
dudmuck 20:b11592c9ba5f 1676 /* how long after RX start is preamble detection occuring? */
dudmuck 20:b11592c9ba5f 1677 //printf("preamble detect at %f\r\n", rx_start_timer.read());
dudmuck 20:b11592c9ba5f 1678 preamble_detect_at = rx_start_timer.read();
dudmuck 20:b11592c9ba5f 1679 } else {
dudmuck 20:b11592c9ba5f 1680 get_syncAddress = false;
dudmuck 20:b11592c9ba5f 1681 //printf("preamble detect clear\r\n");
dudmuck 20:b11592c9ba5f 1682 }
dudmuck 20:b11592c9ba5f 1683 saved_dio4 = dio4.read();
dudmuck 20:b11592c9ba5f 1684 }
dudmuck 20:b11592c9ba5f 1685 } // ..if dio4 is
dudmuck 22:2005df80c8a8 1686
dudmuck 20:b11592c9ba5f 1687 if (radio.RegDioMapping1.bits.Dio2Mapping == 3) {
dudmuck 20:b11592c9ba5f 1688 if (dio2.read()) {
dudmuck 20:b11592c9ba5f 1689 if (get_syncAddress) {
dudmuck 20:b11592c9ba5f 1690 timeout_syncAddress.detach();
dudmuck 20:b11592c9ba5f 1691 get_syncAddress = false;
dudmuck 20:b11592c9ba5f 1692 }
dudmuck 15:c69b942685ea 1693 rssi = radio.read_reg(REG_FSK_RSSIVALUE);
dudmuck 14:c57ea544dc18 1694 }
dudmuck 14:c57ea544dc18 1695 }
dudmuck 22:2005df80c8a8 1696 #endif /* !TYPE_ABZ */
dudmuck 22:2005df80c8a8 1697
dudmuck 21:b84a77dfb43c 1698 if (rssi_polling_thresh != 0 && radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) {
dudmuck 21:b84a77dfb43c 1699 rssi = radio.read_reg(REG_FSK_RSSIVALUE);
dudmuck 21:b84a77dfb43c 1700 rssi = -rssi;
dudmuck 22:2005df80c8a8 1701 #if defined(TARGET_STM) && !defined(TYPE_ABZ)
dudmuck 21:b84a77dfb43c 1702 if (rssi < rssi_polling_thresh)
dudmuck 21:b84a77dfb43c 1703 pc3 = 0; // signal weaker than threshold
dudmuck 21:b84a77dfb43c 1704 else
dudmuck 21:b84a77dfb43c 1705 pc3 = 1; // signal stronger than threshold
dudmuck 22:2005df80c8a8 1706 #endif
dudmuck 21:b84a77dfb43c 1707 }
dudmuck 22:2005df80c8a8 1708
dudmuck 14:c57ea544dc18 1709 } // ...!radio.RegOpMode.bits.LongRangeMode
dudmuck 0:be215de91a68 1710 }
dudmuck 0:be215de91a68 1711
dudmuck 5:360069ec9953 1712 /*int get_kbd_str(char* buf, int size)
dudmuck 0:be215de91a68 1713 {
dudmuck 0:be215de91a68 1714 char c;
dudmuck 0:be215de91a68 1715 int i;
dudmuck 0:be215de91a68 1716 static int prev_len;
dudmuck 0:be215de91a68 1717
dudmuck 0:be215de91a68 1718 for (i = 0;;) {
dudmuck 0:be215de91a68 1719 if (pc.readable()) {
dudmuck 0:be215de91a68 1720 c = pc.getc();
dudmuck 0:be215de91a68 1721 if (c == 8 && i > 0) {
dudmuck 0:be215de91a68 1722 pc.putc(8);
dudmuck 0:be215de91a68 1723 pc.putc(' ');
dudmuck 0:be215de91a68 1724 pc.putc(8);
dudmuck 0:be215de91a68 1725 i--;
dudmuck 0:be215de91a68 1726 } else if (c == '\r') {
dudmuck 0:be215de91a68 1727 if (i == 0) {
dudmuck 0:be215de91a68 1728 return prev_len; // repeat previous
dudmuck 0:be215de91a68 1729 } else {
dudmuck 0:be215de91a68 1730 buf[i] = 0; // null terminate
dudmuck 0:be215de91a68 1731 prev_len = i;
dudmuck 0:be215de91a68 1732 return i;
dudmuck 0:be215de91a68 1733 }
dudmuck 0:be215de91a68 1734 } else if (c == 3) {
dudmuck 0:be215de91a68 1735 // ctrl-C abort
dudmuck 0:be215de91a68 1736 return -1;
dudmuck 0:be215de91a68 1737 } else if (i < size) {
dudmuck 0:be215de91a68 1738 buf[i++] = c;
dudmuck 0:be215de91a68 1739 pc.putc(c);
dudmuck 0:be215de91a68 1740 }
dudmuck 4:7a9007dfc0e5 1741 } else {
dudmuck 0:be215de91a68 1742 service_radio();
dudmuck 4:7a9007dfc0e5 1743 }
dudmuck 0:be215de91a68 1744 } // ...for()
dudmuck 5:360069ec9953 1745 }*/
dudmuck 0:be215de91a68 1746
dudmuck 0:be215de91a68 1747 void
dudmuck 0:be215de91a68 1748 console_chat()
dudmuck 0:be215de91a68 1749 {
dudmuck 5:360069ec9953 1750 //int i, len = get_kbd_str(pcbuf, sizeof(pcbuf));
dudmuck 5:360069ec9953 1751
dudmuck 5:360069ec9953 1752 service_radio();
dudmuck 5:360069ec9953 1753
dudmuck 5:360069ec9953 1754 if (pcbuf_len < 0) {
dudmuck 0:be215de91a68 1755 printf("chat abort\r\n");
dudmuck 5:360069ec9953 1756 pcbuf_len = 0;
dudmuck 0:be215de91a68 1757 app = APP_NONE;
dudmuck 0:be215de91a68 1758 return;
dudmuck 5:360069ec9953 1759 } else if (pcbuf_len == 0) {
dudmuck 5:360069ec9953 1760 return;
dudmuck 0:be215de91a68 1761 } else {
dudmuck 5:360069ec9953 1762 int i;
dudmuck 5:360069ec9953 1763 for (i = 0; i < pcbuf_len; i++)
dudmuck 0:be215de91a68 1764 radio.tx_buf[i] = pcbuf[i];
dudmuck 1:1cd0afbed23c 1765 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 5:360069ec9953 1766 lora.RegPayloadLength = pcbuf_len;
dudmuck 1:1cd0afbed23c 1767 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 5:360069ec9953 1768 lora.start_tx(pcbuf_len);
dudmuck 2:c6b23a43a9d9 1769 } else {
dudmuck 5:360069ec9953 1770 fsk.start_tx(pcbuf_len);
dudmuck 2:c6b23a43a9d9 1771 }
dudmuck 5:360069ec9953 1772 pcbuf_len = 0;
dudmuck 0:be215de91a68 1773 printf("\r\n");
dudmuck 0:be215de91a68 1774 }
dudmuck 0:be215de91a68 1775 }
dudmuck 0:be215de91a68 1776
dudmuck 22:2005df80c8a8 1777 const uint8_t ookt_tx_payload[29] = {
dudmuck 21:b84a77dfb43c 1778 0x55, 0x55, 0x55, 0x55, 0xA9, 0x66, 0x69, 0x65,
dudmuck 21:b84a77dfb43c 1779 0x39, 0x53, 0xAA, 0xC3, 0xA6, 0x95, 0xC6, 0x3C,
dudmuck 21:b84a77dfb43c 1780 0x6A, 0x33, 0x33, 0xC6, 0xCA, 0xA6, 0x33, 0x33,
dudmuck 21:b84a77dfb43c 1781 0x55, 0x6A, 0xA6, 0xAA, 0x53
dudmuck 21:b84a77dfb43c 1782 };
dudmuck 21:b84a77dfb43c 1783 volatile uint32_t ook_tx_cnt = 0;
dudmuck 21:b84a77dfb43c 1784
dudmuck 21:b84a77dfb43c 1785 void callback_ook_tx_test()
dudmuck 21:b84a77dfb43c 1786 {
dudmuck 21:b84a77dfb43c 1787 int i;
dudmuck 21:b84a77dfb43c 1788
dudmuck 21:b84a77dfb43c 1789 //radio.write_reg(REG_FSK_SYNCCONFIG, 0);
dudmuck 21:b84a77dfb43c 1790
dudmuck 21:b84a77dfb43c 1791 printf("%u ookTx: ", ook_tx_cnt++);
dudmuck 21:b84a77dfb43c 1792 for (i = 0; i < sizeof(ookt_tx_payload); i++) {
dudmuck 21:b84a77dfb43c 1793 radio.tx_buf[i] = ookt_tx_payload[i];
dudmuck 21:b84a77dfb43c 1794 printf("%02x ", radio.tx_buf[i]);
dudmuck 21:b84a77dfb43c 1795 }
dudmuck 21:b84a77dfb43c 1796 printf("\r\n");
dudmuck 21:b84a77dfb43c 1797
dudmuck 21:b84a77dfb43c 1798 //printf("syncConf:%x\r\n", radio.read_reg(REG_FSK_SYNCCONFIG));
dudmuck 21:b84a77dfb43c 1799 fsk.start_tx(sizeof(ookt_tx_payload));
dudmuck 21:b84a77dfb43c 1800 }
dudmuck 21:b84a77dfb43c 1801
dudmuck 18:9530d682fd9a 1802 typedef enum {
dudmuck 18:9530d682fd9a 1803 TXTICKER_STATE_OFF = 0,
dudmuck 18:9530d682fd9a 1804 TXTICKER_STATE_TOGGLE_PAYLOAD_BIT,
dudmuck 18:9530d682fd9a 1805 TXTICKER_STATE_CYCLE_PAYLOAD_LENGTH,
dudmuck 18:9530d682fd9a 1806 TXTICKER_STATE_CYCLE_CODING_RATE,
dudmuck 18:9530d682fd9a 1807 TXTICKER_STATE_TOG_HEADER_MODE,
dudmuck 18:9530d682fd9a 1808 TXTICKER_STATE_TOG_CRC_ON,
dudmuck 18:9530d682fd9a 1809 TXTICKER_STATE_CYCLE_SYNC_1,
dudmuck 18:9530d682fd9a 1810 TXTICKER_STATE_CYCLE_SYNC_2,
dudmuck 18:9530d682fd9a 1811 TXTICKER_STATE_RAMP_PAYLOAD_DATA_START,
dudmuck 18:9530d682fd9a 1812 TXTICKER_STATE_RAMP_PAYLOAD_DATA,
dudmuck 18:9530d682fd9a 1813 TXTICKER_STATE_SYMBOL_SWEEP,
dudmuck 18:9530d682fd9a 1814 TXTICKER_STATE_TOGGLE_ALL_BITS_START,
dudmuck 18:9530d682fd9a 1815 TXTICKER_STATE_TOGGLE_ALL_BITS,
dudmuck 18:9530d682fd9a 1816 } txticker_state_e;
dudmuck 18:9530d682fd9a 1817
dudmuck 18:9530d682fd9a 1818 txticker_state_e txticker_state;
dudmuck 18:9530d682fd9a 1819 float tx_ticker_rate = 0.5;
dudmuck 18:9530d682fd9a 1820 Ticker tx_ticker;
dudmuck 18:9530d682fd9a 1821
dudmuck 18:9530d682fd9a 1822 uint8_t txticker_sync_byte;
dudmuck 18:9530d682fd9a 1823 uint8_t payload_length_stop;
dudmuck 18:9530d682fd9a 1824 uint8_t symbol_num;
dudmuck 18:9530d682fd9a 1825 uint32_t symbol_sweep_bit_counter = 0;
dudmuck 18:9530d682fd9a 1826 unsigned int symbol_sweep_bit_counter_stop;
dudmuck 18:9530d682fd9a 1827 uint8_t symbol_sweep_nbits;
dudmuck 18:9530d682fd9a 1828 uint8_t byte_pad_length;
dudmuck 18:9530d682fd9a 1829
dudmuck 18:9530d682fd9a 1830 uint8_t tab_current_byte_num;
dudmuck 18:9530d682fd9a 1831 uint8_t tab_current_bit_in_byte;
dudmuck 18:9530d682fd9a 1832
dudmuck 18:9530d682fd9a 1833 void fp_cb()
dudmuck 18:9530d682fd9a 1834 {
dudmuck 18:9530d682fd9a 1835 int i;
dudmuck 18:9530d682fd9a 1836 if (!radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 1837 return;
dudmuck 18:9530d682fd9a 1838
dudmuck 18:9530d682fd9a 1839 switch (txticker_state) {
dudmuck 18:9530d682fd9a 1840 case TXTICKER_STATE_TOGGLE_PAYLOAD_BIT:
dudmuck 18:9530d682fd9a 1841 /*
dudmuck 18:9530d682fd9a 1842 {
dudmuck 18:9530d682fd9a 1843 if (fp_tog_bit_ < 32) {
dudmuck 18:9530d682fd9a 1844 uint32_t bp = 1 << fp_tog_bit_;
dudmuck 18:9530d682fd9a 1845 fp_data ^= bp;
dudmuck 18:9530d682fd9a 1846 //printf("bp%02x ", bp);
dudmuck 18:9530d682fd9a 1847 }
dudmuck 18:9530d682fd9a 1848 memcpy(radio.tx_buf, &fp_data, fp_data_length);
dudmuck 18:9530d682fd9a 1849 printf("TX ");
dudmuck 18:9530d682fd9a 1850 for (i = 0; i < fp_data_length; i++)
dudmuck 18:9530d682fd9a 1851 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1852
dudmuck 18:9530d682fd9a 1853 printf("\r\n");
dudmuck 18:9530d682fd9a 1854 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1855 break;
dudmuck 18:9530d682fd9a 1856 }
dudmuck 18:9530d682fd9a 1857 */
dudmuck 18:9530d682fd9a 1858 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1859 break;
dudmuck 18:9530d682fd9a 1860 case TXTICKER_STATE_CYCLE_PAYLOAD_LENGTH:
dudmuck 18:9530d682fd9a 1861 {
dudmuck 18:9530d682fd9a 1862 if (lora.RegPayloadLength > payload_length_stop)
dudmuck 18:9530d682fd9a 1863 lora.RegPayloadLength = 0;
dudmuck 18:9530d682fd9a 1864 else
dudmuck 18:9530d682fd9a 1865 lora.RegPayloadLength++;
dudmuck 18:9530d682fd9a 1866
dudmuck 18:9530d682fd9a 1867 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1868 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1869 printf("RegPayloadLength:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1870 break;
dudmuck 18:9530d682fd9a 1871 }
dudmuck 18:9530d682fd9a 1872 case TXTICKER_STATE_CYCLE_CODING_RATE:
dudmuck 18:9530d682fd9a 1873 {
dudmuck 18:9530d682fd9a 1874 uint8_t cr = lora.getCodingRate(false); // false: TX coding rate
dudmuck 18:9530d682fd9a 1875 if (cr == 4)
dudmuck 18:9530d682fd9a 1876 cr = 0;
dudmuck 18:9530d682fd9a 1877 else
dudmuck 18:9530d682fd9a 1878 cr++;
dudmuck 18:9530d682fd9a 1879
dudmuck 18:9530d682fd9a 1880 lora.setCodingRate(cr);
dudmuck 18:9530d682fd9a 1881 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1882 printf("tx cr:%d\r\n", cr);
dudmuck 18:9530d682fd9a 1883 break;
dudmuck 18:9530d682fd9a 1884 }
dudmuck 18:9530d682fd9a 1885 case TXTICKER_STATE_TOG_HEADER_MODE:
dudmuck 18:9530d682fd9a 1886 {
dudmuck 18:9530d682fd9a 1887 lora.setHeaderMode(!lora.getHeaderMode());
dudmuck 18:9530d682fd9a 1888 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1889 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 1890 lora_printHeaderMode();
dudmuck 18:9530d682fd9a 1891 printf("\r\n");
dudmuck 18:9530d682fd9a 1892 break;
dudmuck 18:9530d682fd9a 1893 }
dudmuck 18:9530d682fd9a 1894 case TXTICKER_STATE_TOG_CRC_ON:
dudmuck 18:9530d682fd9a 1895 {
dudmuck 18:9530d682fd9a 1896 lora.setRxPayloadCrcOn(!lora.getRxPayloadCrcOn());
dudmuck 18:9530d682fd9a 1897 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1898 printf("crc on:%d\r\n", lora.getRxPayloadCrcOn());
dudmuck 18:9530d682fd9a 1899 break;
dudmuck 18:9530d682fd9a 1900 }
dudmuck 18:9530d682fd9a 1901 case TXTICKER_STATE_CYCLE_SYNC_1:
dudmuck 18:9530d682fd9a 1902 {
dudmuck 18:9530d682fd9a 1903 /* cycle hi nibble of 0x39 register */
dudmuck 18:9530d682fd9a 1904 if ((txticker_sync_byte & 0xf0) == 0xf0)
dudmuck 18:9530d682fd9a 1905 txticker_sync_byte &= 0x0f;
dudmuck 18:9530d682fd9a 1906 else
dudmuck 18:9530d682fd9a 1907 txticker_sync_byte += 0x10;
dudmuck 18:9530d682fd9a 1908 radio.write_reg(REG_LR_SYNC_BYTE, txticker_sync_byte);
dudmuck 18:9530d682fd9a 1909 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1910 printf("0x39: %02x\r\n", txticker_sync_byte);
dudmuck 18:9530d682fd9a 1911 break;
dudmuck 18:9530d682fd9a 1912 }
dudmuck 18:9530d682fd9a 1913 case TXTICKER_STATE_CYCLE_SYNC_2:
dudmuck 18:9530d682fd9a 1914 {
dudmuck 18:9530d682fd9a 1915 /* cycle lo nibble of 0x39 register */
dudmuck 18:9530d682fd9a 1916 if ((txticker_sync_byte & 0x0f) == 0x0f)
dudmuck 18:9530d682fd9a 1917 txticker_sync_byte &= 0xf0;
dudmuck 18:9530d682fd9a 1918 else
dudmuck 18:9530d682fd9a 1919 txticker_sync_byte += 0x01;
dudmuck 18:9530d682fd9a 1920 radio.write_reg(REG_LR_SYNC_BYTE, txticker_sync_byte);
dudmuck 18:9530d682fd9a 1921 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1922 printf("0x39: %02x\r\n", txticker_sync_byte);
dudmuck 18:9530d682fd9a 1923 break;
dudmuck 18:9530d682fd9a 1924 }
dudmuck 18:9530d682fd9a 1925 case TXTICKER_STATE_RAMP_PAYLOAD_DATA_START:
dudmuck 18:9530d682fd9a 1926 txticker_state = TXTICKER_STATE_RAMP_PAYLOAD_DATA;
dudmuck 18:9530d682fd9a 1927 for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1928 radio.tx_buf[i] = 0;
dudmuck 18:9530d682fd9a 1929
dudmuck 18:9530d682fd9a 1930 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1931 printf("payload start, len:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1932 break;
dudmuck 18:9530d682fd9a 1933 case TXTICKER_STATE_RAMP_PAYLOAD_DATA:
dudmuck 18:9530d682fd9a 1934 for (i = lora.RegPayloadLength-1; i >= 0; i--) {
dudmuck 18:9530d682fd9a 1935 //printf("i:%d ", i);
dudmuck 18:9530d682fd9a 1936 if (radio.tx_buf[i] == 255) {
dudmuck 18:9530d682fd9a 1937 radio.tx_buf[i] = 0;
dudmuck 18:9530d682fd9a 1938 } else {
dudmuck 18:9530d682fd9a 1939 radio.tx_buf[i]++;
dudmuck 18:9530d682fd9a 1940 break;
dudmuck 18:9530d682fd9a 1941 }
dudmuck 18:9530d682fd9a 1942 }
dudmuck 18:9530d682fd9a 1943 //printf("\r\n");
dudmuck 18:9530d682fd9a 1944 printf("send:");
dudmuck 18:9530d682fd9a 1945 for (i = 0; i < lora.RegPayloadLength; i++) {
dudmuck 18:9530d682fd9a 1946 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1947 }
dudmuck 18:9530d682fd9a 1948 printf("\r\n");
dudmuck 18:9530d682fd9a 1949 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1950 if (radio.tx_buf[0] == 255) {
dudmuck 18:9530d682fd9a 1951 printf("payload ramp done\r\n");
dudmuck 18:9530d682fd9a 1952 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1953 }
dudmuck 18:9530d682fd9a 1954 break;
dudmuck 18:9530d682fd9a 1955 case TXTICKER_STATE_SYMBOL_SWEEP: // fpsNL command, where N=symbol num, L=nbytes
dudmuck 18:9530d682fd9a 1956 {
dudmuck 18:9530d682fd9a 1957 uint32_t mask;
dudmuck 18:9530d682fd9a 1958 /*for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1959 radio.tx_buf[i] = 0;*/
dudmuck 18:9530d682fd9a 1960 i = byte_pad_length;
dudmuck 19:be8a8b0e7320 1961 printf("bit_counter 0x%" PRIx32 " : ", symbol_sweep_bit_counter);
dudmuck 18:9530d682fd9a 1962 for (int bn = 0; bn < symbol_sweep_nbits; bn += 2) {
dudmuck 18:9530d682fd9a 1963 /* 2 lsbits going into first byte */
dudmuck 18:9530d682fd9a 1964 mask = 1 << bn;
dudmuck 18:9530d682fd9a 1965 if (symbol_sweep_bit_counter & mask)
dudmuck 18:9530d682fd9a 1966 radio.tx_buf[i] |= 1 << symbol_num;
dudmuck 18:9530d682fd9a 1967 else
dudmuck 18:9530d682fd9a 1968 radio.tx_buf[i] &= ~(1 << symbol_num);
dudmuck 18:9530d682fd9a 1969 mask = 2 << bn;
dudmuck 18:9530d682fd9a 1970 if (symbol_sweep_bit_counter & mask)
dudmuck 18:9530d682fd9a 1971 radio.tx_buf[i] |= 0x10 << symbol_num;
dudmuck 18:9530d682fd9a 1972 else
dudmuck 18:9530d682fd9a 1973 radio.tx_buf[i] &= ~(0x10 << symbol_num);
dudmuck 18:9530d682fd9a 1974 //printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1975 i++;
dudmuck 18:9530d682fd9a 1976 }
dudmuck 18:9530d682fd9a 1977 for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 18:9530d682fd9a 1978 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1979 printf("\r\n");
dudmuck 18:9530d682fd9a 1980 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1981 if (++symbol_sweep_bit_counter == symbol_sweep_bit_counter_stop) {
dudmuck 18:9530d682fd9a 1982 printf("stop\r\n");
dudmuck 18:9530d682fd9a 1983 tx_ticker.detach();
dudmuck 18:9530d682fd9a 1984 }
dudmuck 18:9530d682fd9a 1985 }
dudmuck 18:9530d682fd9a 1986 break;
dudmuck 18:9530d682fd9a 1987 case TXTICKER_STATE_TOGGLE_ALL_BITS_START:
dudmuck 18:9530d682fd9a 1988 tab_current_byte_num = byte_pad_length;
dudmuck 18:9530d682fd9a 1989 tab_current_bit_in_byte = 0;
dudmuck 18:9530d682fd9a 1990 printf("tx ");
dudmuck 18:9530d682fd9a 1991 for (i = 0; i < lora.RegPayloadLength; i++) {
dudmuck 18:9530d682fd9a 1992 radio.tx_buf[i] = 0;
dudmuck 18:9530d682fd9a 1993 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 1994 }
dudmuck 18:9530d682fd9a 1995 printf("\r\n");
dudmuck 18:9530d682fd9a 1996 txticker_state = TXTICKER_STATE_TOGGLE_ALL_BITS;
dudmuck 18:9530d682fd9a 1997 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 1998 break;
dudmuck 18:9530d682fd9a 1999 case TXTICKER_STATE_TOGGLE_ALL_BITS:
dudmuck 18:9530d682fd9a 2000 {
dudmuck 18:9530d682fd9a 2001 uint8_t mask = 1 << tab_current_bit_in_byte;
dudmuck 18:9530d682fd9a 2002 radio.tx_buf[tab_current_byte_num] = mask;
dudmuck 18:9530d682fd9a 2003 printf("bit%d in [%d]: tx ", tab_current_bit_in_byte, tab_current_byte_num);
dudmuck 18:9530d682fd9a 2004 for (i = 0; i < lora.RegPayloadLength; i++) {
dudmuck 18:9530d682fd9a 2005 printf("%02x ", radio.tx_buf[i]);
dudmuck 18:9530d682fd9a 2006 }
dudmuck 18:9530d682fd9a 2007 printf("\r\n");
dudmuck 18:9530d682fd9a 2008 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2009 if (++tab_current_bit_in_byte == 8) {
dudmuck 18:9530d682fd9a 2010 radio.tx_buf[tab_current_byte_num] = 0;
dudmuck 18:9530d682fd9a 2011 tab_current_bit_in_byte = 0;
dudmuck 18:9530d682fd9a 2012 if (++tab_current_byte_num == lora.RegPayloadLength) {
dudmuck 18:9530d682fd9a 2013 tx_ticker.detach();
dudmuck 18:9530d682fd9a 2014 }
dudmuck 18:9530d682fd9a 2015 }
dudmuck 18:9530d682fd9a 2016 }
dudmuck 18:9530d682fd9a 2017 break;
dudmuck 18:9530d682fd9a 2018 default:
dudmuck 18:9530d682fd9a 2019 tx_ticker.detach();
dudmuck 18:9530d682fd9a 2020 break;
dudmuck 18:9530d682fd9a 2021 } // ...switch (txticker_state)
dudmuck 18:9530d682fd9a 2022 }
dudmuck 18:9530d682fd9a 2023
dudmuck 18:9530d682fd9a 2024 void ook_test_tx(int len)
dudmuck 18:9530d682fd9a 2025 {
dudmuck 18:9530d682fd9a 2026 int i;
dudmuck 18:9530d682fd9a 2027 /*
dudmuck 18:9530d682fd9a 2028 fsk.RegPktConfig2.bits.PayloadLength = i;
dudmuck 18:9530d682fd9a 2029 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);fsk.RegPktConfig2.bits.PayloadLength = i;
dudmuck 18:9530d682fd9a 2030 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 18:9530d682fd9a 2031 */
dudmuck 18:9530d682fd9a 2032 for (i = 0; i < 4; i++) {
dudmuck 18:9530d682fd9a 2033 radio.tx_buf[i] = 0xaa;
dudmuck 18:9530d682fd9a 2034 }
dudmuck 18:9530d682fd9a 2035
dudmuck 18:9530d682fd9a 2036 printf("ooktx:");
dudmuck 18:9530d682fd9a 2037 for (i = 0; i < len; i++) {
dudmuck 18:9530d682fd9a 2038 radio.tx_buf[i+4] = rand() & 0xff;
dudmuck 18:9530d682fd9a 2039 printf("%02x ", radio.tx_buf[i+4]);
dudmuck 18:9530d682fd9a 2040 }
dudmuck 18:9530d682fd9a 2041 printf("\r\n");
dudmuck 18:9530d682fd9a 2042 fsk.start_tx(len+4);
dudmuck 18:9530d682fd9a 2043
dudmuck 18:9530d682fd9a 2044 while (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) {
dudmuck 18:9530d682fd9a 2045 if (poll_irq_en)
dudmuck 18:9530d682fd9a 2046 poll_service_radio();
dudmuck 18:9530d682fd9a 2047 else
dudmuck 18:9530d682fd9a 2048 service_radio();
dudmuck 18:9530d682fd9a 2049 }
dudmuck 18:9530d682fd9a 2050 }
dudmuck 18:9530d682fd9a 2051
dudmuck 18:9530d682fd9a 2052 void cmd_init(uint8_t args_at)
dudmuck 10:d9bb2ce57f05 2053 {
dudmuck 18:9530d682fd9a 2054 printf("init\r\n");
dudmuck 18:9530d682fd9a 2055 radio.init();
dudmuck 18:9530d682fd9a 2056 if (!radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2057 fsk.init(); // put FSK modem to some functioning default
dudmuck 18:9530d682fd9a 2058 } else {
dudmuck 18:9530d682fd9a 2059 // lora configuration is more simple
dudmuck 18:9530d682fd9a 2060 }
dudmuck 18:9530d682fd9a 2061 }
dudmuck 18:9530d682fd9a 2062
dudmuck 18:9530d682fd9a 2063 void cmd_per_tx_delay(uint8_t idx)
dudmuck 18:9530d682fd9a 2064 {
dudmuck 18:9530d682fd9a 2065 int i;
dudmuck 18:9530d682fd9a 2066 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2067 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2068 per_tx_delay = i / 1000.0;
dudmuck 18:9530d682fd9a 2069 }
dudmuck 18:9530d682fd9a 2070 printf("per_tx_delay:%dms\r\n", (int)(per_tx_delay * 1000));
dudmuck 18:9530d682fd9a 2071 }
dudmuck 18:9530d682fd9a 2072
dudmuck 21:b84a77dfb43c 2073 const uint8_t test_payload_A[7] = {
dudmuck 21:b84a77dfb43c 2074 0x80, 0x02, 0x58, 0xF5, 0xDF, 0xB8, 0x9E
dudmuck 21:b84a77dfb43c 2075 };
dudmuck 21:b84a77dfb43c 2076
dudmuck 21:b84a77dfb43c 2077 const uint8_t test_payload_B[] = {
dudmuck 21:b84a77dfb43c 2078 0xca, 0xfe, 0xba, 0xbe
dudmuck 21:b84a77dfb43c 2079 };
dudmuck 21:b84a77dfb43c 2080
dudmuck 21:b84a77dfb43c 2081 const uint8_t test_payload_C[0x1a] = {
dudmuck 21:b84a77dfb43c 2082 0x88, 0x39, 0x1F, 0xC6, 0xD3, 0xEB, 0xA4, 0xAC,
dudmuck 21:b84a77dfb43c 2083 0xFB, 0xB9, 0xBA, 0xB9, 0xBE, 0x13, 0x61, 0x4C,
dudmuck 21:b84a77dfb43c 2084 0x43, 0x83, 0x00, 0x92, 0x84, 0x00, 0x6F, 0x87,
dudmuck 21:b84a77dfb43c 2085 0x7C, 0xB2
dudmuck 21:b84a77dfb43c 2086 };
dudmuck 21:b84a77dfb43c 2087
dudmuck 18:9530d682fd9a 2088 void cmd_tx(uint8_t idx)
dudmuck 18:9530d682fd9a 2089 {
dudmuck 18:9530d682fd9a 2090 int i;
dudmuck 18:9530d682fd9a 2091 static uint16_t fsk_tx_length;
dudmuck 18:9530d682fd9a 2092
dudmuck 18:9530d682fd9a 2093 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2094 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2095 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2096 lora.RegPayloadLength = i;
dudmuck 18:9530d682fd9a 2097 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2098 }
dudmuck 18:9530d682fd9a 2099
dudmuck 21:b84a77dfb43c 2100 if (pcbuf[idx] == 'A') {
dudmuck 21:b84a77dfb43c 2101 } else if (pcbuf[idx] == 'B') {
dudmuck 21:b84a77dfb43c 2102 } else if (pcbuf[idx] == 'C') {
dudmuck 21:b84a77dfb43c 2103 } else {
dudmuck 21:b84a77dfb43c 2104 tx_cnt++;
dudmuck 21:b84a77dfb43c 2105 printf("payload:%02x\r\n", tx_cnt);
dudmuck 21:b84a77dfb43c 2106
dudmuck 21:b84a77dfb43c 2107 for (i = 0; i < lora.RegPayloadLength; i++)
dudmuck 21:b84a77dfb43c 2108 radio.tx_buf[i] = tx_cnt;
dudmuck 21:b84a77dfb43c 2109 }
dudmuck 21:b84a77dfb43c 2110
dudmuck 18:9530d682fd9a 2111 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2112 } else { // FSK:
dudmuck 21:b84a77dfb43c 2113
dudmuck 21:b84a77dfb43c 2114 /* always variable-length format */
dudmuck 21:b84a77dfb43c 2115 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 21:b84a77dfb43c 2116 if (!fsk.RegPktConfig1.bits.PacketFormatVariable) {
dudmuck 21:b84a77dfb43c 2117 printf("fsk fixed->variable\r\n");
dudmuck 21:b84a77dfb43c 2118 fsk.RegPktConfig1.bits.PacketFormatVariable = 1;
dudmuck 21:b84a77dfb43c 2119 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 21:b84a77dfb43c 2120 }
dudmuck 21:b84a77dfb43c 2121
dudmuck 18:9530d682fd9a 2122 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2123 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2124 fsk_tx_length = i;
dudmuck 18:9530d682fd9a 2125 }
dudmuck 18:9530d682fd9a 2126 if (ook_test_en) {
dudmuck 18:9530d682fd9a 2127 ook_test_tx(fsk_tx_length);
dudmuck 18:9530d682fd9a 2128 } else {
dudmuck 18:9530d682fd9a 2129 if (radio.RegOpMode.bits.Mode != RF_OPMODE_TRANSMITTER) { // if not already busy transmitting
dudmuck 21:b84a77dfb43c 2130 if (pcbuf[idx] == 'A') {
dudmuck 21:b84a77dfb43c 2131 fsk_tx_length = sizeof(test_payload_A);
dudmuck 21:b84a77dfb43c 2132 memcpy(radio.tx_buf, test_payload_A, fsk_tx_length);
dudmuck 21:b84a77dfb43c 2133 } else if (pcbuf[idx] == 'B') {
dudmuck 21:b84a77dfb43c 2134 fsk_tx_length = sizeof(test_payload_B);
dudmuck 21:b84a77dfb43c 2135 memcpy(radio.tx_buf, test_payload_B, fsk_tx_length);
dudmuck 21:b84a77dfb43c 2136 } else if (pcbuf[idx] == 'C') {
dudmuck 21:b84a77dfb43c 2137 fsk_tx_length = sizeof(test_payload_C);
dudmuck 21:b84a77dfb43c 2138 memcpy(radio.tx_buf, test_payload_C, fsk_tx_length);
dudmuck 21:b84a77dfb43c 2139 } else {
dudmuck 21:b84a77dfb43c 2140 tx_cnt++;
dudmuck 21:b84a77dfb43c 2141 printf("payload:%02x\r\n", tx_cnt);
dudmuck 21:b84a77dfb43c 2142 for (i = 0; i < fsk_tx_length; i++) {
dudmuck 21:b84a77dfb43c 2143 radio.tx_buf[i] = tx_cnt;
dudmuck 21:b84a77dfb43c 2144 }
dudmuck 18:9530d682fd9a 2145 }
dudmuck 21:b84a77dfb43c 2146
dudmuck 18:9530d682fd9a 2147 fsk.start_tx(fsk_tx_length);
dudmuck 18:9530d682fd9a 2148 }
dudmuck 18:9530d682fd9a 2149 }
dudmuck 18:9530d682fd9a 2150 } // !LoRa
dudmuck 18:9530d682fd9a 2151
dudmuck 18:9530d682fd9a 2152 }
dudmuck 18:9530d682fd9a 2153
dudmuck 21:b84a77dfb43c 2154 volatile uint16_t long_byte_count, long_byte_count_at_full;
dudmuck 21:b84a77dfb43c 2155
dudmuck 21:b84a77dfb43c 2156 const uint8_t test_preamble_sync[] = {
dudmuck 21:b84a77dfb43c 2157 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0x33, 0xcb, 0x82
dudmuck 21:b84a77dfb43c 2158 };
dudmuck 21:b84a77dfb43c 2159
dudmuck 21:b84a77dfb43c 2160 void _ulm_write_fifo(uint8_t len)
dudmuck 21:b84a77dfb43c 2161 {
dudmuck 21:b84a77dfb43c 2162 uint8_t i;
dudmuck 21:b84a77dfb43c 2163
dudmuck 21:b84a77dfb43c 2164 //dio2 is FifoFull
dudmuck 21:b84a77dfb43c 2165 radio.m_cs = 0;
dudmuck 21:b84a77dfb43c 2166 radio.m_spi.write(REG_FIFO | 0x80); // bit7 is high for writing to radio
dudmuck 21:b84a77dfb43c 2167
dudmuck 21:b84a77dfb43c 2168 for (i = 0; i < len; ) {
dudmuck 21:b84a77dfb43c 2169 //printf("_%02x\r\n", radio.tx_buf[i]);
dudmuck 21:b84a77dfb43c 2170 radio.m_spi.write(radio.tx_buf[i++]);
dudmuck 21:b84a77dfb43c 2171 long_byte_count++;
dudmuck 21:b84a77dfb43c 2172 if (dio2) {
dudmuck 21:b84a77dfb43c 2173 long_byte_count_at_full = long_byte_count;
dudmuck 21:b84a77dfb43c 2174 while (radio.dio1)
dudmuck 21:b84a77dfb43c 2175 ;
dudmuck 21:b84a77dfb43c 2176 }
dudmuck 21:b84a77dfb43c 2177 }
dudmuck 21:b84a77dfb43c 2178 radio.m_cs = 1;
dudmuck 21:b84a77dfb43c 2179 }
dudmuck 21:b84a77dfb43c 2180
dudmuck 21:b84a77dfb43c 2181 int write_buf_to_fifo(const uint8_t* send_buf, uint8_t target_length)
dudmuck 21:b84a77dfb43c 2182 {
dudmuck 21:b84a77dfb43c 2183 /* block until all is written */
dudmuck 21:b84a77dfb43c 2184 uint8_t total_sent = 0;
dudmuck 21:b84a77dfb43c 2185
dudmuck 21:b84a77dfb43c 2186 //printf("wbtf %u\r\n", target_length);
dudmuck 21:b84a77dfb43c 2187 while (target_length > total_sent) {
dudmuck 21:b84a77dfb43c 2188 uint8_t this_length = target_length - total_sent;
dudmuck 21:b84a77dfb43c 2189 memcpy(radio.tx_buf+total_sent, send_buf+total_sent, this_length);
dudmuck 21:b84a77dfb43c 2190 _ulm_write_fifo(this_length);
dudmuck 21:b84a77dfb43c 2191 total_sent += this_length;
dudmuck 21:b84a77dfb43c 2192 }
dudmuck 21:b84a77dfb43c 2193 return total_sent;
dudmuck 21:b84a77dfb43c 2194 }
dudmuck 21:b84a77dfb43c 2195
dudmuck 21:b84a77dfb43c 2196 #define TEST_PAYLOAD test_payload_C
dudmuck 21:b84a77dfb43c 2197 //#define TEST_PAYLOAD test_payload_A
dudmuck 21:b84a77dfb43c 2198 void cmd_long_tx(uint8_t idx)
dudmuck 21:b84a77dfb43c 2199 {
dudmuck 21:b84a77dfb43c 2200 unsigned int pkt_cnt = 0;
dudmuck 21:b84a77dfb43c 2201 bool first_pkt;
dudmuck 21:b84a77dfb43c 2202 /* transmit multipe packets without any time between packets (back to back) */
dudmuck 21:b84a77dfb43c 2203
dudmuck 21:b84a77dfb43c 2204 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 21:b84a77dfb43c 2205 sscanf(pcbuf+idx, "%u", &pkt_cnt);
dudmuck 21:b84a77dfb43c 2206 }
dudmuck 21:b84a77dfb43c 2207
dudmuck 21:b84a77dfb43c 2208 printf("tx %u pkts\r\n", pkt_cnt);
dudmuck 21:b84a77dfb43c 2209 if (pkt_cnt < 1)
dudmuck 21:b84a77dfb43c 2210 return;
dudmuck 21:b84a77dfb43c 2211
dudmuck 21:b84a77dfb43c 2212 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 21:b84a77dfb43c 2213 radio.RegDioMapping2.bits.Dio5Mapping = 2; // data output to observation
dudmuck 21:b84a77dfb43c 2214 radio.RegDioMapping2.bits.Dio4Mapping = 3; // output preamble detect indication
dudmuck 21:b84a77dfb43c 2215 radio.RegDioMapping2.bits.MapPreambleDetect = 1;
dudmuck 21:b84a77dfb43c 2216 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 21:b84a77dfb43c 2217
dudmuck 21:b84a77dfb43c 2218 //unlimited packet length mode
dudmuck 21:b84a77dfb43c 2219 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 21:b84a77dfb43c 2220 fsk.RegPktConfig1.bits.PacketFormatVariable = 0; // fixed length format
dudmuck 21:b84a77dfb43c 2221 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 21:b84a77dfb43c 2222
dudmuck 21:b84a77dfb43c 2223 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 21:b84a77dfb43c 2224 fsk.RegPktConfig2.bits.PayloadLength = 0;
dudmuck 21:b84a77dfb43c 2225 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 21:b84a77dfb43c 2226 //DIO3 to FifoEmpty (for end of tx)
dudmuck 21:b84a77dfb43c 2227 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 21:b84a77dfb43c 2228 radio.RegDioMapping1.bits.Dio3Mapping = 0; // FifoEmpty
dudmuck 21:b84a77dfb43c 2229 //DIO2 to FifoFull
dudmuck 21:b84a77dfb43c 2230 radio.RegDioMapping1.bits.Dio2Mapping = 0; // FIfoFull
dudmuck 21:b84a77dfb43c 2231 //DIO1 to FifoLevel
dudmuck 21:b84a77dfb43c 2232 radio.RegDioMapping1.bits.Dio1Mapping = 0; // FifoLevel
dudmuck 21:b84a77dfb43c 2233 radio.RegDioMapping1.bits.Dio0Mapping = 0; // PacketSent
dudmuck 21:b84a77dfb43c 2234 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 21:b84a77dfb43c 2235 //FifoThreshold to approx 1/5th full
dudmuck 21:b84a77dfb43c 2236 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 21:b84a77dfb43c 2237 fsk.RegFifoThreshold.bits.FifoThreshold = sizeof(TEST_PAYLOAD)-1; // allow single packet
dudmuck 21:b84a77dfb43c 2238 // tx start condition to FifoLevel
dudmuck 21:b84a77dfb43c 2239 fsk.RegFifoThreshold.bits.TxStartCondition = 0; // start on FifoLevel
dudmuck 21:b84a77dfb43c 2240 radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet);
dudmuck 21:b84a77dfb43c 2241
dudmuck 21:b84a77dfb43c 2242 long_byte_count = 0;
dudmuck 21:b84a77dfb43c 2243 long_byte_count_at_full = 0xffff;
dudmuck 21:b84a77dfb43c 2244
dudmuck 21:b84a77dfb43c 2245 radio.set_opmode(RF_OPMODE_TRANSMITTER);
dudmuck 21:b84a77dfb43c 2246 first_pkt = true; // preamble+sync sent by packet engine only for first packet
dudmuck 21:b84a77dfb43c 2247 for (; pkt_cnt > 0; pkt_cnt--) {
dudmuck 21:b84a77dfb43c 2248 uint8_t len;
dudmuck 21:b84a77dfb43c 2249 if (first_pkt)
dudmuck 21:b84a77dfb43c 2250 first_pkt = false;
dudmuck 21:b84a77dfb43c 2251 else {
dudmuck 21:b84a77dfb43c 2252 if (dio3) {
dudmuck 21:b84a77dfb43c 2253 printf("fail-empty\r\n");
dudmuck 21:b84a77dfb43c 2254 }
dudmuck 21:b84a77dfb43c 2255 write_buf_to_fifo(test_preamble_sync, sizeof(test_preamble_sync));
dudmuck 21:b84a77dfb43c 2256 }
dudmuck 21:b84a77dfb43c 2257
dudmuck 21:b84a77dfb43c 2258 len = sizeof(TEST_PAYLOAD); //TEST_PAYLOAD doesnt start with length
dudmuck 21:b84a77dfb43c 2259 write_buf_to_fifo(&len, 1);
dudmuck 21:b84a77dfb43c 2260 write_buf_to_fifo(TEST_PAYLOAD, sizeof(TEST_PAYLOAD));
dudmuck 21:b84a77dfb43c 2261 } // ..
dudmuck 21:b84a77dfb43c 2262
dudmuck 21:b84a77dfb43c 2263 rx_start_timer.reset();
dudmuck 21:b84a77dfb43c 2264 rx_start_timer.start();
dudmuck 21:b84a77dfb43c 2265 while (!dio3) {
dudmuck 21:b84a77dfb43c 2266 if (rx_start_timer.read() > 1) {
dudmuck 21:b84a77dfb43c 2267 printf("fifoEmpty fail\r\n");
dudmuck 21:b84a77dfb43c 2268 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 21:b84a77dfb43c 2269 return;
dudmuck 21:b84a77dfb43c 2270 }
dudmuck 21:b84a77dfb43c 2271 }
dudmuck 21:b84a77dfb43c 2272
dudmuck 21:b84a77dfb43c 2273 rx_start_timer.reset();
dudmuck 21:b84a77dfb43c 2274 rx_start_timer.start();
dudmuck 21:b84a77dfb43c 2275 while (!radio.dio0) {
dudmuck 21:b84a77dfb43c 2276 if (rx_start_timer.read() > 3) {
dudmuck 21:b84a77dfb43c 2277 printf("PacketSent fail\r\n");
dudmuck 21:b84a77dfb43c 2278 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 21:b84a77dfb43c 2279 return;
dudmuck 21:b84a77dfb43c 2280 }
dudmuck 21:b84a77dfb43c 2281 }
dudmuck 21:b84a77dfb43c 2282 wait_us(100);
dudmuck 21:b84a77dfb43c 2283 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 21:b84a77dfb43c 2284 printf("done ok %u, %u\r\n", long_byte_count, long_byte_count_at_full);
dudmuck 21:b84a77dfb43c 2285
dudmuck 21:b84a77dfb43c 2286 }
dudmuck 21:b84a77dfb43c 2287
dudmuck 18:9530d682fd9a 2288 void cmd_hw_reset(uint8_t idx)
dudmuck 18:9530d682fd9a 2289 {
dudmuck 18:9530d682fd9a 2290 printf("hw_reset()\r\n");
dudmuck 18:9530d682fd9a 2291 radio.hw_reset();
dudmuck 18:9530d682fd9a 2292 ook_test_en = false;
dudmuck 18:9530d682fd9a 2293 poll_irq_en = false;
dudmuck 18:9530d682fd9a 2294 }
dudmuck 18:9530d682fd9a 2295
dudmuck 18:9530d682fd9a 2296 void cmd_read_all_regs(uint8_t idx)
dudmuck 18:9530d682fd9a 2297 {
dudmuck 18:9530d682fd9a 2298 uint8_t a, d;
dudmuck 18:9530d682fd9a 2299
dudmuck 18:9530d682fd9a 2300 // read all registers
dudmuck 18:9530d682fd9a 2301 for (a = 1; a < 0x71; a++) {
dudmuck 18:9530d682fd9a 2302 d = radio.read_reg(a);
dudmuck 18:9530d682fd9a 2303 printf("%02x: %02x\r\n", a, d);
dudmuck 18:9530d682fd9a 2304 }
dudmuck 18:9530d682fd9a 2305 }
dudmuck 18:9530d682fd9a 2306
dudmuck 18:9530d682fd9a 2307 void cmd_read_current_rssi(uint8_t idx)
dudmuck 18:9530d682fd9a 2308 {
dudmuck 18:9530d682fd9a 2309 if (radio.RegOpMode.bits.Mode != RF_OPMODE_RECEIVER) {
dudmuck 18:9530d682fd9a 2310 radio.set_opmode(RF_OPMODE_RECEIVER);
dudmuck 18:9530d682fd9a 2311 wait_us(10000);
dudmuck 18:9530d682fd9a 2312 }
dudmuck 18:9530d682fd9a 2313 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2314 printf("rssi:%ddBm\r\n", lora.get_current_rssi());
dudmuck 18:9530d682fd9a 2315 else
dudmuck 18:9530d682fd9a 2316 printf("rssi:-%.1f\r\n", radio.read_reg(REG_FSK_RSSIVALUE) / 2.0);
dudmuck 18:9530d682fd9a 2317 }
dudmuck 18:9530d682fd9a 2318
dudmuck 21:b84a77dfb43c 2319 void cmd_rssi_polling(uint8_t idx)
dudmuck 21:b84a77dfb43c 2320 {
dudmuck 21:b84a77dfb43c 2321 if ((pcbuf[idx] >= '0' && pcbuf[idx] <= '9') || pcbuf[idx] == '-') {
dudmuck 21:b84a77dfb43c 2322 sscanf(pcbuf+idx, "%d", &rssi_polling_thresh);
dudmuck 21:b84a77dfb43c 2323 }
dudmuck 21:b84a77dfb43c 2324 printf("rssi_polling_thresh:%d\r\n", rssi_polling_thresh);
dudmuck 21:b84a77dfb43c 2325 }
dudmuck 21:b84a77dfb43c 2326
dudmuck 18:9530d682fd9a 2327 void cmd_lora_continuous_tx(uint8_t idx)
dudmuck 18:9530d682fd9a 2328 {
dudmuck 18:9530d682fd9a 2329 /* TxContinuousMode same for sx1272 and sx1276 */
dudmuck 18:9530d682fd9a 2330 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 2331 lora.RegModemConfig2.sx1276bits.TxContinuousMode ^= 1;
dudmuck 18:9530d682fd9a 2332 radio.write_reg(REG_LR_MODEMCONFIG2, lora.RegModemConfig2.octet);
dudmuck 18:9530d682fd9a 2333 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 13:c73caaee93a5 2334
dudmuck 18:9530d682fd9a 2335 lora_printTxContinuousMode();
dudmuck 18:9530d682fd9a 2336 printf("\r\n");
dudmuck 18:9530d682fd9a 2337 }
dudmuck 18:9530d682fd9a 2338
dudmuck 18:9530d682fd9a 2339 void cmd_fsk_test_case(uint8_t idx)
dudmuck 18:9530d682fd9a 2340 {
dudmuck 18:9530d682fd9a 2341 if (pcbuf[idx] < '0' || pcbuf[idx] > '9') {
dudmuck 19:be8a8b0e7320 2342 printf("%" PRIu32 "bps fdev:%" PRIu32 "hz ", fsk.get_bitrate(), fsk.get_tx_fdev_hz());
dudmuck 19:be8a8b0e7320 2343 printf("rxbw:%" PRIu32 "Hz ", fsk.get_rx_bw_hz(REG_FSK_RXBW));
dudmuck 19:be8a8b0e7320 2344 printf("afcbw:%" PRIu32 "Hz preambleLen:%" PRIu16 "\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW), radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 18:9530d682fd9a 2345 } else {
dudmuck 18:9530d682fd9a 2346 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 2347 per_tx_delay = 0.3;
dudmuck 18:9530d682fd9a 2348
dudmuck 18:9530d682fd9a 2349 if (radio.read_reg(REG_FSK_SYNCVALUE1) == 0x55 && radio.read_reg(REG_FSK_SYNCVALUE2)) {
dudmuck 18:9530d682fd9a 2350 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 2351 fsk.RegSyncConfig.bits.SyncSize = 2;
dudmuck 18:9530d682fd9a 2352 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2353 radio.write_reg(REG_FSK_SYNCVALUE3, 0x90);
dudmuck 18:9530d682fd9a 2354 radio.write_reg(REG_FSK_SYNCVALUE2, 0x4e);
dudmuck 18:9530d682fd9a 2355 radio.write_reg(REG_FSK_SYNCVALUE1, 0x63);
dudmuck 18:9530d682fd9a 2356 }
dudmuck 18:9530d682fd9a 2357
dudmuck 18:9530d682fd9a 2358 fsk.RegPreambleDetect.octet = radio.read_reg(REG_FSK_PREAMBLEDETECT);
dudmuck 18:9530d682fd9a 2359 fsk.RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 18:9530d682fd9a 2360 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 2361
dudmuck 18:9530d682fd9a 2362 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 18:9530d682fd9a 2363 fsk.RegRxConfig.bits.AfcAutoOn = 1;
dudmuck 18:9530d682fd9a 2364 fsk.RegRxConfig.bits.AgcAutoOn = 1;
dudmuck 20:b11592c9ba5f 2365 fsk.RegRxConfig.bits.RxTrigger = 7; // both
dudmuck 18:9530d682fd9a 2366 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2367
dudmuck 18:9530d682fd9a 2368 fsk.RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 18:9530d682fd9a 2369 fsk.RegPreambleDetect.bits.PreambleDetectorSize = 1;
dudmuck 18:9530d682fd9a 2370 fsk.RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 18:9530d682fd9a 2371 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 2372
dudmuck 18:9530d682fd9a 2373 switch (pcbuf[idx]) {
dudmuck 18:9530d682fd9a 2374 case '0':
dudmuck 18:9530d682fd9a 2375 fsk.set_bitrate(4800);
dudmuck 18:9530d682fd9a 2376 fsk.set_tx_fdev_hz(5005);
dudmuck 18:9530d682fd9a 2377 fsk.set_rx_dcc_bw_hz(10417, 0); // rxbw
dudmuck 18:9530d682fd9a 2378 fsk.set_rx_dcc_bw_hz(50000, 1); // afcbw
dudmuck 18:9530d682fd9a 2379 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 2380 break;
dudmuck 18:9530d682fd9a 2381 case '1':
dudmuck 18:9530d682fd9a 2382 fsk.set_bitrate(50000);
dudmuck 18:9530d682fd9a 2383 fsk.set_tx_fdev_hz(25000);
dudmuck 18:9530d682fd9a 2384 fsk.set_rx_dcc_bw_hz(62500, 0); // rxbw
dudmuck 18:9530d682fd9a 2385 fsk.set_rx_dcc_bw_hz(100000, 1); // afcbw
dudmuck 18:9530d682fd9a 2386 radio.write_u16(REG_FSK_PREAMBLEMSB, 9);
dudmuck 18:9530d682fd9a 2387 break;
dudmuck 18:9530d682fd9a 2388 case '2':
dudmuck 18:9530d682fd9a 2389 fsk.set_bitrate(38400);
dudmuck 18:9530d682fd9a 2390 fsk.set_tx_fdev_hz(20020);
dudmuck 18:9530d682fd9a 2391 fsk.set_rx_dcc_bw_hz(50000, 0); // rxbw
dudmuck 18:9530d682fd9a 2392 fsk.set_rx_dcc_bw_hz(100000, 1); // afcbw
dudmuck 18:9530d682fd9a 2393 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 2394 break;
dudmuck 18:9530d682fd9a 2395 case '3':
dudmuck 18:9530d682fd9a 2396 fsk.set_bitrate(1201);
dudmuck 18:9530d682fd9a 2397 fsk.set_tx_fdev_hz(20020);
dudmuck 18:9530d682fd9a 2398 fsk.set_rx_dcc_bw_hz(25000, 0); // rxbw
dudmuck 18:9530d682fd9a 2399 fsk.set_rx_dcc_bw_hz(50000, 1); // afcbw
dudmuck 18:9530d682fd9a 2400 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 2401 break;
dudmuck 18:9530d682fd9a 2402 case '4':
dudmuck 18:9530d682fd9a 2403 fsk.set_bitrate(1201);
dudmuck 18:9530d682fd9a 2404 fsk.set_tx_fdev_hz(4028);
dudmuck 18:9530d682fd9a 2405 fsk.set_rx_dcc_bw_hz(7813, 0); // rxbw
dudmuck 18:9530d682fd9a 2406 fsk.set_rx_dcc_bw_hz(25000, 1); // afcbw
dudmuck 18:9530d682fd9a 2407 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 18:9530d682fd9a 2408 break;
dudmuck 18:9530d682fd9a 2409 case '5':
dudmuck 18:9530d682fd9a 2410 fsk.set_bitrate(1201);
dudmuck 18:9530d682fd9a 2411 fsk.set_tx_fdev_hz(4028);
dudmuck 18:9530d682fd9a 2412 fsk.set_rx_dcc_bw_hz(5208, 0); // rxbw
dudmuck 18:9530d682fd9a 2413 fsk.set_rx_dcc_bw_hz(10417, 1); // afcbw
dudmuck 18:9530d682fd9a 2414 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 20:b11592c9ba5f 2415 break;
dudmuck 20:b11592c9ba5f 2416 case '6':
dudmuck 20:b11592c9ba5f 2417 fsk.set_bitrate(65536);
dudmuck 20:b11592c9ba5f 2418 fsk.set_tx_fdev_hz(16384);
dudmuck 20:b11592c9ba5f 2419 fsk.set_rx_dcc_bw_hz(62500, 0); // rxbw
dudmuck 20:b11592c9ba5f 2420 fsk.set_rx_dcc_bw_hz(100000, 1); // afcbw
dudmuck 21:b84a77dfb43c 2421
dudmuck 21:b84a77dfb43c 2422 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 21:b84a77dfb43c 2423 fsk.RegPktConfig1.bits.CrcOn = 0;
dudmuck 21:b84a77dfb43c 2424 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 21:b84a77dfb43c 2425
dudmuck 20:b11592c9ba5f 2426 radio.write_u16(REG_FSK_PREAMBLEMSB, 5);
dudmuck 20:b11592c9ba5f 2427 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 20:b11592c9ba5f 2428 fsk.RegSyncConfig.bits.SyncSize = 2;
dudmuck 21:b84a77dfb43c 2429 fsk.RegSyncConfig.bits.SyncOn = 1;
dudmuck 20:b11592c9ba5f 2430 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 21:b84a77dfb43c 2431 radio.write_reg(REG_FSK_SYNCVALUE1, 0x33);
dudmuck 20:b11592c9ba5f 2432 radio.write_reg(REG_FSK_SYNCVALUE2, 0xcb);
dudmuck 21:b84a77dfb43c 2433 radio.write_reg(REG_FSK_SYNCVALUE3, 0x82);
dudmuck 21:b84a77dfb43c 2434
dudmuck 21:b84a77dfb43c 2435 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 21:b84a77dfb43c 2436 radio.RegOpMode.bits.ModulationType = 0; // 0 = FSK
dudmuck 21:b84a77dfb43c 2437 radio.RegOpMode.bits.ModulationShaping = 2; // 2=BT0.5
dudmuck 21:b84a77dfb43c 2438 radio.write_reg(REG_OPMODE, radio.RegOpMode.octet);
dudmuck 21:b84a77dfb43c 2439
dudmuck 21:b84a77dfb43c 2440 fsk.RegAfcFei.octet = radio.read_reg(REG_FSK_AFCFEI);
dudmuck 21:b84a77dfb43c 2441 fsk.RegAfcFei.bits.AfcAutoClearOn = 0;
dudmuck 21:b84a77dfb43c 2442 radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet);
dudmuck 20:b11592c9ba5f 2443
dudmuck 20:b11592c9ba5f 2444 fsk.RegRxConfig.bits.RxTrigger = 6; // preamble
dudmuck 20:b11592c9ba5f 2445 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 20:b11592c9ba5f 2446 radio.RegDioMapping2.bits.Dio4Mapping = 3;
dudmuck 20:b11592c9ba5f 2447 radio.RegDioMapping2.bits.MapPreambleDetect = 1; // dio4 to preambleDetect in RX
dudmuck 20:b11592c9ba5f 2448 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 20:b11592c9ba5f 2449 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to SyncAddress in RX
dudmuck 20:b11592c9ba5f 2450 radio.RegDioMapping1.bits.Dio1Mapping = 1; // to FifoEmpty
dudmuck 20:b11592c9ba5f 2451 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 20:b11592c9ba5f 2452 break;
dudmuck 18:9530d682fd9a 2453 } // ...switch (pcbuf[idx])
dudmuck 19:be8a8b0e7320 2454 printf("%" PRIu32 "bps fdev:%" PRIu32 "hz ", fsk.get_bitrate(), fsk.get_tx_fdev_hz());
dudmuck 19:be8a8b0e7320 2455 printf("rxbw:%" PRIu32 "Hz ", fsk.get_rx_bw_hz(REG_FSK_RXBW));
dudmuck 20:b11592c9ba5f 2456 printf("afcbw:%" PRIu32 "Hz preambleLen:%" PRIu16 "\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW), radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 20:b11592c9ba5f 2457
dudmuck 20:b11592c9ba5f 2458 /* time between preamble occurring and syncAddress occuring
dudmuck 20:b11592c9ba5f 2459 * = bitrate in microseconds * 8 * (preamble bytes + sync bytes)
dudmuck 20:b11592c9ba5f 2460 */
dudmuck 20:b11592c9ba5f 2461 preamble_to_sync_us = (1.0 / fsk.get_bitrate())*1e6 * 8 * (radio.read_u16(REG_FSK_PREAMBLEMSB)+1 + fsk.RegSyncConfig.bits.SyncSize+2);
dudmuck 20:b11592c9ba5f 2462 //printf("bitrate:%d, %f\r\n", fsk.get_bitrate(), 1.0 / fsk.get_bitrate()*1e6);
dudmuck 20:b11592c9ba5f 2463 printf("preamble_to_sync_us:%d\r\n", preamble_to_sync_us);
dudmuck 18:9530d682fd9a 2464 }
dudmuck 18:9530d682fd9a 2465 }
dudmuck 18:9530d682fd9a 2466
dudmuck 20:b11592c9ba5f 2467 void cmd_restart_rx(uint8_t idx)
dudmuck 20:b11592c9ba5f 2468 {
dudmuck 20:b11592c9ba5f 2469 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 20:b11592c9ba5f 2470 fsk.RegRxConfig.bits.RestartRxWithoutPllLock = 1;
dudmuck 20:b11592c9ba5f 2471 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 20:b11592c9ba5f 2472 rx_start_timer.reset();
dudmuck 20:b11592c9ba5f 2473 secs_rx_start = time(NULL);
dudmuck 20:b11592c9ba5f 2474 fsk.RegRxConfig.bits.RestartRxWithoutPllLock = 0;
dudmuck 20:b11592c9ba5f 2475 printf("RestartRxWithoutPllLock\r\n");
dudmuck 20:b11592c9ba5f 2476 }
dudmuck 20:b11592c9ba5f 2477
dudmuck 18:9530d682fd9a 2478 void cmd_toggle_modem(uint8_t idx)
dudmuck 18:9530d682fd9a 2479 {
dudmuck 18:9530d682fd9a 2480 ook_test_en = false;
dudmuck 18:9530d682fd9a 2481 poll_irq_en = false;
dudmuck 18:9530d682fd9a 2482 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2483 fsk.enable(false);
dudmuck 18:9530d682fd9a 2484 else
dudmuck 18:9530d682fd9a 2485 lora.enable();
dudmuck 18:9530d682fd9a 2486
dudmuck 18:9530d682fd9a 2487 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 18:9530d682fd9a 2488 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2489 printf("LoRa\r\n");
dudmuck 18:9530d682fd9a 2490 else
dudmuck 18:9530d682fd9a 2491 printf("FSK\r\n");
dudmuck 18:9530d682fd9a 2492 }
dudmuck 18:9530d682fd9a 2493
dudmuck 18:9530d682fd9a 2494 void cmd_empty_fifo(uint8_t idx)
dudmuck 18:9530d682fd9a 2495 {
dudmuck 18:9530d682fd9a 2496 RegIrqFlags2_t RegIrqFlags2;
dudmuck 18:9530d682fd9a 2497 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 18:9530d682fd9a 2498 while (!RegIrqFlags2.bits.FifoEmpty) {
dudmuck 18:9530d682fd9a 2499 if (pc.readable())
dudmuck 18:9530d682fd9a 2500 break;
dudmuck 18:9530d682fd9a 2501 printf("%02x\r\n", radio.read_reg(REG_FIFO));
dudmuck 18:9530d682fd9a 2502 RegIrqFlags2.octet = radio.read_reg(REG_FSK_IRQFLAGS2);
dudmuck 18:9530d682fd9a 2503 }
dudmuck 18:9530d682fd9a 2504 }
dudmuck 18:9530d682fd9a 2505
dudmuck 18:9530d682fd9a 2506 void cmd_print_status(uint8_t idx)
dudmuck 18:9530d682fd9a 2507 {
dudmuck 18:9530d682fd9a 2508 if (radio.type == SX1276) {
dudmuck 22:2005df80c8a8 2509 #if defined(TARGET_MTS_MDOT_F411RE) || defined(TYPE_ABZ)
dudmuck 18:9530d682fd9a 2510 printf("\r\nSX1276 ");
dudmuck 18:9530d682fd9a 2511 #else
dudmuck 18:9530d682fd9a 2512 if (shield_type == SHIELD_TYPE_LAS)
dudmuck 18:9530d682fd9a 2513 printf("\r\nSX1276LAS ");
dudmuck 18:9530d682fd9a 2514 if (shield_type == SHIELD_TYPE_MAS)
dudmuck 18:9530d682fd9a 2515 printf("\r\nSX1276MAS ");
dudmuck 18:9530d682fd9a 2516 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 18:9530d682fd9a 2517 } else if (radio.type == SX1272)
dudmuck 18:9530d682fd9a 2518 printf("\r\nSX1272 ");
dudmuck 18:9530d682fd9a 2519
dudmuck 18:9530d682fd9a 2520 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 18:9530d682fd9a 2521 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2522 lora_print_status();
dudmuck 18:9530d682fd9a 2523 else
dudmuck 18:9530d682fd9a 2524 fsk_print_status();
dudmuck 18:9530d682fd9a 2525 common_print_status();
dudmuck 18:9530d682fd9a 2526 }
dudmuck 18:9530d682fd9a 2527
dudmuck 18:9530d682fd9a 2528 void cmd_hop_period(uint8_t idx)
dudmuck 18:9530d682fd9a 2529 {
dudmuck 18:9530d682fd9a 2530 int i;
dudmuck 18:9530d682fd9a 2531 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2532 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2533 lora.RegHopPeriod = i;
dudmuck 18:9530d682fd9a 2534 radio.write_reg(REG_LR_HOPPERIOD, lora.RegHopPeriod);
dudmuck 18:9530d682fd9a 2535 if (radio.RegDioMapping1.bits.Dio1Mapping != 1) {
dudmuck 18:9530d682fd9a 2536 radio.RegDioMapping1.bits.Dio1Mapping = 1;
dudmuck 18:9530d682fd9a 2537 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2538 }
dudmuck 18:9530d682fd9a 2539 }
dudmuck 18:9530d682fd9a 2540 lora.RegHopPeriod = radio.read_reg(REG_LR_HOPPERIOD);
dudmuck 18:9530d682fd9a 2541 printf("HopPeriod:0x%02x\r\n", lora.RegHopPeriod);
dudmuck 18:9530d682fd9a 2542 }
dudmuck 18:9530d682fd9a 2543
dudmuck 18:9530d682fd9a 2544 void cmd_lora_ppg(uint8_t idx)
dudmuck 18:9530d682fd9a 2545 {
dudmuck 18:9530d682fd9a 2546 int i;
dudmuck 18:9530d682fd9a 2547 if (pcbuf[idx] != 0) {
dudmuck 18:9530d682fd9a 2548 sscanf(pcbuf+idx, "%x", &i);
dudmuck 18:9530d682fd9a 2549 radio.write_reg(REG_LR_SYNC_BYTE, i);
dudmuck 18:9530d682fd9a 2550 }
dudmuck 18:9530d682fd9a 2551 printf("lora sync:0x%02x\r\n", radio.read_reg(REG_LR_SYNC_BYTE));
dudmuck 18:9530d682fd9a 2552 }
dudmuck 18:9530d682fd9a 2553
dudmuck 18:9530d682fd9a 2554 void cmd_rssi_offset(uint8_t idx)
dudmuck 18:9530d682fd9a 2555 {
dudmuck 18:9530d682fd9a 2556 int i;
dudmuck 18:9530d682fd9a 2557 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2558 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2559 fsk.RegRssiConfig.bits.RssiOffset = i;
dudmuck 18:9530d682fd9a 2560 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 2561 }
dudmuck 18:9530d682fd9a 2562 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 2563 printf("RssiOffset:%d\r\n", fsk.RegRssiConfig.bits.RssiOffset);
dudmuck 18:9530d682fd9a 2564 }
dudmuck 18:9530d682fd9a 2565
dudmuck 18:9530d682fd9a 2566 void cmd_rssi_smoothing(uint8_t idx)
dudmuck 18:9530d682fd9a 2567 {
dudmuck 18:9530d682fd9a 2568 int i;
dudmuck 18:9530d682fd9a 2569 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2570 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2571 fsk.RegRssiConfig.bits.RssiSmoothing = i;
dudmuck 18:9530d682fd9a 2572 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 2573 }
dudmuck 18:9530d682fd9a 2574 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 2575 printf("RssiSmoothing:%d\r\n", fsk.RegRssiConfig.bits.RssiSmoothing);
dudmuck 18:9530d682fd9a 2576 }
dudmuck 18:9530d682fd9a 2577
dudmuck 18:9530d682fd9a 2578 void cmd_rssi_threshold(uint8_t idx)
dudmuck 18:9530d682fd9a 2579 {
dudmuck 19:be8a8b0e7320 2580 if ((pcbuf[idx] >= '0' && pcbuf[idx] <= '9') || pcbuf[idx] == '-') {
dudmuck 18:9530d682fd9a 2581 float dbm;
dudmuck 18:9530d682fd9a 2582 sscanf(pcbuf+idx, "%f", &dbm);
dudmuck 18:9530d682fd9a 2583 dbm *= (float)2.0;
dudmuck 18:9530d682fd9a 2584 fsk.RegRssiThresh = (int)fabs(dbm);
dudmuck 18:9530d682fd9a 2585 radio.write_reg(REG_FSK_RSSITHRESH, fsk.RegRssiThresh);
dudmuck 18:9530d682fd9a 2586 }
dudmuck 18:9530d682fd9a 2587 fsk.RegRssiThresh = radio.read_reg(REG_FSK_RSSITHRESH);
dudmuck 18:9530d682fd9a 2588 printf("rssiThreshold:-%.1f\r\n", fsk.RegRssiThresh / 2.0);
dudmuck 18:9530d682fd9a 2589 }
dudmuck 18:9530d682fd9a 2590
dudmuck 18:9530d682fd9a 2591 void cmd_rx_trigger(uint8_t idx)
dudmuck 18:9530d682fd9a 2592 {
dudmuck 18:9530d682fd9a 2593 printf("RxTrigger:");
dudmuck 18:9530d682fd9a 2594 switch (fsk.RegRxConfig.bits.RxTrigger) {
dudmuck 18:9530d682fd9a 2595 case 0: fsk.RegRxConfig.bits.RxTrigger = 1;
dudmuck 18:9530d682fd9a 2596 printf("rssi\r\n");
dudmuck 18:9530d682fd9a 2597 break;
dudmuck 18:9530d682fd9a 2598 case 1: fsk.RegRxConfig.bits.RxTrigger = 6;
dudmuck 18:9530d682fd9a 2599 printf("preamble\r\n");
dudmuck 18:9530d682fd9a 2600 break;
dudmuck 18:9530d682fd9a 2601 case 6: fsk.RegRxConfig.bits.RxTrigger = 7;
dudmuck 18:9530d682fd9a 2602 printf("both\r\n");
dudmuck 18:9530d682fd9a 2603 break;
dudmuck 18:9530d682fd9a 2604 case 7: fsk.RegRxConfig.bits.RxTrigger = 0;
dudmuck 18:9530d682fd9a 2605 printf("none\r\n");
dudmuck 18:9530d682fd9a 2606 break;
dudmuck 18:9530d682fd9a 2607 default: fsk.RegRxConfig.bits.RxTrigger = 0;
dudmuck 18:9530d682fd9a 2608 printf("none\r\n");
dudmuck 18:9530d682fd9a 2609 break;
dudmuck 18:9530d682fd9a 2610 }
dudmuck 18:9530d682fd9a 2611 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2612 }
dudmuck 18:9530d682fd9a 2613
dudmuck 18:9530d682fd9a 2614 void cmd_cadper(uint8_t idx)
dudmuck 18:9530d682fd9a 2615 {
dudmuck 18:9530d682fd9a 2616 set_per_en(true);
dudmuck 18:9530d682fd9a 2617
dudmuck 18:9530d682fd9a 2618 PacketNormalCnt = 0;
dudmuck 20:b11592c9ba5f 2619 PacketRxSequencePrev = 0; // transmitter side PacketTxCnt is 1 at first TX
dudmuck 18:9530d682fd9a 2620 PacketPerKoCnt = 0;
dudmuck 18:9530d682fd9a 2621 PacketPerOkCnt = 0;
dudmuck 18:9530d682fd9a 2622
dudmuck 18:9530d682fd9a 2623 cadper_enable = true;
dudmuck 18:9530d682fd9a 2624
dudmuck 18:9530d682fd9a 2625 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2626 /* clear any stale flag */
dudmuck 18:9530d682fd9a 2627 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2628
dudmuck 18:9530d682fd9a 2629 /* start first CAD */
dudmuck 18:9530d682fd9a 2630 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 2631 num_cads = 0;
dudmuck 18:9530d682fd9a 2632 }
dudmuck 18:9530d682fd9a 2633
dudmuck 18:9530d682fd9a 2634 #if 0
dudmuck 18:9530d682fd9a 2635 void cmd_cadrx(uint8_t idx)
dudmuck 18:9530d682fd9a 2636 {
dudmuck 18:9530d682fd9a 2637 int n_tries = 1;
dudmuck 18:9530d682fd9a 2638 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2639 /* clear any stale flag */
dudmuck 18:9530d682fd9a 2640 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2641
dudmuck 18:9530d682fd9a 2642 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2643 sscanf(pcbuf+idx, "%d", &n_tries);
dudmuck 18:9530d682fd9a 2644 }
dudmuck 18:9530d682fd9a 2645
dudmuck 18:9530d682fd9a 2646 while (n_tries > 0) {
dudmuck 18:9530d682fd9a 2647 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 2648
dudmuck 18:9530d682fd9a 2649 do {
dudmuck 18:9530d682fd9a 2650 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2651 } while (!lora.RegIrqFlags.bits.CadDetected && !lora.RegIrqFlags.bits.CadDone);
dudmuck 18:9530d682fd9a 2652 if (lora.RegIrqFlags.bits.CadDetected) {
dudmuck 18:9530d682fd9a 2653 lora.start_rx(RF_OPMODE_RECEIVER_SINGLE);
dudmuck 18:9530d682fd9a 2654 n_tries = 1; // end
dudmuck 18:9530d682fd9a 2655 printf("CadDetected ");
dudmuck 18:9530d682fd9a 2656 }
dudmuck 18:9530d682fd9a 2657 if (lora.RegIrqFlags.bits.CadDone) {
dudmuck 18:9530d682fd9a 2658 printf("CadDone ");
dudmuck 18:9530d682fd9a 2659 }
dudmuck 18:9530d682fd9a 2660
dudmuck 18:9530d682fd9a 2661 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2662 printf("\r\n");
dudmuck 18:9530d682fd9a 2663 n_tries--;
dudmuck 18:9530d682fd9a 2664 }
dudmuck 18:9530d682fd9a 2665 }
dudmuck 18:9530d682fd9a 2666 #endif /* #if 0 */
dudmuck 18:9530d682fd9a 2667
dudmuck 18:9530d682fd9a 2668 void cmd_cad(uint8_t idx)
dudmuck 18:9530d682fd9a 2669 {
dudmuck 18:9530d682fd9a 2670 int n_tries = 1;
dudmuck 18:9530d682fd9a 2671 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2672 /* clear any stale flag */
dudmuck 18:9530d682fd9a 2673 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2674
dudmuck 18:9530d682fd9a 2675 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2676 sscanf(pcbuf+idx, "%d", &n_tries);
dudmuck 18:9530d682fd9a 2677 }
dudmuck 18:9530d682fd9a 2678
dudmuck 18:9530d682fd9a 2679 while (n_tries > 0) {
dudmuck 18:9530d682fd9a 2680 radio.set_opmode(RF_OPMODE_CAD);
dudmuck 18:9530d682fd9a 2681
dudmuck 18:9530d682fd9a 2682 do {
dudmuck 18:9530d682fd9a 2683 lora.RegIrqFlags.octet = radio.read_reg(REG_LR_IRQFLAGS);
dudmuck 18:9530d682fd9a 2684 } while (!lora.RegIrqFlags.bits.CadDetected && !lora.RegIrqFlags.bits.CadDone);
dudmuck 18:9530d682fd9a 2685 if (lora.RegIrqFlags.bits.CadDetected) {
dudmuck 18:9530d682fd9a 2686 n_tries = 1; // end
dudmuck 18:9530d682fd9a 2687 printf("CadDetected ");
dudmuck 18:9530d682fd9a 2688 }
dudmuck 18:9530d682fd9a 2689 if (lora.RegIrqFlags.bits.CadDone) {
dudmuck 18:9530d682fd9a 2690 if (n_tries == 1) // print on last try
dudmuck 18:9530d682fd9a 2691 printf("CadDone ");
dudmuck 18:9530d682fd9a 2692 }
dudmuck 18:9530d682fd9a 2693
dudmuck 18:9530d682fd9a 2694 radio.write_reg(REG_LR_IRQFLAGS, lora.RegIrqFlags.octet);
dudmuck 18:9530d682fd9a 2695 n_tries--;
dudmuck 18:9530d682fd9a 2696 }
dudmuck 18:9530d682fd9a 2697 printf("\r\n");
dudmuck 18:9530d682fd9a 2698 }
dudmuck 18:9530d682fd9a 2699
dudmuck 18:9530d682fd9a 2700 void cmd_rx_timeout(uint8_t idx)
dudmuck 18:9530d682fd9a 2701 {
dudmuck 18:9530d682fd9a 2702 int symb_timeout;
dudmuck 18:9530d682fd9a 2703 uint16_t reg_u16 = radio.read_u16(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 2704
dudmuck 18:9530d682fd9a 2705 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2706 sscanf(pcbuf+idx, "%d", &symb_timeout);
dudmuck 18:9530d682fd9a 2707 reg_u16 &= 0xfc00;
dudmuck 18:9530d682fd9a 2708 reg_u16 |= symb_timeout;
dudmuck 22:2005df80c8a8 2709 radio.write_u16(REG_LR_MODEMCONFIG2, reg_u16);
dudmuck 18:9530d682fd9a 2710 }
dudmuck 18:9530d682fd9a 2711 reg_u16 = radio.read_u16(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 2712 printf("SymbTimeout:%d\r\n", reg_u16 & 0x3ff);
dudmuck 18:9530d682fd9a 2713 }
dudmuck 18:9530d682fd9a 2714
dudmuck 18:9530d682fd9a 2715 void cmd_rx_single(uint8_t idx)
dudmuck 18:9530d682fd9a 2716 {
dudmuck 18:9530d682fd9a 2717 lora.start_rx(RF_OPMODE_RECEIVER_SINGLE);
dudmuck 18:9530d682fd9a 2718 }
dudmuck 18:9530d682fd9a 2719
dudmuck 21:b84a77dfb43c 2720 void preamble_without_sync()
dudmuck 21:b84a77dfb43c 2721 {
dudmuck 21:b84a77dfb43c 2722 printf("preamble_without_sync Afc:%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB)));
dudmuck 21:b84a77dfb43c 2723 fsk.RegRxConfig.bits.RestartRxWithoutPllLock = 1;
dudmuck 21:b84a77dfb43c 2724 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 21:b84a77dfb43c 2725 }
dudmuck 21:b84a77dfb43c 2726
dudmuck 21:b84a77dfb43c 2727 Timeout pd_timeout;
dudmuck 21:b84a77dfb43c 2728 Timeout sync_timeout;
dudmuck 21:b84a77dfb43c 2729 void preamble_detect_isr()
dudmuck 21:b84a77dfb43c 2730 {
dudmuck 21:b84a77dfb43c 2731 // only used between frames, on background noise
dudmuck 21:b84a77dfb43c 2732 pd_timeout.attach_us(&preamble_without_sync, 1500); // 122us per byte
dudmuck 21:b84a77dfb43c 2733 }
dudmuck 21:b84a77dfb43c 2734
dudmuck 18:9530d682fd9a 2735 void cmd_rx(uint8_t idx)
dudmuck 18:9530d682fd9a 2736 {
dudmuck 18:9530d682fd9a 2737 set_per_en(false);
dudmuck 18:9530d682fd9a 2738
dudmuck 18:9530d682fd9a 2739 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 2740 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 18:9530d682fd9a 2741 else {
dudmuck 20:b11592c9ba5f 2742 if (poll_irq_en) {
dudmuck 20:b11592c9ba5f 2743 fsk_RegIrqFlags2_prev.octet = 0;
dudmuck 20:b11592c9ba5f 2744 fsk_RegIrqFlags1_prev.octet = 0;
dudmuck 20:b11592c9ba5f 2745 }
dudmuck 20:b11592c9ba5f 2746
dudmuck 20:b11592c9ba5f 2747 rx_start_timer.start();
dudmuck 20:b11592c9ba5f 2748 secs_rx_start = time(NULL);
dudmuck 18:9530d682fd9a 2749 fsk.start_rx();
dudmuck 18:9530d682fd9a 2750 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to syncadrs
dudmuck 18:9530d682fd9a 2751 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 2752 if (radio.HF) {
dudmuck 18:9530d682fd9a 2753 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 2754 fsk.RegRssiConfig.bits.RssiOffset = FSK_RSSI_OFFSET;
dudmuck 18:9530d682fd9a 2755 fsk.RegRssiConfig.bits.RssiSmoothing = FSK_RSSI_SMOOTHING;
dudmuck 18:9530d682fd9a 2756 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 21:b84a77dfb43c 2757 }
dudmuck 21:b84a77dfb43c 2758
dudmuck 21:b84a77dfb43c 2759 // sync shadow regsiters
dudmuck 21:b84a77dfb43c 2760 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 21:b84a77dfb43c 2761 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 18:9530d682fd9a 2762 }
dudmuck 18:9530d682fd9a 2763 }
dudmuck 18:9530d682fd9a 2764
dudmuck 18:9530d682fd9a 2765 void cmd_radio_reg_read(uint8_t idx)
dudmuck 18:9530d682fd9a 2766 {
dudmuck 18:9530d682fd9a 2767 int i;
dudmuck 18:9530d682fd9a 2768 sscanf(pcbuf+idx, "%x", &i);
dudmuck 18:9530d682fd9a 2769 printf("%02x: %02x\r\n", i, radio.read_reg(i));
dudmuck 18:9530d682fd9a 2770 }
dudmuck 18:9530d682fd9a 2771
dudmuck 18:9530d682fd9a 2772 void cmd_radio_reg_write(uint8_t idx)
dudmuck 18:9530d682fd9a 2773 {
dudmuck 18:9530d682fd9a 2774 int i, n;
dudmuck 18:9530d682fd9a 2775 sscanf(pcbuf+idx, "%x %x", &i, &n);
dudmuck 18:9530d682fd9a 2776 radio.write_reg(i, n);
dudmuck 18:9530d682fd9a 2777 printf("%02x: %02x\r\n", i, radio.read_reg(i));
dudmuck 18:9530d682fd9a 2778 }
dudmuck 18:9530d682fd9a 2779
dudmuck 18:9530d682fd9a 2780 void cmd_mod_shaping(uint8_t idx)
dudmuck 18:9530d682fd9a 2781 {
dudmuck 18:9530d682fd9a 2782 uint8_t s = fsk.get_modulation_shaping();
dudmuck 18:9530d682fd9a 2783
dudmuck 18:9530d682fd9a 2784 if (s == 3)
dudmuck 18:9530d682fd9a 2785 s = 0;
dudmuck 18:9530d682fd9a 2786 else
dudmuck 18:9530d682fd9a 2787 s++;
dudmuck 18:9530d682fd9a 2788
dudmuck 18:9530d682fd9a 2789 fsk.set_modulation_shaping(s);
dudmuck 18:9530d682fd9a 2790
dudmuck 18:9530d682fd9a 2791 if (radio.RegOpMode.bits.ModulationType == 0) {
dudmuck 18:9530d682fd9a 2792 printf("FSK ");
dudmuck 18:9530d682fd9a 2793 switch (s) {
dudmuck 18:9530d682fd9a 2794 case 0: printf("off"); break;
dudmuck 18:9530d682fd9a 2795 case 1: printf("BT1.0 "); break;
dudmuck 18:9530d682fd9a 2796 case 2: printf("BT0.5 "); break;
dudmuck 18:9530d682fd9a 2797 case 3: printf("BT0.3 "); break;
dudmuck 18:9530d682fd9a 2798 }
dudmuck 18:9530d682fd9a 2799 } else if (radio.RegOpMode.bits.ModulationType == 1) {
dudmuck 18:9530d682fd9a 2800 printf("OOK ");
dudmuck 18:9530d682fd9a 2801 switch (s) {
dudmuck 18:9530d682fd9a 2802 case 0: printf("off"); break;
dudmuck 18:9530d682fd9a 2803 case 1: printf("Fcutoff=bitrate"); break;
dudmuck 18:9530d682fd9a 2804 case 2: printf("Fcutoff=2*bitrate"); break;
dudmuck 18:9530d682fd9a 2805 case 3: printf("?"); break;
dudmuck 18:9530d682fd9a 2806 }
dudmuck 18:9530d682fd9a 2807 }
dudmuck 18:9530d682fd9a 2808
dudmuck 18:9530d682fd9a 2809 printf("\r\n");
dudmuck 18:9530d682fd9a 2810 }
dudmuck 18:9530d682fd9a 2811
dudmuck 18:9530d682fd9a 2812 void cmd_MapPreambleDetect(uint8_t idx)
dudmuck 18:9530d682fd9a 2813 {
dudmuck 18:9530d682fd9a 2814 radio.RegDioMapping2.bits.MapPreambleDetect ^= 1;
dudmuck 18:9530d682fd9a 2815 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 18:9530d682fd9a 2816 printf("MapPreambleDetect:");
dudmuck 18:9530d682fd9a 2817 if (radio.RegDioMapping2.bits.MapPreambleDetect)
dudmuck 18:9530d682fd9a 2818 printf("preamble\r\n");
dudmuck 18:9530d682fd9a 2819 else
dudmuck 18:9530d682fd9a 2820 printf("rssi\r\n");
dudmuck 18:9530d682fd9a 2821 }
dudmuck 18:9530d682fd9a 2822
dudmuck 18:9530d682fd9a 2823 void cmd_bgr(uint8_t idx)
dudmuck 18:9530d682fd9a 2824 {
dudmuck 18:9530d682fd9a 2825 RegPdsTrim1_t pds_trim;
dudmuck 18:9530d682fd9a 2826 uint8_t adr;
dudmuck 18:9530d682fd9a 2827 if (radio.type == SX1276)
dudmuck 18:9530d682fd9a 2828 adr = REG_PDSTRIM1_SX1276;
dudmuck 18:9530d682fd9a 2829 else
dudmuck 18:9530d682fd9a 2830 adr = REG_PDSTRIM1_SX1272;
dudmuck 18:9530d682fd9a 2831
dudmuck 18:9530d682fd9a 2832 pds_trim.octet = radio.read_reg(adr);
dudmuck 18:9530d682fd9a 2833 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2834 int i;
dudmuck 18:9530d682fd9a 2835 sscanf(&pcbuf[idx], "%d", &i);
dudmuck 18:9530d682fd9a 2836 pds_trim.bits.prog_txdac = i;
dudmuck 18:9530d682fd9a 2837 }
dudmuck 18:9530d682fd9a 2838 radio.write_reg(adr, pds_trim.octet);
dudmuck 18:9530d682fd9a 2839 printf("prog_txdac:%.1fuA\r\n", 2.5 + (pds_trim.bits.prog_txdac * 0.625));
dudmuck 18:9530d682fd9a 2840 /* increase OCP threshold to allow more power */
dudmuck 18:9530d682fd9a 2841 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 18:9530d682fd9a 2842 if (radio.RegOcp.bits.OcpTrim < 16) {
dudmuck 18:9530d682fd9a 2843 radio.RegOcp.bits.OcpTrim = 16;
dudmuck 18:9530d682fd9a 2844 radio.write_reg(REG_OCP, radio.RegOcp.octet);
dudmuck 18:9530d682fd9a 2845 }
dudmuck 18:9530d682fd9a 2846 }
dudmuck 18:9530d682fd9a 2847
dudmuck 18:9530d682fd9a 2848 void cmd_ook(uint8_t idx)
dudmuck 18:9530d682fd9a 2849 {
dudmuck 18:9530d682fd9a 2850 fsk.set_bitrate(32768);
dudmuck 18:9530d682fd9a 2851 radio.write_u16(REG_FSK_PREAMBLEMSB, 0); // zero preamble length
dudmuck 18:9530d682fd9a 2852 radio.RegOpMode.bits.ModulationType = 1; // to ook mode
dudmuck 18:9530d682fd9a 2853 radio.write_reg(REG_OPMODE, radio.RegOpMode.octet);
dudmuck 18:9530d682fd9a 2854 fsk.RegSyncConfig.bits.SyncOn = 0;
dudmuck 18:9530d682fd9a 2855 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 2856 ook_test_en = true;
dudmuck 18:9530d682fd9a 2857 printf("OOK\r\n");
dudmuck 18:9530d682fd9a 2858 }
dudmuck 18:9530d682fd9a 2859
dudmuck 18:9530d682fd9a 2860 void cmd_ocp(uint8_t idx)
dudmuck 18:9530d682fd9a 2861 {
dudmuck 18:9530d682fd9a 2862 int i;
dudmuck 18:9530d682fd9a 2863 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 2864 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2865 if (i < 130)
dudmuck 18:9530d682fd9a 2866 radio.RegOcp.bits.OcpTrim = (i - 45) / 5;
dudmuck 18:9530d682fd9a 2867 else
dudmuck 18:9530d682fd9a 2868 radio.RegOcp.bits.OcpTrim = (i + 30) / 10;
dudmuck 18:9530d682fd9a 2869 radio.write_reg(REG_OCP, radio.RegOcp.octet);
dudmuck 18:9530d682fd9a 2870 }
dudmuck 18:9530d682fd9a 2871 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 18:9530d682fd9a 2872 if (radio.RegOcp.bits.OcpTrim < 16)
dudmuck 18:9530d682fd9a 2873 i = 45 + (5 * radio.RegOcp.bits.OcpTrim);
dudmuck 18:9530d682fd9a 2874 else if (radio.RegOcp.bits.OcpTrim < 28)
dudmuck 18:9530d682fd9a 2875 i = (10 * radio.RegOcp.bits.OcpTrim) - 30;
dudmuck 18:9530d682fd9a 2876 else
dudmuck 18:9530d682fd9a 2877 i = 240;
dudmuck 18:9530d682fd9a 2878 printf("Ocp: %dmA\r\n", i);
dudmuck 18:9530d682fd9a 2879 }
dudmuck 18:9530d682fd9a 2880
dudmuck 18:9530d682fd9a 2881 void cmd_op(uint8_t idx)
dudmuck 18:9530d682fd9a 2882 {
dudmuck 18:9530d682fd9a 2883 int i, dbm;
dudmuck 18:9530d682fd9a 2884 RegPdsTrim1_t pds_trim;
dudmuck 18:9530d682fd9a 2885 uint8_t adr;
dudmuck 18:9530d682fd9a 2886 if (radio.type == SX1276)
dudmuck 18:9530d682fd9a 2887 adr = REG_PDSTRIM1_SX1276;
dudmuck 18:9530d682fd9a 2888 else
dudmuck 18:9530d682fd9a 2889 adr = REG_PDSTRIM1_SX1272;
dudmuck 18:9530d682fd9a 2890
dudmuck 18:9530d682fd9a 2891 pds_trim.octet = radio.read_reg(adr);
dudmuck 18:9530d682fd9a 2892
dudmuck 19:be8a8b0e7320 2893 if (pcbuf[idx] >= '0' && (pcbuf[idx] <= '9' || pcbuf[idx] == '-')) {
dudmuck 18:9530d682fd9a 2894 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 2895 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 18:9530d682fd9a 2896 /* PABOOST used: +2dbm to +17, or +20 */
dudmuck 18:9530d682fd9a 2897 if (i == 20) {
dudmuck 18:9530d682fd9a 2898 printf("+20dBm PADAC bias\r\n");
dudmuck 18:9530d682fd9a 2899 i -= 3;
dudmuck 18:9530d682fd9a 2900 pds_trim.bits.prog_txdac = 7;
dudmuck 21:b84a77dfb43c 2901 radio.write_reg(adr, pds_trim.octet);
dudmuck 13:c73caaee93a5 2902 }
dudmuck 18:9530d682fd9a 2903 if (i > 1)
dudmuck 18:9530d682fd9a 2904 radio.RegPaConfig.bits.OutputPower = i - 2;
dudmuck 18:9530d682fd9a 2905 } else {
dudmuck 18:9530d682fd9a 2906 /* RFO used: -1 to +14dbm */
dudmuck 18:9530d682fd9a 2907 if (i < 15)
dudmuck 18:9530d682fd9a 2908 radio.RegPaConfig.bits.OutputPower = i + 1;
dudmuck 18:9530d682fd9a 2909 }
dudmuck 18:9530d682fd9a 2910 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 18:9530d682fd9a 2911 }
dudmuck 18:9530d682fd9a 2912 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 18:9530d682fd9a 2913 if (radio.RegPaConfig.bits.PaSelect) {
dudmuck 18:9530d682fd9a 2914 printf("PA_BOOST ");
dudmuck 18:9530d682fd9a 2915 dbm = radio.RegPaConfig.bits.OutputPower + pds_trim.bits.prog_txdac - 2;
dudmuck 18:9530d682fd9a 2916 } else {
dudmuck 18:9530d682fd9a 2917 printf("RFO ");
dudmuck 18:9530d682fd9a 2918 dbm = radio.RegPaConfig.bits.OutputPower - 1;
dudmuck 18:9530d682fd9a 2919 }
dudmuck 18:9530d682fd9a 2920 printf("OutputPower:%ddBm\r\n", dbm);
dudmuck 18:9530d682fd9a 2921 }
dudmuck 18:9530d682fd9a 2922
dudmuck 18:9530d682fd9a 2923
dudmuck 18:9530d682fd9a 2924
dudmuck 18:9530d682fd9a 2925 void cmd_fsk_agcauto(uint8_t idx)
dudmuck 18:9530d682fd9a 2926 {
dudmuck 18:9530d682fd9a 2927 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 18:9530d682fd9a 2928 fsk.RegRxConfig.bits.AgcAutoOn ^= 1;
dudmuck 18:9530d682fd9a 2929 printf("AgcAuto:");
dudmuck 18:9530d682fd9a 2930 if (fsk.RegRxConfig.bits.AgcAutoOn)
dudmuck 18:9530d682fd9a 2931 printf("On\r\n");
dudmuck 18:9530d682fd9a 2932 else
dudmuck 18:9530d682fd9a 2933 printf("OFF\r\n");
dudmuck 18:9530d682fd9a 2934 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2935 }
dudmuck 18:9530d682fd9a 2936
dudmuck 18:9530d682fd9a 2937 void cmd_fsk_afcauto(uint8_t idx)
dudmuck 18:9530d682fd9a 2938 {
dudmuck 18:9530d682fd9a 2939 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 18:9530d682fd9a 2940 fsk.RegRxConfig.bits.AfcAutoOn ^= 1;
dudmuck 18:9530d682fd9a 2941 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 18:9530d682fd9a 2942 printf("AfcAuto:");
dudmuck 18:9530d682fd9a 2943 if (fsk.RegRxConfig.bits.AfcAutoOn)
dudmuck 18:9530d682fd9a 2944 printf("On\r\n");
dudmuck 18:9530d682fd9a 2945 else
dudmuck 18:9530d682fd9a 2946 printf("OFF\r\n");
dudmuck 18:9530d682fd9a 2947 }
dudmuck 18:9530d682fd9a 2948
dudmuck 21:b84a77dfb43c 2949 void cmd_crc32(uint8_t idx)
dudmuck 21:b84a77dfb43c 2950 {
dudmuck 21:b84a77dfb43c 2951 crc32_en ^= true;
dudmuck 21:b84a77dfb43c 2952 printf("crc32_en:%u\r\n", crc32_en);
dudmuck 21:b84a77dfb43c 2953 }
dudmuck 21:b84a77dfb43c 2954
dudmuck 18:9530d682fd9a 2955 void cmd_crcOn(uint8_t idx)
dudmuck 18:9530d682fd9a 2956 {
dudmuck 18:9530d682fd9a 2957 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 2958 lora.setRxPayloadCrcOn(!lora.getRxPayloadCrcOn());
dudmuck 18:9530d682fd9a 2959 lora_printRxPayloadCrcOn();
dudmuck 18:9530d682fd9a 2960 } else {
dudmuck 18:9530d682fd9a 2961 printf("CrcOn:");
dudmuck 18:9530d682fd9a 2962 fsk.RegPktConfig1.bits.CrcOn ^= 1;
dudmuck 18:9530d682fd9a 2963 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 18:9530d682fd9a 2964 if (fsk.RegPktConfig1.bits.CrcOn)
dudmuck 18:9530d682fd9a 2965 printf("On\r\n");
dudmuck 18:9530d682fd9a 2966 else
dudmuck 18:9530d682fd9a 2967 printf("Off\r\n");
dudmuck 18:9530d682fd9a 2968 if (fsk.RegPktConfig2.bits.DataModePacket && radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) {
dudmuck 18:9530d682fd9a 2969 fsk.config_dio0_for_pktmode_rx();
dudmuck 18:9530d682fd9a 2970 }
dudmuck 18:9530d682fd9a 2971 }
dudmuck 18:9530d682fd9a 2972 printf("\r\n");
dudmuck 18:9530d682fd9a 2973 }
dudmuck 18:9530d682fd9a 2974
dudmuck 18:9530d682fd9a 2975 #ifdef LORA_TX_TEST
dudmuck 18:9530d682fd9a 2976 void cmd_lora_fixed_payload_symbol(uint8_t idx) // fixed payload, symbol test
dudmuck 18:9530d682fd9a 2977 {
dudmuck 18:9530d682fd9a 2978 int n, i;
dudmuck 18:9530d682fd9a 2979
dudmuck 18:9530d682fd9a 2980 symbol_num = pcbuf[idx] - '0';
dudmuck 18:9530d682fd9a 2981 sscanf(pcbuf+idx+2, "%d", &i);
dudmuck 18:9530d682fd9a 2982 n = i >> 2; // num nibbles
dudmuck 18:9530d682fd9a 2983 printf("%d nibbles: ", n);
dudmuck 18:9530d682fd9a 2984 lora.RegPayloadLength = byte_pad_length;
dudmuck 18:9530d682fd9a 2985 while (n > 0) {
dudmuck 18:9530d682fd9a 2986 lora.RegPayloadLength++;
dudmuck 18:9530d682fd9a 2987 n -= 2; // one byte = two nibbles
dudmuck 18:9530d682fd9a 2988 }
dudmuck 18:9530d682fd9a 2989 printf("%d bytes\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2990 symbol_sweep_nbits = i >> 2;
dudmuck 18:9530d682fd9a 2991 symbol_sweep_bit_counter = 0;
dudmuck 18:9530d682fd9a 2992 symbol_sweep_bit_counter_stop = 1 << symbol_sweep_nbits; // one bit per nibble used in symbol (2bits per byte)
dudmuck 18:9530d682fd9a 2993 printf("sweep symbol %d, length bytes:%d nbits:%d stop:0x%x\r\n", symbol_num, lora.RegPayloadLength, symbol_sweep_nbits, symbol_sweep_bit_counter_stop);
dudmuck 18:9530d682fd9a 2994 txticker_state = TXTICKER_STATE_SYMBOL_SWEEP;
dudmuck 18:9530d682fd9a 2995 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 2996 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 2997 }
dudmuck 18:9530d682fd9a 2998
dudmuck 18:9530d682fd9a 2999 void cmd_fixed_payload_offset(uint8_t idx)
dudmuck 18:9530d682fd9a 3000 {
dudmuck 18:9530d682fd9a 3001 int i;
dudmuck 18:9530d682fd9a 3002 if (pcbuf[idx] >='0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3003 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3004 byte_pad_length = i;
dudmuck 18:9530d682fd9a 3005 }
dudmuck 18:9530d682fd9a 3006 printf("byte_pad_length:%d\r\n", byte_pad_length);
dudmuck 18:9530d682fd9a 3007 }
dudmuck 18:9530d682fd9a 3008
dudmuck 18:9530d682fd9a 3009 void cmd_lora_fixed_payload(uint8_t idx)
dudmuck 18:9530d682fd9a 3010 {
dudmuck 18:9530d682fd9a 3011 int n, a, i, d = 0;
dudmuck 18:9530d682fd9a 3012 for (i = idx; i < pcbuf_len; ) {
dudmuck 18:9530d682fd9a 3013 //printf("scan:\"%s\"\r\n", pcbuf+i);
dudmuck 18:9530d682fd9a 3014 sscanf(pcbuf+i, "%x", &n);
dudmuck 18:9530d682fd9a 3015 //printf("n:%x\r\n", n);
dudmuck 18:9530d682fd9a 3016 radio.tx_buf[d] = n;
dudmuck 18:9530d682fd9a 3017 printf("%02x ", n);
dudmuck 18:9530d682fd9a 3018 while (pcbuf[i] == ' ')
dudmuck 18:9530d682fd9a 3019 i++;
dudmuck 18:9530d682fd9a 3020 //printf("%d pcbuf[i]:%x\r\n", i, pcbuf[i]);
dudmuck 18:9530d682fd9a 3021 for (a = i; pcbuf[a] != ' '; a++)
dudmuck 18:9530d682fd9a 3022 if (a >= pcbuf_len)
dudmuck 18:9530d682fd9a 3023 break;
dudmuck 18:9530d682fd9a 3024 i = a;
dudmuck 18:9530d682fd9a 3025 while (pcbuf[i] == ' ') {
dudmuck 18:9530d682fd9a 3026 i++;
dudmuck 18:9530d682fd9a 3027 if (i >= pcbuf_len)
dudmuck 18:9530d682fd9a 3028 break;
dudmuck 18:9530d682fd9a 3029 }
dudmuck 18:9530d682fd9a 3030 d++;
dudmuck 18:9530d682fd9a 3031 }
dudmuck 18:9530d682fd9a 3032 lora.RegPayloadLength = d;
dudmuck 18:9530d682fd9a 3033 printf("\r\nlora.RegPayloadLength:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3034 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3035 lora.start_tx(lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3036 }
dudmuck 18:9530d682fd9a 3037
dudmuck 18:9530d682fd9a 3038 void cmd_lora_toggle_crcOn(uint8_t idx)
dudmuck 18:9530d682fd9a 3039 {
dudmuck 18:9530d682fd9a 3040 /* test lora crc on/off */
dudmuck 18:9530d682fd9a 3041 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 3042 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3043 txticker_state = TXTICKER_STATE_TOG_CRC_ON;
dudmuck 18:9530d682fd9a 3044 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3045 }
dudmuck 18:9530d682fd9a 3046
dudmuck 18:9530d682fd9a 3047 void lora_cycle_payload_length(uint8_t idx)
dudmuck 18:9530d682fd9a 3048 {
dudmuck 18:9530d682fd9a 3049 int i;
dudmuck 18:9530d682fd9a 3050 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3051 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3052 payload_length_stop = i;
dudmuck 18:9530d682fd9a 3053 }
dudmuck 18:9530d682fd9a 3054 txticker_state = TXTICKER_STATE_CYCLE_PAYLOAD_LENGTH;
dudmuck 18:9530d682fd9a 3055 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3056 }
dudmuck 18:9530d682fd9a 3057
dudmuck 18:9530d682fd9a 3058 void cmd_lora_data_ramp(uint8_t idx)
dudmuck 18:9530d682fd9a 3059 {
dudmuck 18:9530d682fd9a 3060 // lora payload data ramping
dudmuck 18:9530d682fd9a 3061 lora.RegPayloadLength = pcbuf[idx] - '0';
dudmuck 18:9530d682fd9a 3062 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3063 txticker_state = TXTICKER_STATE_RAMP_PAYLOAD_DATA_START;
dudmuck 18:9530d682fd9a 3064 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3065 }
dudmuck 18:9530d682fd9a 3066
dudmuck 18:9530d682fd9a 3067 void cmd_lora_sync_lo_nibble(uint8_t idx)
dudmuck 18:9530d682fd9a 3068 {
dudmuck 18:9530d682fd9a 3069 lora_sync_byte = 0x00;
dudmuck 18:9530d682fd9a 3070 on_txdone_state = ON_TXDONE_STATE_SYNC_LO_NIBBLE;
dudmuck 18:9530d682fd9a 3071 on_txdone_delay = 0.100;
dudmuck 18:9530d682fd9a 3072 txdone_timeout_cb();
dudmuck 18:9530d682fd9a 3073 //sync_sweep_timeout.attach(&txdone_timeout_cb, sync_sweep_delay);
dudmuck 18:9530d682fd9a 3074 }
dudmuck 18:9530d682fd9a 3075
dudmuck 18:9530d682fd9a 3076 void cmd_lora_toggle_header_mode(uint8_t idx)
dudmuck 18:9530d682fd9a 3077 {
dudmuck 18:9530d682fd9a 3078 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 3079 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3080 txticker_state = TXTICKER_STATE_TOG_HEADER_MODE;
dudmuck 18:9530d682fd9a 3081 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3082 }
dudmuck 18:9530d682fd9a 3083
dudmuck 18:9530d682fd9a 3084 void cmd_lora_sync_sweep(uint8_t idx)
dudmuck 18:9530d682fd9a 3085 {
dudmuck 18:9530d682fd9a 3086 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 3087 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3088 txticker_sync_byte = 0x12;
dudmuck 18:9530d682fd9a 3089 if (pcbuf[idx] == '1')
dudmuck 18:9530d682fd9a 3090 txticker_state = TXTICKER_STATE_CYCLE_SYNC_1;
dudmuck 18:9530d682fd9a 3091 else if (pcbuf[idx] == '2')
dudmuck 18:9530d682fd9a 3092 txticker_state = TXTICKER_STATE_CYCLE_SYNC_2;
dudmuck 18:9530d682fd9a 3093 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3094 }
dudmuck 18:9530d682fd9a 3095
dudmuck 18:9530d682fd9a 3096 void cmd_lora_all_payload_lengths(uint8_t idx)
dudmuck 18:9530d682fd9a 3097 {
dudmuck 18:9530d682fd9a 3098 on_txdone_repeat_cnt = 0;
dudmuck 18:9530d682fd9a 3099 on_txdone_state = ON_TXDONE_STATE_PAYLOAD_LENGTH;
dudmuck 18:9530d682fd9a 3100 on_txdone_delay = 0.200;
dudmuck 18:9530d682fd9a 3101 txdone_timeout_cb();
dudmuck 18:9530d682fd9a 3102 lora.RegPayloadLength = 0;
dudmuck 18:9530d682fd9a 3103 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3104 }
dudmuck 18:9530d682fd9a 3105
dudmuck 18:9530d682fd9a 3106 void cmd_lora_toggle_all_bits(uint8_t idx)
dudmuck 18:9530d682fd9a 3107 {
dudmuck 18:9530d682fd9a 3108 lora.RegPayloadLength = (pcbuf[idx] - '0') + byte_pad_length;
dudmuck 18:9530d682fd9a 3109 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3110 txticker_state = TXTICKER_STATE_TOGGLE_ALL_BITS_START;
dudmuck 18:9530d682fd9a 3111 printf("tab byte length:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3112
dudmuck 18:9530d682fd9a 3113 if (lora.RegPayloadLength > 0)
dudmuck 18:9530d682fd9a 3114 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3115 }
dudmuck 18:9530d682fd9a 3116
dudmuck 18:9530d682fd9a 3117 void cmd_lora_cycle_codingrates(uint8_t idx)
dudmuck 18:9530d682fd9a 3118 {
dudmuck 18:9530d682fd9a 3119 lora.RegPayloadLength = 1;
dudmuck 18:9530d682fd9a 3120 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3121 txticker_state = TXTICKER_STATE_CYCLE_CODING_RATE;
dudmuck 18:9530d682fd9a 3122 tx_ticker.attach(&fp_cb, tx_ticker_rate);
dudmuck 18:9530d682fd9a 3123 }
dudmuck 18:9530d682fd9a 3124 #endif /* LORA_TX_TEST */
dudmuck 18:9530d682fd9a 3125
dudmuck 18:9530d682fd9a 3126 void cmd_codingRate(uint8_t idx)
dudmuck 18:9530d682fd9a 3127 {
dudmuck 18:9530d682fd9a 3128 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9')
dudmuck 18:9530d682fd9a 3129 lora.setCodingRate(pcbuf[idx] - '0');
dudmuck 18:9530d682fd9a 3130 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 3131 lora_printCodingRate(false); // false: transmitted
dudmuck 18:9530d682fd9a 3132 printf("\r\n");
dudmuck 18:9530d682fd9a 3133 }
dudmuck 18:9530d682fd9a 3134
dudmuck 18:9530d682fd9a 3135 void cmd_lora_header_mode(uint8_t idx)
dudmuck 18:9530d682fd9a 3136 {
dudmuck 18:9530d682fd9a 3137 lora.setHeaderMode(!lora.getHeaderMode());
dudmuck 18:9530d682fd9a 3138 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 3139 lora_printHeaderMode();
dudmuck 18:9530d682fd9a 3140 printf("\r\n");
dudmuck 18:9530d682fd9a 3141 }
dudmuck 18:9530d682fd9a 3142
dudmuck 18:9530d682fd9a 3143 void cmd_fsk_AfcAutoClearOn(uint8_t idx)
dudmuck 18:9530d682fd9a 3144 {
dudmuck 18:9530d682fd9a 3145 fsk.RegAfcFei.bits.AfcAutoClearOn ^= 1;
dudmuck 18:9530d682fd9a 3146 printf("AfcAutoClearOn: ");
dudmuck 18:9530d682fd9a 3147 radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet);
dudmuck 18:9530d682fd9a 3148 if (fsk.RegAfcFei.bits.AfcAutoClearOn)
dudmuck 18:9530d682fd9a 3149 printf("ON\r\n");
dudmuck 18:9530d682fd9a 3150 else
dudmuck 18:9530d682fd9a 3151 printf("off\r\n");
dudmuck 18:9530d682fd9a 3152 }
dudmuck 18:9530d682fd9a 3153
dudmuck 18:9530d682fd9a 3154 void cmd_fsk_AutoRestartRxMode(uint8_t idx)
dudmuck 18:9530d682fd9a 3155 {
dudmuck 18:9530d682fd9a 3156 fsk.RegSyncConfig.bits.AutoRestartRxMode++;
dudmuck 18:9530d682fd9a 3157 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 3158 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 3159 printf("AutoRestartRxMode:");
dudmuck 18:9530d682fd9a 3160 switch (fsk.RegSyncConfig.bits.AutoRestartRxMode) {
dudmuck 18:9530d682fd9a 3161 case 0: printf("off "); break;
dudmuck 18:9530d682fd9a 3162 case 1: printf("no-pll-wait "); break;
dudmuck 18:9530d682fd9a 3163 case 2: printf("pll-wait "); break;
dudmuck 18:9530d682fd9a 3164 case 3: printf("3 "); break;
dudmuck 18:9530d682fd9a 3165 }
dudmuck 18:9530d682fd9a 3166 printf("\r\n");
dudmuck 18:9530d682fd9a 3167 }
dudmuck 18:9530d682fd9a 3168
dudmuck 18:9530d682fd9a 3169 void cmd_AfcClear(uint8_t idx)
dudmuck 18:9530d682fd9a 3170 {
dudmuck 18:9530d682fd9a 3171 printf("clear afc: ");
dudmuck 18:9530d682fd9a 3172 fsk.RegAfcFei.bits.AfcClear = 1;
dudmuck 18:9530d682fd9a 3173 radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet);
dudmuck 18:9530d682fd9a 3174 fsk.RegAfcFei.bits.AfcClear = 0;
dudmuck 18:9530d682fd9a 3175 printf("%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_AFCMSB)));
dudmuck 18:9530d682fd9a 3176 }
dudmuck 18:9530d682fd9a 3177
dudmuck 18:9530d682fd9a 3178 void cmd_fsk_bitrate(uint8_t idx)
dudmuck 18:9530d682fd9a 3179 {
dudmuck 18:9530d682fd9a 3180 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3181 float kbits;
dudmuck 18:9530d682fd9a 3182 sscanf(&pcbuf[idx], "%f", &kbits);
dudmuck 18:9530d682fd9a 3183 fsk.set_bitrate((int)(kbits*1000));
dudmuck 18:9530d682fd9a 3184 }
dudmuck 18:9530d682fd9a 3185 printf("%fkbps\r\n", fsk.get_bitrate()/(float)1000.0);
dudmuck 18:9530d682fd9a 3186 }
dudmuck 18:9530d682fd9a 3187
dudmuck 18:9530d682fd9a 3188 void cmd_bandwidth(uint8_t idx)
dudmuck 18:9530d682fd9a 3189 {
dudmuck 18:9530d682fd9a 3190 int i;
dudmuck 18:9530d682fd9a 3191 float f;
dudmuck 18:9530d682fd9a 3192 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3193 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3194 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 3195 sscanf(&pcbuf[idx], "%d", &i);
dudmuck 18:9530d682fd9a 3196 lora.setBw_KHz(i);
dudmuck 18:9530d682fd9a 3197 } else
dudmuck 18:9530d682fd9a 3198 lora_printAllBw();
dudmuck 18:9530d682fd9a 3199 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 3200 printf("current ");
dudmuck 18:9530d682fd9a 3201 lora_printBw();
dudmuck 18:9530d682fd9a 3202 printf("\r\n");
dudmuck 18:9530d682fd9a 3203 } else { // FSK:
dudmuck 18:9530d682fd9a 3204 if (pcbuf[idx] == 'a') {
dudmuck 18:9530d682fd9a 3205 idx++;
dudmuck 18:9530d682fd9a 3206 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3207 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 3208 sscanf(&pcbuf[idx], "%f", &f);
dudmuck 18:9530d682fd9a 3209 fsk.set_rx_dcc_bw_hz((int)(f*(float)1000.0), 1);
dudmuck 18:9530d682fd9a 3210 }
dudmuck 18:9530d682fd9a 3211 printf("afcbw:%.3fkHz\r\n", fsk.get_rx_bw_hz(REG_FSK_AFCBW)/1000.0);
dudmuck 18:9530d682fd9a 3212 } else {
dudmuck 18:9530d682fd9a 3213 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3214 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 3215 sscanf(&pcbuf[idx], "%f", &f);
dudmuck 18:9530d682fd9a 3216 fsk.set_rx_dcc_bw_hz((int)(f*(float)1000.0), 0);
dudmuck 18:9530d682fd9a 3217 }
dudmuck 18:9530d682fd9a 3218 printf("rxbw:%.3fkHz\r\n", fsk.get_rx_bw_hz(REG_FSK_RXBW)/1000.0);
dudmuck 18:9530d682fd9a 3219 }
dudmuck 18:9530d682fd9a 3220 }
dudmuck 18:9530d682fd9a 3221 }
dudmuck 18:9530d682fd9a 3222
dudmuck 18:9530d682fd9a 3223 void cmd_lora_poll_validHeader(uint8_t idx)
dudmuck 18:9530d682fd9a 3224 {
dudmuck 18:9530d682fd9a 3225 lora.poll_vh ^= 1;
dudmuck 18:9530d682fd9a 3226 printf("poll_vh:%d\r\n", lora.poll_vh);
dudmuck 18:9530d682fd9a 3227 }
dudmuck 18:9530d682fd9a 3228
dudmuck 18:9530d682fd9a 3229 void cmd_fsk_syncword(uint8_t idx)
dudmuck 18:9530d682fd9a 3230 {
dudmuck 18:9530d682fd9a 3231 int i, d = 0;
dudmuck 18:9530d682fd9a 3232 uint8_t reg_addr = REG_FSK_SYNCVALUE1;
dudmuck 18:9530d682fd9a 3233
dudmuck 18:9530d682fd9a 3234 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 3235
dudmuck 18:9530d682fd9a 3236 if (pcbuf_len != idx) { // something to write?
dudmuck 18:9530d682fd9a 3237 for (i = idx; i < pcbuf_len; ) {
dudmuck 18:9530d682fd9a 3238 int a, n;
dudmuck 18:9530d682fd9a 3239 sscanf(pcbuf+i, "%x", &n);
dudmuck 18:9530d682fd9a 3240 radio.write_reg(reg_addr++, n);
dudmuck 18:9530d682fd9a 3241 //printf("%02x ", n);
dudmuck 18:9530d682fd9a 3242 while (pcbuf[i] == ' ')
dudmuck 18:9530d682fd9a 3243 i++;
dudmuck 18:9530d682fd9a 3244 for (a = i; pcbuf[a] != ' '; a++)
dudmuck 18:9530d682fd9a 3245 if (a >= pcbuf_len)
dudmuck 18:9530d682fd9a 3246 break;
dudmuck 18:9530d682fd9a 3247 i = a;
dudmuck 18:9530d682fd9a 3248 while (pcbuf[i] == ' ') {
dudmuck 18:9530d682fd9a 3249 i++;
dudmuck 18:9530d682fd9a 3250 if (i >= pcbuf_len)
dudmuck 18:9530d682fd9a 3251 break;
dudmuck 18:9530d682fd9a 3252 }
dudmuck 18:9530d682fd9a 3253 d++;
dudmuck 18:9530d682fd9a 3254 }
dudmuck 18:9530d682fd9a 3255
dudmuck 18:9530d682fd9a 3256 fsk.RegSyncConfig.bits.SyncSize = reg_addr - REG_FSK_SYNCVALUE1 - 1;
dudmuck 18:9530d682fd9a 3257 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 3258 }
dudmuck 18:9530d682fd9a 3259
dudmuck 18:9530d682fd9a 3260 printf("%d: ", fsk.RegSyncConfig.bits.SyncSize);
dudmuck 18:9530d682fd9a 3261 for (i = 0; i <= fsk.RegSyncConfig.bits.SyncSize; i++)
dudmuck 18:9530d682fd9a 3262 printf("%02x ", radio.read_reg(REG_FSK_SYNCVALUE1+i));
dudmuck 18:9530d682fd9a 3263 printf("\r\n");
dudmuck 18:9530d682fd9a 3264 }
dudmuck 18:9530d682fd9a 3265
dudmuck 18:9530d682fd9a 3266 void cmd_fsk_syncOn(uint8_t idx)
dudmuck 18:9530d682fd9a 3267 {
dudmuck 18:9530d682fd9a 3268 fsk.RegSyncConfig.bits.SyncOn ^= 1;
dudmuck 18:9530d682fd9a 3269 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 3270 printf("SyncOn:%d\r\n", fsk.RegSyncConfig.bits.SyncOn);
dudmuck 18:9530d682fd9a 3271 }
dudmuck 18:9530d682fd9a 3272
dudmuck 18:9530d682fd9a 3273 void cmd_fsk_bitsync(uint8_t idx)
dudmuck 18:9530d682fd9a 3274 {
dudmuck 18:9530d682fd9a 3275 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 18:9530d682fd9a 3276 fsk.RegOokPeak.bits.BitSyncOn ^= 1;
dudmuck 18:9530d682fd9a 3277 radio.write_reg(REG_FSK_OOKPEAK, fsk.RegOokPeak.octet);
dudmuck 18:9530d682fd9a 3278 if (fsk.RegOokPeak.bits.BitSyncOn)
dudmuck 18:9530d682fd9a 3279 printf("BitSyncOn\r\n");
dudmuck 18:9530d682fd9a 3280 else
dudmuck 18:9530d682fd9a 3281 printf("BitSync Off\r\n");
dudmuck 18:9530d682fd9a 3282 }
dudmuck 18:9530d682fd9a 3283
dudmuck 18:9530d682fd9a 3284 void cmd_lora_sf(uint8_t idx)
dudmuck 18:9530d682fd9a 3285 {
dudmuck 18:9530d682fd9a 3286 int i;
dudmuck 18:9530d682fd9a 3287 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3288 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3289 lora.setSf(i);
dudmuck 18:9530d682fd9a 3290 if (i == 6 && !lora.getHeaderMode()) {
dudmuck 18:9530d682fd9a 3291 printf("SF6: to implicit header mode\r\n");
dudmuck 18:9530d682fd9a 3292 lora.setHeaderMode(true);
dudmuck 18:9530d682fd9a 3293 }
dudmuck 18:9530d682fd9a 3294 }
dudmuck 18:9530d682fd9a 3295 lora.RegModemConfig2.octet = radio.read_reg(REG_LR_MODEMCONFIG2);
dudmuck 18:9530d682fd9a 3296 lora_printSf();
dudmuck 18:9530d682fd9a 3297 printf("\r\n");
dudmuck 18:9530d682fd9a 3298 }
dudmuck 18:9530d682fd9a 3299
dudmuck 18:9530d682fd9a 3300 void cmd_fsk_TxStartCondition(uint8_t idx)
dudmuck 18:9530d682fd9a 3301 {
dudmuck 18:9530d682fd9a 3302 fsk.RegFifoThreshold.bits.TxStartCondition ^= 1;
dudmuck 18:9530d682fd9a 3303 radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet);
dudmuck 18:9530d682fd9a 3304 printf("TxStartCondition:");
dudmuck 18:9530d682fd9a 3305 if (fsk.RegFifoThreshold.bits.TxStartCondition)
dudmuck 18:9530d682fd9a 3306 printf("!FifoEmpty\r\n");
dudmuck 18:9530d682fd9a 3307 else
dudmuck 18:9530d682fd9a 3308 printf("FifoLevel\r\n");
dudmuck 18:9530d682fd9a 3309 }
dudmuck 18:9530d682fd9a 3310
dudmuck 18:9530d682fd9a 3311 void cmd_fsk_read_fei(uint8_t idx)
dudmuck 18:9530d682fd9a 3312 {
dudmuck 18:9530d682fd9a 3313 printf("fei:%dHz\r\n", (int)(FREQ_STEP_HZ * radio.read_s16(REG_FSK_FEIMSB)));
dudmuck 18:9530d682fd9a 3314 }
dudmuck 18:9530d682fd9a 3315
dudmuck 18:9530d682fd9a 3316 void cmd_fsk_fdev(uint8_t idx)
dudmuck 18:9530d682fd9a 3317 {
dudmuck 18:9530d682fd9a 3318 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3319 float khz;
dudmuck 18:9530d682fd9a 3320 sscanf(pcbuf+idx, "%f", &khz);
dudmuck 18:9530d682fd9a 3321 fsk.set_tx_fdev_hz((int)(khz*1000));
dudmuck 18:9530d682fd9a 3322 }
dudmuck 18:9530d682fd9a 3323 printf("fdev:%fKHz\r\n", fsk.get_tx_fdev_hz()/(float)1000.0);
dudmuck 18:9530d682fd9a 3324 }
dudmuck 18:9530d682fd9a 3325
dudmuck 21:b84a77dfb43c 3326 void cmd_spifreq(uint8_t idx)
dudmuck 21:b84a77dfb43c 3327 {
dudmuck 21:b84a77dfb43c 3328 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 21:b84a77dfb43c 3329 int hz, MHz;
dudmuck 21:b84a77dfb43c 3330 sscanf(pcbuf+idx, "%d", &MHz);
dudmuck 21:b84a77dfb43c 3331 hz = MHz * 1000000;
dudmuck 21:b84a77dfb43c 3332 printf("spi hz:%u\r\n", hz);
dudmuck 21:b84a77dfb43c 3333 radio.m_spi.frequency(hz);
dudmuck 21:b84a77dfb43c 3334 }
dudmuck 21:b84a77dfb43c 3335 }
dudmuck 21:b84a77dfb43c 3336
dudmuck 18:9530d682fd9a 3337 void cmd_frf(uint8_t idx)
dudmuck 18:9530d682fd9a 3338 {
dudmuck 18:9530d682fd9a 3339 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3340 float MHz;
dudmuck 18:9530d682fd9a 3341 sscanf(pcbuf+idx, "%f", &MHz);
dudmuck 18:9530d682fd9a 3342 //printf("MHz:%f\r\n", MHz);
dudmuck 18:9530d682fd9a 3343 radio.set_frf_MHz(MHz);
dudmuck 18:9530d682fd9a 3344 }
dudmuck 18:9530d682fd9a 3345 printf("%fMHz\r\n", radio.get_frf_MHz());
dudmuck 22:2005df80c8a8 3346 #if !defined(TARGET_MTS_MDOT_F411RE) && !defined(TYPE_ABZ)
dudmuck 18:9530d682fd9a 3347 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 18:9530d682fd9a 3348 if (shield_type == SHIELD_TYPE_LAS) {
dudmuck 18:9530d682fd9a 3349 // LAS HF=PA_BOOST LF=RFO
dudmuck 18:9530d682fd9a 3350 if (radio.HF)
dudmuck 18:9530d682fd9a 3351 radio.RegPaConfig.bits.PaSelect = 1;
dudmuck 18:9530d682fd9a 3352 else
dudmuck 18:9530d682fd9a 3353 radio.RegPaConfig.bits.PaSelect = 0;
dudmuck 18:9530d682fd9a 3354 }
dudmuck 18:9530d682fd9a 3355 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 18:9530d682fd9a 3356 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 18:9530d682fd9a 3357 }
dudmuck 18:9530d682fd9a 3358
dudmuck 18:9530d682fd9a 3359 void cmd_fsk_PacketFormat(uint8_t idx)
dudmuck 18:9530d682fd9a 3360 {
dudmuck 18:9530d682fd9a 3361 printf("PacketFormat:");
dudmuck 18:9530d682fd9a 3362 fsk.RegPktConfig1.bits.PacketFormatVariable ^= 1;
dudmuck 18:9530d682fd9a 3363 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 18:9530d682fd9a 3364 if (fsk.RegPktConfig1.bits.PacketFormatVariable)
dudmuck 18:9530d682fd9a 3365 printf("variable\r\n");
dudmuck 18:9530d682fd9a 3366 else
dudmuck 18:9530d682fd9a 3367 printf("fixed\r\n");
dudmuck 18:9530d682fd9a 3368 }
dudmuck 18:9530d682fd9a 3369
dudmuck 18:9530d682fd9a 3370 void cmd_payload_length(uint8_t idx)
dudmuck 18:9530d682fd9a 3371 {
dudmuck 18:9530d682fd9a 3372 int i;
dudmuck 18:9530d682fd9a 3373 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3374 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3375 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3376 lora.RegPayloadLength = i;
dudmuck 13:c73caaee93a5 3377 radio.write_reg(REG_LR_PAYLOADLENGTH, lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3378 } else {
dudmuck 18:9530d682fd9a 3379 fsk.RegPktConfig2.bits.PayloadLength = i;
dudmuck 18:9530d682fd9a 3380 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 10:d9bb2ce57f05 3381 }
dudmuck 18:9530d682fd9a 3382 }
dudmuck 18:9530d682fd9a 3383 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3384 lora.RegPayloadLength = radio.read_reg(REG_LR_PAYLOADLENGTH);
dudmuck 18:9530d682fd9a 3385 printf("PayloadLength:%d\r\n", lora.RegPayloadLength);
dudmuck 18:9530d682fd9a 3386 } else {
dudmuck 18:9530d682fd9a 3387 printf("PayloadLength:%d\r\n", fsk_get_PayloadLength());
dudmuck 18:9530d682fd9a 3388 }
dudmuck 18:9530d682fd9a 3389 }
dudmuck 18:9530d682fd9a 3390
dudmuck 18:9530d682fd9a 3391 void cmd_paRamp(uint8_t idx)
dudmuck 18:9530d682fd9a 3392 {
dudmuck 18:9530d682fd9a 3393 int i;
dudmuck 18:9530d682fd9a 3394 uint8_t reg_par = radio.read_reg(REG_PARAMP);
dudmuck 18:9530d682fd9a 3395 uint8_t PaRamp = reg_par & 0x0f;
dudmuck 18:9530d682fd9a 3396 reg_par &= 0xf0;
dudmuck 18:9530d682fd9a 3397 if (PaRamp == 15)
dudmuck 18:9530d682fd9a 3398 PaRamp = 0;
dudmuck 18:9530d682fd9a 3399 else
dudmuck 18:9530d682fd9a 3400 PaRamp++;
dudmuck 18:9530d682fd9a 3401 radio.write_reg(REG_PARAMP, reg_par | PaRamp);
dudmuck 18:9530d682fd9a 3402 printf("PaRamp:");
dudmuck 18:9530d682fd9a 3403 switch (PaRamp) {
dudmuck 18:9530d682fd9a 3404 case 0: i = 3400; break;
dudmuck 18:9530d682fd9a 3405 case 1: i = 2000; break;
dudmuck 18:9530d682fd9a 3406 case 2: i = 1000; break;
dudmuck 18:9530d682fd9a 3407 case 3: i = 500; break;
dudmuck 18:9530d682fd9a 3408 case 4: i = 250; break;
dudmuck 18:9530d682fd9a 3409 case 5: i = 125; break;
dudmuck 18:9530d682fd9a 3410 case 6: i = 100; break;
dudmuck 18:9530d682fd9a 3411 case 7: i = 62; break;
dudmuck 18:9530d682fd9a 3412 case 8: i = 50; break;
dudmuck 18:9530d682fd9a 3413 case 9: i = 40; break;
dudmuck 18:9530d682fd9a 3414 case 10: i = 31; break;
dudmuck 18:9530d682fd9a 3415 case 11: i = 25; break;
dudmuck 18:9530d682fd9a 3416 case 12: i = 20; break;
dudmuck 18:9530d682fd9a 3417 case 13: i = 15; break;
dudmuck 18:9530d682fd9a 3418 case 14: i = 12; break;
dudmuck 18:9530d682fd9a 3419 case 15: i = 10; break;
dudmuck 18:9530d682fd9a 3420 }
dudmuck 18:9530d682fd9a 3421 printf("%dus\r\n", i);
dudmuck 18:9530d682fd9a 3422 }
dudmuck 18:9530d682fd9a 3423
dudmuck 18:9530d682fd9a 3424 void cmd_paSelect(uint8_t idx)
dudmuck 18:9530d682fd9a 3425 {
dudmuck 18:9530d682fd9a 3426 radio.RegPaConfig.bits.PaSelect ^= 1;
dudmuck 18:9530d682fd9a 3427 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 18:9530d682fd9a 3428 printPa();
dudmuck 18:9530d682fd9a 3429 printf("\r\n");
dudmuck 18:9530d682fd9a 3430 }
dudmuck 18:9530d682fd9a 3431
dudmuck 18:9530d682fd9a 3432 void cmd_poll_irq_en(uint8_t idx)
dudmuck 18:9530d682fd9a 3433 {
dudmuck 18:9530d682fd9a 3434 poll_irq_en ^= 1;
dudmuck 18:9530d682fd9a 3435 printf("poll_irq_en:");
dudmuck 20:b11592c9ba5f 3436 if (poll_irq_en) {
dudmuck 18:9530d682fd9a 3437 printf("irqFlags register\r\n");
dudmuck 20:b11592c9ba5f 3438 fsk_RegIrqFlags1_prev.octet = 0;
dudmuck 20:b11592c9ba5f 3439 fsk_RegIrqFlags2_prev.octet = 0;
dudmuck 20:b11592c9ba5f 3440 } else
dudmuck 18:9530d682fd9a 3441 printf("DIO pin interrupt\r\n");
dudmuck 18:9530d682fd9a 3442 }
dudmuck 18:9530d682fd9a 3443
dudmuck 18:9530d682fd9a 3444 void cmd_per_id(uint8_t idx)
dudmuck 18:9530d682fd9a 3445 {
dudmuck 18:9530d682fd9a 3446 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3447 sscanf(pcbuf+idx, "%d", &per_id);
dudmuck 18:9530d682fd9a 3448 }
dudmuck 18:9530d682fd9a 3449 printf("PER device ID:%d\r\n", per_id);
dudmuck 18:9530d682fd9a 3450 }
dudmuck 18:9530d682fd9a 3451
dudmuck 18:9530d682fd9a 3452 void cmd_pertx(uint8_t idx)
dudmuck 18:9530d682fd9a 3453 {
dudmuck 18:9530d682fd9a 3454 int i;
dudmuck 18:9530d682fd9a 3455
dudmuck 18:9530d682fd9a 3456 if (cadper_enable)
dudmuck 18:9530d682fd9a 3457 cadper_enable = false;
dudmuck 18:9530d682fd9a 3458
dudmuck 18:9530d682fd9a 3459 set_per_en(true);
dudmuck 18:9530d682fd9a 3460 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3461 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3462 PacketTxCntEnd = i;
dudmuck 18:9530d682fd9a 3463 }
dudmuck 18:9530d682fd9a 3464 PacketTxCnt = 0;
dudmuck 18:9530d682fd9a 3465 per_timeout.attach(&per_cb, per_tx_delay);
dudmuck 18:9530d682fd9a 3466 }
dudmuck 18:9530d682fd9a 3467
dudmuck 18:9530d682fd9a 3468 void cmd_perrx(uint8_t idx)
dudmuck 18:9530d682fd9a 3469 {
dudmuck 18:9530d682fd9a 3470 set_per_en(true);
dudmuck 18:9530d682fd9a 3471
dudmuck 18:9530d682fd9a 3472 PacketNormalCnt = 0;
dudmuck 20:b11592c9ba5f 3473 PacketRxSequencePrev = 0; // transmitter side PacketTxCnt is 1 at first TX
dudmuck 18:9530d682fd9a 3474 PacketPerKoCnt = 0;
dudmuck 18:9530d682fd9a 3475 PacketPerOkCnt = 0;
dudmuck 18:9530d682fd9a 3476 //dio3.rise(&dio3_cb);
dudmuck 18:9530d682fd9a 3477
dudmuck 18:9530d682fd9a 3478 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 3479 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 13:c73caaee93a5 3480 else {
dudmuck 18:9530d682fd9a 3481 fsk.start_rx();
dudmuck 18:9530d682fd9a 3482 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to syncadrs
dudmuck 18:9530d682fd9a 3483 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 3484 if (radio.HF) {
dudmuck 18:9530d682fd9a 3485 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 18:9530d682fd9a 3486 fsk.RegRssiConfig.bits.RssiOffset = FSK_RSSI_OFFSET;
dudmuck 18:9530d682fd9a 3487 fsk.RegRssiConfig.bits.RssiSmoothing = FSK_RSSI_SMOOTHING;
dudmuck 18:9530d682fd9a 3488 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 18:9530d682fd9a 3489 }
dudmuck 18:9530d682fd9a 3490 }
dudmuck 18:9530d682fd9a 3491 }
dudmuck 18:9530d682fd9a 3492
dudmuck 18:9530d682fd9a 3493 void cmd_fsk_PreambleDetectorOn(uint8_t idx)
dudmuck 18:9530d682fd9a 3494 {
dudmuck 18:9530d682fd9a 3495 fsk.RegPreambleDetect.bits.PreambleDetectorOn ^= 1;
dudmuck 18:9530d682fd9a 3496 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 3497 printf("PreambleDetector:");
dudmuck 18:9530d682fd9a 3498 if (fsk.RegPreambleDetect.bits.PreambleDetectorOn)
dudmuck 18:9530d682fd9a 3499 printf("On\r\n");
dudmuck 18:9530d682fd9a 3500 else
dudmuck 18:9530d682fd9a 3501 printf("OFF\r\n");
dudmuck 18:9530d682fd9a 3502 }
dudmuck 18:9530d682fd9a 3503
dudmuck 18:9530d682fd9a 3504 void cmd_fsk_PreambleDetectorSize(uint8_t idx)
dudmuck 18:9530d682fd9a 3505 {
dudmuck 18:9530d682fd9a 3506 int i;
dudmuck 18:9530d682fd9a 3507 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3508 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3509 fsk.RegPreambleDetect.bits.PreambleDetectorSize = i;
dudmuck 18:9530d682fd9a 3510 }
dudmuck 18:9530d682fd9a 3511 printf("PreambleDetectorSize:%d\r\n", fsk.RegPreambleDetect.bits.PreambleDetectorSize);
dudmuck 18:9530d682fd9a 3512 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 3513 }
dudmuck 18:9530d682fd9a 3514
dudmuck 18:9530d682fd9a 3515 void cmd_fsk_PreambleDetectorTol(uint8_t idx)
dudmuck 18:9530d682fd9a 3516 {
dudmuck 18:9530d682fd9a 3517 int i;
dudmuck 18:9530d682fd9a 3518 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3519 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3520 fsk.RegPreambleDetect.bits.PreambleDetectorTol = i;
dudmuck 18:9530d682fd9a 3521 }
dudmuck 18:9530d682fd9a 3522 printf("PreambleDetectorTol:%d\r\n", fsk.RegPreambleDetect.bits.PreambleDetectorTol);
dudmuck 18:9530d682fd9a 3523 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 18:9530d682fd9a 3524 }
dudmuck 18:9530d682fd9a 3525
dudmuck 18:9530d682fd9a 3526 void cmd_PreambleSize(uint8_t idx)
dudmuck 18:9530d682fd9a 3527 {
dudmuck 18:9530d682fd9a 3528 int i;
dudmuck 18:9530d682fd9a 3529 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 3530 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3531 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3532 radio.write_u16(REG_LR_PREAMBLEMSB, i);
dudmuck 18:9530d682fd9a 3533 }
dudmuck 18:9530d682fd9a 3534 lora.RegPreamble = radio.read_u16(REG_LR_PREAMBLEMSB);
dudmuck 18:9530d682fd9a 3535 printf("lora PreambleLength:%d\r\n", lora.RegPreamble);
dudmuck 18:9530d682fd9a 3536 } else {
dudmuck 18:9530d682fd9a 3537 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3538 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3539 radio.write_u16(REG_FSK_PREAMBLEMSB, i);
dudmuck 18:9530d682fd9a 3540 }
dudmuck 18:9530d682fd9a 3541 printf("PreambleSize:%d\r\n", radio.read_u16(REG_FSK_PREAMBLEMSB));
dudmuck 18:9530d682fd9a 3542 }
dudmuck 18:9530d682fd9a 3543 }
dudmuck 18:9530d682fd9a 3544
dudmuck 18:9530d682fd9a 3545 void cmd_fsk_PreamblePolarity(uint8_t idx)
dudmuck 18:9530d682fd9a 3546 {
dudmuck 18:9530d682fd9a 3547 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 18:9530d682fd9a 3548 fsk.RegSyncConfig.bits.PreamblePolarity ^= 1;
dudmuck 18:9530d682fd9a 3549 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 18:9530d682fd9a 3550 if (fsk.RegSyncConfig.bits.PreamblePolarity)
dudmuck 18:9530d682fd9a 3551 printf("0x55\r\n");
dudmuck 18:9530d682fd9a 3552 else
dudmuck 18:9530d682fd9a 3553 printf("0xaa\r\n");
dudmuck 18:9530d682fd9a 3554 }
dudmuck 18:9530d682fd9a 3555
dudmuck 18:9530d682fd9a 3556 void cmd_pllbw(uint8_t idx)
dudmuck 18:9530d682fd9a 3557 {
dudmuck 18:9530d682fd9a 3558 RegPll_t pll;
dudmuck 18:9530d682fd9a 3559 if (radio.type == SX1272) {
dudmuck 18:9530d682fd9a 3560 // 0x5c and 0x5e registers
dudmuck 18:9530d682fd9a 3561 pll.octet = radio.read_reg(REG_PLL_SX1272);
dudmuck 18:9530d682fd9a 3562 if (pll.bits.PllBandwidth == 3)
dudmuck 18:9530d682fd9a 3563 pll.bits.PllBandwidth = 0;
dudmuck 18:9530d682fd9a 3564 else
dudmuck 18:9530d682fd9a 3565 pll.bits.PllBandwidth++;
dudmuck 18:9530d682fd9a 3566 radio.write_reg(REG_PLL_SX1272, pll.octet);
dudmuck 18:9530d682fd9a 3567 pll.octet = radio.read_reg(REG_PLL_LOWPN_SX1272);
dudmuck 18:9530d682fd9a 3568 if (pll.bits.PllBandwidth == 3)
dudmuck 18:9530d682fd9a 3569 pll.bits.PllBandwidth = 0;
dudmuck 18:9530d682fd9a 3570 else
dudmuck 18:9530d682fd9a 3571 pll.bits.PllBandwidth++;
dudmuck 18:9530d682fd9a 3572 radio.write_reg(REG_PLL_LOWPN_SX1272, pll.octet);
dudmuck 18:9530d682fd9a 3573 } else if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 3574 // 0x70 register
dudmuck 18:9530d682fd9a 3575 pll.octet = radio.read_reg(REG_PLL_SX1276);
dudmuck 18:9530d682fd9a 3576 if (pll.bits.PllBandwidth == 3)
dudmuck 18:9530d682fd9a 3577 pll.bits.PllBandwidth = 0;
dudmuck 18:9530d682fd9a 3578 else
dudmuck 18:9530d682fd9a 3579 pll.bits.PllBandwidth++;
dudmuck 18:9530d682fd9a 3580 radio.write_reg(REG_PLL_SX1276, pll.octet);
dudmuck 18:9530d682fd9a 3581 }
dudmuck 18:9530d682fd9a 3582 switch (pll.bits.PllBandwidth) {
dudmuck 18:9530d682fd9a 3583 case 0: printf("75"); break;
dudmuck 18:9530d682fd9a 3584 case 1: printf("150"); break;
dudmuck 18:9530d682fd9a 3585 case 2: printf("225"); break;
dudmuck 18:9530d682fd9a 3586 case 3: printf("300"); break;
dudmuck 18:9530d682fd9a 3587 }
dudmuck 18:9530d682fd9a 3588 printf("KHz\r\n");
dudmuck 18:9530d682fd9a 3589 }
dudmuck 18:9530d682fd9a 3590
dudmuck 18:9530d682fd9a 3591 void cmd_lna_boost(uint8_t idx)
dudmuck 18:9530d682fd9a 3592 {
dudmuck 18:9530d682fd9a 3593 radio.RegLna.octet = radio.read_reg(REG_LNA);
dudmuck 18:9530d682fd9a 3594 if (radio.RegLna.bits.LnaBoostHF == 3)
dudmuck 18:9530d682fd9a 3595 radio.RegLna.bits.LnaBoostHF = 0;
dudmuck 18:9530d682fd9a 3596 else
dudmuck 18:9530d682fd9a 3597 radio.RegLna.bits.LnaBoostHF++;
dudmuck 18:9530d682fd9a 3598 radio.write_reg(REG_LNA, radio.RegLna.octet);
dudmuck 18:9530d682fd9a 3599 printf("LNA-boost:%d\r\n", radio.RegLna.bits.LnaBoostHF);
dudmuck 18:9530d682fd9a 3600 }
dudmuck 18:9530d682fd9a 3601
dudmuck 18:9530d682fd9a 3602 void cmd_LowDataRateOptimize(uint8_t idx)
dudmuck 18:9530d682fd9a 3603 {
dudmuck 18:9530d682fd9a 3604 if (radio.type == SX1272) {
dudmuck 18:9530d682fd9a 3605 lora.RegModemConfig.octet = radio.read_reg(REG_LR_MODEMCONFIG);
dudmuck 18:9530d682fd9a 3606 lora.RegModemConfig.sx1272bits.LowDataRateOptimize ^= 1;
dudmuck 18:9530d682fd9a 3607 printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig.sx1272bits.LowDataRateOptimize);
dudmuck 18:9530d682fd9a 3608 radio.write_reg(REG_LR_MODEMCONFIG, lora.RegModemConfig.octet);
dudmuck 18:9530d682fd9a 3609 } else if (radio.type == SX1276) {
dudmuck 18:9530d682fd9a 3610 lora.RegModemConfig3.octet = radio.read_reg(REG_LR_MODEMCONFIG3);
dudmuck 18:9530d682fd9a 3611 lora.RegModemConfig3.sx1276bits.LowDataRateOptimize ^= 1;
dudmuck 18:9530d682fd9a 3612 printf("LowDataRateOptimize:%d\r\n", lora.RegModemConfig3.sx1276bits.LowDataRateOptimize);
dudmuck 18:9530d682fd9a 3613 radio.write_reg(REG_LR_MODEMCONFIG3, lora.RegModemConfig3.octet);
dudmuck 18:9530d682fd9a 3614 }
dudmuck 18:9530d682fd9a 3615 }
dudmuck 18:9530d682fd9a 3616
dudmuck 18:9530d682fd9a 3617 void cmd_fsk_FifoThreshold(uint8_t idx)
dudmuck 18:9530d682fd9a 3618 {
dudmuck 18:9530d682fd9a 3619 int i;
dudmuck 18:9530d682fd9a 3620 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 18:9530d682fd9a 3621 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3622 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3623 fsk.RegFifoThreshold.bits.FifoThreshold = i;
dudmuck 18:9530d682fd9a 3624 }
dudmuck 18:9530d682fd9a 3625 radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet);
dudmuck 18:9530d682fd9a 3626 printf("FifoThreshold:%d\r\n", fsk.RegFifoThreshold.bits.FifoThreshold);
dudmuck 18:9530d682fd9a 3627 fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);
dudmuck 18:9530d682fd9a 3628 }
dudmuck 18:9530d682fd9a 3629
dudmuck 18:9530d682fd9a 3630 void cmd_tx_ticker_rate(uint8_t idx)
dudmuck 18:9530d682fd9a 3631 {
dudmuck 18:9530d682fd9a 3632 if (pcbuf[idx] != 0) {
dudmuck 18:9530d682fd9a 3633 sscanf(pcbuf+idx, "%f", &tx_ticker_rate);
dudmuck 18:9530d682fd9a 3634 }
dudmuck 18:9530d682fd9a 3635 printf("tx_ticker_rate:%f\r\n", tx_ticker_rate);
dudmuck 18:9530d682fd9a 3636 }
dudmuck 18:9530d682fd9a 3637
dudmuck 18:9530d682fd9a 3638 void cmd_lora_tx_invert(uint8_t idx)
dudmuck 18:9530d682fd9a 3639 {
dudmuck 18:9530d682fd9a 3640 lora.invert_tx(lora.RegTest33.bits.chirp_invert_tx);
dudmuck 18:9530d682fd9a 3641 printf("chirp_invert_tx :%d\r\n", lora.RegTest33.bits.chirp_invert_tx);
dudmuck 18:9530d682fd9a 3642 }
dudmuck 18:9530d682fd9a 3643
dudmuck 18:9530d682fd9a 3644 void cmd_lora_rx_invert(uint8_t idx)
dudmuck 18:9530d682fd9a 3645 {
dudmuck 18:9530d682fd9a 3646 lora.invert_rx(!lora.RegTest33.bits.invert_i_q);
dudmuck 18:9530d682fd9a 3647 printf("rx invert_i_q:%d\r\n", lora.RegTest33.bits.invert_i_q);
dudmuck 18:9530d682fd9a 3648 }
dudmuck 18:9530d682fd9a 3649
dudmuck 18:9530d682fd9a 3650 void cmd_fsk_dcfree(uint8_t idx)
dudmuck 18:9530d682fd9a 3651 {
dudmuck 18:9530d682fd9a 3652 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 18:9530d682fd9a 3653 if (fsk.RegPktConfig1.bits.DcFree == 3)
dudmuck 18:9530d682fd9a 3654 fsk.RegPktConfig1.bits.DcFree = 0;
dudmuck 18:9530d682fd9a 3655 else
dudmuck 18:9530d682fd9a 3656 fsk.RegPktConfig1.bits.DcFree++;
dudmuck 18:9530d682fd9a 3657 printf(" dcFree:");
dudmuck 18:9530d682fd9a 3658 switch (fsk.RegPktConfig1.bits.DcFree) {
dudmuck 18:9530d682fd9a 3659 case 0: printf("none "); break;
dudmuck 18:9530d682fd9a 3660 case 1: printf("Manchester "); break;
dudmuck 18:9530d682fd9a 3661 case 2: printf("Whitening "); break;
dudmuck 18:9530d682fd9a 3662 case 3: printf("reserved "); break;
dudmuck 18:9530d682fd9a 3663 }
dudmuck 18:9530d682fd9a 3664 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 18:9530d682fd9a 3665 printf("\r\n");
dudmuck 18:9530d682fd9a 3666 }
dudmuck 18:9530d682fd9a 3667
dudmuck 21:b84a77dfb43c 3668 void cmd_bt(uint8_t idx)
dudmuck 21:b84a77dfb43c 3669 {
dudmuck 21:b84a77dfb43c 3670 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 21:b84a77dfb43c 3671 if (radio.RegOpMode.bits.ModulationType != 0) {
dudmuck 21:b84a77dfb43c 3672 printf("!fsk\r\n");
dudmuck 21:b84a77dfb43c 3673 return;
dudmuck 21:b84a77dfb43c 3674 }
dudmuck 21:b84a77dfb43c 3675
dudmuck 21:b84a77dfb43c 3676 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 21:b84a77dfb43c 3677 float bt;
dudmuck 21:b84a77dfb43c 3678 sscanf(pcbuf+idx, "%f", &bt);
dudmuck 21:b84a77dfb43c 3679 if (bt > 1.0)
dudmuck 21:b84a77dfb43c 3680 radio.RegOpMode.bits.ModulationShaping = 0; // 0 = no shaping
dudmuck 21:b84a77dfb43c 3681 else if (bt > 0.6)
dudmuck 21:b84a77dfb43c 3682 radio.RegOpMode.bits.ModulationShaping = 1; // 1 = BT1.0
dudmuck 21:b84a77dfb43c 3683 else if (bt > 0.4)
dudmuck 21:b84a77dfb43c 3684 radio.RegOpMode.bits.ModulationShaping = 2; // 2 = BT0.5
dudmuck 21:b84a77dfb43c 3685 else
dudmuck 21:b84a77dfb43c 3686 radio.RegOpMode.bits.ModulationShaping = 3; // 3 = BT0.3
dudmuck 21:b84a77dfb43c 3687 }
dudmuck 21:b84a77dfb43c 3688 radio.write_reg(REG_OPMODE, radio.RegOpMode.octet);
dudmuck 21:b84a77dfb43c 3689 switch (radio.RegOpMode.bits.ModulationShaping) {
dudmuck 21:b84a77dfb43c 3690 case 0: printf("no-shaping "); break;
dudmuck 21:b84a77dfb43c 3691 case 1: printf("BT1.0 "); break;
dudmuck 21:b84a77dfb43c 3692 case 2: printf("BT0.5 "); break;
dudmuck 21:b84a77dfb43c 3693 case 3: printf("BT0.3 "); break;
dudmuck 21:b84a77dfb43c 3694 }
dudmuck 21:b84a77dfb43c 3695 printf("\r\n");
dudmuck 21:b84a77dfb43c 3696 }
dudmuck 21:b84a77dfb43c 3697
dudmuck 18:9530d682fd9a 3698 void cmd_fsk_DataMode(uint8_t idx)
dudmuck 18:9530d682fd9a 3699 {
dudmuck 18:9530d682fd9a 3700 fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
dudmuck 18:9530d682fd9a 3701 fsk.RegPktConfig2.bits.DataModePacket ^= 1;
dudmuck 18:9530d682fd9a 3702 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 18:9530d682fd9a 3703 printf("datamode:");
dudmuck 18:9530d682fd9a 3704 if (fsk.RegPktConfig2.bits.DataModePacket)
dudmuck 18:9530d682fd9a 3705 printf("packet\r\n");
dudmuck 18:9530d682fd9a 3706 else
dudmuck 18:9530d682fd9a 3707 printf("continuous\r\n");
dudmuck 18:9530d682fd9a 3708 }
dudmuck 18:9530d682fd9a 3709
dudmuck 18:9530d682fd9a 3710 void cmd_show_dio(uint8_t idx)
dudmuck 18:9530d682fd9a 3711 {
dudmuck 18:9530d682fd9a 3712 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 3713 lora_print_dio();
dudmuck 18:9530d682fd9a 3714 else
dudmuck 18:9530d682fd9a 3715 fsk_print_dio();
dudmuck 18:9530d682fd9a 3716 }
dudmuck 18:9530d682fd9a 3717
dudmuck 18:9530d682fd9a 3718 void cmd_set_dio(uint8_t idx)
dudmuck 18:9530d682fd9a 3719 {
dudmuck 18:9530d682fd9a 3720 switch (pcbuf[idx]) {
dudmuck 18:9530d682fd9a 3721 case '0':
dudmuck 18:9530d682fd9a 3722 radio.RegDioMapping1.bits.Dio0Mapping++;
dudmuck 18:9530d682fd9a 3723 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 3724 break;
dudmuck 18:9530d682fd9a 3725 case '1':
dudmuck 18:9530d682fd9a 3726 radio.RegDioMapping1.bits.Dio1Mapping++;
dudmuck 18:9530d682fd9a 3727 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 3728 break;
dudmuck 18:9530d682fd9a 3729 case '2':
dudmuck 18:9530d682fd9a 3730 radio.RegDioMapping1.bits.Dio2Mapping++;
dudmuck 18:9530d682fd9a 3731 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 3732 break;
dudmuck 18:9530d682fd9a 3733 case '3':
dudmuck 18:9530d682fd9a 3734 radio.RegDioMapping1.bits.Dio3Mapping++;
dudmuck 18:9530d682fd9a 3735 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 18:9530d682fd9a 3736 break;
dudmuck 18:9530d682fd9a 3737 case '4':
dudmuck 18:9530d682fd9a 3738 radio.RegDioMapping2.bits.Dio4Mapping++;
dudmuck 18:9530d682fd9a 3739 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 18:9530d682fd9a 3740 break;
dudmuck 18:9530d682fd9a 3741 case '5':
dudmuck 18:9530d682fd9a 3742 radio.RegDioMapping2.bits.Dio5Mapping++;
dudmuck 18:9530d682fd9a 3743 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 18:9530d682fd9a 3744 break;
dudmuck 18:9530d682fd9a 3745 } // ...switch (pcbuf[idx])
dudmuck 18:9530d682fd9a 3746 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 18:9530d682fd9a 3747 lora_print_dio();
dudmuck 18:9530d682fd9a 3748 else
dudmuck 18:9530d682fd9a 3749 fsk_print_dio();
dudmuck 18:9530d682fd9a 3750 }
dudmuck 18:9530d682fd9a 3751
dudmuck 18:9530d682fd9a 3752 void cmd_mode_standby(uint8_t idx)
dudmuck 18:9530d682fd9a 3753 {
dudmuck 18:9530d682fd9a 3754 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 18:9530d682fd9a 3755 printf("standby\r\n");
dudmuck 18:9530d682fd9a 3756 }
dudmuck 18:9530d682fd9a 3757
dudmuck 18:9530d682fd9a 3758 void cmd_mode_sleep(uint8_t idx)
dudmuck 18:9530d682fd9a 3759 {
dudmuck 18:9530d682fd9a 3760 radio.set_opmode(RF_OPMODE_SLEEP);
dudmuck 18:9530d682fd9a 3761 printf("sleep\r\n");
dudmuck 18:9530d682fd9a 3762 }
dudmuck 18:9530d682fd9a 3763
dudmuck 18:9530d682fd9a 3764 void cmd_mode_fstx(uint8_t idx)
dudmuck 18:9530d682fd9a 3765 {
dudmuck 18:9530d682fd9a 3766 radio.set_opmode(RF_OPMODE_SYNTHESIZER_TX);
dudmuck 18:9530d682fd9a 3767 printf("fstx\r\n");
dudmuck 18:9530d682fd9a 3768 }
dudmuck 18:9530d682fd9a 3769
dudmuck 18:9530d682fd9a 3770 void cmd_mode_fsrx(uint8_t idx)
dudmuck 18:9530d682fd9a 3771 {
dudmuck 18:9530d682fd9a 3772 radio.set_opmode(RF_OPMODE_SYNTHESIZER_RX);
dudmuck 18:9530d682fd9a 3773 printf("fsrx\r\n");
dudmuck 18:9530d682fd9a 3774 }
dudmuck 18:9530d682fd9a 3775
dudmuck 18:9530d682fd9a 3776 void cmd_chat(uint8_t idx)
dudmuck 18:9530d682fd9a 3777 {
dudmuck 18:9530d682fd9a 3778 app = APP_CHAT;
dudmuck 18:9530d682fd9a 3779 lora.start_rx(RF_OPMODE_RECEIVER);
dudmuck 18:9530d682fd9a 3780 printf("chat start\r\n");
dudmuck 18:9530d682fd9a 3781 }
dudmuck 18:9530d682fd9a 3782
dudmuck 18:9530d682fd9a 3783 void cmd_OokThreshType(uint8_t idx)
dudmuck 18:9530d682fd9a 3784 {
dudmuck 18:9530d682fd9a 3785 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 18:9530d682fd9a 3786 if (fsk.RegOokPeak.bits.OokThreshType == 2)
dudmuck 18:9530d682fd9a 3787 fsk.RegOokPeak.bits.OokThreshType = 0;
dudmuck 18:9530d682fd9a 3788 else
dudmuck 18:9530d682fd9a 3789 fsk.RegOokPeak.bits.OokThreshType++;
dudmuck 18:9530d682fd9a 3790
dudmuck 18:9530d682fd9a 3791 radio.write_reg(REG_FSK_OOKPEAK, fsk.RegOokPeak.octet);
dudmuck 18:9530d682fd9a 3792 printf("OokThreshType:");
dudmuck 18:9530d682fd9a 3793 switch (fsk.RegOokPeak.bits.OokThreshType) {
dudmuck 18:9530d682fd9a 3794 case 0: printf("fixed"); break;
dudmuck 18:9530d682fd9a 3795 case 1: printf("peak"); break;
dudmuck 18:9530d682fd9a 3796 case 2: printf("average"); break;
dudmuck 18:9530d682fd9a 3797 case 3: printf("?"); break;
dudmuck 18:9530d682fd9a 3798 }
dudmuck 18:9530d682fd9a 3799 printf("\r\n");
dudmuck 18:9530d682fd9a 3800 }
dudmuck 18:9530d682fd9a 3801
dudmuck 18:9530d682fd9a 3802 void cmd_OokPeakTheshStep(uint8_t idx)
dudmuck 18:9530d682fd9a 3803 {
dudmuck 18:9530d682fd9a 3804 float f;
dudmuck 18:9530d682fd9a 3805 fsk.RegOokPeak.octet = radio.read_reg(REG_FSK_OOKPEAK);
dudmuck 18:9530d682fd9a 3806 if (fsk.RegOokPeak.bits.OokPeakThreshStep == 7)
dudmuck 18:9530d682fd9a 3807 fsk.RegOokPeak.bits.OokPeakThreshStep = 0;
dudmuck 18:9530d682fd9a 3808 else
dudmuck 18:9530d682fd9a 3809 fsk.RegOokPeak.bits.OokPeakThreshStep++;
dudmuck 18:9530d682fd9a 3810
dudmuck 18:9530d682fd9a 3811 radio.write_reg(REG_FSK_OOKPEAK, fsk.RegOokPeak.octet);
dudmuck 18:9530d682fd9a 3812 switch (fsk.RegOokPeak.bits.OokPeakThreshStep) {
dudmuck 18:9530d682fd9a 3813 case 0: f = 0.5; break;
dudmuck 18:9530d682fd9a 3814 case 1: f = 1; break;
dudmuck 18:9530d682fd9a 3815 case 2: f = 1.5; break;
dudmuck 18:9530d682fd9a 3816 case 3: f = 2; break;
dudmuck 18:9530d682fd9a 3817 case 4: f = 3; break;
dudmuck 18:9530d682fd9a 3818 case 5: f = 4; break;
dudmuck 18:9530d682fd9a 3819 case 6: f = 5; break;
dudmuck 18:9530d682fd9a 3820 case 7: f = 6; break;
dudmuck 18:9530d682fd9a 3821 }
dudmuck 18:9530d682fd9a 3822 printf("OokPeakThreshStep:%.1fdB\r\n", f);
dudmuck 18:9530d682fd9a 3823 }
dudmuck 18:9530d682fd9a 3824
dudmuck 18:9530d682fd9a 3825 void cmd_OokFixedThresh(uint8_t idx)
dudmuck 18:9530d682fd9a 3826 {
dudmuck 18:9530d682fd9a 3827 int i;
dudmuck 18:9530d682fd9a 3828 if (pcbuf[idx] >= '0' && pcbuf[idx] <= '9') {
dudmuck 18:9530d682fd9a 3829 sscanf(pcbuf+idx, "%d", &i);
dudmuck 18:9530d682fd9a 3830 radio.write_reg(REG_FSK_OOKFIX, i);
dudmuck 18:9530d682fd9a 3831 }
dudmuck 18:9530d682fd9a 3832 i = radio.read_reg(REG_FSK_OOKFIX);
dudmuck 18:9530d682fd9a 3833 printf("OokFixedThreshold:%d\r\n", i);
dudmuck 18:9530d682fd9a 3834 }
dudmuck 18:9530d682fd9a 3835
dudmuck 18:9530d682fd9a 3836 void cmd_clkout(uint8_t idx)
dudmuck 18:9530d682fd9a 3837 {
dudmuck 18:9530d682fd9a 3838 RegOsc_t reg_osc;
dudmuck 18:9530d682fd9a 3839 reg_osc.octet = radio.read_reg(REG_FSK_OSC);
dudmuck 18:9530d682fd9a 3840 if (reg_osc.bits.ClkOut == 7)
dudmuck 18:9530d682fd9a 3841 reg_osc.bits.ClkOut = 0;
dudmuck 18:9530d682fd9a 3842 else
dudmuck 18:9530d682fd9a 3843 reg_osc.bits.ClkOut++;
dudmuck 18:9530d682fd9a 3844
dudmuck 18:9530d682fd9a 3845 printf("ClkOut:%d\r\n", reg_osc.bits.ClkOut);
dudmuck 18:9530d682fd9a 3846 radio.write_reg(REG_FSK_OSC, reg_osc.octet);
dudmuck 18:9530d682fd9a 3847 }
dudmuck 21:b84a77dfb43c 3848
dudmuck 21:b84a77dfb43c 3849 void cmd_ook_tx_test(uint8_t idx)
dudmuck 21:b84a77dfb43c 3850 {
dudmuck 21:b84a77dfb43c 3851 radio.set_frf_MHz(915.0);
dudmuck 21:b84a77dfb43c 3852
dudmuck 21:b84a77dfb43c 3853 radio.RegOpMode.octet = radio.read_reg(REG_OPMODE);
dudmuck 21:b84a77dfb43c 3854 if (radio.RegOpMode.bits.LongRangeMode)
dudmuck 21:b84a77dfb43c 3855 cmd_toggle_modem(0);
dudmuck 21:b84a77dfb43c 3856
dudmuck 21:b84a77dfb43c 3857 fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
dudmuck 21:b84a77dfb43c 3858 fsk.RegPktConfig1.bits.CrcOn = 0;
dudmuck 21:b84a77dfb43c 3859 radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
dudmuck 21:b84a77dfb43c 3860
dudmuck 21:b84a77dfb43c 3861 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 21:b84a77dfb43c 3862 radio.RegDioMapping2.bits.Dio5Mapping = 2; // Data
dudmuck 21:b84a77dfb43c 3863 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 21:b84a77dfb43c 3864
dudmuck 21:b84a77dfb43c 3865 radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
dudmuck 21:b84a77dfb43c 3866 radio.RegDioMapping1.bits.Dio3Mapping = 1; // TxReady
dudmuck 21:b84a77dfb43c 3867 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 21:b84a77dfb43c 3868
dudmuck 21:b84a77dfb43c 3869 //radio.write_reg(REG_FSK_SYNCCONFIG, 0);
dudmuck 21:b84a77dfb43c 3870 cmd_ook(0);
dudmuck 21:b84a77dfb43c 3871 radio.write_reg(REG_FSK_SYNCCONFIG, 0);
dudmuck 21:b84a77dfb43c 3872 /* radio.write_u16(REG_FSK_PREAMBLEMSB, 4); // preamble length
dudmuck 21:b84a77dfb43c 3873
dudmuck 21:b84a77dfb43c 3874 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 21:b84a77dfb43c 3875 fsk.RegSyncConfig.bits.SyncOn = 1;
dudmuck 21:b84a77dfb43c 3876 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 21:b84a77dfb43c 3877
dudmuck 21:b84a77dfb43c 3878 // 0123456
dudmuck 21:b84a77dfb43c 3879 sprintf(pcbuf, "syncw a9 66 69 65");
dudmuck 21:b84a77dfb43c 3880 cmd_fsk_syncword(6);*/
dudmuck 21:b84a77dfb43c 3881 tx_ticker.attach(&callback_ook_tx_test, tx_ticker_rate);
dudmuck 21:b84a77dfb43c 3882 }
dudmuck 18:9530d682fd9a 3883
dudmuck 18:9530d682fd9a 3884 void cmd_help(uint8_t args_at);
dudmuck 18:9530d682fd9a 3885
dudmuck 18:9530d682fd9a 3886 typedef enum {
dudmuck 18:9530d682fd9a 3887 MODEM_BOTH,
dudmuck 18:9530d682fd9a 3888 MODEM_FSK,
dudmuck 18:9530d682fd9a 3889 MODEM_LORA
dudmuck 18:9530d682fd9a 3890 } modem_e;
dudmuck 18:9530d682fd9a 3891
dudmuck 18:9530d682fd9a 3892 typedef struct {
dudmuck 18:9530d682fd9a 3893 modem_e modem;
dudmuck 18:9530d682fd9a 3894 const char* const cmd;
dudmuck 18:9530d682fd9a 3895 void (*handler)(uint8_t args_at);
dudmuck 18:9530d682fd9a 3896 const char* const arg_descr;
dudmuck 18:9530d682fd9a 3897 const char* const description;
dudmuck 18:9530d682fd9a 3898 } menu_item_t;
dudmuck 18:9530d682fd9a 3899
dudmuck 18:9530d682fd9a 3900 const menu_item_t menu_items[] =
dudmuck 18:9530d682fd9a 3901 { /* after first character, command names must be [A-Za-z] */
dudmuck 18:9530d682fd9a 3902 { MODEM_BOTH, "chat", cmd_chat, "","start keyboard chat"},
dudmuck 18:9530d682fd9a 3903 { MODEM_BOTH, "rssi", cmd_read_current_rssi, "","(RX) read instantaneous RSSI"},
dudmuck 21:b84a77dfb43c 3904 { MODEM_BOTH, "prssi", cmd_rssi_polling, "<%d>","dbm of rssi polling, 0 = off"},
dudmuck 18:9530d682fd9a 3905 { MODEM_BOTH, "txpd", cmd_per_tx_delay, "<%d>","get/set PER tx delay (in milliseconds)"},
dudmuck 18:9530d682fd9a 3906 { MODEM_BOTH, "pertx", cmd_pertx, "<%d pkt count>","start Eiger PER TX"},
dudmuck 18:9530d682fd9a 3907 { MODEM_BOTH, "perrx", cmd_perrx, "","start Eiger PER RX"},
dudmuck 18:9530d682fd9a 3908 { MODEM_BOTH, "pres", cmd_PreambleSize, "<%d>", "get/set PreambleSize"},
dudmuck 18:9530d682fd9a 3909 { MODEM_BOTH, "pllbw", cmd_pllbw, "", "increment pllbw"},
dudmuck 18:9530d682fd9a 3910 { MODEM_BOTH, "lnab", cmd_lna_boost, "", "(RX) increment LNA boost"},
dudmuck 18:9530d682fd9a 3911 { MODEM_BOTH, "stby", cmd_mode_standby, "", "set chip mode to standby"},
dudmuck 18:9530d682fd9a 3912 { MODEM_BOTH, "sleep", cmd_mode_sleep, "", "set chip mode to sleep"},
dudmuck 18:9530d682fd9a 3913 { MODEM_BOTH, "fstx", cmd_mode_fstx, "", "set chip mode to fstx"},
dudmuck 18:9530d682fd9a 3914 { MODEM_BOTH, "fsrx", cmd_mode_fsrx, "", "set chip mode to fsrx"},
dudmuck 18:9530d682fd9a 3915 { MODEM_BOTH, "crcon", cmd_crcOn, "","toggle crcOn"},
dudmuck 21:b84a77dfb43c 3916 { MODEM_BOTH, "ethcrc", cmd_crc32, "","toggle enable software crc32"},
dudmuck 21:b84a77dfb43c 3917 { MODEM_BOTH, "spif", cmd_spifreq, "<MHz>","change SPI clock frequency"},
dudmuck 18:9530d682fd9a 3918 { MODEM_BOTH, "payl", cmd_payload_length, "<%d>","get/set payload length"},
dudmuck 18:9530d682fd9a 3919 { MODEM_BOTH, "bgr", cmd_bgr, "<%d>","(TX) get/set reference for TX DAC"},
dudmuck 18:9530d682fd9a 3920 { MODEM_BOTH, "ocp", cmd_ocp, "<%d>","(TX) get/set milliamps current limit"},
dudmuck 18:9530d682fd9a 3921 { MODEM_BOTH, "frf", cmd_frf, "<MHz>","get/set RF center frequency"},
dudmuck 18:9530d682fd9a 3922 { MODEM_BOTH, "pas", cmd_paSelect, "","(TX) toggle RFO/PA_BOOST"},
dudmuck 18:9530d682fd9a 3923 { MODEM_BOTH, "pid", cmd_per_id, "<%d>","get/set ID number in Eiger PER packet"},
dudmuck 18:9530d682fd9a 3924 { MODEM_BOTH, "dio", cmd_show_dio, "","print dio mapping"},
dudmuck 18:9530d682fd9a 3925
dudmuck 18:9530d682fd9a 3926 { MODEM_FSK, "clkout", cmd_clkout, "","increment ClkOut divider"},
dudmuck 18:9530d682fd9a 3927 { MODEM_FSK, "ookt", cmd_OokThreshType, "","(RX) increment OokThreshType"},
dudmuck 18:9530d682fd9a 3928 { MODEM_FSK, "ooks", cmd_OokPeakTheshStep, "","(RX) increment OokPeakTheshStep"},
dudmuck 18:9530d682fd9a 3929 { MODEM_FSK, "sqlch", cmd_OokFixedThresh, "<%d>","(RX) get/set OokFixedThresh"},
dudmuck 18:9530d682fd9a 3930 { MODEM_FSK, "rssit", cmd_rssi_threshold, "<-dBm>","(RX) get/set rssi threshold"},
dudmuck 18:9530d682fd9a 3931 { MODEM_FSK, "rssis", cmd_rssi_smoothing, "<%d>","(RX) get/set rssi smoothing"},
dudmuck 18:9530d682fd9a 3932 { MODEM_FSK, "rssio", cmd_rssi_offset, "<%d>","(RX) get/set rssi offset"},
dudmuck 18:9530d682fd9a 3933 { MODEM_FSK, "mods", cmd_mod_shaping, "", "(TX) increment modulation shaping"},
dudmuck 18:9530d682fd9a 3934 { MODEM_FSK, "agcauto", cmd_fsk_agcauto, "", "(RX) toggle AgcAutoOn"},
dudmuck 18:9530d682fd9a 3935 { MODEM_FSK, "afcauto", cmd_fsk_afcauto, "", "(RX) toggle AfcAutoOn"},
dudmuck 18:9530d682fd9a 3936 { MODEM_FSK, "syncw", cmd_fsk_syncword, "<hex bytes>", "get/set syncword"},
dudmuck 18:9530d682fd9a 3937 { MODEM_FSK, "syncon", cmd_fsk_syncOn, "", "toggle SyncOn (frame sync, SFD enable)"},
dudmuck 18:9530d682fd9a 3938 { MODEM_FSK, "bitsync", cmd_fsk_bitsync, "", "toggle BitSyncOn (continuous mode only)"},
dudmuck 18:9530d682fd9a 3939 { MODEM_FSK, "fifot", cmd_fsk_TxStartCondition, "", "(TX) toggle TxStartCondition"},
dudmuck 18:9530d682fd9a 3940 { MODEM_FSK, "pktf", cmd_fsk_PacketFormat, "", "toggle PacketFormat fixed/variable length"},
dudmuck 18:9530d682fd9a 3941 { MODEM_FSK, "poll", cmd_poll_irq_en, "", "toggle poll_irq_en"},
dudmuck 18:9530d682fd9a 3942 { MODEM_FSK, "prep", cmd_fsk_PreamblePolarity, "", "toggle PreamblePolarity"},
dudmuck 18:9530d682fd9a 3943 { MODEM_FSK, "datam", cmd_fsk_DataMode, "", "toggle DataMode (packet/continuous)"},
dudmuck 18:9530d682fd9a 3944 { MODEM_FSK, "rxt", cmd_rx_trigger, "","(RX) increment RxTrigger"},
dudmuck 18:9530d682fd9a 3945 { MODEM_FSK, "ook", cmd_ook, "","enter OOK mode"},
dudmuck 21:b84a77dfb43c 3946 { MODEM_FSK, "otx", cmd_ook_tx_test, "","start ook tx repeat"},
dudmuck 18:9530d682fd9a 3947 { MODEM_FSK, "fei", cmd_fsk_read_fei, "","(RX) read FEI"},
dudmuck 18:9530d682fd9a 3948 { MODEM_FSK, "fdev", cmd_fsk_fdev, "<kHz>","(TX) get/set fdev"},
dudmuck 18:9530d682fd9a 3949 { MODEM_FSK, "par", cmd_paRamp, "","(TX) increment paRamp"},
dudmuck 18:9530d682fd9a 3950 { MODEM_FSK, "pde", cmd_fsk_PreambleDetectorOn, "","(RX) toggle PreambleDetectorOn"},
dudmuck 18:9530d682fd9a 3951 { MODEM_FSK, "pds", cmd_fsk_PreambleDetectorSize, "<%d>","(RX) get/set PreambleDetectorSize"},
dudmuck 18:9530d682fd9a 3952 { MODEM_FSK, "pdt", cmd_fsk_PreambleDetectorTol, "<%d>","(RX) get/set PreambleDetectorTol"},
dudmuck 18:9530d682fd9a 3953 { MODEM_FSK, "thr", cmd_fsk_FifoThreshold, "<%d>","get/set FifoThreshold"},
dudmuck 18:9530d682fd9a 3954 { MODEM_FSK, "dcf", cmd_fsk_dcfree, "","(RX) increment DcFree"},
dudmuck 18:9530d682fd9a 3955 { MODEM_FSK, "br", cmd_fsk_bitrate, "<%f kbps>","get/set bitrate"},
dudmuck 18:9530d682fd9a 3956 { MODEM_FSK, "ac", cmd_AfcClear, "","(RX) AfcClear"},
dudmuck 18:9530d682fd9a 3957 { MODEM_FSK, "ar", cmd_fsk_AutoRestartRxMode, "","(RX) increment AutoRestartRxMode"},
dudmuck 18:9530d682fd9a 3958 { MODEM_FSK, "alc", cmd_fsk_AfcAutoClearOn, "","(RX) toggle AfcAutoClearOn"},
dudmuck 18:9530d682fd9a 3959 { MODEM_FSK, "mp", cmd_MapPreambleDetect, "","(RX) toggle MapPreambleDetect"},
dudmuck 20:b11592c9ba5f 3960 { MODEM_FSK, "rrx", cmd_restart_rx, "","restart RX"},
dudmuck 18:9530d682fd9a 3961 { MODEM_BOTH, "op", cmd_op, "<dBm>","(TX) get/set TX power"},
dudmuck 21:b84a77dfb43c 3962 { MODEM_FSK, "bt", cmd_bt, "","get/set BT"},
dudmuck 22:2005df80c8a8 3963 { MODEM_FSK, "ltx", cmd_long_tx, "<%d>","long tx"},
dudmuck 18:9530d682fd9a 3964
dudmuck 18:9530d682fd9a 3965 #ifdef LORA_TX_TEST
dudmuck 18:9530d682fd9a 3966 { MODEM_LORA, "apl", cmd_lora_all_payload_lengths, "","(TXTEST) sweep payload lengths 0->255"},
dudmuck 18:9530d682fd9a 3967 { MODEM_LORA, "csn", cmd_lora_sync_sweep, "[12]","(TXTEST) sweep ppg symbol"},
dudmuck 18:9530d682fd9a 3968 { MODEM_LORA, "ss", cmd_lora_sync_lo_nibble, "","(TXTEST) ppg low nibble"},
dudmuck 18:9530d682fd9a 3969 { MODEM_LORA, "cpl", lora_cycle_payload_length, "[%d stop]","(TXTEST) sweep payload length"},
dudmuck 18:9530d682fd9a 3970 { MODEM_LORA, "ro", cmd_lora_data_ramp, "[%d bytes]","(TXTEST) sweep payload data"},
dudmuck 18:9530d682fd9a 3971 { MODEM_LORA, "ccr", cmd_lora_cycle_codingrates, "","(TXTEST) cycle coding rates"},
dudmuck 18:9530d682fd9a 3972 { MODEM_LORA, "fps", cmd_lora_fixed_payload_symbol, "[symbol_num n_bits]","(TXTEST) sweep symbol, n_bits=bits per symbol set (sf8=24, sf9=28, etc)"},
dudmuck 18:9530d682fd9a 3973 { MODEM_LORA, "fpo", cmd_fixed_payload_offset, "<nbytes>","(TXTEST) padding offset for fp tests"},
dudmuck 18:9530d682fd9a 3974 { MODEM_LORA, "fp", cmd_lora_fixed_payload, "[bytes]","(TXTEST) fixed payload"},
dudmuck 18:9530d682fd9a 3975 { MODEM_LORA, "tab", cmd_lora_toggle_all_bits, "[byte length]","(TXTEST) toggle all bits"},
dudmuck 18:9530d682fd9a 3976 { MODEM_LORA, "tcrc", cmd_lora_toggle_crcOn, "","(TXTEST) toggle crcOn"},
dudmuck 18:9530d682fd9a 3977 { MODEM_LORA, "thm", cmd_lora_toggle_header_mode, "","(TXTEST) toggle explicit/implicit"},
dudmuck 18:9530d682fd9a 3978 #endif /* LORA_TX_TEST */
dudmuck 18:9530d682fd9a 3979
dudmuck 21:b84a77dfb43c 3980 { MODEM_BOTH, "ttr", cmd_tx_ticker_rate, "<%f seconds>","(TXTEST) get/set tx_ticker rate"},
dudmuck 18:9530d682fd9a 3981 { MODEM_LORA, "cadper", cmd_cadper, "","Eiger PER RX using CAD" },
dudmuck 18:9530d682fd9a 3982 { MODEM_LORA, "cad", cmd_cad, "<%d num tries>","(RX) run channel activity detection" },
dudmuck 18:9530d682fd9a 3983 { MODEM_LORA, "iqinv", cmd_lora_rx_invert, "","(RX) toggle RX IQ invert" },
dudmuck 18:9530d682fd9a 3984 { MODEM_LORA, "cin", cmd_lora_tx_invert, "","(TX) toggle TX IQ invert" },
dudmuck 18:9530d682fd9a 3985 { MODEM_LORA, "lhp", cmd_hop_period, "<%d>","(RX) get/set hop period"},
dudmuck 18:9530d682fd9a 3986 { MODEM_LORA, "sync", cmd_lora_ppg, "<%x>","get/set sync (post-preamble gap)"},
dudmuck 18:9530d682fd9a 3987 { MODEM_LORA, "cr", cmd_codingRate, "<1-4>","get/set codingRate"},
dudmuck 18:9530d682fd9a 3988 { MODEM_LORA, "lhm", cmd_lora_header_mode, "","toggle explicit/implicit"},
dudmuck 18:9530d682fd9a 3989 { MODEM_LORA, "vh", cmd_lora_poll_validHeader, "","toggle polling of validHeader"},
dudmuck 18:9530d682fd9a 3990 { MODEM_LORA, "sf", cmd_lora_sf, "<%d>","get/set spreadingFactor"},
dudmuck 18:9530d682fd9a 3991 { MODEM_LORA, "ldr", cmd_LowDataRateOptimize, "","toggle LowDataRateOptimize"},
dudmuck 18:9530d682fd9a 3992 { MODEM_LORA, "txc", cmd_lora_continuous_tx, "","(TX) toggle TxContinuousMode"},
dudmuck 18:9530d682fd9a 3993 { MODEM_BOTH, "tx", cmd_tx, "<%d>","transmit packet. optional payload length"},
dudmuck 18:9530d682fd9a 3994 { MODEM_BOTH, "bw", cmd_bandwidth, "<kHz>","get/set bandwith"},
dudmuck 18:9530d682fd9a 3995 { MODEM_LORA, "rxt", cmd_rx_timeout, "<%d>","(RX) get/set SymbTimeout"},
dudmuck 18:9530d682fd9a 3996 { MODEM_LORA, "rxs", cmd_rx_single, "","start RX_SINGLE"},
dudmuck 18:9530d682fd9a 3997 { MODEM_BOTH, "rx", cmd_rx, "","start RX"},
dudmuck 18:9530d682fd9a 3998
dudmuck 18:9530d682fd9a 3999 { MODEM_BOTH, "h", cmd_hw_reset, "","hardware reset"},
dudmuck 18:9530d682fd9a 4000 { MODEM_BOTH, "i", cmd_init, "","initialize radio driver"},
dudmuck 18:9530d682fd9a 4001 { MODEM_BOTH, "R", cmd_read_all_regs, "","read all radio registers"},
dudmuck 18:9530d682fd9a 4002 { MODEM_BOTH, "r", cmd_radio_reg_read, "[%x]","read single radio register"},
dudmuck 18:9530d682fd9a 4003 { MODEM_BOTH, "w", cmd_radio_reg_write, "[%x %x]","write single radio register"},
dudmuck 18:9530d682fd9a 4004
dudmuck 18:9530d682fd9a 4005 { MODEM_BOTH, "L", cmd_toggle_modem, "","toggle between LoRa / FSK"},
dudmuck 18:9530d682fd9a 4006 { MODEM_FSK, "E", cmd_empty_fifo, "","empty out FIFO"},
dudmuck 18:9530d682fd9a 4007 { MODEM_FSK, "c", cmd_fsk_test_case, "<%d>","get/set test cases"},
dudmuck 18:9530d682fd9a 4008 { MODEM_BOTH, "d", cmd_set_dio, "<%d pin num>","increment dio mapping"},
dudmuck 18:9530d682fd9a 4009 { MODEM_BOTH, ".", cmd_print_status, "","print status"},
dudmuck 18:9530d682fd9a 4010 { MODEM_BOTH, "?", cmd_help, "","this list of commands"},
dudmuck 19:be8a8b0e7320 4011 { MODEM_BOTH, NULL, NULL, NULL, NULL }
dudmuck 18:9530d682fd9a 4012 };
dudmuck 18:9530d682fd9a 4013
dudmuck 18:9530d682fd9a 4014 void cmd_help(uint8_t args_at)
dudmuck 18:9530d682fd9a 4015 {
dudmuck 18:9530d682fd9a 4016 int i;
dudmuck 18:9530d682fd9a 4017
dudmuck 18:9530d682fd9a 4018 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 4019 if (menu_items[i].modem == MODEM_BOTH)
dudmuck 18:9530d682fd9a 4020 printf("%s%s\t%s\r\n", menu_items[i].cmd, menu_items[i].arg_descr, menu_items[i].description);
dudmuck 18:9530d682fd9a 4021 }
dudmuck 18:9530d682fd9a 4022
dudmuck 18:9530d682fd9a 4023 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 4024 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 4025 if (menu_items[i].modem == MODEM_LORA)
dudmuck 18:9530d682fd9a 4026 printf("%s%s\t(LoRa) %s\r\n", menu_items[i].cmd, menu_items[i].arg_descr, menu_items[i].description);
dudmuck 18:9530d682fd9a 4027 }
dudmuck 18:9530d682fd9a 4028 } else {
dudmuck 18:9530d682fd9a 4029 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 4030 if (menu_items[i].modem == MODEM_FSK)
dudmuck 18:9530d682fd9a 4031 printf("%s%s\t(FSK) %s\r\n", menu_items[i].cmd, menu_items[i].arg_descr, menu_items[i].description);
dudmuck 18:9530d682fd9a 4032 }
dudmuck 18:9530d682fd9a 4033 }
dudmuck 10:d9bb2ce57f05 4034 }
dudmuck 10:d9bb2ce57f05 4035
dudmuck 0:be215de91a68 4036 void
dudmuck 0:be215de91a68 4037 console()
dudmuck 0:be215de91a68 4038 {
dudmuck 18:9530d682fd9a 4039 int i;
dudmuck 18:9530d682fd9a 4040 uint8_t user_cmd_len;
dudmuck 5:360069ec9953 4041
dudmuck 18:9530d682fd9a 4042 if (poll_irq_en)
dudmuck 18:9530d682fd9a 4043 poll_service_radio();
dudmuck 18:9530d682fd9a 4044 else
dudmuck 18:9530d682fd9a 4045 service_radio();
dudmuck 0:be215de91a68 4046
dudmuck 5:360069ec9953 4047 if (pcbuf_len < 0) {
dudmuck 0:be215de91a68 4048 printf("abort\r\n");
dudmuck 21:b84a77dfb43c 4049 rx_payloadReady_int_en = false;
dudmuck 18:9530d682fd9a 4050 cadper_enable = false;
dudmuck 8:227605e4a760 4051 per_en = false;
dudmuck 5:360069ec9953 4052 pcbuf_len = 0;
dudmuck 15:c69b942685ea 4053 if ((radio.RegOpMode.bits.Mode != RF_OPMODE_SLEEP) && (radio.RegOpMode.bits.Mode != RF_OPMODE_STANDBY)) {
dudmuck 15:c69b942685ea 4054 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 15:c69b942685ea 4055 }
dudmuck 18:9530d682fd9a 4056 on_txdone_state = ON_TXDONE_STATE_NONE;
dudmuck 18:9530d682fd9a 4057 tx_ticker.detach();
dudmuck 0:be215de91a68 4058 return;
dudmuck 0:be215de91a68 4059 }
dudmuck 5:360069ec9953 4060 if (pcbuf_len == 0)
dudmuck 5:360069ec9953 4061 return;
dudmuck 18:9530d682fd9a 4062
dudmuck 0:be215de91a68 4063 printf("\r\n");
dudmuck 18:9530d682fd9a 4064
dudmuck 18:9530d682fd9a 4065 /* get end of user-entered command */
dudmuck 18:9530d682fd9a 4066 user_cmd_len = 1; // first character can be any character
dudmuck 18:9530d682fd9a 4067 for (i = 1; i <= pcbuf_len; i++) {
dudmuck 18:9530d682fd9a 4068 if (pcbuf[i] < 'A' || (pcbuf[i] > 'Z' && pcbuf[i] < 'a') || pcbuf[i] > 'z') {
dudmuck 18:9530d682fd9a 4069 user_cmd_len = i;
dudmuck 18:9530d682fd9a 4070 break;
dudmuck 7:c3c54f222ced 4071 }
dudmuck 0:be215de91a68 4072 }
dudmuck 18:9530d682fd9a 4073
dudmuck 18:9530d682fd9a 4074 for (i = 0; menu_items[i].cmd != NULL ; i++) {
dudmuck 18:9530d682fd9a 4075 int mi_len = strlen(menu_items[i].cmd);
dudmuck 18:9530d682fd9a 4076 if (radio.RegOpMode.bits.LongRangeMode) {
dudmuck 18:9530d682fd9a 4077 if (menu_items[i].modem == MODEM_FSK)
dudmuck 18:9530d682fd9a 4078 continue; // FSK commands not used in LoRa
dudmuck 18:9530d682fd9a 4079 } else {
dudmuck 18:9530d682fd9a 4080 if (menu_items[i].modem == MODEM_LORA)
dudmuck 18:9530d682fd9a 4081 continue; // LoRa commands not used in FSK
dudmuck 18:9530d682fd9a 4082 }
dudmuck 18:9530d682fd9a 4083
dudmuck 18:9530d682fd9a 4084 if (menu_items[i].handler && user_cmd_len == mi_len && (strncmp(pcbuf, menu_items[i].cmd, mi_len) == 0)) {
dudmuck 18:9530d682fd9a 4085 while (pcbuf[mi_len] == ' ') // skip past spaces
dudmuck 18:9530d682fd9a 4086 mi_len++;
dudmuck 18:9530d682fd9a 4087 menu_items[i].handler(mi_len);
dudmuck 18:9530d682fd9a 4088 break;
dudmuck 18:9530d682fd9a 4089 }
dudmuck 18:9530d682fd9a 4090 }
dudmuck 18:9530d682fd9a 4091
dudmuck 5:360069ec9953 4092 pcbuf_len = 0;
dudmuck 0:be215de91a68 4093 printf("> ");
dudmuck 18:9530d682fd9a 4094 fflush(stdout);
dudmuck 0:be215de91a68 4095 }
dudmuck 0:be215de91a68 4096
dudmuck 5:360069ec9953 4097 void rx_callback()
dudmuck 5:360069ec9953 4098 {
dudmuck 5:360069ec9953 4099 static uint8_t pcbuf_idx = 0;
dudmuck 5:360069ec9953 4100 static uint8_t prev_len = 0;;
dudmuck 5:360069ec9953 4101 char c = pc.getc();
dudmuck 18:9530d682fd9a 4102 /*if (kermit.uart_rx_enabled) {
dudmuck 18:9530d682fd9a 4103 kermit.rx_callback(c);
dudmuck 18:9530d682fd9a 4104 } else*/ {
dudmuck 18:9530d682fd9a 4105 if (c == 8) {
dudmuck 18:9530d682fd9a 4106 if (pcbuf_idx > 0) {
dudmuck 18:9530d682fd9a 4107 pc.putc(8);
dudmuck 18:9530d682fd9a 4108 pc.putc(' ');
dudmuck 18:9530d682fd9a 4109 pc.putc(8);
dudmuck 18:9530d682fd9a 4110 pcbuf_idx--;
dudmuck 18:9530d682fd9a 4111 }
dudmuck 18:9530d682fd9a 4112 } else if (c == 3) { // ctrl-C
dudmuck 18:9530d682fd9a 4113 pcbuf_len = -1;
dudmuck 18:9530d682fd9a 4114 } else if (c == '\r') {
dudmuck 18:9530d682fd9a 4115 if (pcbuf_idx == 0) {
dudmuck 18:9530d682fd9a 4116 pcbuf_len = prev_len;
dudmuck 18:9530d682fd9a 4117 } else {
dudmuck 18:9530d682fd9a 4118 pcbuf[pcbuf_idx] = 0; // null terminate
dudmuck 18:9530d682fd9a 4119 prev_len = pcbuf_idx;
dudmuck 18:9530d682fd9a 4120 pcbuf_idx = 0;
dudmuck 18:9530d682fd9a 4121 pcbuf_len = prev_len;
dudmuck 18:9530d682fd9a 4122 }
dudmuck 18:9530d682fd9a 4123 }/* else if (c == SOH) {
dudmuck 18:9530d682fd9a 4124 kermit.uart_rx_enable();
dudmuck 18:9530d682fd9a 4125 }*/ else if (pcbuf_idx < sizeof(pcbuf)) {
dudmuck 18:9530d682fd9a 4126 pcbuf[pcbuf_idx++] = c;
dudmuck 18:9530d682fd9a 4127 pc.putc(c);
dudmuck 5:360069ec9953 4128 }
dudmuck 5:360069ec9953 4129 }
dudmuck 5:360069ec9953 4130 }
dudmuck 5:360069ec9953 4131
dudmuck 0:be215de91a68 4132 int main()
dudmuck 5:360069ec9953 4133 {
dudmuck 5:360069ec9953 4134 #if defined(TARGET_NUCLEO_L152RE) && defined(USE_DEBUGGER)
dudmuck 5:360069ec9953 4135 DBGMCU_Config(DBGMCU_SLEEP, ENABLE);
dudmuck 5:360069ec9953 4136 DBGMCU_Config(DBGMCU_STOP, ENABLE);
dudmuck 5:360069ec9953 4137 DBGMCU_Config(DBGMCU_STANDBY, ENABLE);
dudmuck 5:360069ec9953 4138 #endif
dudmuck 0:be215de91a68 4139
dudmuck 0:be215de91a68 4140 pc.baud(57600);
dudmuck 6:fe16f96ee335 4141 printf("\r\nmain()\r\n");
dudmuck 6:fe16f96ee335 4142
dudmuck 5:360069ec9953 4143 pc.attach(rx_callback);
dudmuck 0:be215de91a68 4144
dudmuck 21:b84a77dfb43c 4145 make_crc_table();
dudmuck 21:b84a77dfb43c 4146
dudmuck 22:2005df80c8a8 4147 #if !defined(TARGET_MTS_MDOT_F411RE) && !defined(TYPE_ABZ)
dudmuck 15:c69b942685ea 4148 rfsw.input();
dudmuck 15:c69b942685ea 4149 if (rfsw.read()) {
dudmuck 15:c69b942685ea 4150 shield_type = SHIELD_TYPE_LAS;
dudmuck 15:c69b942685ea 4151 printf("LAS\r\n");
dudmuck 15:c69b942685ea 4152 } else {
dudmuck 15:c69b942685ea 4153 shield_type = SHIELD_TYPE_MAS;
dudmuck 15:c69b942685ea 4154 printf("MAS\r\n");
dudmuck 15:c69b942685ea 4155 }
dudmuck 15:c69b942685ea 4156
dudmuck 15:c69b942685ea 4157 rfsw.output();
dudmuck 15:c69b942685ea 4158 #endif /* !TARGET_MTS_MDOT_F411RE */
dudmuck 6:fe16f96ee335 4159 radio.rf_switch.attach(rfsw_callback);
dudmuck 10:d9bb2ce57f05 4160
dudmuck 13:c73caaee93a5 4161 #ifdef FSK_PER
dudmuck 13:c73caaee93a5 4162 fsk.enable(false);
dudmuck 13:c73caaee93a5 4163 fsk.RegSyncConfig.octet = radio.read_reg(REG_FSK_SYNCCONFIG);
dudmuck 13:c73caaee93a5 4164 fsk.RegSyncConfig.bits.SyncSize = 2;
dudmuck 13:c73caaee93a5 4165 radio.write_reg(REG_FSK_SYNCCONFIG, fsk.RegSyncConfig.octet);
dudmuck 13:c73caaee93a5 4166 radio.write_reg(REG_FSK_SYNCVALUE3, 0x90);
dudmuck 13:c73caaee93a5 4167 radio.write_reg(REG_FSK_SYNCVALUE2, 0x4e);
dudmuck 13:c73caaee93a5 4168 radio.write_reg(REG_FSK_SYNCVALUE1, 0x63);
dudmuck 13:c73caaee93a5 4169
dudmuck 13:c73caaee93a5 4170 fsk.RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 16:b9d36c60f2d3 4171 fsk.RegPreambleDetect.bits.PreambleDetectorSize = 1;
dudmuck 16:b9d36c60f2d3 4172 fsk.RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 16:b9d36c60f2d3 4173 radio.write_reg(REG_FSK_PREAMBLEDETECT, fsk.RegPreambleDetect.octet);
dudmuck 13:c73caaee93a5 4174
dudmuck 13:c73caaee93a5 4175 fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);
dudmuck 13:c73caaee93a5 4176 fsk.RegRxConfig.bits.AfcAutoOn = 1;
dudmuck 16:b9d36c60f2d3 4177 fsk.RegRxConfig.bits.AgcAutoOn = 1;
dudmuck 16:b9d36c60f2d3 4178 fsk.RegRxConfig.bits.RxTrigger = 7;
dudmuck 13:c73caaee93a5 4179 radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet);
dudmuck 13:c73caaee93a5 4180
dudmuck 13:c73caaee93a5 4181 radio.set_opmode(RF_OPMODE_STANDBY);
dudmuck 13:c73caaee93a5 4182 fsk.set_rx_dcc_bw_hz(41666, 1); // afcbw
dudmuck 13:c73caaee93a5 4183 fsk.set_rx_dcc_bw_hz(20833, 0); // rxbw
dudmuck 13:c73caaee93a5 4184
dudmuck 13:c73caaee93a5 4185 fsk.set_tx_fdev_hz(10000);
dudmuck 13:c73caaee93a5 4186
dudmuck 13:c73caaee93a5 4187 radio.write_u16(REG_FSK_PREAMBLEMSB, 8);
dudmuck 13:c73caaee93a5 4188
dudmuck 13:c73caaee93a5 4189 fsk.RegPktConfig2.bits.PayloadLength = 64;
dudmuck 13:c73caaee93a5 4190 radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);
dudmuck 13:c73caaee93a5 4191
dudmuck 13:c73caaee93a5 4192 radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
dudmuck 13:c73caaee93a5 4193 radio.RegDioMapping2.bits.Dio5Mapping = 2; // data output to observation
dudmuck 14:c57ea544dc18 4194 radio.RegDioMapping2.bits.Dio4Mapping = 3; // output preamble detect indication
dudmuck 14:c57ea544dc18 4195 radio.RegDioMapping2.bits.MapPreambleDetect = 1;
dudmuck 13:c73caaee93a5 4196 radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);
dudmuck 16:b9d36c60f2d3 4197
dudmuck 16:b9d36c60f2d3 4198 RegPreambleDetect.bits.PreambleDetectorOn = 1;
dudmuck 16:b9d36c60f2d3 4199 RegPreambleDetect.bits.PreambleDetectorSize = 1;
dudmuck 16:b9d36c60f2d3 4200 RegPreambleDetect.bits.PreambleDetectorTol = 10;
dudmuck 16:b9d36c60f2d3 4201 write_reg(REG_FSK_PREAMBLEDETECT, RegPreambleDetect.octet);
dudmuck 16:b9d36c60f2d3 4202
dudmuck 13:c73caaee93a5 4203 #endif /* FSK_PER */
dudmuck 10:d9bb2ce57f05 4204
dudmuck 10:d9bb2ce57f05 4205 #ifdef START_EIGER_TX
dudmuck 14:c57ea544dc18 4206 uint8_t addr;
dudmuck 10:d9bb2ce57f05 4207 radio.set_frf_MHz(915.0);
dudmuck 11:81ff5bcafd97 4208
dudmuck 11:81ff5bcafd97 4209 radio.RegOcp.octet = radio.read_reg(REG_OCP);
dudmuck 11:81ff5bcafd97 4210 radio.RegOcp.bits.OcpTrim = 20;
dudmuck 11:81ff5bcafd97 4211 radio.write_reg(REG_OCP, radio.RegOcp.octet);
dudmuck 11:81ff5bcafd97 4212
dudmuck 11:81ff5bcafd97 4213 RegPdsTrim1_t pds_trim;
dudmuck 14:c57ea544dc18 4214 if (radio.type == SX1276)
dudmuck 14:c57ea544dc18 4215 addr = REG_PDSTRIM1_SX1276;
dudmuck 14:c57ea544dc18 4216 else
dudmuck 14:c57ea544dc18 4217 addr = REG_PDSTRIM1_SX1272;
dudmuck 14:c57ea544dc18 4218
dudmuck 14:c57ea544dc18 4219 pds_trim.octet = radio.read_reg(addr);
dudmuck 11:81ff5bcafd97 4220 pds_trim.bits.prog_txdac = 7;
dudmuck 14:c57ea544dc18 4221 radio.write_reg(addr, pds_trim.octet);
dudmuck 11:81ff5bcafd97 4222
dudmuck 13:c73caaee93a5 4223 #ifndef FSK_PER
dudmuck 13:c73caaee93a5 4224 lora.enable();
dudmuck 12:beb0387c1b4c 4225 lora.setSf(10);
dudmuck 10:d9bb2ce57f05 4226 if (radio.type == SX1276)
dudmuck 10:d9bb2ce57f05 4227 lora.setBw(7); // 7 == 125khz
dudmuck 13:c73caaee93a5 4228 #endif
dudmuck 10:d9bb2ce57f05 4229
dudmuck 10:d9bb2ce57f05 4230 toggle_per_en();
dudmuck 10:d9bb2ce57f05 4231 PacketTxCnt = 0;
dudmuck 10:d9bb2ce57f05 4232 per_timeout.attach(&per_cb, per_tx_delay);
dudmuck 11:81ff5bcafd97 4233 #endif /* START_EIGER_TX */
dudmuck 10:d9bb2ce57f05 4234
dudmuck 10:d9bb2ce57f05 4235 #ifdef START_EIGER_RX
dudmuck 13:c73caaee93a5 4236
dudmuck 10:d9bb2ce57f05 4237 radio.set_frf_MHz(915.0);
dudmuck 11:81ff5bcafd97 4238 radio.RegPaConfig.bits.PaSelect = 1; // 0: use RFO for sx1276 shield, 1==PA_BOOST
dudmuck 10:d9bb2ce57f05 4239 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 10:d9bb2ce57f05 4240
dudmuck 10:d9bb2ce57f05 4241 toggle_per_en();
dudmuck 10:d9bb2ce57f05 4242 PacketNormalCnt = 0;
dudmuck 20:b11592c9ba5f 4243 PacketRxSequencePrev = 0;
dudmuck 10:d9bb2ce57f05 4244 PacketPerKoCnt = 0;
dudmuck 13:c73caaee93a5 4245 PacketPerOkCnt = 0;
dudmuck 13:c73caaee93a5 4246
dudmuck 13:c73caaee93a5 4247 #ifndef FSK_PER
dudmuck 13:c73caaee93a5 4248 lora.enable();
dudmuck 13:c73caaee93a5 4249 lora.setSf(10);
dudmuck 13:c73caaee93a5 4250 if (radio.type == SX1276)
dudmuck 13:c73caaee93a5 4251 lora.setBw(7); // 7 == 125khz
dudmuck 10:d9bb2ce57f05 4252 lora.start_rx();
dudmuck 13:c73caaee93a5 4253 #else
dudmuck 13:c73caaee93a5 4254 fsk.start_rx();
dudmuck 14:c57ea544dc18 4255 radio.RegDioMapping1.bits.Dio2Mapping = 3; // dio2 to syncadrs
dudmuck 14:c57ea544dc18 4256 radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet);
dudmuck 15:c69b942685ea 4257
dudmuck 15:c69b942685ea 4258 if (radio.HF) {
dudmuck 15:c69b942685ea 4259 fsk.RegRssiConfig.octet = radio.read_reg(REG_FSK_RSSICONFIG);
dudmuck 15:c69b942685ea 4260 fsk.RegRssiConfig.bits.RssiOffset = FSK_RSSI_OFFSET;
dudmuck 15:c69b942685ea 4261 fsk.RegRssiConfig.bits.RssiSmoothing = FSK_RSSI_SMOOTHING;
dudmuck 15:c69b942685ea 4262 radio.write_reg(REG_FSK_RSSICONFIG, fsk.RegRssiConfig.octet);
dudmuck 15:c69b942685ea 4263 }
dudmuck 10:d9bb2ce57f05 4264 #endif
dudmuck 13:c73caaee93a5 4265
dudmuck 15:c69b942685ea 4266 if (radio.HF) {
dudmuck 15:c69b942685ea 4267 radio.RegLna.bits.LnaBoostHF = 3;
dudmuck 15:c69b942685ea 4268 radio.write_reg(REG_LNA, radio.RegLna.octet);
dudmuck 15:c69b942685ea 4269 }
dudmuck 15:c69b942685ea 4270
dudmuck 13:c73caaee93a5 4271 #endif /* START_EIGER_RX */
dudmuck 15:c69b942685ea 4272
dudmuck 15:c69b942685ea 4273 (void)radio.get_frf_MHz();
dudmuck 15:c69b942685ea 4274 radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
dudmuck 22:2005df80c8a8 4275 #if defined(TARGET_MTS_MDOT_F411RE) || defined(TYPE_ABZ)
dudmuck 20:b11592c9ba5f 4276 radio.RegPaConfig.bits.PaSelect = 1; // mDot uses PA_BOOST
dudmuck 20:b11592c9ba5f 4277 #else
dudmuck 15:c69b942685ea 4278 if (shield_type == SHIELD_TYPE_LAS) {
dudmuck 15:c69b942685ea 4279 // LAS HF=PA_BOOST LF=RFO
dudmuck 15:c69b942685ea 4280 if (radio.HF)
dudmuck 15:c69b942685ea 4281 radio.RegPaConfig.bits.PaSelect = 1;
dudmuck 15:c69b942685ea 4282 else
dudmuck 15:c69b942685ea 4283 radio.RegPaConfig.bits.PaSelect = 0;
dudmuck 15:c69b942685ea 4284 } else if (shield_type == SHIELD_TYPE_MAS) {
dudmuck 15:c69b942685ea 4285 // MAS HF=RFO LF=RFO
dudmuck 15:c69b942685ea 4286 radio.RegPaConfig.bits.PaSelect = 0;
dudmuck 20:b11592c9ba5f 4287 }
dudmuck 20:b11592c9ba5f 4288 #endif
dudmuck 15:c69b942685ea 4289 radio.RegPaConfig.bits.OutputPower = 15;
dudmuck 15:c69b942685ea 4290 radio.write_reg(REG_PACONFIG, radio.RegPaConfig.octet);
dudmuck 6:fe16f96ee335 4291
dudmuck 21:b84a77dfb43c 4292 #ifdef START_OOK_TX_TEST
dudmuck 21:b84a77dfb43c 4293 cmd_ook_tx_test(0);
dudmuck 21:b84a77dfb43c 4294 #endif /* START_OOK_TX_TEST */
dudmuck 0:be215de91a68 4295
dudmuck 0:be215de91a68 4296 while(1) {
dudmuck 0:be215de91a68 4297 switch (app) {
dudmuck 0:be215de91a68 4298 case APP_NONE:
dudmuck 0:be215de91a68 4299 console();
dudmuck 0:be215de91a68 4300 break;
dudmuck 0:be215de91a68 4301 case APP_CHAT:
dudmuck 0:be215de91a68 4302 console_chat();
dudmuck 0:be215de91a68 4303 break;
dudmuck 0:be215de91a68 4304 } // ...switch (app)
dudmuck 5:360069ec9953 4305
dudmuck 5:360069ec9953 4306 #if TARGET_NUCLEO_L152RE
dudmuck 5:360069ec9953 4307 //sleep();
dudmuck 5:360069ec9953 4308 #endif
dudmuck 0:be215de91a68 4309 } // ...while(1)
dudmuck 0:be215de91a68 4310 }
dudmuck 0:be215de91a68 4311