Diff: main.cpp

Revision:

22:2005df80c8a8

Parent:

21:b84a77dfb43c

Child:

23:821b4f426ee6

--- a/main.cpp	Sun Feb 05 23:34:30 2017 +0000
+++ b/main.cpp	Fri Apr 14 20:33:24 2017 +0000
@@ -2,6 +2,7 @@
 #include "sx127x_fsk.h"
 #define __STDC_FORMAT_MACROS
 #include <inttypes.h>
+
 //#include "kermit.h"
 
 //#define FSK_PER
@@ -9,6 +10,9 @@
 //#define START_EIGER_TX
 //#define START_OOK_TX_TEST
 
+/* on B-L072Z-LRWAN1 use target NUCLEO-L073RX, and for correct baudrate must install SB36 and remove C24 */
+//#define TYPE_ABZ 
+
 DigitalOut led1(LED1);
 Serial pc(USBTX, USBRX);
 
@@ -101,8 +105,43 @@
 DigitalIn dio2(LORA_DIO2);
 DigitalIn dio4(LORA_DIO4);
 
-#else   /********************* ...mDot **********************/
-
+#elif defined(TARGET_NUCLEO_L073RZ) && defined(TYPE_ABZ)   /********************* ...mDot **********************/ 
+    /* Murata TypeABZ discovery board */
+    //           mosi, miso, sclk,   cs,  rst,  dio0, dio1
+    SX127x radio(PA_7, PA_6, PB_3, PA_15, PC_0, PB_4, PB_1);
+    DigitalIn dio2(PB_0);
+    DigitalIn dio3(PC_13);
+    #define FSK_RSSI_OFFSET         0
+    #define FSK_RSSI_SMOOTHING      2
+    #define CRF1    PA_1
+    #define CRF2    PC_2
+    #define CRF3    PC_1
+    DigitalOut Vctl1(CRF1);
+    DigitalOut Vctl2(CRF2);
+    DigitalOut Vctl3(CRF3);
+    
+    void rfsw_callback()
+    {
+        if (radio.RegOpMode.bits.Mode == RF_OPMODE_TRANSMITTER) {
+            Vctl1 = 0;        
+            if (radio.RegPaConfig.bits.PaSelect) {
+                Vctl2 = 0;
+                Vctl3 = 1;                        
+            } else {
+                Vctl2 = 1;
+                Vctl3 = 0;            
+            }
+        } else {
+            if (radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER || radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER_SINGLE)
+                Vctl1 = 1;
+            else
+                Vctl1 = 0;
+            
+            Vctl2 = 0;
+            Vctl3 = 0;        
+        }
+    }    
+#else /***************** ..Type-ABZ and L073RZ *************/
 //  pin:       3     8     1      7    10    12     5
 //           mosi, miso, sclk,   cs,  rst,  dio0, dio1
 SX127x radio(D11,   D12, D13,    D10,  A0,   D2,   D3); // sx1276 arduino shield
@@ -123,8 +162,9 @@
 DigitalIn dio2(D4);
 DigitalIn dio3(D5);
 DigitalIn dio4(D8);
-
-#ifdef TARGET_STM
+DigitalIn dio5(D9);
+
+#if defined(TARGET_STM)
 DigitalOut pc3(PC_3);   // nucleo corner pin for misc indication
 #endif
 
@@ -152,7 +192,9 @@
 SX127x_lora lora(radio);
 //Kermit kermit(lora);
 
+#ifndef TYPE_ABZ
 volatile bool saved_dio4;
+#endif
 
 uint32_t crcTable[256];
 void make_crc_table()
@@ -951,7 +993,11 @@
         printf("ImageCalRunning[\r0m\n");
     
     if (rx_payloadReady_int_en) {
+#ifdef TYPE_ABZ
+        printf("n_rx_pkts:%u, dio:%u,%u,%u,%u\r\n", n_rx_pkts, dio3.read(), dio2.read(), radio.dio1.read(), radio.dio0.read());
+#else
         printf("n_rx_pkts:%u, dio:%u,%u,%u,%u,%u\r\n", n_rx_pkts, dio4.read(), dio3.read(), dio2.read(), radio.dio1.read(), radio.dio0.read());
+#endif
     }
 }
 
@@ -1468,9 +1514,11 @@
 }
 
 void cmd_restart_rx(uint8_t);
+int preamble_to_sync_us;
+#ifndef TYPE_ABZ
 Timeout timeout_syncAddress;
-int preamble_to_sync_us;
 bool get_syncAddress;
+#endif
 float preamble_detect_at;
 
 void callback_sa_timeout()
@@ -1496,7 +1544,7 @@
     if (radio.RegOpMode.bits.LongRangeMode) {
         if (rssi_polling_thresh != 0 && radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) {
             int rssi = lora.get_current_rssi(); // dBm returned, negative value
-#ifdef TARGET_STM
+#if defined(TARGET_STM) && !defined(TYPE_ABZ)
             if (rssi < rssi_polling_thresh)
                 pc3 = 0;    // signal weaker than threshold
             else
@@ -1613,7 +1661,8 @@
             case SERVICE_NONE:
                 break;                
         } // ...switch (act)
-         
+
+#ifndef TYPE_ABZ
         /* FSK receiver handling of preamble detection */
         if (radio.RegDioMapping2.bits.MapPreambleDetect && radio.RegDioMapping2.bits.Dio4Mapping == 3) {
             if (saved_dio4 != dio4.read()) {
@@ -1634,7 +1683,7 @@
                 saved_dio4 = dio4.read();
              }
          }  // ..if dio4 is 
-         
+             
          if (radio.RegDioMapping1.bits.Dio2Mapping == 3) {
              if (dio2.read()) {
                  if (get_syncAddress) {
@@ -1644,21 +1693,19 @@
                  rssi = radio.read_reg(REG_FSK_RSSIVALUE);
              }
          }
-         
-         /*if (radio.RegDioMapping1.bits.Dio1Mapping == 1 && radio.dio1) {
-              = radio.read_reg(REG_FSK_RSSIVALUE);
-         }*/
-         
+#endif /* !TYPE_ABZ */           
+
         if (rssi_polling_thresh != 0 && radio.RegOpMode.bits.Mode == RF_OPMODE_RECEIVER) {
             rssi = radio.read_reg(REG_FSK_RSSIVALUE);
             rssi = -rssi;
-#ifdef TARGET_STM
+#if defined(TARGET_STM) && !defined(TYPE_ABZ)
             if (rssi < rssi_polling_thresh)
                 pc3 = 0;    // signal weaker than threshold
             else
                 pc3 = 1;    // signal stronger than threshold
+#endif
         }
-#endif
+
     } // ...!radio.RegOpMode.bits.LongRangeMode
 }
 
@@ -1727,7 +1774,7 @@
     }
 }
 
-const uint8_t ookt_tx_payload[] = {
+const uint8_t ookt_tx_payload[29] = {
     0x55, 0x55, 0x55, 0x55, 0xA9, 0x66, 0x69, 0x65,
     0x39, 0x53, 0xAA, 0xC3, 0xA6, 0x95, 0xC6, 0x3C,
     0x6A, 0x33, 0x33, 0xC6, 0xCA, 0xA6, 0x33, 0x33,
@@ -2459,7 +2506,7 @@
 void cmd_print_status(uint8_t idx)
 {
     if (radio.type == SX1276) {
-#ifdef TARGET_MTS_MDOT_F411RE
+#if defined(TARGET_MTS_MDOT_F411RE) || defined(TYPE_ABZ)
         printf("\r\nSX1276 ");
 #else
         if (shield_type == SHIELD_TYPE_LAS)
@@ -2659,6 +2706,7 @@
         sscanf(pcbuf+idx, "%d", &symb_timeout);
         reg_u16 &= 0xfc00;
         reg_u16 |= symb_timeout;
+        radio.write_u16(REG_LR_MODEMCONFIG2, reg_u16);
     }
     reg_u16 = radio.read_u16(REG_LR_MODEMCONFIG2);
     printf("SymbTimeout:%d\r\n", reg_u16 & 0x3ff);
@@ -2683,303 +2731,6 @@
     // only used between frames, on background noise
     pd_timeout.attach_us(&preamble_without_sync, 1500); // 122us per byte
 }
- 
-void prrx_end()
-{
-    uint8_t n, i;
-    
-    for (n = 0; n < n_rx_pkts; n++) {
-        printf("%d) %d: ", n, rx_pkts[n][0]);
-        for (i = 0; i < rx_pkts[n][0]; i++) {
-            if (i < RX_PKT_SIZE_LIMIT)
-                printf("%02x ", rx_pkts[n][i+1]);
-        }
-        printf("\r\n");          
-    }
-    
-    n_rx_pkts = 0;    // done with rx packets, clear for next time
-    
-    /* end of this reception, prepare for next super-packet */
-    fsk.RegRxConfig.bits.AgcAutoOn = 1;
-    fsk.RegRxConfig.bits.AfcAutoOn  = 1;
-    fsk.RegRxConfig.bits.RxTrigger = 6; // preamble
-    fsk.RegAfcFei.bits.AfcAutoClearOn = 1;
-    radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet);
-    
-    fsk.RegRxConfig.bits.RestartRxWithoutPllLock = 1;
-    radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet); 
-    
-    dio4int.rise(&preamble_detect_isr); // detect preamble without sync on background noise
-    dio4int.enable_irq();
-    
-    dio0int.disable_irq();      // disable packet end detection       
-}
-
-volatile bool length_byte;
-void syncadrs_dio2_isr(void);
-
-void payloadReady_isr()
-{
-    uint8_t i;
-    
-    dio0int.disable_irq();  // disable ourselves, enabled at syncadrs detection
-    dio1int.disable_irq();      // disable prrx_fifoLevel_isr() while handling end-of-packet
-    
-    if (!rx_payloadReady_int_en) {
-        radio.set_opmode(RF_OPMODE_STANDBY);
-        dio2int.disable_irq();
-        dio4int.disable_irq();
-        printf("payloadReady_isr() not enabled\r\n");
-        return;
-    }
-    
-    if (radio.RegOpMode.bits.Mode != RF_OPMODE_RECEIVER && radio.RegOpMode.bits.Mode != RF_OPMODE_SYNTHESIZER_RX) {
-        rx_payloadReady_int_en = false;
-        printf("payloadReady_isr() not-rx\r\n");
-        return;
-    }
-    
-    //Simultaneously write AgcAutoOn = 0, AgcAutoOn = 0,  RXTrigger = Rssi, LnaGain value = read above (i.e. AGC is fixed from reception of first packet)
-    if (fsk.RegRxConfig.bits.AgcAutoOn) {
-        fsk.RegRxConfig.bits.AgcAutoOn = 0;
-        fsk.RegRxConfig.bits.AfcAutoOn  = 0;
-        fsk.RegRxConfig.bits.RxTrigger = 1; // rssi
-        fsk.RegAfcFei.bits.AfcAutoClearOn = 0;
-        radio.write_reg(REG_FSK_AFCFEI, fsk.RegAfcFei.octet);
-    }       
-    
-    fsk.RegRxConfig.bits.RestartRxWithoutPllLock = 1;
-    radio.write_reg(REG_FSK_RXCONFIG, fsk.RegRxConfig.octet); 
-    
-    radio.m_cs = 0;
-    radio.m_spi.write(REG_FIFO); // bit7 is low for reading from radio
-        
-    if (length_byte) {
-        /* none of the packet has been retrieved */
-        rx_pkts[n_rx_pkts][0] = radio.m_spi.write(0);   // read length byte
-        for (i = 0; i < rx_pkts[n_rx_pkts][0]; i++) {
-            uint8_t o, idx = i + 1;
-            o = radio.m_spi.write(0);
-            if (idx < RX_PKT_SIZE_LIMIT)
-                rx_pkts[n_rx_pkts][idx] = o;
-            else {
-                printf("L-prrx-overflow %u %u %u\r\n", n_rx_pkts, idx, rx_pkts[n_rx_pkts][0]);
-                break;
-            }
-        }        
-    } else {
-        /* last packet bytes havent been retrieved? */
-        while (rx_payload_idx < rx_pkts[n_rx_pkts][0]) {
-            if (rx_payload_idx < RX_PKT_SIZE_LIMIT)
-                rx_pkts[n_rx_pkts][++rx_payload_idx] = radio.m_spi.write(0);
-            else {
-                printf("R-prrx-overflow %u %u %u\r\n", n_rx_pkts, rx_payload_idx, rx_pkts[n_rx_pkts][0]);
-                break;
-            }
-        }
-    }
-    radio.m_cs = 1; 
-    
-    if (++n_rx_pkts >= N_RX_PKTS) {
-        /* overflow, stop */
-        prrx_end();
-        rx_payloadReady_int_en = false;
-        radio.set_opmode(RF_OPMODE_STANDBY);
-        dio2int.disable_irq();
-        dio4int.disable_irq();
-        printf("n_rx_pkts overflow\r\n");
-        return;
-    }
-    
-    // timeout occurs if next syncadrs doesnt come
-    sync_timeout.attach_us(&prrx_end, 2000); // 122us per byte
-    
-    dio2int.rise(&syncadrs_dio2_isr);  // timeout for detecting last packet
-    dio2int.enable_irq();
-}
-
-void prrx_fifoLevel_isr()
-{
-    bool fail = false;
-    
-    if (dio0int.read()) {
-        printf("fifolevel_isr: dio0 set\r\n");
-        return;
-    }
-    
-    radio.m_cs = 0;
-    radio.m_spi.write(REG_FIFO); // bit7 is low for reading from radio
-        
-    while (!dio3) { // while fifo has something
-        if (length_byte) {
-            rx_pkts[n_rx_pkts][0] = radio.m_spi.write(0);
-            length_byte = false;
-            rx_payload_idx = 0;
-        } else {
-            if (rx_payload_idx < RX_PKT_SIZE_LIMIT)
-                rx_pkts[n_rx_pkts][++rx_payload_idx] = radio.m_spi.write(0);
-            else {
-                printf("isr-prrx-overflow %u %u %u, dio3:%d\r\n", n_rx_pkts, rx_payload_idx, rx_pkts[n_rx_pkts][0], dio3.read());
-                fail = true;       
-                break;
-            }
-        }
-    }
-    radio.m_cs = 1;
-    
-    if (fail)
-        fsk_print_IrqFlags2();
-}
-
-void syncadrs_dio2_isr()
-{
-    pc3 = !pc3;
-    /* syncadrs match, disable end-timeout */
-    if (!dio3.read()) {
-        printf("syncadrs: fifo not empty\r\n");
-        rx_payloadReady_int_en = false;
-        radio.set_opmode(RF_OPMODE_STANDBY);
-        dio0int.disable_irq();
-        dio1int.disable_irq();
-        dio2int.disable_irq();
-        dio4int.disable_irq();        
-        return;
-    }
-        
-    sync_timeout.detach();
-    pd_timeout.detach();
-    dio4int.disable_irq(); // inhibit preamble_detect_isr() until end
-    
-    if (dio0int.read()) {
-        printf("syncadrs_dio2_isr: dio0 set\r\n");
-        return;
-    }
-    if (dio1int.read()) {
-        printf("syncadrs_dio2_isr: dio1 set\r\n");
-        return;
-    }    
-    
-    dio0int.rise(&payloadReady_isr); // end of packet detection
-    dio0int.enable_irq();    
-    
-    dio1int.rise(&prrx_fifoLevel_isr); // flow control during packet
-    dio1int.enable_irq(); 
-
-    length_byte = true; // first byte is length
-}
-
-void cmd_prrx(uint8_t idx)
-{
-    radio.m_spi.frequency(10000000);    // max speed
-    radio.set_opmode(RF_OPMODE_STANDBY);
-    
-    fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
-    fsk.RegPktConfig1.bits.PacketFormatVariable = 1;    // varible length format
-    radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);    
-    
-    // DIO0 to payloadReady
-    radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
-    radio.RegDioMapping1.bits.Dio0Mapping = 0;  // PayloadReady
-    radio.RegDioMapping1.bits.Dio1Mapping = 0;  // FifoLevel
-    radio.RegDioMapping1.bits.Dio2Mapping = 3;  // dio2 to SyncAddress in RX
-    radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet); 
-    
-    radio.RegDioMapping2.octet = radio.read_reg(REG_DIOMAPPING2);
-    radio.RegDioMapping2.bits.Dio4Mapping = 3;
-    radio.RegDioMapping2.bits.MapPreambleDetect = 1;    // dio4 to preambleDetect in RX
-    radio.write_reg(REG_DIOMAPPING2, radio.RegDioMapping2.octet);         
-    
-    fsk.RegRxConfig.octet = radio.read_reg(REG_FSK_RXCONFIG);   // update shadow
-
-    fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);  
-    fsk.RegFifoThreshold.bits.FifoThreshold = 6;  // fifoLevel_isr threshold
-    radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet);
-    
-    radio.set_opmode(RF_OPMODE_RECEIVER);
-    n_rx_pkts = 0;
-    
-    rx_payloadReady_int_en = true;  
-    
-    dio2int.rise(&syncadrs_dio2_isr);  // timeout for detecting last packet
-    dio2int.enable_irq();
-    
-    dio4int.rise(&preamble_detect_isr); // detect preamble without sync on background noise
-    dio4int.enable_irq();
-}
-
-void ulrx_fifoLevel_isr()
-{
-    uint8_t o;
-    
-    radio.m_cs = 0;
-    radio.m_spi.write(REG_FIFO); // bit7 is low for reading from radio
-
-    while (!dio3) { // while FifoEmpty is not asserted
-        switch (ulrx_state) {
-            case ULRX_STATE_NEED_LENGTH:
-                rx_pkts[n_rx_pkts][0] = radio.m_spi.write(0);   // read length byte
-                ulrx_state = ULRX_STATE_PAYLOAD;
-                rx_payload_idx = 0;
-                break;
-            case ULRX_STATE_PAYLOAD:
-                o = radio.m_spi.write(0);
-                if (rx_payload_idx < rx_pkts[n_rx_pkts][0]) {
-                    if (rx_payload_idx < RX_PKT_SIZE_LIMIT)
-                        rx_pkts[n_rx_pkts][rx_payload_idx++] = o;
-                } else {
-                    /* first byte after payload */
-                    if (++n_rx_pkts >= N_RX_PKTS) {
-                        radio.set_opmode(RF_OPMODE_STANDBY);
-                        ulrx_state = ULRX_STATE_OFF;
-                        printf("n_rx_pkts overflow\r\n");
-                        return;
-                    }
-                    ulrx_state = ULRX_STATE_SYNC1;
-                }
-                break;
-            case ULRX_STATE_SYNC1:
-                o = radio.m_spi.write(0);
-                /* TODO */
-                break;
-        }
-    } // ..while fifo has something
-    
-    radio.m_cs = 1; 
-}
-
-void cmd_ulrx(uint8_t idx)
-{
-    radio.set_opmode(RF_OPMODE_STANDBY);
-    
-    //unlimited packet length mode
-    fsk.RegPktConfig1.octet = radio.read_reg(REG_FSK_PACKETCONFIG1);
-    fsk.RegPktConfig1.bits.PacketFormatVariable = 0;    // fixed length format
-    radio.write_reg(REG_FSK_PACKETCONFIG1, fsk.RegPktConfig1.octet);
-    
-    fsk.RegPktConfig2.word = radio.read_u16(REG_FSK_PACKETCONFIG2);
-    fsk.RegPktConfig2.bits.PayloadLength = 0;
-    radio.write_u16(REG_FSK_PACKETCONFIG2, fsk.RegPktConfig2.word);    
-    
-    radio.RegDioMapping1.octet = radio.read_reg(REG_DIOMAPPING1);
-    radio.RegDioMapping1.bits.Dio3Mapping = 0;  // FifoEmpty
-    //DIO2 to FifoFull
-    radio.RegDioMapping1.bits.Dio2Mapping = 0;  // FIfoFull
-    //DIO1 to FifoLevel
-    radio.RegDioMapping1.bits.Dio1Mapping = 0;  // FifoLevel
-    //radio.RegDioMapping1.bits.Dio0Mapping = 0;  // useful?
-    radio.write_reg(REG_DIOMAPPING1, radio.RegDioMapping1.octet); 
-    //FifoThreshold to approx 1/5th full
-    fsk.RegFifoThreshold.octet = radio.read_reg(REG_FSK_FIFOTHRESH);  
-    fsk.RegFifoThreshold.bits.FifoThreshold = 48; // 75% full
-    radio.write_reg(REG_FSK_FIFOTHRESH, fsk.RegFifoThreshold.octet);
-    
-    ulrx_enable = true;
-    ulrx_state = ULRX_STATE_NEED_LENGTH;
-    dio1int.rise(&ulrx_fifoLevel_isr);
-    dio1int.enable_irq();    
-    n_rx_pkts = 0;
-    radio.set_opmode(RF_OPMODE_RECEIVER);
-}
 
 void cmd_rx(uint8_t idx)
 {    
@@ -3592,7 +3343,7 @@
         radio.set_frf_MHz(MHz);
     }
     printf("%fMHz\r\n", radio.get_frf_MHz());
-#ifndef TARGET_MTS_MDOT_F411RE
+#if !defined(TARGET_MTS_MDOT_F411RE) && !defined(TYPE_ABZ)
     radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
     if (shield_type == SHIELD_TYPE_LAS) {
         // LAS HF=PA_BOOST  LF=RFO
@@ -4209,9 +3960,7 @@
     { MODEM_FSK, "rrx", cmd_restart_rx, "","restart RX"},  
     { MODEM_BOTH, "op", cmd_op, "<dBm>","(TX) get/set TX power"}, 
     { MODEM_FSK, "bt", cmd_bt, "","get/set BT"},  
-    { MODEM_FSK, "ltx", cmd_long_tx, "<%d>","long tx"}, 
-    { MODEM_FSK, "prrx", cmd_prrx, "","start RX with payloadReady isr"},
-    { MODEM_FSK, "ulrx", cmd_ulrx, "","start RX with unlimited length"},
+    { MODEM_FSK, "ltx", cmd_long_tx, "<%d>","long tx"},
     
 #ifdef LORA_TX_TEST
     { MODEM_LORA, "apl", cmd_lora_all_payload_lengths, "","(TXTEST) sweep payload lengths 0->255"},
@@ -4395,7 +4144,7 @@
     
     make_crc_table();
     
-#ifndef TARGET_MTS_MDOT_F411RE
+#if !defined(TARGET_MTS_MDOT_F411RE) && !defined(TYPE_ABZ)
     rfsw.input();
     if (rfsw.read()) {
         shield_type = SHIELD_TYPE_LAS;
@@ -4523,7 +4272,7 @@
 
     (void)radio.get_frf_MHz();
     radio.RegPaConfig.octet = radio.read_reg(REG_PACONFIG);
-#ifdef TARGET_MTS_MDOT_F411RE
+#if defined(TARGET_MTS_MDOT_F411RE) || defined(TYPE_ABZ)
     radio.RegPaConfig.bits.PaSelect = 1;    // mDot uses PA_BOOST
 #else
     if (shield_type == SHIELD_TYPE_LAS) {