Sanghyun Park / MPU9250_SPI

MPU9250 SPI Driver

MPU9250.h@6:c82c48348f8c, 2014-06-29 (annotated)

Committer:
kylongmu
Date:
Sun Jun 29 07:06:12 2014 +0000
Revision:
6:c82c48348f8c
Parent:
5:f15d1d9d1561
Child:
7:1bcd61cdbf18
All is function now!

Who changed what in which revision?

UserRevisionLine numberNew contents of line
kylongmu 0:768d2e151834 1 /*CODED by Qiyong Mu on 21/06/2014
kylongmu 0:768d2e151834 2 */
kylongmu 0:768d2e151834 3
kylongmu 0:768d2e151834 4
kylongmu 0:768d2e151834 5 #ifndef mpu9250_h
kylongmu 0:768d2e151834 6 #define mpu9250_h
kylongmu 0:768d2e151834 7 #include "mbed.h"
kylongmu 0:768d2e151834 8
kylongmu 0:768d2e151834 9
kylongmu 0:768d2e151834 10 class mpu9250_spi
kylongmu 0:768d2e151834 11 {
kylongmu 0:768d2e151834 12 SPI& spi;
kylongmu 0:768d2e151834 13 DigitalOut cs;
kylongmu 0:768d2e151834 14
kylongmu 0:768d2e151834 15 public:
kylongmu 0:768d2e151834 16 mpu9250_spi(SPI& _spi, PinName _cs);
kylongmu 0:768d2e151834 17 unsigned int WriteReg( uint8_t WriteAddr, uint8_t WriteData );
kylongmu 2:f274ea3bced9 18 unsigned int ReadReg( uint8_t WriteAddr, uint8_t WriteData );
kylongmu 2:f274ea3bced9 19 void ReadRegs( uint8_t ReadAddr, uint8_t *ReadBuf, unsigned int Bytes );
kylongmu 0:768d2e151834 20
kylongmu 0:768d2e151834 21 bool init(int sample_rate_div,int low_pass_filter);
kylongmu 3:f4fa24cc247d 22 void read_temp();
kylongmu 2:f274ea3bced9 23 void read_acc();
kylongmu 2:f274ea3bced9 24 void read_rot();
kylongmu 0:768d2e151834 25 unsigned int set_gyro_scale(int scale);
kylongmu 0:768d2e151834 26 unsigned int set_acc_scale(int scale);
kylongmu 2:f274ea3bced9 27 void calib_acc();
kylongmu 0:768d2e151834 28 void select();
kylongmu 0:768d2e151834 29 void deselect();
kylongmu 0:768d2e151834 30 unsigned int whoami();
kylongmu 6:c82c48348f8c 31 uint8_t AK8963_whoami();
kylongmu 4:79185409730f 32 void AK8963_read_Magnetometer();
kylongmu 4:79185409730f 33
kylongmu 4:79185409730f 34
kylongmu 0:768d2e151834 35
kylongmu 0:768d2e151834 36 float acc_divider;
kylongmu 0:768d2e151834 37 float gyro_divider;
kylongmu 4:79185409730f 38 float Magnetometer_divider;
kylongmu 0:768d2e151834 39
kylongmu 2:f274ea3bced9 40 int calib_data[3];
kylongmu 4:79185409730f 41 float accelerometer_data[3];
kylongmu 3:f4fa24cc247d 42 float Temperature;
kylongmu 2:f274ea3bced9 43 float gyroscope_data[3];
kylongmu 4:79185409730f 44 float Magnetometer[3];
kylongmu 2:f274ea3bced9 45
kylongmu 0:768d2e151834 46 private:
kylongmu 0:768d2e151834 47 PinName _CS_pin;
kylongmu 0:768d2e151834 48 PinName _SO_pin;
kylongmu 0:768d2e151834 49 PinName _SCK_pin;
kylongmu 0:768d2e151834 50 float _error;
kylongmu 0:768d2e151834 51 };
kylongmu 0:768d2e151834 52
kylongmu 0:768d2e151834 53 #endif
kylongmu 0:768d2e151834 54
kylongmu 0:768d2e151834 55
kylongmu 0:768d2e151834 56
kylongmu 0:768d2e151834 57 // mpu9250 registers
kylongmu 0:768d2e151834 58 #define MPUREG_XG_OFFS_TC 0x00
kylongmu 0:768d2e151834 59 #define MPUREG_YG_OFFS_TC 0x01
kylongmu 0:768d2e151834 60 #define MPUREG_ZG_OFFS_TC 0x02
kylongmu 0:768d2e151834 61 #define MPUREG_X_FINE_GAIN 0x03
kylongmu 0:768d2e151834 62 #define MPUREG_Y_FINE_GAIN 0x04
kylongmu 0:768d2e151834 63 #define MPUREG_Z_FINE_GAIN 0x05
kylongmu 0:768d2e151834 64 #define MPUREG_XA_OFFS_H 0x06
kylongmu 0:768d2e151834 65 #define MPUREG_XA_OFFS_L 0x07
kylongmu 0:768d2e151834 66 #define MPUREG_YA_OFFS_H 0x08
kylongmu 0:768d2e151834 67 #define MPUREG_YA_OFFS_L 0x09
kylongmu 0:768d2e151834 68 #define MPUREG_ZA_OFFS_H 0x0A
kylongmu 0:768d2e151834 69 #define MPUREG_ZA_OFFS_L 0x0B
kylongmu 0:768d2e151834 70 #define MPUREG_PRODUCT_ID 0x0C
kylongmu 0:768d2e151834 71 #define MPUREG_SELF_TEST_X 0x0D
kylongmu 0:768d2e151834 72 #define MPUREG_SELF_TEST_Y 0x0E
kylongmu 0:768d2e151834 73 #define MPUREG_SELF_TEST_Z 0x0F
kylongmu 0:768d2e151834 74 #define MPUREG_SELF_TEST_A 0x10
kylongmu 0:768d2e151834 75 #define MPUREG_XG_OFFS_USRH 0x13
kylongmu 0:768d2e151834 76 #define MPUREG_XG_OFFS_USRL 0x14
kylongmu 0:768d2e151834 77 #define MPUREG_YG_OFFS_USRH 0x15
kylongmu 0:768d2e151834 78 #define MPUREG_YG_OFFS_USRL 0x16
kylongmu 0:768d2e151834 79 #define MPUREG_ZG_OFFS_USRH 0x17
kylongmu 0:768d2e151834 80 #define MPUREG_ZG_OFFS_USRL 0x18
kylongmu 0:768d2e151834 81 #define MPUREG_SMPLRT_DIV 0x19
kylongmu 0:768d2e151834 82 #define MPUREG_CONFIG 0x1A
kylongmu 0:768d2e151834 83 #define MPUREG_GYRO_CONFIG 0x1B
kylongmu 0:768d2e151834 84 #define MPUREG_ACCEL_CONFIG 0x1C
kylongmu 0:768d2e151834 85 #define MPUREG_ACCEL_CONFIG_2 0x1D
kylongmu 0:768d2e151834 86 #define MPUREG_LP_ACCEL_ODR 0x1E
kylongmu 0:768d2e151834 87 #define MPUREG_MOT_THR 0x1F
kylongmu 0:768d2e151834 88 #define MPUREG_FIFO_EN 0x23
kylongmu 0:768d2e151834 89 #define MPUREG_I2C_MST_CTRL 0x24
kylongmu 0:768d2e151834 90 #define MPUREG_I2C_SLV0_ADDR 0x25
kylongmu 0:768d2e151834 91 #define MPUREG_I2C_SLV0_REG 0x26
kylongmu 0:768d2e151834 92 #define MPUREG_I2C_SLV0_CTRL 0x27
kylongmu 0:768d2e151834 93 #define MPUREG_I2C_SLV1_ADDR 0x28
kylongmu 0:768d2e151834 94 #define MPUREG_I2C_SLV1_REG 0x29
kylongmu 0:768d2e151834 95 #define MPUREG_I2C_SLV1_CTRL 0x2A
kylongmu 0:768d2e151834 96 #define MPUREG_I2C_SLV2_ADDR 0x2B
kylongmu 0:768d2e151834 97 #define MPUREG_I2C_SLV2_REG 0x2C
kylongmu 0:768d2e151834 98 #define MPUREG_I2C_SLV2_CTRL 0x2D
kylongmu 0:768d2e151834 99 #define MPUREG_I2C_SLV3_ADDR 0x2E
kylongmu 0:768d2e151834 100 #define MPUREG_I2C_SLV3_REG 0x2F
kylongmu 0:768d2e151834 101 #define MPUREG_I2C_SLV3_CTRL 0x30
kylongmu 0:768d2e151834 102 #define MPUREG_I2C_SLV4_ADDR 0x31
kylongmu 0:768d2e151834 103 #define MPUREG_I2C_SLV4_REG 0x32
kylongmu 0:768d2e151834 104 #define MPUREG_I2C_SLV4_DO 0x33
kylongmu 0:768d2e151834 105 #define MPUREG_I2C_SLV4_CTRL 0x34
kylongmu 0:768d2e151834 106 #define MPUREG_I2C_SLV4_DI 0x35
kylongmu 0:768d2e151834 107 #define MPUREG_I2C_MST_STATUS 0x36
kylongmu 0:768d2e151834 108 #define MPUREG_INT_PIN_CFG 0x37
kylongmu 0:768d2e151834 109 #define MPUREG_INT_ENABLE 0x38
kylongmu 0:768d2e151834 110 #define MPUREG_ACCEL_XOUT_H 0x3B
kylongmu 0:768d2e151834 111 #define MPUREG_ACCEL_XOUT_L 0x3C
kylongmu 0:768d2e151834 112 #define MPUREG_ACCEL_YOUT_H 0x3D
kylongmu 0:768d2e151834 113 #define MPUREG_ACCEL_YOUT_L 0x3E
kylongmu 0:768d2e151834 114 #define MPUREG_ACCEL_ZOUT_H 0x3F
kylongmu 0:768d2e151834 115 #define MPUREG_ACCEL_ZOUT_L 0x40
kylongmu 0:768d2e151834 116 #define MPUREG_TEMP_OUT_H 0x41
kylongmu 0:768d2e151834 117 #define MPUREG_TEMP_OUT_L 0x42
kylongmu 0:768d2e151834 118 #define MPUREG_GYRO_XOUT_H 0x43
kylongmu 0:768d2e151834 119 #define MPUREG_GYRO_XOUT_L 0x44
kylongmu 0:768d2e151834 120 #define MPUREG_GYRO_YOUT_H 0x45
kylongmu 0:768d2e151834 121 #define MPUREG_GYRO_YOUT_L 0x46
kylongmu 0:768d2e151834 122 #define MPUREG_GYRO_ZOUT_H 0x47
kylongmu 0:768d2e151834 123 #define MPUREG_GYRO_ZOUT_L 0x48
kylongmu 0:768d2e151834 124 #define MPUREG_EXT_SENS_DATA_00 0x49
kylongmu 0:768d2e151834 125 #define MPUREG_EXT_SENS_DATA_01 0x4A
kylongmu 0:768d2e151834 126 #define MPUREG_EXT_SENS_DATA_02 0x4B
kylongmu 0:768d2e151834 127 #define MPUREG_EXT_SENS_DATA_03 0x4C
kylongmu 0:768d2e151834 128 #define MPUREG_EXT_SENS_DATA_04 0x4D
kylongmu 0:768d2e151834 129 #define MPUREG_EXT_SENS_DATA_05 0x4E
kylongmu 0:768d2e151834 130 #define MPUREG_EXT_SENS_DATA_06 0x4F
kylongmu 0:768d2e151834 131 #define MPUREG_EXT_SENS_DATA_07 0x50
kylongmu 0:768d2e151834 132 #define MPUREG_EXT_SENS_DATA_08 0x51
kylongmu 0:768d2e151834 133 #define MPUREG_EXT_SENS_DATA_09 0x52
kylongmu 0:768d2e151834 134 #define MPUREG_EXT_SENS_DATA_10 0x53
kylongmu 0:768d2e151834 135 #define MPUREG_EXT_SENS_DATA_11 0x54
kylongmu 0:768d2e151834 136 #define MPUREG_EXT_SENS_DATA_12 0x55
kylongmu 0:768d2e151834 137 #define MPUREG_EXT_SENS_DATA_13 0x56
kylongmu 0:768d2e151834 138 #define MPUREG_EXT_SENS_DATA_14 0x57
kylongmu 0:768d2e151834 139 #define MPUREG_EXT_SENS_DATA_15 0x58
kylongmu 0:768d2e151834 140 #define MPUREG_EXT_SENS_DATA_16 0x59
kylongmu 0:768d2e151834 141 #define MPUREG_EXT_SENS_DATA_17 0x5A
kylongmu 0:768d2e151834 142 #define MPUREG_EXT_SENS_DATA_18 0x5B
kylongmu 0:768d2e151834 143 #define MPUREG_EXT_SENS_DATA_19 0x5C
kylongmu 0:768d2e151834 144 #define MPUREG_EXT_SENS_DATA_20 0x5D
kylongmu 0:768d2e151834 145 #define MPUREG_EXT_SENS_DATA_21 0x5E
kylongmu 0:768d2e151834 146 #define MPUREG_EXT_SENS_DATA_22 0x5F
kylongmu 0:768d2e151834 147 #define MPUREG_EXT_SENS_DATA_23 0x60
kylongmu 0:768d2e151834 148 #define MPUREG_I2C_SLV0_DO 0x63
kylongmu 0:768d2e151834 149 #define MPUREG_I2C_SLV1_DO 0x64
kylongmu 0:768d2e151834 150 #define MPUREG_I2C_SLV2_DO 0x65
kylongmu 0:768d2e151834 151 #define MPUREG_I2C_SLV3_DO 0x66
kylongmu 0:768d2e151834 152 #define MPUREG_I2C_MST_DELAY_CTRL 0x67
kylongmu 0:768d2e151834 153 #define MPUREG_SIGNAL_PATH_RESET 0x68
kylongmu 0:768d2e151834 154 #define MPUREG_MOT_DETECT_CTRL 0x69
kylongmu 0:768d2e151834 155 #define MPUREG_USER_CTRL 0x6A
kylongmu 0:768d2e151834 156 #define MPUREG_PWR_MGMT_1 0x6B
kylongmu 0:768d2e151834 157 #define MPUREG_PWR_MGMT_2 0x6C
kylongmu 0:768d2e151834 158 #define MPUREG_BANK_SEL 0x6D
kylongmu 0:768d2e151834 159 #define MPUREG_MEM_START_ADDR 0x6E
kylongmu 0:768d2e151834 160 #define MPUREG_MEM_R_W 0x6F
kylongmu 0:768d2e151834 161 #define MPUREG_DMP_CFG_1 0x70
kylongmu 0:768d2e151834 162 #define MPUREG_DMP_CFG_2 0x71
kylongmu 0:768d2e151834 163 #define MPUREG_FIFO_COUNTH 0x72
kylongmu 0:768d2e151834 164 #define MPUREG_FIFO_COUNTL 0x73
kylongmu 0:768d2e151834 165 #define MPUREG_FIFO_R_W 0x74
kylongmu 0:768d2e151834 166 #define MPUREG_WHOAMI 0x75
kylongmu 0:768d2e151834 167 #define MPUREG_XA_OFFSET_H 0x77
kylongmu 0:768d2e151834 168 #define MPUREG_XA_OFFSET_L 0x78
kylongmu 0:768d2e151834 169 #define MPUREG_YA_OFFSET_H 0x7A
kylongmu 0:768d2e151834 170 #define MPUREG_YA_OFFSET_L 0x7B
kylongmu 0:768d2e151834 171 #define MPUREG_ZA_OFFSET_H 0x7D
kylongmu 0:768d2e151834 172 #define MPUREG_ZA_OFFSET_L 0x7E
kylongmu 0:768d2e151834 173 /* ---- AK8963 Reg In MPU9250 ----------------------------------------------- */
kylongmu 0:768d2e151834 174
kylongmu 5:f15d1d9d1561 175 #define AK8963_I2C_ADDR 0x0c//0x18
kylongmu 0:768d2e151834 176 #define AK8963_Device_ID 0x48
kylongmu 0:768d2e151834 177
kylongmu 0:768d2e151834 178 // Read-only Reg
kylongmu 0:768d2e151834 179 #define AK8963_WIA 0x00
kylongmu 0:768d2e151834 180 #define AK8963_INFO 0x01
kylongmu 0:768d2e151834 181 #define AK8963_ST1 0x02
kylongmu 0:768d2e151834 182 #define AK8963_HXL 0x03
kylongmu 0:768d2e151834 183 #define AK8963_HXH 0x04
kylongmu 0:768d2e151834 184 #define AK8963_HYL 0x05
kylongmu 0:768d2e151834 185 #define AK8963_HYH 0x06
kylongmu 0:768d2e151834 186 #define AK8963_HZL 0x07
kylongmu 0:768d2e151834 187 #define AK8963_HZH 0x08
kylongmu 0:768d2e151834 188 #define AK8963_ST2 0x09
kylongmu 0:768d2e151834 189 // Write/Read Reg
kylongmu 0:768d2e151834 190 #define AK8963_CNTL1 0x0A
kylongmu 0:768d2e151834 191 #define AK8963_CNTL2 0x0B
kylongmu 0:768d2e151834 192 #define AK8963_ASTC 0x0C
kylongmu 0:768d2e151834 193 #define AK8963_TS1 0x0D
kylongmu 0:768d2e151834 194 #define AK8963_TS2 0x0E
kylongmu 0:768d2e151834 195 #define AK8963_I2CDIS 0x0F
kylongmu 0:768d2e151834 196 // Read-only Reg ( ROM )
kylongmu 0:768d2e151834 197 #define AK8963_ASAX 0x10
kylongmu 0:768d2e151834 198 #define AK8963_ASAY 0x11
kylongmu 0:768d2e151834 199 #define AK8963_ASAZ 0x12
kylongmu 0:768d2e151834 200
kylongmu 0:768d2e151834 201 // Configuration bits mpu9250
kylongmu 0:768d2e151834 202 #define BIT_SLEEP 0x40
kylongmu 0:768d2e151834 203 #define BIT_H_RESET 0x80
kylongmu 0:768d2e151834 204 #define BITS_CLKSEL 0x07
kylongmu 0:768d2e151834 205 #define MPU_CLK_SEL_PLLGYROX 0x01
kylongmu 0:768d2e151834 206 #define MPU_CLK_SEL_PLLGYROZ 0x03
kylongmu 0:768d2e151834 207 #define MPU_EXT_SYNC_GYROX 0x02
kylongmu 0:768d2e151834 208 #define BITS_FS_250DPS 0x00
kylongmu 0:768d2e151834 209 #define BITS_FS_500DPS 0x08
kylongmu 0:768d2e151834 210 #define BITS_FS_1000DPS 0x10
kylongmu 0:768d2e151834 211 #define BITS_FS_2000DPS 0x18
kylongmu 0:768d2e151834 212 #define BITS_FS_2G 0x00
kylongmu 0:768d2e151834 213 #define BITS_FS_4G 0x08
kylongmu 0:768d2e151834 214 #define BITS_FS_8G 0x10
kylongmu 0:768d2e151834 215 #define BITS_FS_16G 0x18
kylongmu 0:768d2e151834 216 #define BITS_FS_MASK 0x18
kylongmu 0:768d2e151834 217 #define BITS_DLPF_CFG_256HZ_NOLPF2 0x00
kylongmu 0:768d2e151834 218 #define BITS_DLPF_CFG_188HZ 0x01
kylongmu 0:768d2e151834 219 #define BITS_DLPF_CFG_98HZ 0x02
kylongmu 0:768d2e151834 220 #define BITS_DLPF_CFG_42HZ 0x03
kylongmu 0:768d2e151834 221 #define BITS_DLPF_CFG_20HZ 0x04
kylongmu 0:768d2e151834 222 #define BITS_DLPF_CFG_10HZ 0x05
kylongmu 0:768d2e151834 223 #define BITS_DLPF_CFG_5HZ 0x06
kylongmu 0:768d2e151834 224 #define BITS_DLPF_CFG_2100HZ_NOLPF 0x07
kylongmu 0:768d2e151834 225 #define BITS_DLPF_CFG_MASK 0x07
kylongmu 0:768d2e151834 226 #define BIT_INT_ANYRD_2CLEAR 0x10
kylongmu 0:768d2e151834 227 #define BIT_RAW_RDY_EN 0x01
kylongmu 0:768d2e151834 228 #define BIT_I2C_IF_DIS 0x10
kylongmu 0:768d2e151834 229
kylongmu 0:768d2e151834 230 #define READ_FLAG 0x80
kylongmu 0:768d2e151834 231
kylongmu 0:768d2e151834 232 /* ---- Sensitivity --------------------------------------------------------- */
kylongmu 0:768d2e151834 233
kylongmu 0:768d2e151834 234 #define MPU9250A_2g ((float)0.000061035156f) // 0.000061035156 g/LSB
kylongmu 0:768d2e151834 235 #define MPU9250A_4g ((float)0.000122070312f) // 0.000122070312 g/LSB
kylongmu 0:768d2e151834 236 #define MPU9250A_8g ((float)0.000244140625f) // 0.000244140625 g/LSB
kylongmu 0:768d2e151834 237 #define MPU9250A_16g ((float)0.000488281250f) // 0.000488281250 g/LSB
kylongmu 0:768d2e151834 238
kylongmu 0:768d2e151834 239 #define MPU9250G_250dps ((float)0.007633587786f) // 0.007633587786 dps/LSB
kylongmu 0:768d2e151834 240 #define MPU9250G_500dps ((float)0.015267175572f) // 0.015267175572 dps/LSB
kylongmu 0:768d2e151834 241 #define MPU9250G_1000dps ((float)0.030487804878f) // 0.030487804878 dps/LSB
kylongmu 0:768d2e151834 242 #define MPU9250G_2000dps ((float)0.060975609756f) // 0.060975609756 dps/LSB
kylongmu 0:768d2e151834 243
kylongmu 0:768d2e151834 244 #define MPU9250M_4800uT ((float)0.6f) // 0.6 uT/LSB
kylongmu 0:768d2e151834 245
kylongmu 0:768d2e151834 246 #define MPU9250T_85degC ((float)0.002995177763f) // 0.002995177763 degC/LSB
kylongmu 0:768d2e151834 247