Doubea Pierre / Mbed 2 deprecated HW3

Lab Checkoff

Dependencies:   SDFileSystem TextLCD mbed-rtos mbed wave_player FATFileSystem

mbed-rtos/rtx/HAL_CM.c@0:67dbd54e60d4, 2013-11-13 (annotated)

Committer:
doubster
Date:
Wed Nov 13 20:00:28 2013 +0000
Revision:
0:67dbd54e60d4
Lab Checkoff

Who changed what in which revision?

UserRevisionLine numberNew contents of line
doubster 0:67dbd54e60d4 1 /*----------------------------------------------------------------------------
doubster 0:67dbd54e60d4 2 * RL-ARM - RTX
doubster 0:67dbd54e60d4 3 *----------------------------------------------------------------------------
doubster 0:67dbd54e60d4 4 * Name: HAL_CM.C
doubster 0:67dbd54e60d4 5 * Purpose: Hardware Abstraction Layer for Cortex-M
doubster 0:67dbd54e60d4 6 * Rev.: V4.60
doubster 0:67dbd54e60d4 7 *----------------------------------------------------------------------------
doubster 0:67dbd54e60d4 8 *
doubster 0:67dbd54e60d4 9 * Copyright (c) 1999-2009 KEIL, 2009-2012 ARM Germany GmbH
doubster 0:67dbd54e60d4 10 * All rights reserved.
doubster 0:67dbd54e60d4 11 * Redistribution and use in source and binary forms, with or without
doubster 0:67dbd54e60d4 12 * modification, are permitted provided that the following conditions are met:
doubster 0:67dbd54e60d4 13 * - Redistributions of source code must retain the above copyright
doubster 0:67dbd54e60d4 14 * notice, this list of conditions and the following disclaimer.
doubster 0:67dbd54e60d4 15 * - Redistributions in binary form must reproduce the above copyright
doubster 0:67dbd54e60d4 16 * notice, this list of conditions and the following disclaimer in the
doubster 0:67dbd54e60d4 17 * documentation and/or other materials provided with the distribution.
doubster 0:67dbd54e60d4 18 * - Neither the name of ARM nor the names of its contributors may be used
doubster 0:67dbd54e60d4 19 * to endorse or promote products derived from this software without
doubster 0:67dbd54e60d4 20 * specific prior written permission.
doubster 0:67dbd54e60d4 21 *
doubster 0:67dbd54e60d4 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
doubster 0:67dbd54e60d4 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
doubster 0:67dbd54e60d4 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
doubster 0:67dbd54e60d4 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
doubster 0:67dbd54e60d4 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
doubster 0:67dbd54e60d4 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
doubster 0:67dbd54e60d4 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
doubster 0:67dbd54e60d4 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
doubster 0:67dbd54e60d4 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
doubster 0:67dbd54e60d4 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
doubster 0:67dbd54e60d4 32 * POSSIBILITY OF SUCH DAMAGE.
doubster 0:67dbd54e60d4 33 *---------------------------------------------------------------------------*/
doubster 0:67dbd54e60d4 34
doubster 0:67dbd54e60d4 35 #include "rt_TypeDef.h"
doubster 0:67dbd54e60d4 36 #include "RTX_Config.h"
doubster 0:67dbd54e60d4 37 #include "rt_HAL_CM.h"
doubster 0:67dbd54e60d4 38
doubster 0:67dbd54e60d4 39
doubster 0:67dbd54e60d4 40 /*----------------------------------------------------------------------------
doubster 0:67dbd54e60d4 41 * Global Variables
doubster 0:67dbd54e60d4 42 *---------------------------------------------------------------------------*/
doubster 0:67dbd54e60d4 43
doubster 0:67dbd54e60d4 44 #ifdef DBG_MSG
doubster 0:67dbd54e60d4 45 BIT dbg_msg;
doubster 0:67dbd54e60d4 46 #endif
doubster 0:67dbd54e60d4 47
doubster 0:67dbd54e60d4 48 /*----------------------------------------------------------------------------
doubster 0:67dbd54e60d4 49 * Functions
doubster 0:67dbd54e60d4 50 *---------------------------------------------------------------------------*/
doubster 0:67dbd54e60d4 51
doubster 0:67dbd54e60d4 52
doubster 0:67dbd54e60d4 53 /*--------------------------- rt_init_stack ---------------------------------*/
doubster 0:67dbd54e60d4 54
doubster 0:67dbd54e60d4 55 void rt_init_stack (P_TCB p_TCB, FUNCP task_body) {
doubster 0:67dbd54e60d4 56 /* Prepare TCB and saved context for a first time start of a task. */
doubster 0:67dbd54e60d4 57 U32 *stk,i,size;
doubster 0:67dbd54e60d4 58
doubster 0:67dbd54e60d4 59 /* Prepare a complete interrupt frame for first task start */
doubster 0:67dbd54e60d4 60 size = p_TCB->priv_stack >> 2;
doubster 0:67dbd54e60d4 61
doubster 0:67dbd54e60d4 62 /* Write to the top of stack. */
doubster 0:67dbd54e60d4 63 stk = &p_TCB->stack[size];
doubster 0:67dbd54e60d4 64
doubster 0:67dbd54e60d4 65 /* Auto correct to 8-byte ARM stack alignment. */
doubster 0:67dbd54e60d4 66 if ((U32)stk & 0x04) {
doubster 0:67dbd54e60d4 67 stk--;
doubster 0:67dbd54e60d4 68 }
doubster 0:67dbd54e60d4 69
doubster 0:67dbd54e60d4 70 stk -= 16;
doubster 0:67dbd54e60d4 71
doubster 0:67dbd54e60d4 72 /* Default xPSR and initial PC */
doubster 0:67dbd54e60d4 73 stk[15] = INITIAL_xPSR;
doubster 0:67dbd54e60d4 74 stk[14] = (U32)task_body;
doubster 0:67dbd54e60d4 75
doubster 0:67dbd54e60d4 76 /* Clear R4-R11,R0-R3,R12,LR registers. */
doubster 0:67dbd54e60d4 77 for (i = 0; i < 14; i++) {
doubster 0:67dbd54e60d4 78 stk[i] = 0;
doubster 0:67dbd54e60d4 79 }
doubster 0:67dbd54e60d4 80
doubster 0:67dbd54e60d4 81 /* Assign a void pointer to R0. */
doubster 0:67dbd54e60d4 82 stk[8] = (U32)p_TCB->msg;
doubster 0:67dbd54e60d4 83
doubster 0:67dbd54e60d4 84 /* Initial Task stack pointer. */
doubster 0:67dbd54e60d4 85 p_TCB->tsk_stack = (U32)stk;
doubster 0:67dbd54e60d4 86
doubster 0:67dbd54e60d4 87 /* Task entry point. */
doubster 0:67dbd54e60d4 88 p_TCB->ptask = task_body;
doubster 0:67dbd54e60d4 89
doubster 0:67dbd54e60d4 90 /* Set a magic word for checking of stack overflow.
doubster 0:67dbd54e60d4 91 For the main thread (ID: 0x01) the stack is in a memory area shared with the
doubster 0:67dbd54e60d4 92 heap, therefore the last word of the stack is a moving target.
doubster 0:67dbd54e60d4 93 We want to do stack/heap collision detection instead.
doubster 0:67dbd54e60d4 94 */
doubster 0:67dbd54e60d4 95 if (p_TCB->task_id != 0x01)
doubster 0:67dbd54e60d4 96 p_TCB->stack[0] = MAGIC_WORD;
doubster 0:67dbd54e60d4 97 }
doubster 0:67dbd54e60d4 98
doubster 0:67dbd54e60d4 99
doubster 0:67dbd54e60d4 100 /*--------------------------- rt_ret_val ----------------------------------*/
doubster 0:67dbd54e60d4 101
doubster 0:67dbd54e60d4 102 static __inline U32 *rt_ret_regs (P_TCB p_TCB) {
doubster 0:67dbd54e60d4 103 /* Get pointer to task return value registers (R0..R3) in Stack */
doubster 0:67dbd54e60d4 104 #if (__TARGET_FPU_VFP)
doubster 0:67dbd54e60d4 105 if (p_TCB->stack_frame) {
doubster 0:67dbd54e60d4 106 /* Extended Stack Frame: R4-R11,S16-S31,R0-R3,R12,LR,PC,xPSR,S0-S15,FPSCR */
doubster 0:67dbd54e60d4 107 return (U32 *)(p_TCB->tsk_stack + 8*4 + 16*4);
doubster 0:67dbd54e60d4 108 } else {
doubster 0:67dbd54e60d4 109 /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
doubster 0:67dbd54e60d4 110 return (U32 *)(p_TCB->tsk_stack + 8*4);
doubster 0:67dbd54e60d4 111 }
doubster 0:67dbd54e60d4 112 #else
doubster 0:67dbd54e60d4 113 /* Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
doubster 0:67dbd54e60d4 114 return (U32 *)(p_TCB->tsk_stack + 8*4);
doubster 0:67dbd54e60d4 115 #endif
doubster 0:67dbd54e60d4 116 }
doubster 0:67dbd54e60d4 117
doubster 0:67dbd54e60d4 118 void rt_ret_val (P_TCB p_TCB, U32 v0) {
doubster 0:67dbd54e60d4 119 U32 *ret;
doubster 0:67dbd54e60d4 120
doubster 0:67dbd54e60d4 121 ret = rt_ret_regs(p_TCB);
doubster 0:67dbd54e60d4 122 ret[0] = v0;
doubster 0:67dbd54e60d4 123 }
doubster 0:67dbd54e60d4 124
doubster 0:67dbd54e60d4 125 void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {
doubster 0:67dbd54e60d4 126 U32 *ret;
doubster 0:67dbd54e60d4 127
doubster 0:67dbd54e60d4 128 ret = rt_ret_regs(p_TCB);
doubster 0:67dbd54e60d4 129 ret[0] = v0;
doubster 0:67dbd54e60d4 130 ret[1] = v1;
doubster 0:67dbd54e60d4 131 }
doubster 0:67dbd54e60d4 132
doubster 0:67dbd54e60d4 133
doubster 0:67dbd54e60d4 134 /*--------------------------- dbg_init --------------------------------------*/
doubster 0:67dbd54e60d4 135
doubster 0:67dbd54e60d4 136 #ifdef DBG_MSG
doubster 0:67dbd54e60d4 137 void dbg_init (void) {
doubster 0:67dbd54e60d4 138 if ((DEMCR & DEMCR_TRCENA) &&
doubster 0:67dbd54e60d4 139 (ITM_CONTROL & ITM_ITMENA) &&
doubster 0:67dbd54e60d4 140 (ITM_ENABLE & (1UL << 31))) {
doubster 0:67dbd54e60d4 141 dbg_msg = __TRUE;
doubster 0:67dbd54e60d4 142 }
doubster 0:67dbd54e60d4 143 }
doubster 0:67dbd54e60d4 144 #endif
doubster 0:67dbd54e60d4 145
doubster 0:67dbd54e60d4 146 /*--------------------------- dbg_task_notify -------------------------------*/
doubster 0:67dbd54e60d4 147
doubster 0:67dbd54e60d4 148 #ifdef DBG_MSG
doubster 0:67dbd54e60d4 149 void dbg_task_notify (P_TCB p_tcb, BOOL create) {
doubster 0:67dbd54e60d4 150 while (ITM_PORT31_U32 == 0);
doubster 0:67dbd54e60d4 151 ITM_PORT31_U32 = (U32)p_tcb->ptask;
doubster 0:67dbd54e60d4 152 while (ITM_PORT31_U32 == 0);
doubster 0:67dbd54e60d4 153 ITM_PORT31_U16 = (create << 8) | p_tcb->task_id;
doubster 0:67dbd54e60d4 154 }
doubster 0:67dbd54e60d4 155 #endif
doubster 0:67dbd54e60d4 156
doubster 0:67dbd54e60d4 157 /*--------------------------- dbg_task_switch -------------------------------*/
doubster 0:67dbd54e60d4 158
doubster 0:67dbd54e60d4 159 #ifdef DBG_MSG
doubster 0:67dbd54e60d4 160 void dbg_task_switch (U32 task_id) {
doubster 0:67dbd54e60d4 161 while (ITM_PORT31_U32 == 0);
doubster 0:67dbd54e60d4 162 ITM_PORT31_U8 = task_id;
doubster 0:67dbd54e60d4 163 }
doubster 0:67dbd54e60d4 164 #endif
doubster 0:67dbd54e60d4 165
doubster 0:67dbd54e60d4 166
doubster 0:67dbd54e60d4 167 /*----------------------------------------------------------------------------
doubster 0:67dbd54e60d4 168 * end of file
doubster 0:67dbd54e60d4 169 *---------------------------------------------------------------------------*/
doubster 0:67dbd54e60d4 170
doubster 0:67dbd54e60d4 171