mpu9150
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MPU9150.cpp@2:da1e88bafc3f, 2017-06-21 (annotated)
- Committer:
- donghuoyinzi
- Date:
- Wed Jun 21 03:30:17 2017 +0000
- Revision:
- 2:da1e88bafc3f
- Parent:
- 0:78ba160ba5f3
123
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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syundo0730 | 0:78ba160ba5f3 | 1 | #include "MPU9150.h" |
syundo0730 | 0:78ba160ba5f3 | 2 | /** Default constructor, uses default I2C address. |
syundo0730 | 0:78ba160ba5f3 | 3 | * @see MPU9150_DEFAULT_ADDRESS |
syundo0730 | 0:78ba160ba5f3 | 4 | */ |
syundo0730 | 0:78ba160ba5f3 | 5 | MPU9150::MPU9150() { |
syundo0730 | 0:78ba160ba5f3 | 6 | devAddr = MPU9150_DEFAULT_ADDRESS; |
syundo0730 | 0:78ba160ba5f3 | 7 | } |
syundo0730 | 0:78ba160ba5f3 | 8 | |
syundo0730 | 0:78ba160ba5f3 | 9 | /** Specific address constructor. |
syundo0730 | 0:78ba160ba5f3 | 10 | * @param address I2C address |
syundo0730 | 0:78ba160ba5f3 | 11 | * @see MPU9150_DEFAULT_ADDRESS |
syundo0730 | 0:78ba160ba5f3 | 12 | * @see MPU9150_ADDRESS_AD0_LOW |
syundo0730 | 0:78ba160ba5f3 | 13 | * @see MPU9150_ADDRESS_AD0_HIGH |
syundo0730 | 0:78ba160ba5f3 | 14 | */ |
syundo0730 | 0:78ba160ba5f3 | 15 | MPU9150::MPU9150(uint8_t address) { |
syundo0730 | 0:78ba160ba5f3 | 16 | devAddr = address; |
syundo0730 | 0:78ba160ba5f3 | 17 | } |
syundo0730 | 0:78ba160ba5f3 | 18 | |
syundo0730 | 0:78ba160ba5f3 | 19 | /** Power on and prepare for general usage. |
syundo0730 | 0:78ba160ba5f3 | 20 | * This will activate the device and take it out of sleep mode (which must be done |
syundo0730 | 0:78ba160ba5f3 | 21 | * after start-up). This function also sets both the accelerometer and the gyroscope |
syundo0730 | 0:78ba160ba5f3 | 22 | * to their most sensitive settings, namely +/- 2g and +/- 250 degrees/sec, and sets |
syundo0730 | 0:78ba160ba5f3 | 23 | * the clock source to use the X Gyro for reference, which is slightly better than |
syundo0730 | 0:78ba160ba5f3 | 24 | * the default internal clock source. |
syundo0730 | 0:78ba160ba5f3 | 25 | */ |
syundo0730 | 0:78ba160ba5f3 | 26 | void MPU9150::initialize() { |
syundo0730 | 0:78ba160ba5f3 | 27 | setClockSource(MPU9150_CLOCK_PLL_XGYRO); |
syundo0730 | 0:78ba160ba5f3 | 28 | setFullScaleGyroRange(MPU9150_GYRO_FS_250); |
syundo0730 | 0:78ba160ba5f3 | 29 | setFullScaleAccelRange(MPU9150_ACCEL_FS_2); |
syundo0730 | 0:78ba160ba5f3 | 30 | setSleepEnabled(false); // thanks to Jack Elston for pointing this one out! |
syundo0730 | 0:78ba160ba5f3 | 31 | } |
syundo0730 | 0:78ba160ba5f3 | 32 | |
syundo0730 | 0:78ba160ba5f3 | 33 | /** Verify the I2C connection. |
syundo0730 | 0:78ba160ba5f3 | 34 | * Make sure the device is connected and responds as expected. |
syundo0730 | 0:78ba160ba5f3 | 35 | * @return True if connection is valid, false otherwise |
syundo0730 | 0:78ba160ba5f3 | 36 | */ |
syundo0730 | 0:78ba160ba5f3 | 37 | bool MPU9150::testConnection() { |
syundo0730 | 0:78ba160ba5f3 | 38 | return getDeviceID() == 0x34; |
syundo0730 | 0:78ba160ba5f3 | 39 | } |
syundo0730 | 0:78ba160ba5f3 | 40 | |
syundo0730 | 0:78ba160ba5f3 | 41 | // AUX_VDDIO register (InvenSense demo code calls this RA_*G_OFFS_TC) |
syundo0730 | 0:78ba160ba5f3 | 42 | |
syundo0730 | 0:78ba160ba5f3 | 43 | /** Get the auxiliary I2C supply voltage level. |
syundo0730 | 0:78ba160ba5f3 | 44 | * When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to |
syundo0730 | 0:78ba160ba5f3 | 45 | * 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to |
syundo0730 | 0:78ba160ba5f3 | 46 | * the MPU-6000, which does not have a VLOGIC pin. |
syundo0730 | 0:78ba160ba5f3 | 47 | * @return I2C supply voltage level (0=VLOGIC, 1=VDD) |
syundo0730 | 0:78ba160ba5f3 | 48 | */ |
syundo0730 | 0:78ba160ba5f3 | 49 | uint8_t MPU9150::getAuxVDDIOLevel() { |
syundo0730 | 0:78ba160ba5f3 | 50 | I2Cdev::readBit(devAddr, MPU9150_RA_YG_OFFS_TC, MPU9150_TC_PWR_MODE_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 51 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 52 | } |
syundo0730 | 0:78ba160ba5f3 | 53 | /** Set the auxiliary I2C supply voltage level. |
syundo0730 | 0:78ba160ba5f3 | 54 | * When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to |
syundo0730 | 0:78ba160ba5f3 | 55 | * 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to |
syundo0730 | 0:78ba160ba5f3 | 56 | * the MPU-6000, which does not have a VLOGIC pin. |
syundo0730 | 0:78ba160ba5f3 | 57 | * @param level I2C supply voltage level (0=VLOGIC, 1=VDD) |
syundo0730 | 0:78ba160ba5f3 | 58 | */ |
syundo0730 | 0:78ba160ba5f3 | 59 | void MPU9150::setAuxVDDIOLevel(uint8_t level) { |
syundo0730 | 0:78ba160ba5f3 | 60 | I2Cdev::writeBit(devAddr, MPU9150_RA_YG_OFFS_TC, MPU9150_TC_PWR_MODE_BIT, level); |
syundo0730 | 0:78ba160ba5f3 | 61 | } |
syundo0730 | 0:78ba160ba5f3 | 62 | |
syundo0730 | 0:78ba160ba5f3 | 63 | // SMPLRT_DIV register |
syundo0730 | 0:78ba160ba5f3 | 64 | |
syundo0730 | 0:78ba160ba5f3 | 65 | /** Get gyroscope output rate divider. |
syundo0730 | 0:78ba160ba5f3 | 66 | * The sensor register output, FIFO output, DMP sampling, Motion detection, Zero |
syundo0730 | 0:78ba160ba5f3 | 67 | * Motion detection, and Free Fall detection are all based on the Sample Rate. |
syundo0730 | 0:78ba160ba5f3 | 68 | * The Sample Rate is generated by dividing the gyroscope output rate by |
syundo0730 | 0:78ba160ba5f3 | 69 | * SMPLRT_DIV: |
syundo0730 | 0:78ba160ba5f3 | 70 | * |
syundo0730 | 0:78ba160ba5f3 | 71 | * Sample Rate = Gyroscope Output Rate / (1 + SMPLRT_DIV) |
syundo0730 | 0:78ba160ba5f3 | 72 | * |
syundo0730 | 0:78ba160ba5f3 | 73 | * where Gyroscope Output Rate = 8kHz when the DLPF is disabled (DLPF_CFG = 0 or |
syundo0730 | 0:78ba160ba5f3 | 74 | * 7), and 1kHz when the DLPF is enabled (see Register 26). |
syundo0730 | 0:78ba160ba5f3 | 75 | * |
syundo0730 | 0:78ba160ba5f3 | 76 | * Note: The accelerometer output rate is 1kHz. This means that for a Sample |
syundo0730 | 0:78ba160ba5f3 | 77 | * Rate greater than 1kHz, the same accelerometer sample may be output to the |
syundo0730 | 0:78ba160ba5f3 | 78 | * FIFO, DMP, and sensor registers more than once. |
syundo0730 | 0:78ba160ba5f3 | 79 | * |
syundo0730 | 0:78ba160ba5f3 | 80 | * For a diagram of the gyroscope and accelerometer signal paths, see Section 8 |
syundo0730 | 0:78ba160ba5f3 | 81 | * of the MPU-6000/MPU-9150 Product Specification document. |
syundo0730 | 0:78ba160ba5f3 | 82 | * |
syundo0730 | 0:78ba160ba5f3 | 83 | * @return Current sample rate |
syundo0730 | 0:78ba160ba5f3 | 84 | * @see MPU9150_RA_SMPLRT_DIV |
syundo0730 | 0:78ba160ba5f3 | 85 | */ |
syundo0730 | 0:78ba160ba5f3 | 86 | uint8_t MPU9150::getRate() { |
syundo0730 | 0:78ba160ba5f3 | 87 | I2Cdev::readByte(devAddr, MPU9150_RA_SMPLRT_DIV, buffer); |
syundo0730 | 0:78ba160ba5f3 | 88 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 89 | } |
syundo0730 | 0:78ba160ba5f3 | 90 | /** Set gyroscope sample rate divider. |
syundo0730 | 0:78ba160ba5f3 | 91 | * @param rate New sample rate divider |
syundo0730 | 0:78ba160ba5f3 | 92 | * @see getRate() |
syundo0730 | 0:78ba160ba5f3 | 93 | * @see MPU9150_RA_SMPLRT_DIV |
syundo0730 | 0:78ba160ba5f3 | 94 | */ |
syundo0730 | 0:78ba160ba5f3 | 95 | void MPU9150::setRate(uint8_t rate) { |
syundo0730 | 0:78ba160ba5f3 | 96 | I2Cdev::writeByte(devAddr, MPU9150_RA_SMPLRT_DIV, rate); |
syundo0730 | 0:78ba160ba5f3 | 97 | } |
syundo0730 | 0:78ba160ba5f3 | 98 | |
syundo0730 | 0:78ba160ba5f3 | 99 | // CONFIG register |
syundo0730 | 0:78ba160ba5f3 | 100 | |
syundo0730 | 0:78ba160ba5f3 | 101 | /** Get external FSYNC configuration. |
syundo0730 | 0:78ba160ba5f3 | 102 | * Configures the external Frame Synchronization (FSYNC) pin sampling. An |
syundo0730 | 0:78ba160ba5f3 | 103 | * external signal connected to the FSYNC pin can be sampled by configuring |
syundo0730 | 0:78ba160ba5f3 | 104 | * EXT_SYNC_SET. Signal changes to the FSYNC pin are latched so that short |
syundo0730 | 0:78ba160ba5f3 | 105 | * strobes may be captured. The latched FSYNC signal will be sampled at the |
syundo0730 | 0:78ba160ba5f3 | 106 | * Sampling Rate, as defined in register 25. After sampling, the latch will |
syundo0730 | 0:78ba160ba5f3 | 107 | * reset to the current FSYNC signal state. |
syundo0730 | 0:78ba160ba5f3 | 108 | * |
syundo0730 | 0:78ba160ba5f3 | 109 | * The sampled value will be reported in place of the least significant bit in |
syundo0730 | 0:78ba160ba5f3 | 110 | * a sensor data register determined by the value of EXT_SYNC_SET according to |
syundo0730 | 0:78ba160ba5f3 | 111 | * the following table. |
syundo0730 | 0:78ba160ba5f3 | 112 | * |
syundo0730 | 0:78ba160ba5f3 | 113 | * <pre> |
syundo0730 | 0:78ba160ba5f3 | 114 | * EXT_SYNC_SET | FSYNC Bit Location |
syundo0730 | 0:78ba160ba5f3 | 115 | * -------------+------------------- |
syundo0730 | 0:78ba160ba5f3 | 116 | * 0 | Input disabled |
syundo0730 | 0:78ba160ba5f3 | 117 | * 1 | TEMP_OUT_L[0] |
syundo0730 | 0:78ba160ba5f3 | 118 | * 2 | GYRO_XOUT_L[0] |
syundo0730 | 0:78ba160ba5f3 | 119 | * 3 | GYRO_YOUT_L[0] |
syundo0730 | 0:78ba160ba5f3 | 120 | * 4 | GYRO_ZOUT_L[0] |
syundo0730 | 0:78ba160ba5f3 | 121 | * 5 | ACCEL_XOUT_L[0] |
syundo0730 | 0:78ba160ba5f3 | 122 | * 6 | ACCEL_YOUT_L[0] |
syundo0730 | 0:78ba160ba5f3 | 123 | * 7 | ACCEL_ZOUT_L[0] |
syundo0730 | 0:78ba160ba5f3 | 124 | * </pre> |
syundo0730 | 0:78ba160ba5f3 | 125 | * |
syundo0730 | 0:78ba160ba5f3 | 126 | * @return FSYNC configuration value |
syundo0730 | 0:78ba160ba5f3 | 127 | */ |
syundo0730 | 0:78ba160ba5f3 | 128 | uint8_t MPU9150::getExternalFrameSync() { |
syundo0730 | 0:78ba160ba5f3 | 129 | I2Cdev::readBits(devAddr, MPU9150_RA_CONFIG, MPU9150_CFG_EXT_SYNC_SET_BIT, MPU9150_CFG_EXT_SYNC_SET_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 130 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 131 | } |
syundo0730 | 0:78ba160ba5f3 | 132 | /** Set external FSYNC configuration. |
syundo0730 | 0:78ba160ba5f3 | 133 | * @see getExternalFrameSync() |
syundo0730 | 0:78ba160ba5f3 | 134 | * @see MPU9150_RA_CONFIG |
syundo0730 | 0:78ba160ba5f3 | 135 | * @param sync New FSYNC configuration value |
syundo0730 | 0:78ba160ba5f3 | 136 | */ |
syundo0730 | 0:78ba160ba5f3 | 137 | void MPU9150::setExternalFrameSync(uint8_t sync) { |
syundo0730 | 0:78ba160ba5f3 | 138 | I2Cdev::writeBits(devAddr, MPU9150_RA_CONFIG, MPU9150_CFG_EXT_SYNC_SET_BIT, MPU9150_CFG_EXT_SYNC_SET_LENGTH, sync); |
syundo0730 | 0:78ba160ba5f3 | 139 | } |
syundo0730 | 0:78ba160ba5f3 | 140 | /** Get digital low-pass filter configuration. |
syundo0730 | 0:78ba160ba5f3 | 141 | * The DLPF_CFG parameter sets the digital low pass filter configuration. It |
syundo0730 | 0:78ba160ba5f3 | 142 | * also determines the internal sampling rate used by the device as shown in |
syundo0730 | 0:78ba160ba5f3 | 143 | * the table below. |
syundo0730 | 0:78ba160ba5f3 | 144 | * |
syundo0730 | 0:78ba160ba5f3 | 145 | * Note: The accelerometer output rate is 1kHz. This means that for a Sample |
syundo0730 | 0:78ba160ba5f3 | 146 | * Rate greater than 1kHz, the same accelerometer sample may be output to the |
syundo0730 | 0:78ba160ba5f3 | 147 | * FIFO, DMP, and sensor registers more than once. |
syundo0730 | 0:78ba160ba5f3 | 148 | * |
syundo0730 | 0:78ba160ba5f3 | 149 | * <pre> |
syundo0730 | 0:78ba160ba5f3 | 150 | * | ACCELEROMETER | GYROSCOPE |
syundo0730 | 0:78ba160ba5f3 | 151 | * DLPF_CFG | Bandwidth | Delay | Bandwidth | Delay | Sample Rate |
syundo0730 | 0:78ba160ba5f3 | 152 | * ---------+-----------+--------+-----------+--------+------------- |
syundo0730 | 0:78ba160ba5f3 | 153 | * 0 | 260Hz | 0ms | 256Hz | 0.98ms | 8kHz |
syundo0730 | 0:78ba160ba5f3 | 154 | * 1 | 184Hz | 2.0ms | 188Hz | 1.9ms | 1kHz |
syundo0730 | 0:78ba160ba5f3 | 155 | * 2 | 94Hz | 3.0ms | 98Hz | 2.8ms | 1kHz |
syundo0730 | 0:78ba160ba5f3 | 156 | * 3 | 44Hz | 4.9ms | 42Hz | 4.8ms | 1kHz |
syundo0730 | 0:78ba160ba5f3 | 157 | * 4 | 21Hz | 8.5ms | 20Hz | 8.3ms | 1kHz |
syundo0730 | 0:78ba160ba5f3 | 158 | * 5 | 10Hz | 13.8ms | 10Hz | 13.4ms | 1kHz |
syundo0730 | 0:78ba160ba5f3 | 159 | * 6 | 5Hz | 19.0ms | 5Hz | 18.6ms | 1kHz |
syundo0730 | 0:78ba160ba5f3 | 160 | * 7 | -- Reserved -- | -- Reserved -- | Reserved |
syundo0730 | 0:78ba160ba5f3 | 161 | * </pre> |
syundo0730 | 0:78ba160ba5f3 | 162 | * |
syundo0730 | 0:78ba160ba5f3 | 163 | * @return DLFP configuration |
syundo0730 | 0:78ba160ba5f3 | 164 | * @see MPU9150_RA_CONFIG |
syundo0730 | 0:78ba160ba5f3 | 165 | * @see MPU9150_CFG_DLPF_CFG_BIT |
syundo0730 | 0:78ba160ba5f3 | 166 | * @see MPU9150_CFG_DLPF_CFG_LENGTH |
syundo0730 | 0:78ba160ba5f3 | 167 | */ |
syundo0730 | 0:78ba160ba5f3 | 168 | uint8_t MPU9150::getDLPFMode() { |
syundo0730 | 0:78ba160ba5f3 | 169 | I2Cdev::readBits(devAddr, MPU9150_RA_CONFIG, MPU9150_CFG_DLPF_CFG_BIT, MPU9150_CFG_DLPF_CFG_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 170 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 171 | } |
syundo0730 | 0:78ba160ba5f3 | 172 | /** Set digital low-pass filter configuration. |
syundo0730 | 0:78ba160ba5f3 | 173 | * @param mode New DLFP configuration setting |
syundo0730 | 0:78ba160ba5f3 | 174 | * @see getDLPFBandwidth() |
syundo0730 | 0:78ba160ba5f3 | 175 | * @see MPU9150_DLPF_BW_256 |
syundo0730 | 0:78ba160ba5f3 | 176 | * @see MPU9150_RA_CONFIG |
syundo0730 | 0:78ba160ba5f3 | 177 | * @see MPU9150_CFG_DLPF_CFG_BIT |
syundo0730 | 0:78ba160ba5f3 | 178 | * @see MPU9150_CFG_DLPF_CFG_LENGTH |
syundo0730 | 0:78ba160ba5f3 | 179 | */ |
syundo0730 | 0:78ba160ba5f3 | 180 | void MPU9150::setDLPFMode(uint8_t mode) { |
syundo0730 | 0:78ba160ba5f3 | 181 | I2Cdev::writeBits(devAddr, MPU9150_RA_CONFIG, MPU9150_CFG_DLPF_CFG_BIT, MPU9150_CFG_DLPF_CFG_LENGTH, mode); |
syundo0730 | 0:78ba160ba5f3 | 182 | } |
syundo0730 | 0:78ba160ba5f3 | 183 | |
syundo0730 | 0:78ba160ba5f3 | 184 | // GYRO_CONFIG register |
syundo0730 | 0:78ba160ba5f3 | 185 | |
syundo0730 | 0:78ba160ba5f3 | 186 | /** Get full-scale gyroscope range. |
syundo0730 | 0:78ba160ba5f3 | 187 | * The FS_SEL parameter allows setting the full-scale range of the gyro sensors, |
syundo0730 | 0:78ba160ba5f3 | 188 | * as described in the table below. |
syundo0730 | 0:78ba160ba5f3 | 189 | * |
syundo0730 | 0:78ba160ba5f3 | 190 | * <pre> |
syundo0730 | 0:78ba160ba5f3 | 191 | * 0 = +/- 250 degrees/sec |
syundo0730 | 0:78ba160ba5f3 | 192 | * 1 = +/- 500 degrees/sec |
syundo0730 | 0:78ba160ba5f3 | 193 | * 2 = +/- 1000 degrees/sec |
syundo0730 | 0:78ba160ba5f3 | 194 | * 3 = +/- 2000 degrees/sec |
syundo0730 | 0:78ba160ba5f3 | 195 | * </pre> |
syundo0730 | 0:78ba160ba5f3 | 196 | * |
syundo0730 | 0:78ba160ba5f3 | 197 | * @return Current full-scale gyroscope range setting |
syundo0730 | 0:78ba160ba5f3 | 198 | * @see MPU9150_GYRO_FS_250 |
syundo0730 | 0:78ba160ba5f3 | 199 | * @see MPU9150_RA_GYRO_CONFIG |
syundo0730 | 0:78ba160ba5f3 | 200 | * @see MPU9150_GCONFIG_FS_SEL_BIT |
syundo0730 | 0:78ba160ba5f3 | 201 | * @see MPU9150_GCONFIG_FS_SEL_LENGTH |
syundo0730 | 0:78ba160ba5f3 | 202 | */ |
syundo0730 | 0:78ba160ba5f3 | 203 | uint8_t MPU9150::getFullScaleGyroRange() { |
syundo0730 | 0:78ba160ba5f3 | 204 | I2Cdev::readBits(devAddr, MPU9150_RA_GYRO_CONFIG, MPU9150_GCONFIG_FS_SEL_BIT, MPU9150_GCONFIG_FS_SEL_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 205 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 206 | } |
syundo0730 | 0:78ba160ba5f3 | 207 | /** Set full-scale gyroscope range. |
syundo0730 | 0:78ba160ba5f3 | 208 | * @param range New full-scale gyroscope range value |
syundo0730 | 0:78ba160ba5f3 | 209 | * @see getFullScaleRange() |
syundo0730 | 0:78ba160ba5f3 | 210 | * @see MPU9150_GYRO_FS_250 |
syundo0730 | 0:78ba160ba5f3 | 211 | * @see MPU9150_RA_GYRO_CONFIG |
syundo0730 | 0:78ba160ba5f3 | 212 | * @see MPU9150_GCONFIG_FS_SEL_BIT |
syundo0730 | 0:78ba160ba5f3 | 213 | * @see MPU9150_GCONFIG_FS_SEL_LENGTH |
syundo0730 | 0:78ba160ba5f3 | 214 | */ |
syundo0730 | 0:78ba160ba5f3 | 215 | void MPU9150::setFullScaleGyroRange(uint8_t range) { |
syundo0730 | 0:78ba160ba5f3 | 216 | I2Cdev::writeBits(devAddr, MPU9150_RA_GYRO_CONFIG, MPU9150_GCONFIG_FS_SEL_BIT, MPU9150_GCONFIG_FS_SEL_LENGTH, range); |
syundo0730 | 0:78ba160ba5f3 | 217 | } |
syundo0730 | 0:78ba160ba5f3 | 218 | |
syundo0730 | 0:78ba160ba5f3 | 219 | // ACCEL_CONFIG register |
syundo0730 | 0:78ba160ba5f3 | 220 | |
syundo0730 | 0:78ba160ba5f3 | 221 | /** Get self-test enabled setting for accelerometer X axis. |
syundo0730 | 0:78ba160ba5f3 | 222 | * @return Self-test enabled value |
syundo0730 | 0:78ba160ba5f3 | 223 | * @see MPU9150_RA_ACCEL_CONFIG |
syundo0730 | 0:78ba160ba5f3 | 224 | */ |
syundo0730 | 0:78ba160ba5f3 | 225 | bool MPU9150::getAccelXSelfTest() { |
syundo0730 | 0:78ba160ba5f3 | 226 | I2Cdev::readBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_XA_ST_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 227 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 228 | } |
syundo0730 | 0:78ba160ba5f3 | 229 | /** Get self-test enabled setting for accelerometer X axis. |
syundo0730 | 0:78ba160ba5f3 | 230 | * @param enabled Self-test enabled value |
syundo0730 | 0:78ba160ba5f3 | 231 | * @see MPU9150_RA_ACCEL_CONFIG |
syundo0730 | 0:78ba160ba5f3 | 232 | */ |
syundo0730 | 0:78ba160ba5f3 | 233 | void MPU9150::setAccelXSelfTest(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 234 | I2Cdev::writeBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_XA_ST_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 235 | } |
syundo0730 | 0:78ba160ba5f3 | 236 | /** Get self-test enabled value for accelerometer Y axis. |
syundo0730 | 0:78ba160ba5f3 | 237 | * @return Self-test enabled value |
syundo0730 | 0:78ba160ba5f3 | 238 | * @see MPU9150_RA_ACCEL_CONFIG |
syundo0730 | 0:78ba160ba5f3 | 239 | */ |
syundo0730 | 0:78ba160ba5f3 | 240 | bool MPU9150::getAccelYSelfTest() { |
syundo0730 | 0:78ba160ba5f3 | 241 | I2Cdev::readBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_YA_ST_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 242 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 243 | } |
syundo0730 | 0:78ba160ba5f3 | 244 | /** Get self-test enabled value for accelerometer Y axis. |
syundo0730 | 0:78ba160ba5f3 | 245 | * @param enabled Self-test enabled value |
syundo0730 | 0:78ba160ba5f3 | 246 | * @see MPU9150_RA_ACCEL_CONFIG |
syundo0730 | 0:78ba160ba5f3 | 247 | */ |
syundo0730 | 0:78ba160ba5f3 | 248 | void MPU9150::setAccelYSelfTest(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 249 | I2Cdev::writeBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_YA_ST_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 250 | } |
syundo0730 | 0:78ba160ba5f3 | 251 | /** Get self-test enabled value for accelerometer Z axis. |
syundo0730 | 0:78ba160ba5f3 | 252 | * @return Self-test enabled value |
syundo0730 | 0:78ba160ba5f3 | 253 | * @see MPU9150_RA_ACCEL_CONFIG |
syundo0730 | 0:78ba160ba5f3 | 254 | */ |
syundo0730 | 0:78ba160ba5f3 | 255 | bool MPU9150::getAccelZSelfTest() { |
syundo0730 | 0:78ba160ba5f3 | 256 | I2Cdev::readBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_ZA_ST_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 257 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 258 | } |
syundo0730 | 0:78ba160ba5f3 | 259 | /** Set self-test enabled value for accelerometer Z axis. |
syundo0730 | 0:78ba160ba5f3 | 260 | * @param enabled Self-test enabled value |
syundo0730 | 0:78ba160ba5f3 | 261 | * @see MPU9150_RA_ACCEL_CONFIG |
syundo0730 | 0:78ba160ba5f3 | 262 | */ |
syundo0730 | 0:78ba160ba5f3 | 263 | void MPU9150::setAccelZSelfTest(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 264 | I2Cdev::writeBit(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_ZA_ST_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 265 | } |
syundo0730 | 0:78ba160ba5f3 | 266 | /** Get full-scale accelerometer range. |
syundo0730 | 0:78ba160ba5f3 | 267 | * The FS_SEL parameter allows setting the full-scale range of the accelerometer |
syundo0730 | 0:78ba160ba5f3 | 268 | * sensors, as described in the table below. |
syundo0730 | 0:78ba160ba5f3 | 269 | * |
syundo0730 | 0:78ba160ba5f3 | 270 | * <pre> |
syundo0730 | 0:78ba160ba5f3 | 271 | * 0 = +/- 2g |
syundo0730 | 0:78ba160ba5f3 | 272 | * 1 = +/- 4g |
syundo0730 | 0:78ba160ba5f3 | 273 | * 2 = +/- 8g |
syundo0730 | 0:78ba160ba5f3 | 274 | * 3 = +/- 16g |
syundo0730 | 0:78ba160ba5f3 | 275 | * </pre> |
syundo0730 | 0:78ba160ba5f3 | 276 | * |
syundo0730 | 0:78ba160ba5f3 | 277 | * @return Current full-scale accelerometer range setting |
syundo0730 | 0:78ba160ba5f3 | 278 | * @see MPU9150_ACCEL_FS_2 |
syundo0730 | 0:78ba160ba5f3 | 279 | * @see MPU9150_RA_ACCEL_CONFIG |
syundo0730 | 0:78ba160ba5f3 | 280 | * @see MPU9150_ACONFIG_AFS_SEL_BIT |
syundo0730 | 0:78ba160ba5f3 | 281 | * @see MPU9150_ACONFIG_AFS_SEL_LENGTH |
syundo0730 | 0:78ba160ba5f3 | 282 | */ |
syundo0730 | 0:78ba160ba5f3 | 283 | uint8_t MPU9150::getFullScaleAccelRange() { |
syundo0730 | 0:78ba160ba5f3 | 284 | I2Cdev::readBits(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_AFS_SEL_BIT, MPU9150_ACONFIG_AFS_SEL_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 285 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 286 | } |
syundo0730 | 0:78ba160ba5f3 | 287 | /** Set full-scale accelerometer range. |
syundo0730 | 0:78ba160ba5f3 | 288 | * @param range New full-scale accelerometer range setting |
syundo0730 | 0:78ba160ba5f3 | 289 | * @see getFullScaleAccelRange() |
syundo0730 | 0:78ba160ba5f3 | 290 | */ |
syundo0730 | 0:78ba160ba5f3 | 291 | void MPU9150::setFullScaleAccelRange(uint8_t range) { |
syundo0730 | 0:78ba160ba5f3 | 292 | I2Cdev::writeBits(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_AFS_SEL_BIT, MPU9150_ACONFIG_AFS_SEL_LENGTH, range); |
syundo0730 | 0:78ba160ba5f3 | 293 | } |
syundo0730 | 0:78ba160ba5f3 | 294 | /** Get the high-pass filter configuration. |
syundo0730 | 0:78ba160ba5f3 | 295 | * The DHPF is a filter module in the path leading to motion detectors (Free |
syundo0730 | 0:78ba160ba5f3 | 296 | * Fall, Motion threshold, and Zero Motion). The high pass filter output is not |
syundo0730 | 0:78ba160ba5f3 | 297 | * available to the data registers (see Figure in Section 8 of the MPU-6000/ |
syundo0730 | 0:78ba160ba5f3 | 298 | * MPU-9150 Product Specification document). |
syundo0730 | 0:78ba160ba5f3 | 299 | * |
syundo0730 | 0:78ba160ba5f3 | 300 | * The high pass filter has three modes: |
syundo0730 | 0:78ba160ba5f3 | 301 | * |
syundo0730 | 0:78ba160ba5f3 | 302 | * <pre> |
syundo0730 | 0:78ba160ba5f3 | 303 | * Reset: The filter output settles to zero within one sample. This |
syundo0730 | 0:78ba160ba5f3 | 304 | * effectively disables the high pass filter. This mode may be toggled |
syundo0730 | 0:78ba160ba5f3 | 305 | * to quickly settle the filter. |
syundo0730 | 0:78ba160ba5f3 | 306 | * |
syundo0730 | 0:78ba160ba5f3 | 307 | * On: The high pass filter will pass signals above the cut off frequency. |
syundo0730 | 0:78ba160ba5f3 | 308 | * |
syundo0730 | 0:78ba160ba5f3 | 309 | * Hold: When triggered, the filter holds the present sample. The filter |
syundo0730 | 0:78ba160ba5f3 | 310 | * output will be the difference between the input sample and the held |
syundo0730 | 0:78ba160ba5f3 | 311 | * sample. |
syundo0730 | 0:78ba160ba5f3 | 312 | * </pre> |
syundo0730 | 0:78ba160ba5f3 | 313 | * |
syundo0730 | 0:78ba160ba5f3 | 314 | * <pre> |
syundo0730 | 0:78ba160ba5f3 | 315 | * ACCEL_HPF | Filter Mode | Cut-off Frequency |
syundo0730 | 0:78ba160ba5f3 | 316 | * ----------+-------------+------------------ |
syundo0730 | 0:78ba160ba5f3 | 317 | * 0 | Reset | None |
syundo0730 | 0:78ba160ba5f3 | 318 | * 1 | On | 5Hz |
syundo0730 | 0:78ba160ba5f3 | 319 | * 2 | On | 2.5Hz |
syundo0730 | 0:78ba160ba5f3 | 320 | * 3 | On | 1.25Hz |
syundo0730 | 0:78ba160ba5f3 | 321 | * 4 | On | 0.63Hz |
syundo0730 | 0:78ba160ba5f3 | 322 | * 7 | Hold | None |
syundo0730 | 0:78ba160ba5f3 | 323 | * </pre> |
syundo0730 | 0:78ba160ba5f3 | 324 | * |
syundo0730 | 0:78ba160ba5f3 | 325 | * @return Current high-pass filter configuration |
syundo0730 | 0:78ba160ba5f3 | 326 | * @see MPU9150_DHPF_RESET |
syundo0730 | 0:78ba160ba5f3 | 327 | * @see MPU9150_RA_ACCEL_CONFIG |
syundo0730 | 0:78ba160ba5f3 | 328 | */ |
syundo0730 | 0:78ba160ba5f3 | 329 | uint8_t MPU9150::getDHPFMode() { |
syundo0730 | 0:78ba160ba5f3 | 330 | I2Cdev::readBits(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_ACCEL_HPF_BIT, MPU9150_ACONFIG_ACCEL_HPF_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 331 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 332 | } |
syundo0730 | 0:78ba160ba5f3 | 333 | /** Set the high-pass filter configuration. |
syundo0730 | 0:78ba160ba5f3 | 334 | * @param bandwidth New high-pass filter configuration |
syundo0730 | 0:78ba160ba5f3 | 335 | * @see setDHPFMode() |
syundo0730 | 0:78ba160ba5f3 | 336 | * @see MPU9150_DHPF_RESET |
syundo0730 | 0:78ba160ba5f3 | 337 | * @see MPU9150_RA_ACCEL_CONFIG |
syundo0730 | 0:78ba160ba5f3 | 338 | */ |
syundo0730 | 0:78ba160ba5f3 | 339 | void MPU9150::setDHPFMode(uint8_t bandwidth) { |
syundo0730 | 0:78ba160ba5f3 | 340 | I2Cdev::writeBits(devAddr, MPU9150_RA_ACCEL_CONFIG, MPU9150_ACONFIG_ACCEL_HPF_BIT, MPU9150_ACONFIG_ACCEL_HPF_LENGTH, bandwidth); |
syundo0730 | 0:78ba160ba5f3 | 341 | } |
syundo0730 | 0:78ba160ba5f3 | 342 | |
syundo0730 | 0:78ba160ba5f3 | 343 | // FF_THR register |
syundo0730 | 0:78ba160ba5f3 | 344 | |
syundo0730 | 0:78ba160ba5f3 | 345 | /** Get free-fall event acceleration threshold. |
syundo0730 | 0:78ba160ba5f3 | 346 | * This register configures the detection threshold for Free Fall event |
syundo0730 | 0:78ba160ba5f3 | 347 | * detection. The unit of FF_THR is 1LSB = 2mg. Free Fall is detected when the |
syundo0730 | 0:78ba160ba5f3 | 348 | * absolute value of the accelerometer measurements for the three axes are each |
syundo0730 | 0:78ba160ba5f3 | 349 | * less than the detection threshold. This condition increments the Free Fall |
syundo0730 | 0:78ba160ba5f3 | 350 | * duration counter (Register 30). The Free Fall interrupt is triggered when the |
syundo0730 | 0:78ba160ba5f3 | 351 | * Free Fall duration counter reaches the time specified in FF_DUR. |
syundo0730 | 0:78ba160ba5f3 | 352 | * |
syundo0730 | 0:78ba160ba5f3 | 353 | * For more details on the Free Fall detection interrupt, see Section 8.2 of the |
syundo0730 | 0:78ba160ba5f3 | 354 | * MPU-6000/MPU-9150 Product Specification document as well as Registers 56 and |
syundo0730 | 0:78ba160ba5f3 | 355 | * 58 of this document. |
syundo0730 | 0:78ba160ba5f3 | 356 | * |
syundo0730 | 0:78ba160ba5f3 | 357 | * @return Current free-fall acceleration threshold value (LSB = 2mg) |
syundo0730 | 0:78ba160ba5f3 | 358 | * @see MPU9150_RA_FF_THR |
syundo0730 | 0:78ba160ba5f3 | 359 | */ |
syundo0730 | 0:78ba160ba5f3 | 360 | uint8_t MPU9150::getFreefallDetectionThreshold() { |
syundo0730 | 0:78ba160ba5f3 | 361 | I2Cdev::readByte(devAddr, MPU9150_RA_FF_THR, buffer); |
syundo0730 | 0:78ba160ba5f3 | 362 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 363 | } |
syundo0730 | 0:78ba160ba5f3 | 364 | /** Get free-fall event acceleration threshold. |
syundo0730 | 0:78ba160ba5f3 | 365 | * @param threshold New free-fall acceleration threshold value (LSB = 2mg) |
syundo0730 | 0:78ba160ba5f3 | 366 | * @see getFreefallDetectionThreshold() |
syundo0730 | 0:78ba160ba5f3 | 367 | * @see MPU9150_RA_FF_THR |
syundo0730 | 0:78ba160ba5f3 | 368 | */ |
syundo0730 | 0:78ba160ba5f3 | 369 | void MPU9150::setFreefallDetectionThreshold(uint8_t threshold) { |
syundo0730 | 0:78ba160ba5f3 | 370 | I2Cdev::writeByte(devAddr, MPU9150_RA_FF_THR, threshold); |
syundo0730 | 0:78ba160ba5f3 | 371 | } |
syundo0730 | 0:78ba160ba5f3 | 372 | |
syundo0730 | 0:78ba160ba5f3 | 373 | // FF_DUR register |
syundo0730 | 0:78ba160ba5f3 | 374 | |
syundo0730 | 0:78ba160ba5f3 | 375 | /** Get free-fall event duration threshold. |
syundo0730 | 0:78ba160ba5f3 | 376 | * This register configures the duration counter threshold for Free Fall event |
syundo0730 | 0:78ba160ba5f3 | 377 | * detection. The duration counter ticks at 1kHz, therefore FF_DUR has a unit |
syundo0730 | 0:78ba160ba5f3 | 378 | * of 1 LSB = 1 ms. |
syundo0730 | 0:78ba160ba5f3 | 379 | * |
syundo0730 | 0:78ba160ba5f3 | 380 | * The Free Fall duration counter increments while the absolute value of the |
syundo0730 | 0:78ba160ba5f3 | 381 | * accelerometer measurements are each less than the detection threshold |
syundo0730 | 0:78ba160ba5f3 | 382 | * (Register 29). The Free Fall interrupt is triggered when the Free Fall |
syundo0730 | 0:78ba160ba5f3 | 383 | * duration counter reaches the time specified in this register. |
syundo0730 | 0:78ba160ba5f3 | 384 | * |
syundo0730 | 0:78ba160ba5f3 | 385 | * For more details on the Free Fall detection interrupt, see Section 8.2 of |
syundo0730 | 0:78ba160ba5f3 | 386 | * the MPU-6000/MPU-9150 Product Specification document as well as Registers 56 |
syundo0730 | 0:78ba160ba5f3 | 387 | * and 58 of this document. |
syundo0730 | 0:78ba160ba5f3 | 388 | * |
syundo0730 | 0:78ba160ba5f3 | 389 | * @return Current free-fall duration threshold value (LSB = 1ms) |
syundo0730 | 0:78ba160ba5f3 | 390 | * @see MPU9150_RA_FF_DUR |
syundo0730 | 0:78ba160ba5f3 | 391 | */ |
syundo0730 | 0:78ba160ba5f3 | 392 | uint8_t MPU9150::getFreefallDetectionDuration() { |
syundo0730 | 0:78ba160ba5f3 | 393 | I2Cdev::readByte(devAddr, MPU9150_RA_FF_DUR, buffer); |
syundo0730 | 0:78ba160ba5f3 | 394 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 395 | } |
syundo0730 | 0:78ba160ba5f3 | 396 | /** Get free-fall event duration threshold. |
syundo0730 | 0:78ba160ba5f3 | 397 | * @param duration New free-fall duration threshold value (LSB = 1ms) |
syundo0730 | 0:78ba160ba5f3 | 398 | * @see getFreefallDetectionDuration() |
syundo0730 | 0:78ba160ba5f3 | 399 | * @see MPU9150_RA_FF_DUR |
syundo0730 | 0:78ba160ba5f3 | 400 | */ |
syundo0730 | 0:78ba160ba5f3 | 401 | void MPU9150::setFreefallDetectionDuration(uint8_t duration) { |
syundo0730 | 0:78ba160ba5f3 | 402 | I2Cdev::writeByte(devAddr, MPU9150_RA_FF_DUR, duration); |
syundo0730 | 0:78ba160ba5f3 | 403 | } |
syundo0730 | 0:78ba160ba5f3 | 404 | |
syundo0730 | 0:78ba160ba5f3 | 405 | // MOT_THR register |
syundo0730 | 0:78ba160ba5f3 | 406 | |
syundo0730 | 0:78ba160ba5f3 | 407 | /** Get motion detection event acceleration threshold. |
syundo0730 | 0:78ba160ba5f3 | 408 | * This register configures the detection threshold for Motion interrupt |
syundo0730 | 0:78ba160ba5f3 | 409 | * generation. The unit of MOT_THR is 1LSB = 2mg. Motion is detected when the |
syundo0730 | 0:78ba160ba5f3 | 410 | * absolute value of any of the accelerometer measurements exceeds this Motion |
syundo0730 | 0:78ba160ba5f3 | 411 | * detection threshold. This condition increments the Motion detection duration |
syundo0730 | 0:78ba160ba5f3 | 412 | * counter (Register 32). The Motion detection interrupt is triggered when the |
syundo0730 | 0:78ba160ba5f3 | 413 | * Motion Detection counter reaches the time count specified in MOT_DUR |
syundo0730 | 0:78ba160ba5f3 | 414 | * (Register 32). |
syundo0730 | 0:78ba160ba5f3 | 415 | * |
syundo0730 | 0:78ba160ba5f3 | 416 | * The Motion interrupt will indicate the axis and polarity of detected motion |
syundo0730 | 0:78ba160ba5f3 | 417 | * in MOT_DETECT_STATUS (Register 97). |
syundo0730 | 0:78ba160ba5f3 | 418 | * |
syundo0730 | 0:78ba160ba5f3 | 419 | * For more details on the Motion detection interrupt, see Section 8.3 of the |
syundo0730 | 0:78ba160ba5f3 | 420 | * MPU-6000/MPU-9150 Product Specification document as well as Registers 56 and |
syundo0730 | 0:78ba160ba5f3 | 421 | * 58 of this document. |
syundo0730 | 0:78ba160ba5f3 | 422 | * |
syundo0730 | 0:78ba160ba5f3 | 423 | * @return Current motion detection acceleration threshold value (LSB = 2mg) |
syundo0730 | 0:78ba160ba5f3 | 424 | * @see MPU9150_RA_MOT_THR |
syundo0730 | 0:78ba160ba5f3 | 425 | */ |
syundo0730 | 0:78ba160ba5f3 | 426 | uint8_t MPU9150::getMotionDetectionThreshold() { |
syundo0730 | 0:78ba160ba5f3 | 427 | I2Cdev::readByte(devAddr, MPU9150_RA_MOT_THR, buffer); |
syundo0730 | 0:78ba160ba5f3 | 428 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 429 | } |
syundo0730 | 0:78ba160ba5f3 | 430 | /** Set free-fall event acceleration threshold. |
syundo0730 | 0:78ba160ba5f3 | 431 | * @param threshold New motion detection acceleration threshold value (LSB = 2mg) |
syundo0730 | 0:78ba160ba5f3 | 432 | * @see getMotionDetectionThreshold() |
syundo0730 | 0:78ba160ba5f3 | 433 | * @see MPU9150_RA_MOT_THR |
syundo0730 | 0:78ba160ba5f3 | 434 | */ |
syundo0730 | 0:78ba160ba5f3 | 435 | void MPU9150::setMotionDetectionThreshold(uint8_t threshold) { |
syundo0730 | 0:78ba160ba5f3 | 436 | I2Cdev::writeByte(devAddr, MPU9150_RA_MOT_THR, threshold); |
syundo0730 | 0:78ba160ba5f3 | 437 | } |
syundo0730 | 0:78ba160ba5f3 | 438 | |
syundo0730 | 0:78ba160ba5f3 | 439 | // MOT_DUR register |
syundo0730 | 0:78ba160ba5f3 | 440 | |
syundo0730 | 0:78ba160ba5f3 | 441 | /** Get motion detection event duration threshold. |
syundo0730 | 0:78ba160ba5f3 | 442 | * This register configures the duration counter threshold for Motion interrupt |
syundo0730 | 0:78ba160ba5f3 | 443 | * generation. The duration counter ticks at 1 kHz, therefore MOT_DUR has a unit |
syundo0730 | 0:78ba160ba5f3 | 444 | * of 1LSB = 1ms. The Motion detection duration counter increments when the |
syundo0730 | 0:78ba160ba5f3 | 445 | * absolute value of any of the accelerometer measurements exceeds the Motion |
syundo0730 | 0:78ba160ba5f3 | 446 | * detection threshold (Register 31). The Motion detection interrupt is |
syundo0730 | 0:78ba160ba5f3 | 447 | * triggered when the Motion detection counter reaches the time count specified |
syundo0730 | 0:78ba160ba5f3 | 448 | * in this register. |
syundo0730 | 0:78ba160ba5f3 | 449 | * |
syundo0730 | 0:78ba160ba5f3 | 450 | * For more details on the Motion detection interrupt, see Section 8.3 of the |
syundo0730 | 0:78ba160ba5f3 | 451 | * MPU-6000/MPU-9150 Product Specification document. |
syundo0730 | 0:78ba160ba5f3 | 452 | * |
syundo0730 | 0:78ba160ba5f3 | 453 | * @return Current motion detection duration threshold value (LSB = 1ms) |
syundo0730 | 0:78ba160ba5f3 | 454 | * @see MPU9150_RA_MOT_DUR |
syundo0730 | 0:78ba160ba5f3 | 455 | */ |
syundo0730 | 0:78ba160ba5f3 | 456 | uint8_t MPU9150::getMotionDetectionDuration() { |
syundo0730 | 0:78ba160ba5f3 | 457 | I2Cdev::readByte(devAddr, MPU9150_RA_MOT_DUR, buffer); |
syundo0730 | 0:78ba160ba5f3 | 458 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 459 | } |
syundo0730 | 0:78ba160ba5f3 | 460 | /** Set motion detection event duration threshold. |
syundo0730 | 0:78ba160ba5f3 | 461 | * @param duration New motion detection duration threshold value (LSB = 1ms) |
syundo0730 | 0:78ba160ba5f3 | 462 | * @see getMotionDetectionDuration() |
syundo0730 | 0:78ba160ba5f3 | 463 | * @see MPU9150_RA_MOT_DUR |
syundo0730 | 0:78ba160ba5f3 | 464 | */ |
syundo0730 | 0:78ba160ba5f3 | 465 | void MPU9150::setMotionDetectionDuration(uint8_t duration) { |
syundo0730 | 0:78ba160ba5f3 | 466 | I2Cdev::writeByte(devAddr, MPU9150_RA_MOT_DUR, duration); |
syundo0730 | 0:78ba160ba5f3 | 467 | } |
syundo0730 | 0:78ba160ba5f3 | 468 | |
syundo0730 | 0:78ba160ba5f3 | 469 | // ZRMOT_THR register |
syundo0730 | 0:78ba160ba5f3 | 470 | |
syundo0730 | 0:78ba160ba5f3 | 471 | /** Get zero motion detection event acceleration threshold. |
syundo0730 | 0:78ba160ba5f3 | 472 | * This register configures the detection threshold for Zero Motion interrupt |
syundo0730 | 0:78ba160ba5f3 | 473 | * generation. The unit of ZRMOT_THR is 1LSB = 2mg. Zero Motion is detected when |
syundo0730 | 0:78ba160ba5f3 | 474 | * the absolute value of the accelerometer measurements for the 3 axes are each |
syundo0730 | 0:78ba160ba5f3 | 475 | * less than the detection threshold. This condition increments the Zero Motion |
syundo0730 | 0:78ba160ba5f3 | 476 | * duration counter (Register 34). The Zero Motion interrupt is triggered when |
syundo0730 | 0:78ba160ba5f3 | 477 | * the Zero Motion duration counter reaches the time count specified in |
syundo0730 | 0:78ba160ba5f3 | 478 | * ZRMOT_DUR (Register 34). |
syundo0730 | 0:78ba160ba5f3 | 479 | * |
syundo0730 | 0:78ba160ba5f3 | 480 | * Unlike Free Fall or Motion detection, Zero Motion detection triggers an |
syundo0730 | 0:78ba160ba5f3 | 481 | * interrupt both when Zero Motion is first detected and when Zero Motion is no |
syundo0730 | 0:78ba160ba5f3 | 482 | * longer detected. |
syundo0730 | 0:78ba160ba5f3 | 483 | * |
syundo0730 | 0:78ba160ba5f3 | 484 | * When a zero motion event is detected, a Zero Motion Status will be indicated |
syundo0730 | 0:78ba160ba5f3 | 485 | * in the MOT_DETECT_STATUS register (Register 97). When a motion-to-zero-motion |
syundo0730 | 0:78ba160ba5f3 | 486 | * condition is detected, the status bit is set to 1. When a zero-motion-to- |
syundo0730 | 0:78ba160ba5f3 | 487 | * motion condition is detected, the status bit is set to 0. |
syundo0730 | 0:78ba160ba5f3 | 488 | * |
syundo0730 | 0:78ba160ba5f3 | 489 | * For more details on the Zero Motion detection interrupt, see Section 8.4 of |
syundo0730 | 0:78ba160ba5f3 | 490 | * the MPU-6000/MPU-9150 Product Specification document as well as Registers 56 |
syundo0730 | 0:78ba160ba5f3 | 491 | * and 58 of this document. |
syundo0730 | 0:78ba160ba5f3 | 492 | * |
syundo0730 | 0:78ba160ba5f3 | 493 | * @return Current zero motion detection acceleration threshold value (LSB = 2mg) |
syundo0730 | 0:78ba160ba5f3 | 494 | * @see MPU9150_RA_ZRMOT_THR |
syundo0730 | 0:78ba160ba5f3 | 495 | */ |
syundo0730 | 0:78ba160ba5f3 | 496 | uint8_t MPU9150::getZeroMotionDetectionThreshold() { |
syundo0730 | 0:78ba160ba5f3 | 497 | I2Cdev::readByte(devAddr, MPU9150_RA_ZRMOT_THR, buffer); |
syundo0730 | 0:78ba160ba5f3 | 498 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 499 | } |
syundo0730 | 0:78ba160ba5f3 | 500 | /** Set zero motion detection event acceleration threshold. |
syundo0730 | 0:78ba160ba5f3 | 501 | * @param threshold New zero motion detection acceleration threshold value (LSB = 2mg) |
syundo0730 | 0:78ba160ba5f3 | 502 | * @see getZeroMotionDetectionThreshold() |
syundo0730 | 0:78ba160ba5f3 | 503 | * @see MPU9150_RA_ZRMOT_THR |
syundo0730 | 0:78ba160ba5f3 | 504 | */ |
syundo0730 | 0:78ba160ba5f3 | 505 | void MPU9150::setZeroMotionDetectionThreshold(uint8_t threshold) { |
syundo0730 | 0:78ba160ba5f3 | 506 | I2Cdev::writeByte(devAddr, MPU9150_RA_ZRMOT_THR, threshold); |
syundo0730 | 0:78ba160ba5f3 | 507 | } |
syundo0730 | 0:78ba160ba5f3 | 508 | |
syundo0730 | 0:78ba160ba5f3 | 509 | // ZRMOT_DUR register |
syundo0730 | 0:78ba160ba5f3 | 510 | |
syundo0730 | 0:78ba160ba5f3 | 511 | /** Get zero motion detection event duration threshold. |
syundo0730 | 0:78ba160ba5f3 | 512 | * This register configures the duration counter threshold for Zero Motion |
syundo0730 | 0:78ba160ba5f3 | 513 | * interrupt generation. The duration counter ticks at 16 Hz, therefore |
syundo0730 | 0:78ba160ba5f3 | 514 | * ZRMOT_DUR has a unit of 1 LSB = 64 ms. The Zero Motion duration counter |
syundo0730 | 0:78ba160ba5f3 | 515 | * increments while the absolute value of the accelerometer measurements are |
syundo0730 | 0:78ba160ba5f3 | 516 | * each less than the detection threshold (Register 33). The Zero Motion |
syundo0730 | 0:78ba160ba5f3 | 517 | * interrupt is triggered when the Zero Motion duration counter reaches the time |
syundo0730 | 0:78ba160ba5f3 | 518 | * count specified in this register. |
syundo0730 | 0:78ba160ba5f3 | 519 | * |
syundo0730 | 0:78ba160ba5f3 | 520 | * For more details on the Zero Motion detection interrupt, see Section 8.4 of |
syundo0730 | 0:78ba160ba5f3 | 521 | * the MPU-6000/MPU-9150 Product Specification document, as well as Registers 56 |
syundo0730 | 0:78ba160ba5f3 | 522 | * and 58 of this document. |
syundo0730 | 0:78ba160ba5f3 | 523 | * |
syundo0730 | 0:78ba160ba5f3 | 524 | * @return Current zero motion detection duration threshold value (LSB = 64ms) |
syundo0730 | 0:78ba160ba5f3 | 525 | * @see MPU9150_RA_ZRMOT_DUR |
syundo0730 | 0:78ba160ba5f3 | 526 | */ |
syundo0730 | 0:78ba160ba5f3 | 527 | uint8_t MPU9150::getZeroMotionDetectionDuration() { |
syundo0730 | 0:78ba160ba5f3 | 528 | I2Cdev::readByte(devAddr, MPU9150_RA_ZRMOT_DUR, buffer); |
syundo0730 | 0:78ba160ba5f3 | 529 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 530 | } |
syundo0730 | 0:78ba160ba5f3 | 531 | /** Set zero motion detection event duration threshold. |
syundo0730 | 0:78ba160ba5f3 | 532 | * @param duration New zero motion detection duration threshold value (LSB = 1ms) |
syundo0730 | 0:78ba160ba5f3 | 533 | * @see getZeroMotionDetectionDuration() |
syundo0730 | 0:78ba160ba5f3 | 534 | * @see MPU9150_RA_ZRMOT_DUR |
syundo0730 | 0:78ba160ba5f3 | 535 | */ |
syundo0730 | 0:78ba160ba5f3 | 536 | void MPU9150::setZeroMotionDetectionDuration(uint8_t duration) { |
syundo0730 | 0:78ba160ba5f3 | 537 | I2Cdev::writeByte(devAddr, MPU9150_RA_ZRMOT_DUR, duration); |
syundo0730 | 0:78ba160ba5f3 | 538 | } |
syundo0730 | 0:78ba160ba5f3 | 539 | |
syundo0730 | 0:78ba160ba5f3 | 540 | // FIFO_EN register |
syundo0730 | 0:78ba160ba5f3 | 541 | |
syundo0730 | 0:78ba160ba5f3 | 542 | /** Get temperature FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 543 | * When set to 1, this bit enables TEMP_OUT_H and TEMP_OUT_L (Registers 65 and |
syundo0730 | 0:78ba160ba5f3 | 544 | * 66) to be written into the FIFO buffer. |
syundo0730 | 0:78ba160ba5f3 | 545 | * @return Current temperature FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 546 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 547 | */ |
syundo0730 | 0:78ba160ba5f3 | 548 | bool MPU9150::getTempFIFOEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 549 | I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_TEMP_FIFO_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 550 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 551 | } |
syundo0730 | 0:78ba160ba5f3 | 552 | /** Set temperature FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 553 | * @param enabled New temperature FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 554 | * @see getTempFIFOEnabled() |
syundo0730 | 0:78ba160ba5f3 | 555 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 556 | */ |
syundo0730 | 0:78ba160ba5f3 | 557 | void MPU9150::setTempFIFOEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 558 | I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_TEMP_FIFO_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 559 | } |
syundo0730 | 0:78ba160ba5f3 | 560 | /** Get gyroscope X-axis FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 561 | * When set to 1, this bit enables GYRO_XOUT_H and GYRO_XOUT_L (Registers 67 and |
syundo0730 | 0:78ba160ba5f3 | 562 | * 68) to be written into the FIFO buffer. |
syundo0730 | 0:78ba160ba5f3 | 563 | * @return Current gyroscope X-axis FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 564 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 565 | */ |
syundo0730 | 0:78ba160ba5f3 | 566 | bool MPU9150::getXGyroFIFOEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 567 | I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_XG_FIFO_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 568 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 569 | } |
syundo0730 | 0:78ba160ba5f3 | 570 | /** Set gyroscope X-axis FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 571 | * @param enabled New gyroscope X-axis FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 572 | * @see getXGyroFIFOEnabled() |
syundo0730 | 0:78ba160ba5f3 | 573 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 574 | */ |
syundo0730 | 0:78ba160ba5f3 | 575 | void MPU9150::setXGyroFIFOEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 576 | I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_XG_FIFO_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 577 | } |
syundo0730 | 0:78ba160ba5f3 | 578 | /** Get gyroscope Y-axis FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 579 | * When set to 1, this bit enables GYRO_YOUT_H and GYRO_YOUT_L (Registers 69 and |
syundo0730 | 0:78ba160ba5f3 | 580 | * 70) to be written into the FIFO buffer. |
syundo0730 | 0:78ba160ba5f3 | 581 | * @return Current gyroscope Y-axis FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 582 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 583 | */ |
syundo0730 | 0:78ba160ba5f3 | 584 | bool MPU9150::getYGyroFIFOEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 585 | I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_YG_FIFO_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 586 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 587 | } |
syundo0730 | 0:78ba160ba5f3 | 588 | /** Set gyroscope Y-axis FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 589 | * @param enabled New gyroscope Y-axis FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 590 | * @see getYGyroFIFOEnabled() |
syundo0730 | 0:78ba160ba5f3 | 591 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 592 | */ |
syundo0730 | 0:78ba160ba5f3 | 593 | void MPU9150::setYGyroFIFOEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 594 | I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_YG_FIFO_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 595 | } |
syundo0730 | 0:78ba160ba5f3 | 596 | /** Get gyroscope Z-axis FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 597 | * When set to 1, this bit enables GYRO_ZOUT_H and GYRO_ZOUT_L (Registers 71 and |
syundo0730 | 0:78ba160ba5f3 | 598 | * 72) to be written into the FIFO buffer. |
syundo0730 | 0:78ba160ba5f3 | 599 | * @return Current gyroscope Z-axis FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 600 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 601 | */ |
syundo0730 | 0:78ba160ba5f3 | 602 | bool MPU9150::getZGyroFIFOEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 603 | I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_ZG_FIFO_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 604 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 605 | } |
syundo0730 | 0:78ba160ba5f3 | 606 | /** Set gyroscope Z-axis FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 607 | * @param enabled New gyroscope Z-axis FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 608 | * @see getZGyroFIFOEnabled() |
syundo0730 | 0:78ba160ba5f3 | 609 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 610 | */ |
syundo0730 | 0:78ba160ba5f3 | 611 | void MPU9150::setZGyroFIFOEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 612 | I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_ZG_FIFO_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 613 | } |
syundo0730 | 0:78ba160ba5f3 | 614 | /** Get accelerometer FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 615 | * When set to 1, this bit enables ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H, |
syundo0730 | 0:78ba160ba5f3 | 616 | * ACCEL_YOUT_L, ACCEL_ZOUT_H, and ACCEL_ZOUT_L (Registers 59 to 64) to be |
syundo0730 | 0:78ba160ba5f3 | 617 | * written into the FIFO buffer. |
syundo0730 | 0:78ba160ba5f3 | 618 | * @return Current accelerometer FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 619 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 620 | */ |
syundo0730 | 0:78ba160ba5f3 | 621 | bool MPU9150::getAccelFIFOEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 622 | I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_ACCEL_FIFO_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 623 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 624 | } |
syundo0730 | 0:78ba160ba5f3 | 625 | /** Set accelerometer FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 626 | * @param enabled New accelerometer FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 627 | * @see getAccelFIFOEnabled() |
syundo0730 | 0:78ba160ba5f3 | 628 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 629 | */ |
syundo0730 | 0:78ba160ba5f3 | 630 | void MPU9150::setAccelFIFOEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 631 | I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_ACCEL_FIFO_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 632 | } |
syundo0730 | 0:78ba160ba5f3 | 633 | /** Get Slave 2 FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 634 | * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) |
syundo0730 | 0:78ba160ba5f3 | 635 | * associated with Slave 2 to be written into the FIFO buffer. |
syundo0730 | 0:78ba160ba5f3 | 636 | * @return Current Slave 2 FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 637 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 638 | */ |
syundo0730 | 0:78ba160ba5f3 | 639 | bool MPU9150::getSlave2FIFOEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 640 | I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV2_FIFO_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 641 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 642 | } |
syundo0730 | 0:78ba160ba5f3 | 643 | /** Set Slave 2 FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 644 | * @param enabled New Slave 2 FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 645 | * @see getSlave2FIFOEnabled() |
syundo0730 | 0:78ba160ba5f3 | 646 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 647 | */ |
syundo0730 | 0:78ba160ba5f3 | 648 | void MPU9150::setSlave2FIFOEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 649 | I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV2_FIFO_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 650 | } |
syundo0730 | 0:78ba160ba5f3 | 651 | /** Get Slave 1 FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 652 | * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) |
syundo0730 | 0:78ba160ba5f3 | 653 | * associated with Slave 1 to be written into the FIFO buffer. |
syundo0730 | 0:78ba160ba5f3 | 654 | * @return Current Slave 1 FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 655 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 656 | */ |
syundo0730 | 0:78ba160ba5f3 | 657 | bool MPU9150::getSlave1FIFOEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 658 | I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV1_FIFO_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 659 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 660 | } |
syundo0730 | 0:78ba160ba5f3 | 661 | /** Set Slave 1 FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 662 | * @param enabled New Slave 1 FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 663 | * @see getSlave1FIFOEnabled() |
syundo0730 | 0:78ba160ba5f3 | 664 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 665 | */ |
syundo0730 | 0:78ba160ba5f3 | 666 | void MPU9150::setSlave1FIFOEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 667 | I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV1_FIFO_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 668 | } |
syundo0730 | 0:78ba160ba5f3 | 669 | /** Get Slave 0 FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 670 | * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) |
syundo0730 | 0:78ba160ba5f3 | 671 | * associated with Slave 0 to be written into the FIFO buffer. |
syundo0730 | 0:78ba160ba5f3 | 672 | * @return Current Slave 0 FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 673 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 674 | */ |
syundo0730 | 0:78ba160ba5f3 | 675 | bool MPU9150::getSlave0FIFOEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 676 | I2Cdev::readBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV0_FIFO_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 677 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 678 | } |
syundo0730 | 0:78ba160ba5f3 | 679 | /** Set Slave 0 FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 680 | * @param enabled New Slave 0 FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 681 | * @see getSlave0FIFOEnabled() |
syundo0730 | 0:78ba160ba5f3 | 682 | * @see MPU9150_RA_FIFO_EN |
syundo0730 | 0:78ba160ba5f3 | 683 | */ |
syundo0730 | 0:78ba160ba5f3 | 684 | void MPU9150::setSlave0FIFOEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 685 | I2Cdev::writeBit(devAddr, MPU9150_RA_FIFO_EN, MPU9150_SLV0_FIFO_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 686 | } |
syundo0730 | 0:78ba160ba5f3 | 687 | |
syundo0730 | 0:78ba160ba5f3 | 688 | // I2C_MST_CTRL register |
syundo0730 | 0:78ba160ba5f3 | 689 | |
syundo0730 | 0:78ba160ba5f3 | 690 | /** Get multi-master enabled value. |
syundo0730 | 0:78ba160ba5f3 | 691 | * Multi-master capability allows multiple I2C masters to operate on the same |
syundo0730 | 0:78ba160ba5f3 | 692 | * bus. In circuits where multi-master capability is required, set MULT_MST_EN |
syundo0730 | 0:78ba160ba5f3 | 693 | * to 1. This will increase current drawn by approximately 30uA. |
syundo0730 | 0:78ba160ba5f3 | 694 | * |
syundo0730 | 0:78ba160ba5f3 | 695 | * In circuits where multi-master capability is required, the state of the I2C |
syundo0730 | 0:78ba160ba5f3 | 696 | * bus must always be monitored by each separate I2C Master. Before an I2C |
syundo0730 | 0:78ba160ba5f3 | 697 | * Master can assume arbitration of the bus, it must first confirm that no other |
syundo0730 | 0:78ba160ba5f3 | 698 | * I2C Master has arbitration of the bus. When MULT_MST_EN is set to 1, the |
syundo0730 | 0:78ba160ba5f3 | 699 | * MPU-60X0's bus arbitration detection logic is turned on, enabling it to |
syundo0730 | 0:78ba160ba5f3 | 700 | * detect when the bus is available. |
syundo0730 | 0:78ba160ba5f3 | 701 | * |
syundo0730 | 0:78ba160ba5f3 | 702 | * @return Current multi-master enabled value |
syundo0730 | 0:78ba160ba5f3 | 703 | * @see MPU9150_RA_I2C_MST_CTRL |
syundo0730 | 0:78ba160ba5f3 | 704 | */ |
syundo0730 | 0:78ba160ba5f3 | 705 | bool MPU9150::getMultiMasterEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 706 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_MULT_MST_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 707 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 708 | } |
syundo0730 | 0:78ba160ba5f3 | 709 | /** Set multi-master enabled value. |
syundo0730 | 0:78ba160ba5f3 | 710 | * @param enabled New multi-master enabled value |
syundo0730 | 0:78ba160ba5f3 | 711 | * @see getMultiMasterEnabled() |
syundo0730 | 0:78ba160ba5f3 | 712 | * @see MPU9150_RA_I2C_MST_CTRL |
syundo0730 | 0:78ba160ba5f3 | 713 | */ |
syundo0730 | 0:78ba160ba5f3 | 714 | void MPU9150::setMultiMasterEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 715 | I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_MULT_MST_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 716 | } |
syundo0730 | 0:78ba160ba5f3 | 717 | /** Get wait-for-external-sensor-data enabled value. |
syundo0730 | 0:78ba160ba5f3 | 718 | * When the WAIT_FOR_ES bit is set to 1, the Data Ready interrupt will be |
syundo0730 | 0:78ba160ba5f3 | 719 | * delayed until External Sensor data from the Slave Devices are loaded into the |
syundo0730 | 0:78ba160ba5f3 | 720 | * EXT_SENS_DATA registers. This is used to ensure that both the internal sensor |
syundo0730 | 0:78ba160ba5f3 | 721 | * data (i.e. from gyro and accel) and external sensor data have been loaded to |
syundo0730 | 0:78ba160ba5f3 | 722 | * their respective data registers (i.e. the data is synced) when the Data Ready |
syundo0730 | 0:78ba160ba5f3 | 723 | * interrupt is triggered. |
syundo0730 | 0:78ba160ba5f3 | 724 | * |
syundo0730 | 0:78ba160ba5f3 | 725 | * @return Current wait-for-external-sensor-data enabled value |
syundo0730 | 0:78ba160ba5f3 | 726 | * @see MPU9150_RA_I2C_MST_CTRL |
syundo0730 | 0:78ba160ba5f3 | 727 | */ |
syundo0730 | 0:78ba160ba5f3 | 728 | bool MPU9150::getWaitForExternalSensorEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 729 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_WAIT_FOR_ES_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 730 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 731 | } |
syundo0730 | 0:78ba160ba5f3 | 732 | /** Set wait-for-external-sensor-data enabled value. |
syundo0730 | 0:78ba160ba5f3 | 733 | * @param enabled New wait-for-external-sensor-data enabled value |
syundo0730 | 0:78ba160ba5f3 | 734 | * @see getWaitForExternalSensorEnabled() |
syundo0730 | 0:78ba160ba5f3 | 735 | * @see MPU9150_RA_I2C_MST_CTRL |
syundo0730 | 0:78ba160ba5f3 | 736 | */ |
syundo0730 | 0:78ba160ba5f3 | 737 | void MPU9150::setWaitForExternalSensorEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 738 | I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_WAIT_FOR_ES_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 739 | } |
syundo0730 | 0:78ba160ba5f3 | 740 | /** Get Slave 3 FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 741 | * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96) |
syundo0730 | 0:78ba160ba5f3 | 742 | * associated with Slave 3 to be written into the FIFO buffer. |
syundo0730 | 0:78ba160ba5f3 | 743 | * @return Current Slave 3 FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 744 | * @see MPU9150_RA_MST_CTRL |
syundo0730 | 0:78ba160ba5f3 | 745 | */ |
syundo0730 | 0:78ba160ba5f3 | 746 | bool MPU9150::getSlave3FIFOEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 747 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_SLV_3_FIFO_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 748 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 749 | } |
syundo0730 | 0:78ba160ba5f3 | 750 | /** Set Slave 3 FIFO enabled value. |
syundo0730 | 0:78ba160ba5f3 | 751 | * @param enabled New Slave 3 FIFO enabled value |
syundo0730 | 0:78ba160ba5f3 | 752 | * @see getSlave3FIFOEnabled() |
syundo0730 | 0:78ba160ba5f3 | 753 | * @see MPU9150_RA_MST_CTRL |
syundo0730 | 0:78ba160ba5f3 | 754 | */ |
syundo0730 | 0:78ba160ba5f3 | 755 | void MPU9150::setSlave3FIFOEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 756 | I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_SLV_3_FIFO_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 757 | } |
syundo0730 | 0:78ba160ba5f3 | 758 | /** Get slave read/write transition enabled value. |
syundo0730 | 0:78ba160ba5f3 | 759 | * The I2C_MST_P_NSR bit configures the I2C Master's transition from one slave |
syundo0730 | 0:78ba160ba5f3 | 760 | * read to the next slave read. If the bit equals 0, there will be a restart |
syundo0730 | 0:78ba160ba5f3 | 761 | * between reads. If the bit equals 1, there will be a stop followed by a start |
syundo0730 | 0:78ba160ba5f3 | 762 | * of the following read. When a write transaction follows a read transaction, |
syundo0730 | 0:78ba160ba5f3 | 763 | * the stop followed by a start of the successive write will be always used. |
syundo0730 | 0:78ba160ba5f3 | 764 | * |
syundo0730 | 0:78ba160ba5f3 | 765 | * @return Current slave read/write transition enabled value |
syundo0730 | 0:78ba160ba5f3 | 766 | * @see MPU9150_RA_I2C_MST_CTRL |
syundo0730 | 0:78ba160ba5f3 | 767 | */ |
syundo0730 | 0:78ba160ba5f3 | 768 | bool MPU9150::getSlaveReadWriteTransitionEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 769 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_I2C_MST_P_NSR_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 770 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 771 | } |
syundo0730 | 0:78ba160ba5f3 | 772 | /** Set slave read/write transition enabled value. |
syundo0730 | 0:78ba160ba5f3 | 773 | * @param enabled New slave read/write transition enabled value |
syundo0730 | 0:78ba160ba5f3 | 774 | * @see getSlaveReadWriteTransitionEnabled() |
syundo0730 | 0:78ba160ba5f3 | 775 | * @see MPU9150_RA_I2C_MST_CTRL |
syundo0730 | 0:78ba160ba5f3 | 776 | */ |
syundo0730 | 0:78ba160ba5f3 | 777 | void MPU9150::setSlaveReadWriteTransitionEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 778 | I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_I2C_MST_P_NSR_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 779 | } |
syundo0730 | 0:78ba160ba5f3 | 780 | /** Get I2C master clock speed. |
syundo0730 | 0:78ba160ba5f3 | 781 | * I2C_MST_CLK is a 4 bit unsigned value which configures a divider on the |
syundo0730 | 0:78ba160ba5f3 | 782 | * MPU-60X0 internal 8MHz clock. It sets the I2C master clock speed according to |
syundo0730 | 0:78ba160ba5f3 | 783 | * the following table: |
syundo0730 | 0:78ba160ba5f3 | 784 | * |
syundo0730 | 0:78ba160ba5f3 | 785 | * <pre> |
syundo0730 | 0:78ba160ba5f3 | 786 | * I2C_MST_CLK | I2C Master Clock Speed | 8MHz Clock Divider |
syundo0730 | 0:78ba160ba5f3 | 787 | * ------------+------------------------+------------------- |
syundo0730 | 0:78ba160ba5f3 | 788 | * 0 | 348kHz | 23 |
syundo0730 | 0:78ba160ba5f3 | 789 | * 1 | 333kHz | 24 |
syundo0730 | 0:78ba160ba5f3 | 790 | * 2 | 320kHz | 25 |
syundo0730 | 0:78ba160ba5f3 | 791 | * 3 | 308kHz | 26 |
syundo0730 | 0:78ba160ba5f3 | 792 | * 4 | 296kHz | 27 |
syundo0730 | 0:78ba160ba5f3 | 793 | * 5 | 286kHz | 28 |
syundo0730 | 0:78ba160ba5f3 | 794 | * 6 | 276kHz | 29 |
syundo0730 | 0:78ba160ba5f3 | 795 | * 7 | 267kHz | 30 |
syundo0730 | 0:78ba160ba5f3 | 796 | * 8 | 258kHz | 31 |
syundo0730 | 0:78ba160ba5f3 | 797 | * 9 | 500kHz | 16 |
syundo0730 | 0:78ba160ba5f3 | 798 | * 10 | 471kHz | 17 |
syundo0730 | 0:78ba160ba5f3 | 799 | * 11 | 444kHz | 18 |
syundo0730 | 0:78ba160ba5f3 | 800 | * 12 | 421kHz | 19 |
syundo0730 | 0:78ba160ba5f3 | 801 | * 13 | 400kHz | 20 |
syundo0730 | 0:78ba160ba5f3 | 802 | * 14 | 381kHz | 21 |
syundo0730 | 0:78ba160ba5f3 | 803 | * 15 | 364kHz | 22 |
syundo0730 | 0:78ba160ba5f3 | 804 | * </pre> |
syundo0730 | 0:78ba160ba5f3 | 805 | * |
syundo0730 | 0:78ba160ba5f3 | 806 | * @return Current I2C master clock speed |
syundo0730 | 0:78ba160ba5f3 | 807 | * @see MPU9150_RA_I2C_MST_CTRL |
syundo0730 | 0:78ba160ba5f3 | 808 | */ |
syundo0730 | 0:78ba160ba5f3 | 809 | uint8_t MPU9150::getMasterClockSpeed() { |
syundo0730 | 0:78ba160ba5f3 | 810 | I2Cdev::readBits(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_I2C_MST_CLK_BIT, MPU9150_I2C_MST_CLK_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 811 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 812 | } |
syundo0730 | 0:78ba160ba5f3 | 813 | /** Set I2C master clock speed. |
syundo0730 | 0:78ba160ba5f3 | 814 | * @reparam speed Current I2C master clock speed |
syundo0730 | 0:78ba160ba5f3 | 815 | * @see MPU9150_RA_I2C_MST_CTRL |
syundo0730 | 0:78ba160ba5f3 | 816 | */ |
syundo0730 | 0:78ba160ba5f3 | 817 | void MPU9150::setMasterClockSpeed(uint8_t speed) { |
syundo0730 | 0:78ba160ba5f3 | 818 | I2Cdev::writeBits(devAddr, MPU9150_RA_I2C_MST_CTRL, MPU9150_I2C_MST_CLK_BIT, MPU9150_I2C_MST_CLK_LENGTH, speed); |
syundo0730 | 0:78ba160ba5f3 | 819 | } |
syundo0730 | 0:78ba160ba5f3 | 820 | |
syundo0730 | 0:78ba160ba5f3 | 821 | // I2C_SLV* registers (Slave 0-3) |
syundo0730 | 0:78ba160ba5f3 | 822 | |
syundo0730 | 0:78ba160ba5f3 | 823 | /** Get the I2C address of the specified slave (0-3). |
syundo0730 | 0:78ba160ba5f3 | 824 | * Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read |
syundo0730 | 0:78ba160ba5f3 | 825 | * operation, and if it is cleared, then it's a write operation. The remaining |
syundo0730 | 0:78ba160ba5f3 | 826 | * bits (6-0) are the 7-bit device address of the slave device. |
syundo0730 | 0:78ba160ba5f3 | 827 | * |
syundo0730 | 0:78ba160ba5f3 | 828 | * In read mode, the result of the read is placed in the lowest available |
syundo0730 | 0:78ba160ba5f3 | 829 | * EXT_SENS_DATA register. For further information regarding the allocation of |
syundo0730 | 0:78ba160ba5f3 | 830 | * read results, please refer to the EXT_SENS_DATA register description |
syundo0730 | 0:78ba160ba5f3 | 831 | * (Registers 73 - 96). |
syundo0730 | 0:78ba160ba5f3 | 832 | * |
syundo0730 | 0:78ba160ba5f3 | 833 | * The MPU-9150 supports a total of five slaves, but Slave 4 has unique |
syundo0730 | 0:78ba160ba5f3 | 834 | * characteristics, and so it has its own functions (getSlave4* and setSlave4*). |
syundo0730 | 0:78ba160ba5f3 | 835 | * |
syundo0730 | 0:78ba160ba5f3 | 836 | * I2C data transactions are performed at the Sample Rate, as defined in |
syundo0730 | 0:78ba160ba5f3 | 837 | * Register 25. The user is responsible for ensuring that I2C data transactions |
syundo0730 | 0:78ba160ba5f3 | 838 | * to and from each enabled Slave can be completed within a single period of the |
syundo0730 | 0:78ba160ba5f3 | 839 | * Sample Rate. |
syundo0730 | 0:78ba160ba5f3 | 840 | * |
syundo0730 | 0:78ba160ba5f3 | 841 | * The I2C slave access rate can be reduced relative to the Sample Rate. This |
syundo0730 | 0:78ba160ba5f3 | 842 | * reduced access rate is determined by I2C_MST_DLY (Register 52). Whether a |
syundo0730 | 0:78ba160ba5f3 | 843 | * slave's access rate is reduced relative to the Sample Rate is determined by |
syundo0730 | 0:78ba160ba5f3 | 844 | * I2C_MST_DELAY_CTRL (Register 103). |
syundo0730 | 0:78ba160ba5f3 | 845 | * |
syundo0730 | 0:78ba160ba5f3 | 846 | * The processing order for the slaves is fixed. The sequence followed for |
syundo0730 | 0:78ba160ba5f3 | 847 | * processing the slaves is Slave 0, Slave 1, Slave 2, Slave 3 and Slave 4. If a |
syundo0730 | 0:78ba160ba5f3 | 848 | * particular Slave is disabled it will be skipped. |
syundo0730 | 0:78ba160ba5f3 | 849 | * |
syundo0730 | 0:78ba160ba5f3 | 850 | * Each slave can either be accessed at the sample rate or at a reduced sample |
syundo0730 | 0:78ba160ba5f3 | 851 | * rate. In a case where some slaves are accessed at the Sample Rate and some |
syundo0730 | 0:78ba160ba5f3 | 852 | * slaves are accessed at the reduced rate, the sequence of accessing the slaves |
syundo0730 | 0:78ba160ba5f3 | 853 | * (Slave 0 to Slave 4) is still followed. However, the reduced rate slaves will |
syundo0730 | 0:78ba160ba5f3 | 854 | * be skipped if their access rate dictates that they should not be accessed |
syundo0730 | 0:78ba160ba5f3 | 855 | * during that particular cycle. For further information regarding the reduced |
syundo0730 | 0:78ba160ba5f3 | 856 | * access rate, please refer to Register 52. Whether a slave is accessed at the |
syundo0730 | 0:78ba160ba5f3 | 857 | * Sample Rate or at the reduced rate is determined by the Delay Enable bits in |
syundo0730 | 0:78ba160ba5f3 | 858 | * Register 103. |
syundo0730 | 0:78ba160ba5f3 | 859 | * |
syundo0730 | 0:78ba160ba5f3 | 860 | * @param num Slave number (0-3) |
syundo0730 | 0:78ba160ba5f3 | 861 | * @return Current address for specified slave |
syundo0730 | 0:78ba160ba5f3 | 862 | * @see MPU9150_RA_I2C_SLV0_ADDR |
syundo0730 | 0:78ba160ba5f3 | 863 | */ |
syundo0730 | 0:78ba160ba5f3 | 864 | uint8_t MPU9150::getSlaveAddress(uint8_t num) { |
syundo0730 | 0:78ba160ba5f3 | 865 | if (num > 3) return 0; |
syundo0730 | 0:78ba160ba5f3 | 866 | I2Cdev::readByte(devAddr, MPU9150_RA_I2C_SLV0_ADDR + num*3, buffer); |
syundo0730 | 0:78ba160ba5f3 | 867 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 868 | } |
syundo0730 | 0:78ba160ba5f3 | 869 | /** Set the I2C address of the specified slave (0-3). |
syundo0730 | 0:78ba160ba5f3 | 870 | * @param num Slave number (0-3) |
syundo0730 | 0:78ba160ba5f3 | 871 | * @param address New address for specified slave |
syundo0730 | 0:78ba160ba5f3 | 872 | * @see getSlaveAddress() |
syundo0730 | 0:78ba160ba5f3 | 873 | * @see MPU9150_RA_I2C_SLV0_ADDR |
syundo0730 | 0:78ba160ba5f3 | 874 | */ |
syundo0730 | 0:78ba160ba5f3 | 875 | void MPU9150::setSlaveAddress(uint8_t num, uint8_t address) { |
syundo0730 | 0:78ba160ba5f3 | 876 | if (num > 3) return; |
syundo0730 | 0:78ba160ba5f3 | 877 | I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV0_ADDR + num*3, address); |
syundo0730 | 0:78ba160ba5f3 | 878 | } |
syundo0730 | 0:78ba160ba5f3 | 879 | /** Get the active internal register for the specified slave (0-3). |
syundo0730 | 0:78ba160ba5f3 | 880 | * Read/write operations for this slave will be done to whatever internal |
syundo0730 | 0:78ba160ba5f3 | 881 | * register address is stored in this MPU register. |
syundo0730 | 0:78ba160ba5f3 | 882 | * |
syundo0730 | 0:78ba160ba5f3 | 883 | * The MPU-9150 supports a total of five slaves, but Slave 4 has unique |
syundo0730 | 0:78ba160ba5f3 | 884 | * characteristics, and so it has its own functions. |
syundo0730 | 0:78ba160ba5f3 | 885 | * |
syundo0730 | 0:78ba160ba5f3 | 886 | * @param num Slave number (0-3) |
syundo0730 | 0:78ba160ba5f3 | 887 | * @return Current active register for specified slave |
syundo0730 | 0:78ba160ba5f3 | 888 | * @see MPU9150_RA_I2C_SLV0_REG |
syundo0730 | 0:78ba160ba5f3 | 889 | */ |
syundo0730 | 0:78ba160ba5f3 | 890 | uint8_t MPU9150::getSlaveRegister(uint8_t num) { |
syundo0730 | 0:78ba160ba5f3 | 891 | if (num > 3) return 0; |
syundo0730 | 0:78ba160ba5f3 | 892 | I2Cdev::readByte(devAddr, MPU9150_RA_I2C_SLV0_REG + num*3, buffer); |
syundo0730 | 0:78ba160ba5f3 | 893 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 894 | } |
syundo0730 | 0:78ba160ba5f3 | 895 | /** Set the active internal register for the specified slave (0-3). |
syundo0730 | 0:78ba160ba5f3 | 896 | * @param num Slave number (0-3) |
syundo0730 | 0:78ba160ba5f3 | 897 | * @param reg New active register for specified slave |
syundo0730 | 0:78ba160ba5f3 | 898 | * @see getSlaveRegister() |
syundo0730 | 0:78ba160ba5f3 | 899 | * @see MPU9150_RA_I2C_SLV0_REG |
syundo0730 | 0:78ba160ba5f3 | 900 | */ |
syundo0730 | 0:78ba160ba5f3 | 901 | void MPU9150::setSlaveRegister(uint8_t num, uint8_t reg) { |
syundo0730 | 0:78ba160ba5f3 | 902 | if (num > 3) return; |
syundo0730 | 0:78ba160ba5f3 | 903 | I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV0_REG + num*3, reg); |
syundo0730 | 0:78ba160ba5f3 | 904 | } |
syundo0730 | 0:78ba160ba5f3 | 905 | /** Get the enabled value for the specified slave (0-3). |
syundo0730 | 0:78ba160ba5f3 | 906 | * When set to 1, this bit enables Slave 0 for data transfer operations. When |
syundo0730 | 0:78ba160ba5f3 | 907 | * cleared to 0, this bit disables Slave 0 from data transfer operations. |
syundo0730 | 0:78ba160ba5f3 | 908 | * @param num Slave number (0-3) |
syundo0730 | 0:78ba160ba5f3 | 909 | * @return Current enabled value for specified slave |
syundo0730 | 0:78ba160ba5f3 | 910 | * @see MPU9150_RA_I2C_SLV0_CTRL |
syundo0730 | 0:78ba160ba5f3 | 911 | */ |
syundo0730 | 0:78ba160ba5f3 | 912 | bool MPU9150::getSlaveEnabled(uint8_t num) { |
syundo0730 | 0:78ba160ba5f3 | 913 | if (num > 3) return 0; |
syundo0730 | 0:78ba160ba5f3 | 914 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 915 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 916 | } |
syundo0730 | 0:78ba160ba5f3 | 917 | /** Set the enabled value for the specified slave (0-3). |
syundo0730 | 0:78ba160ba5f3 | 918 | * @param num Slave number (0-3) |
syundo0730 | 0:78ba160ba5f3 | 919 | * @param enabled New enabled value for specified slave |
syundo0730 | 0:78ba160ba5f3 | 920 | * @see getSlaveEnabled() |
syundo0730 | 0:78ba160ba5f3 | 921 | * @see MPU9150_RA_I2C_SLV0_CTRL |
syundo0730 | 0:78ba160ba5f3 | 922 | */ |
syundo0730 | 0:78ba160ba5f3 | 923 | void MPU9150::setSlaveEnabled(uint8_t num, bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 924 | if (num > 3) return; |
syundo0730 | 0:78ba160ba5f3 | 925 | I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 926 | } |
syundo0730 | 0:78ba160ba5f3 | 927 | /** Get word pair byte-swapping enabled for the specified slave (0-3). |
syundo0730 | 0:78ba160ba5f3 | 928 | * When set to 1, this bit enables byte swapping. When byte swapping is enabled, |
syundo0730 | 0:78ba160ba5f3 | 929 | * the high and low bytes of a word pair are swapped. Please refer to |
syundo0730 | 0:78ba160ba5f3 | 930 | * I2C_SLV0_GRP for the pairing convention of the word pairs. When cleared to 0, |
syundo0730 | 0:78ba160ba5f3 | 931 | * bytes transferred to and from Slave 0 will be written to EXT_SENS_DATA |
syundo0730 | 0:78ba160ba5f3 | 932 | * registers in the order they were transferred. |
syundo0730 | 0:78ba160ba5f3 | 933 | * |
syundo0730 | 0:78ba160ba5f3 | 934 | * @param num Slave number (0-3) |
syundo0730 | 0:78ba160ba5f3 | 935 | * @return Current word pair byte-swapping enabled value for specified slave |
syundo0730 | 0:78ba160ba5f3 | 936 | * @see MPU9150_RA_I2C_SLV0_CTRL |
syundo0730 | 0:78ba160ba5f3 | 937 | */ |
syundo0730 | 0:78ba160ba5f3 | 938 | bool MPU9150::getSlaveWordByteSwap(uint8_t num) { |
syundo0730 | 0:78ba160ba5f3 | 939 | if (num > 3) return 0; |
syundo0730 | 0:78ba160ba5f3 | 940 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_BYTE_SW_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 941 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 942 | } |
syundo0730 | 0:78ba160ba5f3 | 943 | /** Set word pair byte-swapping enabled for the specified slave (0-3). |
syundo0730 | 0:78ba160ba5f3 | 944 | * @param num Slave number (0-3) |
syundo0730 | 0:78ba160ba5f3 | 945 | * @param enabled New word pair byte-swapping enabled value for specified slave |
syundo0730 | 0:78ba160ba5f3 | 946 | * @see getSlaveWordByteSwap() |
syundo0730 | 0:78ba160ba5f3 | 947 | * @see MPU9150_RA_I2C_SLV0_CTRL |
syundo0730 | 0:78ba160ba5f3 | 948 | */ |
syundo0730 | 0:78ba160ba5f3 | 949 | void MPU9150::setSlaveWordByteSwap(uint8_t num, bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 950 | if (num > 3) return; |
syundo0730 | 0:78ba160ba5f3 | 951 | I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_BYTE_SW_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 952 | } |
syundo0730 | 0:78ba160ba5f3 | 953 | /** Get write mode for the specified slave (0-3). |
syundo0730 | 0:78ba160ba5f3 | 954 | * When set to 1, the transaction will read or write data only. When cleared to |
syundo0730 | 0:78ba160ba5f3 | 955 | * 0, the transaction will write a register address prior to reading or writing |
syundo0730 | 0:78ba160ba5f3 | 956 | * data. This should equal 0 when specifying the register address within the |
syundo0730 | 0:78ba160ba5f3 | 957 | * Slave device to/from which the ensuing data transaction will take place. |
syundo0730 | 0:78ba160ba5f3 | 958 | * |
syundo0730 | 0:78ba160ba5f3 | 959 | * @param num Slave number (0-3) |
syundo0730 | 0:78ba160ba5f3 | 960 | * @return Current write mode for specified slave (0 = register address + data, 1 = data only) |
syundo0730 | 0:78ba160ba5f3 | 961 | * @see MPU9150_RA_I2C_SLV0_CTRL |
syundo0730 | 0:78ba160ba5f3 | 962 | */ |
syundo0730 | 0:78ba160ba5f3 | 963 | bool MPU9150::getSlaveWriteMode(uint8_t num) { |
syundo0730 | 0:78ba160ba5f3 | 964 | if (num > 3) return 0; |
syundo0730 | 0:78ba160ba5f3 | 965 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_REG_DIS_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 966 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 967 | } |
syundo0730 | 0:78ba160ba5f3 | 968 | /** Set write mode for the specified slave (0-3). |
syundo0730 | 0:78ba160ba5f3 | 969 | * @param num Slave number (0-3) |
syundo0730 | 0:78ba160ba5f3 | 970 | * @param mode New write mode for specified slave (0 = register address + data, 1 = data only) |
syundo0730 | 0:78ba160ba5f3 | 971 | * @see getSlaveWriteMode() |
syundo0730 | 0:78ba160ba5f3 | 972 | * @see MPU9150_RA_I2C_SLV0_CTRL |
syundo0730 | 0:78ba160ba5f3 | 973 | */ |
syundo0730 | 0:78ba160ba5f3 | 974 | void MPU9150::setSlaveWriteMode(uint8_t num, bool mode) { |
syundo0730 | 0:78ba160ba5f3 | 975 | if (num > 3) return; |
syundo0730 | 0:78ba160ba5f3 | 976 | I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_REG_DIS_BIT, mode); |
syundo0730 | 0:78ba160ba5f3 | 977 | } |
syundo0730 | 0:78ba160ba5f3 | 978 | /** Get word pair grouping order offset for the specified slave (0-3). |
syundo0730 | 0:78ba160ba5f3 | 979 | * This sets specifies the grouping order of word pairs received from registers. |
syundo0730 | 0:78ba160ba5f3 | 980 | * When cleared to 0, bytes from register addresses 0 and 1, 2 and 3, etc (even, |
syundo0730 | 0:78ba160ba5f3 | 981 | * then odd register addresses) are paired to form a word. When set to 1, bytes |
syundo0730 | 0:78ba160ba5f3 | 982 | * from register addresses are paired 1 and 2, 3 and 4, etc. (odd, then even |
syundo0730 | 0:78ba160ba5f3 | 983 | * register addresses) are paired to form a word. |
syundo0730 | 0:78ba160ba5f3 | 984 | * |
syundo0730 | 0:78ba160ba5f3 | 985 | * @param num Slave number (0-3) |
syundo0730 | 0:78ba160ba5f3 | 986 | * @return Current word pair grouping order offset for specified slave |
syundo0730 | 0:78ba160ba5f3 | 987 | * @see MPU9150_RA_I2C_SLV0_CTRL |
syundo0730 | 0:78ba160ba5f3 | 988 | */ |
syundo0730 | 0:78ba160ba5f3 | 989 | bool MPU9150::getSlaveWordGroupOffset(uint8_t num) { |
syundo0730 | 0:78ba160ba5f3 | 990 | if (num > 3) return 0; |
syundo0730 | 0:78ba160ba5f3 | 991 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_GRP_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 992 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 993 | } |
syundo0730 | 0:78ba160ba5f3 | 994 | /** Set word pair grouping order offset for the specified slave (0-3). |
syundo0730 | 0:78ba160ba5f3 | 995 | * @param num Slave number (0-3) |
syundo0730 | 0:78ba160ba5f3 | 996 | * @param enabled New word pair grouping order offset for specified slave |
syundo0730 | 0:78ba160ba5f3 | 997 | * @see getSlaveWordGroupOffset() |
syundo0730 | 0:78ba160ba5f3 | 998 | * @see MPU9150_RA_I2C_SLV0_CTRL |
syundo0730 | 0:78ba160ba5f3 | 999 | */ |
syundo0730 | 0:78ba160ba5f3 | 1000 | void MPU9150::setSlaveWordGroupOffset(uint8_t num, bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 1001 | if (num > 3) return; |
syundo0730 | 0:78ba160ba5f3 | 1002 | I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_GRP_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 1003 | } |
syundo0730 | 0:78ba160ba5f3 | 1004 | /** Get number of bytes to read for the specified slave (0-3). |
syundo0730 | 0:78ba160ba5f3 | 1005 | * Specifies the number of bytes transferred to and from Slave 0. Clearing this |
syundo0730 | 0:78ba160ba5f3 | 1006 | * bit to 0 is equivalent to disabling the register by writing 0 to I2C_SLV0_EN. |
syundo0730 | 0:78ba160ba5f3 | 1007 | * @param num Slave number (0-3) |
syundo0730 | 0:78ba160ba5f3 | 1008 | * @return Number of bytes to read for specified slave |
syundo0730 | 0:78ba160ba5f3 | 1009 | * @see MPU9150_RA_I2C_SLV0_CTRL |
syundo0730 | 0:78ba160ba5f3 | 1010 | */ |
syundo0730 | 0:78ba160ba5f3 | 1011 | uint8_t MPU9150::getSlaveDataLength(uint8_t num) { |
syundo0730 | 0:78ba160ba5f3 | 1012 | if (num > 3) return 0; |
syundo0730 | 0:78ba160ba5f3 | 1013 | I2Cdev::readBits(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_LEN_BIT, MPU9150_I2C_SLV_LEN_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1014 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1015 | } |
syundo0730 | 0:78ba160ba5f3 | 1016 | /** Set number of bytes to read for the specified slave (0-3). |
syundo0730 | 0:78ba160ba5f3 | 1017 | * @param num Slave number (0-3) |
syundo0730 | 0:78ba160ba5f3 | 1018 | * @param length Number of bytes to read for specified slave |
syundo0730 | 0:78ba160ba5f3 | 1019 | * @see getSlaveDataLength() |
syundo0730 | 0:78ba160ba5f3 | 1020 | * @see MPU9150_RA_I2C_SLV0_CTRL |
syundo0730 | 0:78ba160ba5f3 | 1021 | */ |
syundo0730 | 0:78ba160ba5f3 | 1022 | void MPU9150::setSlaveDataLength(uint8_t num, uint8_t length) { |
syundo0730 | 0:78ba160ba5f3 | 1023 | if (num > 3) return; |
syundo0730 | 0:78ba160ba5f3 | 1024 | I2Cdev::writeBits(devAddr, MPU9150_RA_I2C_SLV0_CTRL + num*3, MPU9150_I2C_SLV_LEN_BIT, MPU9150_I2C_SLV_LEN_LENGTH, length); |
syundo0730 | 0:78ba160ba5f3 | 1025 | } |
syundo0730 | 0:78ba160ba5f3 | 1026 | |
syundo0730 | 0:78ba160ba5f3 | 1027 | // I2C_SLV* registers (Slave 4) |
syundo0730 | 0:78ba160ba5f3 | 1028 | |
syundo0730 | 0:78ba160ba5f3 | 1029 | /** Get the I2C address of Slave 4. |
syundo0730 | 0:78ba160ba5f3 | 1030 | * Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read |
syundo0730 | 0:78ba160ba5f3 | 1031 | * operation, and if it is cleared, then it's a write operation. The remaining |
syundo0730 | 0:78ba160ba5f3 | 1032 | * bits (6-0) are the 7-bit device address of the slave device. |
syundo0730 | 0:78ba160ba5f3 | 1033 | * |
syundo0730 | 0:78ba160ba5f3 | 1034 | * @return Current address for Slave 4 |
syundo0730 | 0:78ba160ba5f3 | 1035 | * @see getSlaveAddress() |
syundo0730 | 0:78ba160ba5f3 | 1036 | * @see MPU9150_RA_I2C_SLV4_ADDR |
syundo0730 | 0:78ba160ba5f3 | 1037 | */ |
syundo0730 | 0:78ba160ba5f3 | 1038 | uint8_t MPU9150::getSlave4Address() { |
syundo0730 | 0:78ba160ba5f3 | 1039 | I2Cdev::readByte(devAddr, MPU9150_RA_I2C_SLV4_ADDR, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1040 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1041 | } |
syundo0730 | 0:78ba160ba5f3 | 1042 | /** Set the I2C address of Slave 4. |
syundo0730 | 0:78ba160ba5f3 | 1043 | * @param address New address for Slave 4 |
syundo0730 | 0:78ba160ba5f3 | 1044 | * @see getSlave4Address() |
syundo0730 | 0:78ba160ba5f3 | 1045 | * @see MPU9150_RA_I2C_SLV4_ADDR |
syundo0730 | 0:78ba160ba5f3 | 1046 | */ |
syundo0730 | 0:78ba160ba5f3 | 1047 | void MPU9150::setSlave4Address(uint8_t address) { |
syundo0730 | 0:78ba160ba5f3 | 1048 | I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV4_ADDR, address); |
syundo0730 | 0:78ba160ba5f3 | 1049 | } |
syundo0730 | 0:78ba160ba5f3 | 1050 | /** Get the active internal register for the Slave 4. |
syundo0730 | 0:78ba160ba5f3 | 1051 | * Read/write operations for this slave will be done to whatever internal |
syundo0730 | 0:78ba160ba5f3 | 1052 | * register address is stored in this MPU register. |
syundo0730 | 0:78ba160ba5f3 | 1053 | * |
syundo0730 | 0:78ba160ba5f3 | 1054 | * @return Current active register for Slave 4 |
syundo0730 | 0:78ba160ba5f3 | 1055 | * @see MPU9150_RA_I2C_SLV4_REG |
syundo0730 | 0:78ba160ba5f3 | 1056 | */ |
syundo0730 | 0:78ba160ba5f3 | 1057 | uint8_t MPU9150::getSlave4Register() { |
syundo0730 | 0:78ba160ba5f3 | 1058 | I2Cdev::readByte(devAddr, MPU9150_RA_I2C_SLV4_REG, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1059 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1060 | } |
syundo0730 | 0:78ba160ba5f3 | 1061 | /** Set the active internal register for Slave 4. |
syundo0730 | 0:78ba160ba5f3 | 1062 | * @param reg New active register for Slave 4 |
syundo0730 | 0:78ba160ba5f3 | 1063 | * @see getSlave4Register() |
syundo0730 | 0:78ba160ba5f3 | 1064 | * @see MPU9150_RA_I2C_SLV4_REG |
syundo0730 | 0:78ba160ba5f3 | 1065 | */ |
syundo0730 | 0:78ba160ba5f3 | 1066 | void MPU9150::setSlave4Register(uint8_t reg) { |
syundo0730 | 0:78ba160ba5f3 | 1067 | I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV4_REG, reg); |
syundo0730 | 0:78ba160ba5f3 | 1068 | } |
syundo0730 | 0:78ba160ba5f3 | 1069 | /** Set new byte to write to Slave 4. |
syundo0730 | 0:78ba160ba5f3 | 1070 | * This register stores the data to be written into the Slave 4. If I2C_SLV4_RW |
syundo0730 | 0:78ba160ba5f3 | 1071 | * is set 1 (set to read), this register has no effect. |
syundo0730 | 0:78ba160ba5f3 | 1072 | * @param data New byte to write to Slave 4 |
syundo0730 | 0:78ba160ba5f3 | 1073 | * @see MPU9150_RA_I2C_SLV4_DO |
syundo0730 | 0:78ba160ba5f3 | 1074 | */ |
syundo0730 | 0:78ba160ba5f3 | 1075 | void MPU9150::setSlave4OutputByte(uint8_t data) { |
syundo0730 | 0:78ba160ba5f3 | 1076 | I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV4_DO, data); |
syundo0730 | 0:78ba160ba5f3 | 1077 | } |
syundo0730 | 0:78ba160ba5f3 | 1078 | /** Get the enabled value for the Slave 4. |
syundo0730 | 0:78ba160ba5f3 | 1079 | * When set to 1, this bit enables Slave 4 for data transfer operations. When |
syundo0730 | 0:78ba160ba5f3 | 1080 | * cleared to 0, this bit disables Slave 4 from data transfer operations. |
syundo0730 | 0:78ba160ba5f3 | 1081 | * @return Current enabled value for Slave 4 |
syundo0730 | 0:78ba160ba5f3 | 1082 | * @see MPU9150_RA_I2C_SLV4_CTRL |
syundo0730 | 0:78ba160ba5f3 | 1083 | */ |
syundo0730 | 0:78ba160ba5f3 | 1084 | bool MPU9150::getSlave4Enabled() { |
syundo0730 | 0:78ba160ba5f3 | 1085 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1086 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1087 | } |
syundo0730 | 0:78ba160ba5f3 | 1088 | /** Set the enabled value for Slave 4. |
syundo0730 | 0:78ba160ba5f3 | 1089 | * @param enabled New enabled value for Slave 4 |
syundo0730 | 0:78ba160ba5f3 | 1090 | * @see getSlave4Enabled() |
syundo0730 | 0:78ba160ba5f3 | 1091 | * @see MPU9150_RA_I2C_SLV4_CTRL |
syundo0730 | 0:78ba160ba5f3 | 1092 | */ |
syundo0730 | 0:78ba160ba5f3 | 1093 | void MPU9150::setSlave4Enabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 1094 | I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 1095 | } |
syundo0730 | 0:78ba160ba5f3 | 1096 | /** Get the enabled value for Slave 4 transaction interrupts. |
syundo0730 | 0:78ba160ba5f3 | 1097 | * When set to 1, this bit enables the generation of an interrupt signal upon |
syundo0730 | 0:78ba160ba5f3 | 1098 | * completion of a Slave 4 transaction. When cleared to 0, this bit disables the |
syundo0730 | 0:78ba160ba5f3 | 1099 | * generation of an interrupt signal upon completion of a Slave 4 transaction. |
syundo0730 | 0:78ba160ba5f3 | 1100 | * The interrupt status can be observed in Register 54. |
syundo0730 | 0:78ba160ba5f3 | 1101 | * |
syundo0730 | 0:78ba160ba5f3 | 1102 | * @return Current enabled value for Slave 4 transaction interrupts. |
syundo0730 | 0:78ba160ba5f3 | 1103 | * @see MPU9150_RA_I2C_SLV4_CTRL |
syundo0730 | 0:78ba160ba5f3 | 1104 | */ |
syundo0730 | 0:78ba160ba5f3 | 1105 | bool MPU9150::getSlave4InterruptEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 1106 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_INT_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1107 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1108 | } |
syundo0730 | 0:78ba160ba5f3 | 1109 | /** Set the enabled value for Slave 4 transaction interrupts. |
syundo0730 | 0:78ba160ba5f3 | 1110 | * @param enabled New enabled value for Slave 4 transaction interrupts. |
syundo0730 | 0:78ba160ba5f3 | 1111 | * @see getSlave4InterruptEnabled() |
syundo0730 | 0:78ba160ba5f3 | 1112 | * @see MPU9150_RA_I2C_SLV4_CTRL |
syundo0730 | 0:78ba160ba5f3 | 1113 | */ |
syundo0730 | 0:78ba160ba5f3 | 1114 | void MPU9150::setSlave4InterruptEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 1115 | I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_INT_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 1116 | } |
syundo0730 | 0:78ba160ba5f3 | 1117 | /** Get write mode for Slave 4. |
syundo0730 | 0:78ba160ba5f3 | 1118 | * When set to 1, the transaction will read or write data only. When cleared to |
syundo0730 | 0:78ba160ba5f3 | 1119 | * 0, the transaction will write a register address prior to reading or writing |
syundo0730 | 0:78ba160ba5f3 | 1120 | * data. This should equal 0 when specifying the register address within the |
syundo0730 | 0:78ba160ba5f3 | 1121 | * Slave device to/from which the ensuing data transaction will take place. |
syundo0730 | 0:78ba160ba5f3 | 1122 | * |
syundo0730 | 0:78ba160ba5f3 | 1123 | * @return Current write mode for Slave 4 (0 = register address + data, 1 = data only) |
syundo0730 | 0:78ba160ba5f3 | 1124 | * @see MPU9150_RA_I2C_SLV4_CTRL |
syundo0730 | 0:78ba160ba5f3 | 1125 | */ |
syundo0730 | 0:78ba160ba5f3 | 1126 | bool MPU9150::getSlave4WriteMode() { |
syundo0730 | 0:78ba160ba5f3 | 1127 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_REG_DIS_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1128 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1129 | } |
syundo0730 | 0:78ba160ba5f3 | 1130 | /** Set write mode for the Slave 4. |
syundo0730 | 0:78ba160ba5f3 | 1131 | * @param mode New write mode for Slave 4 (0 = register address + data, 1 = data only) |
syundo0730 | 0:78ba160ba5f3 | 1132 | * @see getSlave4WriteMode() |
syundo0730 | 0:78ba160ba5f3 | 1133 | * @see MPU9150_RA_I2C_SLV4_CTRL |
syundo0730 | 0:78ba160ba5f3 | 1134 | */ |
syundo0730 | 0:78ba160ba5f3 | 1135 | void MPU9150::setSlave4WriteMode(bool mode) { |
syundo0730 | 0:78ba160ba5f3 | 1136 | I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_REG_DIS_BIT, mode); |
syundo0730 | 0:78ba160ba5f3 | 1137 | } |
syundo0730 | 0:78ba160ba5f3 | 1138 | /** Get Slave 4 master delay value. |
syundo0730 | 0:78ba160ba5f3 | 1139 | * This configures the reduced access rate of I2C slaves relative to the Sample |
syundo0730 | 0:78ba160ba5f3 | 1140 | * Rate. When a slave's access rate is decreased relative to the Sample Rate, |
syundo0730 | 0:78ba160ba5f3 | 1141 | * the slave is accessed every: |
syundo0730 | 0:78ba160ba5f3 | 1142 | * |
syundo0730 | 0:78ba160ba5f3 | 1143 | * 1 / (1 + I2C_MST_DLY) samples |
syundo0730 | 0:78ba160ba5f3 | 1144 | * |
syundo0730 | 0:78ba160ba5f3 | 1145 | * This base Sample Rate in turn is determined by SMPLRT_DIV (register 25) and |
syundo0730 | 0:78ba160ba5f3 | 1146 | * DLPF_CFG (register 26). Whether a slave's access rate is reduced relative to |
syundo0730 | 0:78ba160ba5f3 | 1147 | * the Sample Rate is determined by I2C_MST_DELAY_CTRL (register 103). For |
syundo0730 | 0:78ba160ba5f3 | 1148 | * further information regarding the Sample Rate, please refer to register 25. |
syundo0730 | 0:78ba160ba5f3 | 1149 | * |
syundo0730 | 0:78ba160ba5f3 | 1150 | * @return Current Slave 4 master delay value |
syundo0730 | 0:78ba160ba5f3 | 1151 | * @see MPU9150_RA_I2C_SLV4_CTRL |
syundo0730 | 0:78ba160ba5f3 | 1152 | */ |
syundo0730 | 0:78ba160ba5f3 | 1153 | uint8_t MPU9150::getSlave4MasterDelay() { |
syundo0730 | 0:78ba160ba5f3 | 1154 | I2Cdev::readBits(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_MST_DLY_BIT, MPU9150_I2C_SLV4_MST_DLY_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1155 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1156 | } |
syundo0730 | 0:78ba160ba5f3 | 1157 | /** Set Slave 4 master delay value. |
syundo0730 | 0:78ba160ba5f3 | 1158 | * @param delay New Slave 4 master delay value |
syundo0730 | 0:78ba160ba5f3 | 1159 | * @see getSlave4MasterDelay() |
syundo0730 | 0:78ba160ba5f3 | 1160 | * @see MPU9150_RA_I2C_SLV4_CTRL |
syundo0730 | 0:78ba160ba5f3 | 1161 | */ |
syundo0730 | 0:78ba160ba5f3 | 1162 | void MPU9150::setSlave4MasterDelay(uint8_t delay) { |
syundo0730 | 0:78ba160ba5f3 | 1163 | I2Cdev::writeBits(devAddr, MPU9150_RA_I2C_SLV4_CTRL, MPU9150_I2C_SLV4_MST_DLY_BIT, MPU9150_I2C_SLV4_MST_DLY_LENGTH, delay); |
syundo0730 | 0:78ba160ba5f3 | 1164 | } |
syundo0730 | 0:78ba160ba5f3 | 1165 | /** Get last available byte read from Slave 4. |
syundo0730 | 0:78ba160ba5f3 | 1166 | * This register stores the data read from Slave 4. This field is populated |
syundo0730 | 0:78ba160ba5f3 | 1167 | * after a read transaction. |
syundo0730 | 0:78ba160ba5f3 | 1168 | * @return Last available byte read from to Slave 4 |
syundo0730 | 0:78ba160ba5f3 | 1169 | * @see MPU9150_RA_I2C_SLV4_DI |
syundo0730 | 0:78ba160ba5f3 | 1170 | */ |
syundo0730 | 0:78ba160ba5f3 | 1171 | uint8_t MPU9150::getSlate4InputByte() { |
syundo0730 | 0:78ba160ba5f3 | 1172 | I2Cdev::readByte(devAddr, MPU9150_RA_I2C_SLV4_DI, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1173 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1174 | } |
syundo0730 | 0:78ba160ba5f3 | 1175 | |
syundo0730 | 0:78ba160ba5f3 | 1176 | // I2C_MST_STATUS register |
syundo0730 | 0:78ba160ba5f3 | 1177 | |
syundo0730 | 0:78ba160ba5f3 | 1178 | /** Get FSYNC interrupt status. |
syundo0730 | 0:78ba160ba5f3 | 1179 | * This bit reflects the status of the FSYNC interrupt from an external device |
syundo0730 | 0:78ba160ba5f3 | 1180 | * into the MPU-60X0. This is used as a way to pass an external interrupt |
syundo0730 | 0:78ba160ba5f3 | 1181 | * through the MPU-60X0 to the host application processor. When set to 1, this |
syundo0730 | 0:78ba160ba5f3 | 1182 | * bit will cause an interrupt if FSYNC_INT_EN is asserted in INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1183 | * (Register 55). |
syundo0730 | 0:78ba160ba5f3 | 1184 | * @return FSYNC interrupt status |
syundo0730 | 0:78ba160ba5f3 | 1185 | * @see MPU9150_RA_I2C_MST_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1186 | */ |
syundo0730 | 0:78ba160ba5f3 | 1187 | bool MPU9150::getPassthroughStatus() { |
syundo0730 | 0:78ba160ba5f3 | 1188 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_PASS_THROUGH_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1189 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1190 | } |
syundo0730 | 0:78ba160ba5f3 | 1191 | /** Get Slave 4 transaction done status. |
syundo0730 | 0:78ba160ba5f3 | 1192 | * Automatically sets to 1 when a Slave 4 transaction has completed. This |
syundo0730 | 0:78ba160ba5f3 | 1193 | * triggers an interrupt if the I2C_MST_INT_EN bit in the INT_ENABLE register |
syundo0730 | 0:78ba160ba5f3 | 1194 | * (Register 56) is asserted and if the SLV_4_DONE_INT bit is asserted in the |
syundo0730 | 0:78ba160ba5f3 | 1195 | * I2C_SLV4_CTRL register (Register 52). |
syundo0730 | 0:78ba160ba5f3 | 1196 | * @return Slave 4 transaction done status |
syundo0730 | 0:78ba160ba5f3 | 1197 | * @see MPU9150_RA_I2C_MST_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1198 | */ |
syundo0730 | 0:78ba160ba5f3 | 1199 | bool MPU9150::getSlave4IsDone() { |
syundo0730 | 0:78ba160ba5f3 | 1200 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV4_DONE_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1201 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1202 | } |
syundo0730 | 0:78ba160ba5f3 | 1203 | /** Get master arbitration lost status. |
syundo0730 | 0:78ba160ba5f3 | 1204 | * This bit automatically sets to 1 when the I2C Master has lost arbitration of |
syundo0730 | 0:78ba160ba5f3 | 1205 | * the auxiliary I2C bus (an error condition). This triggers an interrupt if the |
syundo0730 | 0:78ba160ba5f3 | 1206 | * I2C_MST_INT_EN bit in the INT_ENABLE register (Register 56) is asserted. |
syundo0730 | 0:78ba160ba5f3 | 1207 | * @return Master arbitration lost status |
syundo0730 | 0:78ba160ba5f3 | 1208 | * @see MPU9150_RA_I2C_MST_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1209 | */ |
syundo0730 | 0:78ba160ba5f3 | 1210 | bool MPU9150::getLostArbitration() { |
syundo0730 | 0:78ba160ba5f3 | 1211 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_LOST_ARB_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1212 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1213 | } |
syundo0730 | 0:78ba160ba5f3 | 1214 | /** Get Slave 4 NACK status. |
syundo0730 | 0:78ba160ba5f3 | 1215 | * This bit automatically sets to 1 when the I2C Master receives a NACK in a |
syundo0730 | 0:78ba160ba5f3 | 1216 | * transaction with Slave 4. This triggers an interrupt if the I2C_MST_INT_EN |
syundo0730 | 0:78ba160ba5f3 | 1217 | * bit in the INT_ENABLE register (Register 56) is asserted. |
syundo0730 | 0:78ba160ba5f3 | 1218 | * @return Slave 4 NACK interrupt status |
syundo0730 | 0:78ba160ba5f3 | 1219 | * @see MPU9150_RA_I2C_MST_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1220 | */ |
syundo0730 | 0:78ba160ba5f3 | 1221 | bool MPU9150::getSlave4Nack() { |
syundo0730 | 0:78ba160ba5f3 | 1222 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV4_NACK_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1223 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1224 | } |
syundo0730 | 0:78ba160ba5f3 | 1225 | /** Get Slave 3 NACK status. |
syundo0730 | 0:78ba160ba5f3 | 1226 | * This bit automatically sets to 1 when the I2C Master receives a NACK in a |
syundo0730 | 0:78ba160ba5f3 | 1227 | * transaction with Slave 3. This triggers an interrupt if the I2C_MST_INT_EN |
syundo0730 | 0:78ba160ba5f3 | 1228 | * bit in the INT_ENABLE register (Register 56) is asserted. |
syundo0730 | 0:78ba160ba5f3 | 1229 | * @return Slave 3 NACK interrupt status |
syundo0730 | 0:78ba160ba5f3 | 1230 | * @see MPU9150_RA_I2C_MST_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1231 | */ |
syundo0730 | 0:78ba160ba5f3 | 1232 | bool MPU9150::getSlave3Nack() { |
syundo0730 | 0:78ba160ba5f3 | 1233 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV3_NACK_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1234 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1235 | } |
syundo0730 | 0:78ba160ba5f3 | 1236 | /** Get Slave 2 NACK status. |
syundo0730 | 0:78ba160ba5f3 | 1237 | * This bit automatically sets to 1 when the I2C Master receives a NACK in a |
syundo0730 | 0:78ba160ba5f3 | 1238 | * transaction with Slave 2. This triggers an interrupt if the I2C_MST_INT_EN |
syundo0730 | 0:78ba160ba5f3 | 1239 | * bit in the INT_ENABLE register (Register 56) is asserted. |
syundo0730 | 0:78ba160ba5f3 | 1240 | * @return Slave 2 NACK interrupt status |
syundo0730 | 0:78ba160ba5f3 | 1241 | * @see MPU9150_RA_I2C_MST_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1242 | */ |
syundo0730 | 0:78ba160ba5f3 | 1243 | bool MPU9150::getSlave2Nack() { |
syundo0730 | 0:78ba160ba5f3 | 1244 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV2_NACK_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1245 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1246 | } |
syundo0730 | 0:78ba160ba5f3 | 1247 | /** Get Slave 1 NACK status. |
syundo0730 | 0:78ba160ba5f3 | 1248 | * This bit automatically sets to 1 when the I2C Master receives a NACK in a |
syundo0730 | 0:78ba160ba5f3 | 1249 | * transaction with Slave 1. This triggers an interrupt if the I2C_MST_INT_EN |
syundo0730 | 0:78ba160ba5f3 | 1250 | * bit in the INT_ENABLE register (Register 56) is asserted. |
syundo0730 | 0:78ba160ba5f3 | 1251 | * @return Slave 1 NACK interrupt status |
syundo0730 | 0:78ba160ba5f3 | 1252 | * @see MPU9150_RA_I2C_MST_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1253 | */ |
syundo0730 | 0:78ba160ba5f3 | 1254 | bool MPU9150::getSlave1Nack() { |
syundo0730 | 0:78ba160ba5f3 | 1255 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV1_NACK_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1256 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1257 | } |
syundo0730 | 0:78ba160ba5f3 | 1258 | /** Get Slave 0 NACK status. |
syundo0730 | 0:78ba160ba5f3 | 1259 | * This bit automatically sets to 1 when the I2C Master receives a NACK in a |
syundo0730 | 0:78ba160ba5f3 | 1260 | * transaction with Slave 0. This triggers an interrupt if the I2C_MST_INT_EN |
syundo0730 | 0:78ba160ba5f3 | 1261 | * bit in the INT_ENABLE register (Register 56) is asserted. |
syundo0730 | 0:78ba160ba5f3 | 1262 | * @return Slave 0 NACK interrupt status |
syundo0730 | 0:78ba160ba5f3 | 1263 | * @see MPU9150_RA_I2C_MST_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1264 | */ |
syundo0730 | 0:78ba160ba5f3 | 1265 | bool MPU9150::getSlave0Nack() { |
syundo0730 | 0:78ba160ba5f3 | 1266 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_STATUS, MPU9150_MST_I2C_SLV0_NACK_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1267 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1268 | } |
syundo0730 | 0:78ba160ba5f3 | 1269 | |
syundo0730 | 0:78ba160ba5f3 | 1270 | // INT_PIN_CFG register |
syundo0730 | 0:78ba160ba5f3 | 1271 | |
syundo0730 | 0:78ba160ba5f3 | 1272 | /** Get interrupt logic level mode. |
syundo0730 | 0:78ba160ba5f3 | 1273 | * Will be set 0 for active-high, 1 for active-low. |
syundo0730 | 0:78ba160ba5f3 | 1274 | * @return Current interrupt mode (0=active-high, 1=active-low) |
syundo0730 | 0:78ba160ba5f3 | 1275 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1276 | * @see MPU9150_INTCFG_INT_LEVEL_BIT |
syundo0730 | 0:78ba160ba5f3 | 1277 | */ |
syundo0730 | 0:78ba160ba5f3 | 1278 | bool MPU9150::getInterruptMode() { |
syundo0730 | 0:78ba160ba5f3 | 1279 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_LEVEL_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1280 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1281 | } |
syundo0730 | 0:78ba160ba5f3 | 1282 | /** Set interrupt logic level mode. |
syundo0730 | 0:78ba160ba5f3 | 1283 | * @param mode New interrupt mode (0=active-high, 1=active-low) |
syundo0730 | 0:78ba160ba5f3 | 1284 | * @see getInterruptMode() |
syundo0730 | 0:78ba160ba5f3 | 1285 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1286 | * @see MPU9150_INTCFG_INT_LEVEL_BIT |
syundo0730 | 0:78ba160ba5f3 | 1287 | */ |
syundo0730 | 0:78ba160ba5f3 | 1288 | void MPU9150::setInterruptMode(bool mode) { |
syundo0730 | 0:78ba160ba5f3 | 1289 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_LEVEL_BIT, mode); |
syundo0730 | 0:78ba160ba5f3 | 1290 | } |
syundo0730 | 0:78ba160ba5f3 | 1291 | /** Get interrupt drive mode. |
syundo0730 | 0:78ba160ba5f3 | 1292 | * Will be set 0 for push-pull, 1 for open-drain. |
syundo0730 | 0:78ba160ba5f3 | 1293 | * @return Current interrupt drive mode (0=push-pull, 1=open-drain) |
syundo0730 | 0:78ba160ba5f3 | 1294 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1295 | * @see MPU9150_INTCFG_INT_OPEN_BIT |
syundo0730 | 0:78ba160ba5f3 | 1296 | */ |
syundo0730 | 0:78ba160ba5f3 | 1297 | bool MPU9150::getInterruptDrive() { |
syundo0730 | 0:78ba160ba5f3 | 1298 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_OPEN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1299 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1300 | } |
syundo0730 | 0:78ba160ba5f3 | 1301 | /** Set interrupt drive mode. |
syundo0730 | 0:78ba160ba5f3 | 1302 | * @param drive New interrupt drive mode (0=push-pull, 1=open-drain) |
syundo0730 | 0:78ba160ba5f3 | 1303 | * @see getInterruptDrive() |
syundo0730 | 0:78ba160ba5f3 | 1304 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1305 | * @see MPU9150_INTCFG_INT_OPEN_BIT |
syundo0730 | 0:78ba160ba5f3 | 1306 | */ |
syundo0730 | 0:78ba160ba5f3 | 1307 | void MPU9150::setInterruptDrive(bool drive) { |
syundo0730 | 0:78ba160ba5f3 | 1308 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_OPEN_BIT, drive); |
syundo0730 | 0:78ba160ba5f3 | 1309 | } |
syundo0730 | 0:78ba160ba5f3 | 1310 | /** Get interrupt latch mode. |
syundo0730 | 0:78ba160ba5f3 | 1311 | * Will be set 0 for 50us-pulse, 1 for latch-until-int-cleared. |
syundo0730 | 0:78ba160ba5f3 | 1312 | * @return Current latch mode (0=50us-pulse, 1=latch-until-int-cleared) |
syundo0730 | 0:78ba160ba5f3 | 1313 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1314 | * @see MPU9150_INTCFG_LATCH_INT_EN_BIT |
syundo0730 | 0:78ba160ba5f3 | 1315 | */ |
syundo0730 | 0:78ba160ba5f3 | 1316 | bool MPU9150::getInterruptLatch() { |
syundo0730 | 0:78ba160ba5f3 | 1317 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_LATCH_INT_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1318 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1319 | } |
syundo0730 | 0:78ba160ba5f3 | 1320 | /** Set interrupt latch mode. |
syundo0730 | 0:78ba160ba5f3 | 1321 | * @param latch New latch mode (0=50us-pulse, 1=latch-until-int-cleared) |
syundo0730 | 0:78ba160ba5f3 | 1322 | * @see getInterruptLatch() |
syundo0730 | 0:78ba160ba5f3 | 1323 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1324 | * @see MPU9150_INTCFG_LATCH_INT_EN_BIT |
syundo0730 | 0:78ba160ba5f3 | 1325 | */ |
syundo0730 | 0:78ba160ba5f3 | 1326 | void MPU9150::setInterruptLatch(bool latch) { |
syundo0730 | 0:78ba160ba5f3 | 1327 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_LATCH_INT_EN_BIT, latch); |
syundo0730 | 0:78ba160ba5f3 | 1328 | } |
syundo0730 | 0:78ba160ba5f3 | 1329 | /** Get interrupt latch clear mode. |
syundo0730 | 0:78ba160ba5f3 | 1330 | * Will be set 0 for status-read-only, 1 for any-register-read. |
syundo0730 | 0:78ba160ba5f3 | 1331 | * @return Current latch clear mode (0=status-read-only, 1=any-register-read) |
syundo0730 | 0:78ba160ba5f3 | 1332 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1333 | * @see MPU9150_INTCFG_INT_RD_CLEAR_BIT |
syundo0730 | 0:78ba160ba5f3 | 1334 | */ |
syundo0730 | 0:78ba160ba5f3 | 1335 | bool MPU9150::getInterruptLatchClear() { |
syundo0730 | 0:78ba160ba5f3 | 1336 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_RD_CLEAR_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1337 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1338 | } |
syundo0730 | 0:78ba160ba5f3 | 1339 | /** Set interrupt latch clear mode. |
syundo0730 | 0:78ba160ba5f3 | 1340 | * @param clear New latch clear mode (0=status-read-only, 1=any-register-read) |
syundo0730 | 0:78ba160ba5f3 | 1341 | * @see getInterruptLatchClear() |
syundo0730 | 0:78ba160ba5f3 | 1342 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1343 | * @see MPU9150_INTCFG_INT_RD_CLEAR_BIT |
syundo0730 | 0:78ba160ba5f3 | 1344 | */ |
syundo0730 | 0:78ba160ba5f3 | 1345 | void MPU9150::setInterruptLatchClear(bool clear) { |
syundo0730 | 0:78ba160ba5f3 | 1346 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_INT_RD_CLEAR_BIT, clear); |
syundo0730 | 0:78ba160ba5f3 | 1347 | } |
syundo0730 | 0:78ba160ba5f3 | 1348 | /** Get FSYNC interrupt logic level mode. |
syundo0730 | 0:78ba160ba5f3 | 1349 | * @return Current FSYNC interrupt mode (0=active-high, 1=active-low) |
syundo0730 | 0:78ba160ba5f3 | 1350 | * @see getFSyncInterruptMode() |
syundo0730 | 0:78ba160ba5f3 | 1351 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1352 | * @see MPU9150_INTCFG_FSYNC_INT_LEVEL_BIT |
syundo0730 | 0:78ba160ba5f3 | 1353 | */ |
syundo0730 | 0:78ba160ba5f3 | 1354 | bool MPU9150::getFSyncInterruptLevel() { |
syundo0730 | 0:78ba160ba5f3 | 1355 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_FSYNC_INT_LEVEL_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1356 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1357 | } |
syundo0730 | 0:78ba160ba5f3 | 1358 | /** Set FSYNC interrupt logic level mode. |
syundo0730 | 0:78ba160ba5f3 | 1359 | * @param mode New FSYNC interrupt mode (0=active-high, 1=active-low) |
syundo0730 | 0:78ba160ba5f3 | 1360 | * @see getFSyncInterruptMode() |
syundo0730 | 0:78ba160ba5f3 | 1361 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1362 | * @see MPU9150_INTCFG_FSYNC_INT_LEVEL_BIT |
syundo0730 | 0:78ba160ba5f3 | 1363 | */ |
syundo0730 | 0:78ba160ba5f3 | 1364 | void MPU9150::setFSyncInterruptLevel(bool level) { |
syundo0730 | 0:78ba160ba5f3 | 1365 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_FSYNC_INT_LEVEL_BIT, level); |
syundo0730 | 0:78ba160ba5f3 | 1366 | } |
syundo0730 | 0:78ba160ba5f3 | 1367 | /** Get FSYNC pin interrupt enabled setting. |
syundo0730 | 0:78ba160ba5f3 | 1368 | * Will be set 0 for disabled, 1 for enabled. |
syundo0730 | 0:78ba160ba5f3 | 1369 | * @return Current interrupt enabled setting |
syundo0730 | 0:78ba160ba5f3 | 1370 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1371 | * @see MPU9150_INTCFG_FSYNC_INT_EN_BIT |
syundo0730 | 0:78ba160ba5f3 | 1372 | */ |
syundo0730 | 0:78ba160ba5f3 | 1373 | bool MPU9150::getFSyncInterruptEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 1374 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_FSYNC_INT_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1375 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1376 | } |
syundo0730 | 0:78ba160ba5f3 | 1377 | /** Set FSYNC pin interrupt enabled setting. |
syundo0730 | 0:78ba160ba5f3 | 1378 | * @param enabled New FSYNC pin interrupt enabled setting |
syundo0730 | 0:78ba160ba5f3 | 1379 | * @see getFSyncInterruptEnabled() |
syundo0730 | 0:78ba160ba5f3 | 1380 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1381 | * @see MPU9150_INTCFG_FSYNC_INT_EN_BIT |
syundo0730 | 0:78ba160ba5f3 | 1382 | */ |
syundo0730 | 0:78ba160ba5f3 | 1383 | void MPU9150::setFSyncInterruptEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 1384 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_FSYNC_INT_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 1385 | } |
syundo0730 | 0:78ba160ba5f3 | 1386 | /** Get I2C bypass enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1387 | * When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to |
syundo0730 | 0:78ba160ba5f3 | 1388 | * 0, the host application processor will be able to directly access the |
syundo0730 | 0:78ba160ba5f3 | 1389 | * auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host |
syundo0730 | 0:78ba160ba5f3 | 1390 | * application processor will not be able to directly access the auxiliary I2C |
syundo0730 | 0:78ba160ba5f3 | 1391 | * bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106 |
syundo0730 | 0:78ba160ba5f3 | 1392 | * bit[5]). |
syundo0730 | 0:78ba160ba5f3 | 1393 | * @return Current I2C bypass enabled status |
syundo0730 | 0:78ba160ba5f3 | 1394 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1395 | * @see MPU9150_INTCFG_I2C_BYPASS_EN_BIT |
syundo0730 | 0:78ba160ba5f3 | 1396 | */ |
syundo0730 | 0:78ba160ba5f3 | 1397 | bool MPU9150::getI2CBypassEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 1398 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_I2C_BYPASS_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1399 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1400 | } |
syundo0730 | 0:78ba160ba5f3 | 1401 | /** Set I2C bypass enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1402 | * When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to |
syundo0730 | 0:78ba160ba5f3 | 1403 | * 0, the host application processor will be able to directly access the |
syundo0730 | 0:78ba160ba5f3 | 1404 | * auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host |
syundo0730 | 0:78ba160ba5f3 | 1405 | * application processor will not be able to directly access the auxiliary I2C |
syundo0730 | 0:78ba160ba5f3 | 1406 | * bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106 |
syundo0730 | 0:78ba160ba5f3 | 1407 | * bit[5]). |
syundo0730 | 0:78ba160ba5f3 | 1408 | * @param enabled New I2C bypass enabled status |
syundo0730 | 0:78ba160ba5f3 | 1409 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1410 | * @see MPU9150_INTCFG_I2C_BYPASS_EN_BIT |
syundo0730 | 0:78ba160ba5f3 | 1411 | */ |
syundo0730 | 0:78ba160ba5f3 | 1412 | void MPU9150::setI2CBypassEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 1413 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_I2C_BYPASS_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 1414 | } |
syundo0730 | 0:78ba160ba5f3 | 1415 | /** Get reference clock output enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1416 | * When this bit is equal to 1, a reference clock output is provided at the |
syundo0730 | 0:78ba160ba5f3 | 1417 | * CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For |
syundo0730 | 0:78ba160ba5f3 | 1418 | * further information regarding CLKOUT, please refer to the MPU-60X0 Product |
syundo0730 | 0:78ba160ba5f3 | 1419 | * Specification document. |
syundo0730 | 0:78ba160ba5f3 | 1420 | * @return Current reference clock output enabled status |
syundo0730 | 0:78ba160ba5f3 | 1421 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1422 | * @see MPU9150_INTCFG_CLKOUT_EN_BIT |
syundo0730 | 0:78ba160ba5f3 | 1423 | */ |
syundo0730 | 0:78ba160ba5f3 | 1424 | bool MPU9150::getClockOutputEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 1425 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_CLKOUT_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1426 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1427 | } |
syundo0730 | 0:78ba160ba5f3 | 1428 | /** Set reference clock output enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1429 | * When this bit is equal to 1, a reference clock output is provided at the |
syundo0730 | 0:78ba160ba5f3 | 1430 | * CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For |
syundo0730 | 0:78ba160ba5f3 | 1431 | * further information regarding CLKOUT, please refer to the MPU-60X0 Product |
syundo0730 | 0:78ba160ba5f3 | 1432 | * Specification document. |
syundo0730 | 0:78ba160ba5f3 | 1433 | * @param enabled New reference clock output enabled status |
syundo0730 | 0:78ba160ba5f3 | 1434 | * @see MPU9150_RA_INT_PIN_CFG |
syundo0730 | 0:78ba160ba5f3 | 1435 | * @see MPU9150_INTCFG_CLKOUT_EN_BIT |
syundo0730 | 0:78ba160ba5f3 | 1436 | */ |
syundo0730 | 0:78ba160ba5f3 | 1437 | void MPU9150::setClockOutputEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 1438 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_PIN_CFG, MPU9150_INTCFG_CLKOUT_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 1439 | } |
syundo0730 | 0:78ba160ba5f3 | 1440 | |
syundo0730 | 0:78ba160ba5f3 | 1441 | // INT_ENABLE register |
syundo0730 | 0:78ba160ba5f3 | 1442 | |
syundo0730 | 0:78ba160ba5f3 | 1443 | /** Get full interrupt enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1444 | * Full register byte for all interrupts, for quick reading. Each bit will be |
syundo0730 | 0:78ba160ba5f3 | 1445 | * set 0 for disabled, 1 for enabled. |
syundo0730 | 0:78ba160ba5f3 | 1446 | * @return Current interrupt enabled status |
syundo0730 | 0:78ba160ba5f3 | 1447 | * @see MPU9150_RA_INT_ENABLE |
syundo0730 | 0:78ba160ba5f3 | 1448 | * @see MPU9150_INTERRUPT_FF_BIT |
syundo0730 | 0:78ba160ba5f3 | 1449 | **/ |
syundo0730 | 0:78ba160ba5f3 | 1450 | uint8_t MPU9150::getIntEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 1451 | I2Cdev::readByte(devAddr, MPU9150_RA_INT_ENABLE, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1452 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1453 | } |
syundo0730 | 0:78ba160ba5f3 | 1454 | /** Set full interrupt enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1455 | * Full register byte for all interrupts, for quick reading. Each bit should be |
syundo0730 | 0:78ba160ba5f3 | 1456 | * set 0 for disabled, 1 for enabled. |
syundo0730 | 0:78ba160ba5f3 | 1457 | * @param enabled New interrupt enabled status |
syundo0730 | 0:78ba160ba5f3 | 1458 | * @see getIntFreefallEnabled() |
syundo0730 | 0:78ba160ba5f3 | 1459 | * @see MPU9150_RA_INT_ENABLE |
syundo0730 | 0:78ba160ba5f3 | 1460 | * @see MPU9150_INTERRUPT_FF_BIT |
syundo0730 | 0:78ba160ba5f3 | 1461 | **/ |
syundo0730 | 0:78ba160ba5f3 | 1462 | void MPU9150::setIntEnabled(uint8_t enabled) { |
syundo0730 | 0:78ba160ba5f3 | 1463 | I2Cdev::writeByte(devAddr, MPU9150_RA_INT_ENABLE, enabled); |
syundo0730 | 0:78ba160ba5f3 | 1464 | } |
syundo0730 | 0:78ba160ba5f3 | 1465 | /** Get Free Fall interrupt enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1466 | * Will be set 0 for disabled, 1 for enabled. |
syundo0730 | 0:78ba160ba5f3 | 1467 | * @return Current interrupt enabled status |
syundo0730 | 0:78ba160ba5f3 | 1468 | * @see MPU9150_RA_INT_ENABLE |
syundo0730 | 0:78ba160ba5f3 | 1469 | * @see MPU9150_INTERRUPT_FF_BIT |
syundo0730 | 0:78ba160ba5f3 | 1470 | **/ |
syundo0730 | 0:78ba160ba5f3 | 1471 | bool MPU9150::getIntFreefallEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 1472 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_FF_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1473 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1474 | } |
syundo0730 | 0:78ba160ba5f3 | 1475 | /** Set Free Fall interrupt enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1476 | * @param enabled New interrupt enabled status |
syundo0730 | 0:78ba160ba5f3 | 1477 | * @see getIntFreefallEnabled() |
syundo0730 | 0:78ba160ba5f3 | 1478 | * @see MPU9150_RA_INT_ENABLE |
syundo0730 | 0:78ba160ba5f3 | 1479 | * @see MPU9150_INTERRUPT_FF_BIT |
syundo0730 | 0:78ba160ba5f3 | 1480 | **/ |
syundo0730 | 0:78ba160ba5f3 | 1481 | void MPU9150::setIntFreefallEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 1482 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_FF_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 1483 | } |
syundo0730 | 0:78ba160ba5f3 | 1484 | /** Get Motion Detection interrupt enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1485 | * Will be set 0 for disabled, 1 for enabled. |
syundo0730 | 0:78ba160ba5f3 | 1486 | * @return Current interrupt enabled status |
syundo0730 | 0:78ba160ba5f3 | 1487 | * @see MPU9150_RA_INT_ENABLE |
syundo0730 | 0:78ba160ba5f3 | 1488 | * @see MPU9150_INTERRUPT_MOT_BIT |
syundo0730 | 0:78ba160ba5f3 | 1489 | **/ |
syundo0730 | 0:78ba160ba5f3 | 1490 | bool MPU9150::getIntMotionEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 1491 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_MOT_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1492 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1493 | } |
syundo0730 | 0:78ba160ba5f3 | 1494 | /** Set Motion Detection interrupt enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1495 | * @param enabled New interrupt enabled status |
syundo0730 | 0:78ba160ba5f3 | 1496 | * @see getIntMotionEnabled() |
syundo0730 | 0:78ba160ba5f3 | 1497 | * @see MPU9150_RA_INT_ENABLE |
syundo0730 | 0:78ba160ba5f3 | 1498 | * @see MPU9150_INTERRUPT_MOT_BIT |
syundo0730 | 0:78ba160ba5f3 | 1499 | **/ |
syundo0730 | 0:78ba160ba5f3 | 1500 | void MPU9150::setIntMotionEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 1501 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_MOT_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 1502 | } |
syundo0730 | 0:78ba160ba5f3 | 1503 | /** Get Zero Motion Detection interrupt enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1504 | * Will be set 0 for disabled, 1 for enabled. |
syundo0730 | 0:78ba160ba5f3 | 1505 | * @return Current interrupt enabled status |
syundo0730 | 0:78ba160ba5f3 | 1506 | * @see MPU9150_RA_INT_ENABLE |
syundo0730 | 0:78ba160ba5f3 | 1507 | * @see MPU9150_INTERRUPT_ZMOT_BIT |
syundo0730 | 0:78ba160ba5f3 | 1508 | **/ |
syundo0730 | 0:78ba160ba5f3 | 1509 | bool MPU9150::getIntZeroMotionEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 1510 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_ZMOT_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1511 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1512 | } |
syundo0730 | 0:78ba160ba5f3 | 1513 | /** Set Zero Motion Detection interrupt enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1514 | * @param enabled New interrupt enabled status |
syundo0730 | 0:78ba160ba5f3 | 1515 | * @see getIntZeroMotionEnabled() |
syundo0730 | 0:78ba160ba5f3 | 1516 | * @see MPU9150_RA_INT_ENABLE |
syundo0730 | 0:78ba160ba5f3 | 1517 | * @see MPU9150_INTERRUPT_ZMOT_BIT |
syundo0730 | 0:78ba160ba5f3 | 1518 | **/ |
syundo0730 | 0:78ba160ba5f3 | 1519 | void MPU9150::setIntZeroMotionEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 1520 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_ZMOT_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 1521 | } |
syundo0730 | 0:78ba160ba5f3 | 1522 | /** Get FIFO Buffer Overflow interrupt enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1523 | * Will be set 0 for disabled, 1 for enabled. |
syundo0730 | 0:78ba160ba5f3 | 1524 | * @return Current interrupt enabled status |
syundo0730 | 0:78ba160ba5f3 | 1525 | * @see MPU9150_RA_INT_ENABLE |
syundo0730 | 0:78ba160ba5f3 | 1526 | * @see MPU9150_INTERRUPT_FIFO_OFLOW_BIT |
syundo0730 | 0:78ba160ba5f3 | 1527 | **/ |
syundo0730 | 0:78ba160ba5f3 | 1528 | bool MPU9150::getIntFIFOBufferOverflowEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 1529 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_FIFO_OFLOW_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1530 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1531 | } |
syundo0730 | 0:78ba160ba5f3 | 1532 | /** Set FIFO Buffer Overflow interrupt enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1533 | * @param enabled New interrupt enabled status |
syundo0730 | 0:78ba160ba5f3 | 1534 | * @see getIntFIFOBufferOverflowEnabled() |
syundo0730 | 0:78ba160ba5f3 | 1535 | * @see MPU9150_RA_INT_ENABLE |
syundo0730 | 0:78ba160ba5f3 | 1536 | * @see MPU9150_INTERRUPT_FIFO_OFLOW_BIT |
syundo0730 | 0:78ba160ba5f3 | 1537 | **/ |
syundo0730 | 0:78ba160ba5f3 | 1538 | void MPU9150::setIntFIFOBufferOverflowEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 1539 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_FIFO_OFLOW_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 1540 | } |
syundo0730 | 0:78ba160ba5f3 | 1541 | /** Get I2C Master interrupt enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1542 | * This enables any of the I2C Master interrupt sources to generate an |
syundo0730 | 0:78ba160ba5f3 | 1543 | * interrupt. Will be set 0 for disabled, 1 for enabled. |
syundo0730 | 0:78ba160ba5f3 | 1544 | * @return Current interrupt enabled status |
syundo0730 | 0:78ba160ba5f3 | 1545 | * @see MPU9150_RA_INT_ENABLE |
syundo0730 | 0:78ba160ba5f3 | 1546 | * @see MPU9150_INTERRUPT_I2C_MST_INT_BIT |
syundo0730 | 0:78ba160ba5f3 | 1547 | **/ |
syundo0730 | 0:78ba160ba5f3 | 1548 | bool MPU9150::getIntI2CMasterEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 1549 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_I2C_MST_INT_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1550 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1551 | } |
syundo0730 | 0:78ba160ba5f3 | 1552 | /** Set I2C Master interrupt enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1553 | * @param enabled New interrupt enabled status |
syundo0730 | 0:78ba160ba5f3 | 1554 | * @see getIntI2CMasterEnabled() |
syundo0730 | 0:78ba160ba5f3 | 1555 | * @see MPU9150_RA_INT_ENABLE |
syundo0730 | 0:78ba160ba5f3 | 1556 | * @see MPU9150_INTERRUPT_I2C_MST_INT_BIT |
syundo0730 | 0:78ba160ba5f3 | 1557 | **/ |
syundo0730 | 0:78ba160ba5f3 | 1558 | void MPU9150::setIntI2CMasterEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 1559 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_I2C_MST_INT_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 1560 | } |
syundo0730 | 0:78ba160ba5f3 | 1561 | /** Get Data Ready interrupt enabled setting. |
syundo0730 | 0:78ba160ba5f3 | 1562 | * This event occurs each time a write operation to all of the sensor registers |
syundo0730 | 0:78ba160ba5f3 | 1563 | * has been completed. Will be set 0 for disabled, 1 for enabled. |
syundo0730 | 0:78ba160ba5f3 | 1564 | * @return Current interrupt enabled status |
syundo0730 | 0:78ba160ba5f3 | 1565 | * @see MPU9150_RA_INT_ENABLE |
syundo0730 | 0:78ba160ba5f3 | 1566 | * @see MPU9150_INTERRUPT_DATA_RDY_BIT |
syundo0730 | 0:78ba160ba5f3 | 1567 | */ |
syundo0730 | 0:78ba160ba5f3 | 1568 | bool MPU9150::getIntDataReadyEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 1569 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_DATA_RDY_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1570 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1571 | } |
syundo0730 | 0:78ba160ba5f3 | 1572 | /** Set Data Ready interrupt enabled status. |
syundo0730 | 0:78ba160ba5f3 | 1573 | * @param enabled New interrupt enabled status |
syundo0730 | 0:78ba160ba5f3 | 1574 | * @see getIntDataReadyEnabled() |
syundo0730 | 0:78ba160ba5f3 | 1575 | * @see MPU9150_RA_INT_CFG |
syundo0730 | 0:78ba160ba5f3 | 1576 | * @see MPU9150_INTERRUPT_DATA_RDY_BIT |
syundo0730 | 0:78ba160ba5f3 | 1577 | */ |
syundo0730 | 0:78ba160ba5f3 | 1578 | void MPU9150::setIntDataReadyEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 1579 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_DATA_RDY_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 1580 | } |
syundo0730 | 0:78ba160ba5f3 | 1581 | |
syundo0730 | 0:78ba160ba5f3 | 1582 | // INT_STATUS register |
syundo0730 | 0:78ba160ba5f3 | 1583 | |
syundo0730 | 0:78ba160ba5f3 | 1584 | /** Get full set of interrupt status bits. |
syundo0730 | 0:78ba160ba5f3 | 1585 | * These bits clear to 0 after the register has been read. Very useful |
syundo0730 | 0:78ba160ba5f3 | 1586 | * for getting multiple INT statuses, since each single bit read clears |
syundo0730 | 0:78ba160ba5f3 | 1587 | * all of them because it has to read the whole byte. |
syundo0730 | 0:78ba160ba5f3 | 1588 | * @return Current interrupt status |
syundo0730 | 0:78ba160ba5f3 | 1589 | * @see MPU9150_RA_INT_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1590 | */ |
syundo0730 | 0:78ba160ba5f3 | 1591 | uint8_t MPU9150::getIntStatus() { |
syundo0730 | 0:78ba160ba5f3 | 1592 | I2Cdev::readByte(devAddr, MPU9150_RA_INT_STATUS, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1593 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1594 | } |
syundo0730 | 0:78ba160ba5f3 | 1595 | /** Get Free Fall interrupt status. |
syundo0730 | 0:78ba160ba5f3 | 1596 | * This bit automatically sets to 1 when a Free Fall interrupt has been |
syundo0730 | 0:78ba160ba5f3 | 1597 | * generated. The bit clears to 0 after the register has been read. |
syundo0730 | 0:78ba160ba5f3 | 1598 | * @return Current interrupt status |
syundo0730 | 0:78ba160ba5f3 | 1599 | * @see MPU9150_RA_INT_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1600 | * @see MPU9150_INTERRUPT_FF_BIT |
syundo0730 | 0:78ba160ba5f3 | 1601 | */ |
syundo0730 | 0:78ba160ba5f3 | 1602 | bool MPU9150::getIntFreefallStatus() { |
syundo0730 | 0:78ba160ba5f3 | 1603 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_FF_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1604 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1605 | } |
syundo0730 | 0:78ba160ba5f3 | 1606 | /** Get Motion Detection interrupt status. |
syundo0730 | 0:78ba160ba5f3 | 1607 | * This bit automatically sets to 1 when a Motion Detection interrupt has been |
syundo0730 | 0:78ba160ba5f3 | 1608 | * generated. The bit clears to 0 after the register has been read. |
syundo0730 | 0:78ba160ba5f3 | 1609 | * @return Current interrupt status |
syundo0730 | 0:78ba160ba5f3 | 1610 | * @see MPU9150_RA_INT_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1611 | * @see MPU9150_INTERRUPT_MOT_BIT |
syundo0730 | 0:78ba160ba5f3 | 1612 | */ |
syundo0730 | 0:78ba160ba5f3 | 1613 | bool MPU9150::getIntMotionStatus() { |
syundo0730 | 0:78ba160ba5f3 | 1614 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_MOT_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1615 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1616 | } |
syundo0730 | 0:78ba160ba5f3 | 1617 | /** Get Zero Motion Detection interrupt status. |
syundo0730 | 0:78ba160ba5f3 | 1618 | * This bit automatically sets to 1 when a Zero Motion Detection interrupt has |
syundo0730 | 0:78ba160ba5f3 | 1619 | * been generated. The bit clears to 0 after the register has been read. |
syundo0730 | 0:78ba160ba5f3 | 1620 | * @return Current interrupt status |
syundo0730 | 0:78ba160ba5f3 | 1621 | * @see MPU9150_RA_INT_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1622 | * @see MPU9150_INTERRUPT_ZMOT_BIT |
syundo0730 | 0:78ba160ba5f3 | 1623 | */ |
syundo0730 | 0:78ba160ba5f3 | 1624 | bool MPU9150::getIntZeroMotionStatus() { |
syundo0730 | 0:78ba160ba5f3 | 1625 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_ZMOT_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1626 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1627 | } |
syundo0730 | 0:78ba160ba5f3 | 1628 | /** Get FIFO Buffer Overflow interrupt status. |
syundo0730 | 0:78ba160ba5f3 | 1629 | * This bit automatically sets to 1 when a Free Fall interrupt has been |
syundo0730 | 0:78ba160ba5f3 | 1630 | * generated. The bit clears to 0 after the register has been read. |
syundo0730 | 0:78ba160ba5f3 | 1631 | * @return Current interrupt status |
syundo0730 | 0:78ba160ba5f3 | 1632 | * @see MPU9150_RA_INT_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1633 | * @see MPU9150_INTERRUPT_FIFO_OFLOW_BIT |
syundo0730 | 0:78ba160ba5f3 | 1634 | */ |
syundo0730 | 0:78ba160ba5f3 | 1635 | bool MPU9150::getIntFIFOBufferOverflowStatus() { |
syundo0730 | 0:78ba160ba5f3 | 1636 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_FIFO_OFLOW_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1637 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1638 | } |
syundo0730 | 0:78ba160ba5f3 | 1639 | /** Get I2C Master interrupt status. |
syundo0730 | 0:78ba160ba5f3 | 1640 | * This bit automatically sets to 1 when an I2C Master interrupt has been |
syundo0730 | 0:78ba160ba5f3 | 1641 | * generated. For a list of I2C Master interrupts, please refer to Register 54. |
syundo0730 | 0:78ba160ba5f3 | 1642 | * The bit clears to 0 after the register has been read. |
syundo0730 | 0:78ba160ba5f3 | 1643 | * @return Current interrupt status |
syundo0730 | 0:78ba160ba5f3 | 1644 | * @see MPU9150_RA_INT_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1645 | * @see MPU9150_INTERRUPT_I2C_MST_INT_BIT |
syundo0730 | 0:78ba160ba5f3 | 1646 | */ |
syundo0730 | 0:78ba160ba5f3 | 1647 | bool MPU9150::getIntI2CMasterStatus() { |
syundo0730 | 0:78ba160ba5f3 | 1648 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_I2C_MST_INT_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1649 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1650 | } |
syundo0730 | 0:78ba160ba5f3 | 1651 | /** Get Data Ready interrupt status. |
syundo0730 | 0:78ba160ba5f3 | 1652 | * This bit automatically sets to 1 when a Data Ready interrupt has been |
syundo0730 | 0:78ba160ba5f3 | 1653 | * generated. The bit clears to 0 after the register has been read. |
syundo0730 | 0:78ba160ba5f3 | 1654 | * @return Current interrupt status |
syundo0730 | 0:78ba160ba5f3 | 1655 | * @see MPU9150_RA_INT_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1656 | * @see MPU9150_INTERRUPT_DATA_RDY_BIT |
syundo0730 | 0:78ba160ba5f3 | 1657 | */ |
syundo0730 | 0:78ba160ba5f3 | 1658 | bool MPU9150::getIntDataReadyStatus() { |
syundo0730 | 0:78ba160ba5f3 | 1659 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_DATA_RDY_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1660 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1661 | } |
syundo0730 | 0:78ba160ba5f3 | 1662 | |
syundo0730 | 0:78ba160ba5f3 | 1663 | // ACCEL_*OUT_* registers |
syundo0730 | 0:78ba160ba5f3 | 1664 | |
syundo0730 | 0:78ba160ba5f3 | 1665 | /** Get raw 9-axis motion sensor readings (accel/gyro/compass). |
syundo0730 | 0:78ba160ba5f3 | 1666 | * FUNCTION NOT FULLY IMPLEMENTED YET. |
syundo0730 | 0:78ba160ba5f3 | 1667 | * @param ax 16-bit signed integer container for accelerometer X-axis value |
syundo0730 | 0:78ba160ba5f3 | 1668 | * @param ay 16-bit signed integer container for accelerometer Y-axis value |
syundo0730 | 0:78ba160ba5f3 | 1669 | * @param az 16-bit signed integer container for accelerometer Z-axis value |
syundo0730 | 0:78ba160ba5f3 | 1670 | * @param gx 16-bit signed integer container for gyroscope X-axis value |
syundo0730 | 0:78ba160ba5f3 | 1671 | * @param gy 16-bit signed integer container for gyroscope Y-axis value |
syundo0730 | 0:78ba160ba5f3 | 1672 | * @param gz 16-bit signed integer container for gyroscope Z-axis value |
syundo0730 | 0:78ba160ba5f3 | 1673 | * @param mx 16-bit signed integer container for magnetometer X-axis value |
syundo0730 | 0:78ba160ba5f3 | 1674 | * @param my 16-bit signed integer container for magnetometer Y-axis value |
syundo0730 | 0:78ba160ba5f3 | 1675 | * @param mz 16-bit signed integer container for magnetometer Z-axis value |
syundo0730 | 0:78ba160ba5f3 | 1676 | * @see getMotion6() |
syundo0730 | 0:78ba160ba5f3 | 1677 | * @see getAcceleration() |
syundo0730 | 0:78ba160ba5f3 | 1678 | * @see getRotation() |
syundo0730 | 0:78ba160ba5f3 | 1679 | * @see MPU9150_RA_ACCEL_XOUT_H |
syundo0730 | 0:78ba160ba5f3 | 1680 | */ |
syundo0730 | 0:78ba160ba5f3 | 1681 | void MPU9150::getMotion9(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz, int16_t* mx, int16_t* my, int16_t* mz) { |
syundo0730 | 0:78ba160ba5f3 | 1682 | |
syundo0730 | 0:78ba160ba5f3 | 1683 | //get accel and gyro |
syundo0730 | 0:78ba160ba5f3 | 1684 | getMotion6(ax, ay, az, gx, gy, gz); |
syundo0730 | 0:78ba160ba5f3 | 1685 | |
syundo0730 | 0:78ba160ba5f3 | 1686 | //read mag |
syundo0730 | 0:78ba160ba5f3 | 1687 | I2Cdev::writeByte(devAddr, MPU9150_RA_INT_PIN_CFG, 0x02); //set i2c bypass enable pin to true to access magnetometer |
syundo0730 | 0:78ba160ba5f3 | 1688 | wait_ms(10); |
syundo0730 | 0:78ba160ba5f3 | 1689 | I2Cdev::writeByte(MPU9150_RA_MAG_ADDRESS, 0x0A, 0x01); //enable the magnetometer |
syundo0730 | 0:78ba160ba5f3 | 1690 | wait_ms(10); |
syundo0730 | 0:78ba160ba5f3 | 1691 | I2Cdev::readBytes(MPU9150_RA_MAG_ADDRESS, MPU9150_RA_MAG_XOUT_L, 6, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1692 | *mx = (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 1693 | *my = (((int16_t)buffer[2]) << 8) | buffer[3]; |
syundo0730 | 0:78ba160ba5f3 | 1694 | *mz = (((int16_t)buffer[4]) << 8) | buffer[5]; |
syundo0730 | 0:78ba160ba5f3 | 1695 | } |
syundo0730 | 0:78ba160ba5f3 | 1696 | /** Get raw 6-axis motion sensor readings (accel/gyro). |
syundo0730 | 0:78ba160ba5f3 | 1697 | * Retrieves all currently available motion sensor values. |
syundo0730 | 0:78ba160ba5f3 | 1698 | * @param ax 16-bit signed integer container for accelerometer X-axis value |
syundo0730 | 0:78ba160ba5f3 | 1699 | * @param ay 16-bit signed integer container for accelerometer Y-axis value |
syundo0730 | 0:78ba160ba5f3 | 1700 | * @param az 16-bit signed integer container for accelerometer Z-axis value |
syundo0730 | 0:78ba160ba5f3 | 1701 | * @param gx 16-bit signed integer container for gyroscope X-axis value |
syundo0730 | 0:78ba160ba5f3 | 1702 | * @param gy 16-bit signed integer container for gyroscope Y-axis value |
syundo0730 | 0:78ba160ba5f3 | 1703 | * @param gz 16-bit signed integer container for gyroscope Z-axis value |
syundo0730 | 0:78ba160ba5f3 | 1704 | * @see getAcceleration() |
syundo0730 | 0:78ba160ba5f3 | 1705 | * @see getRotation() |
syundo0730 | 0:78ba160ba5f3 | 1706 | * @see MPU9150_RA_ACCEL_XOUT_H |
syundo0730 | 0:78ba160ba5f3 | 1707 | */ |
syundo0730 | 0:78ba160ba5f3 | 1708 | void MPU9150::getMotion6(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz) { |
syundo0730 | 0:78ba160ba5f3 | 1709 | I2Cdev::readBytes(devAddr, MPU9150_RA_ACCEL_XOUT_H, 14, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1710 | *ax = (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 1711 | *ay = (((int16_t)buffer[2]) << 8) | buffer[3]; |
syundo0730 | 0:78ba160ba5f3 | 1712 | *az = (((int16_t)buffer[4]) << 8) | buffer[5]; |
syundo0730 | 0:78ba160ba5f3 | 1713 | *gx = (((int16_t)buffer[8]) << 8) | buffer[9]; |
syundo0730 | 0:78ba160ba5f3 | 1714 | *gy = (((int16_t)buffer[10]) << 8) | buffer[11]; |
syundo0730 | 0:78ba160ba5f3 | 1715 | *gz = (((int16_t)buffer[12]) << 8) | buffer[13]; |
syundo0730 | 0:78ba160ba5f3 | 1716 | } |
syundo0730 | 0:78ba160ba5f3 | 1717 | /** Get 3-axis accelerometer readings. |
syundo0730 | 0:78ba160ba5f3 | 1718 | * These registers store the most recent accelerometer measurements. |
syundo0730 | 0:78ba160ba5f3 | 1719 | * Accelerometer measurements are written to these registers at the Sample Rate |
syundo0730 | 0:78ba160ba5f3 | 1720 | * as defined in Register 25. |
syundo0730 | 0:78ba160ba5f3 | 1721 | * |
syundo0730 | 0:78ba160ba5f3 | 1722 | * The accelerometer measurement registers, along with the temperature |
syundo0730 | 0:78ba160ba5f3 | 1723 | * measurement registers, gyroscope measurement registers, and external sensor |
syundo0730 | 0:78ba160ba5f3 | 1724 | * data registers, are composed of two sets of registers: an internal register |
syundo0730 | 0:78ba160ba5f3 | 1725 | * set and a user-facing read register set. |
syundo0730 | 0:78ba160ba5f3 | 1726 | * |
syundo0730 | 0:78ba160ba5f3 | 1727 | * The data within the accelerometer sensors' internal register set is always |
syundo0730 | 0:78ba160ba5f3 | 1728 | * updated at the Sample Rate. Meanwhile, the user-facing read register set |
syundo0730 | 0:78ba160ba5f3 | 1729 | * duplicates the internal register set's data values whenever the serial |
syundo0730 | 0:78ba160ba5f3 | 1730 | * interface is idle. This guarantees that a burst read of sensor registers will |
syundo0730 | 0:78ba160ba5f3 | 1731 | * read measurements from the same sampling instant. Note that if burst reads |
syundo0730 | 0:78ba160ba5f3 | 1732 | * are not used, the user is responsible for ensuring a set of single byte reads |
syundo0730 | 0:78ba160ba5f3 | 1733 | * correspond to a single sampling instant by checking the Data Ready interrupt. |
syundo0730 | 0:78ba160ba5f3 | 1734 | * |
syundo0730 | 0:78ba160ba5f3 | 1735 | * Each 16-bit accelerometer measurement has a full scale defined in ACCEL_FS |
syundo0730 | 0:78ba160ba5f3 | 1736 | * (Register 28). For each full scale setting, the accelerometers' sensitivity |
syundo0730 | 0:78ba160ba5f3 | 1737 | * per LSB in ACCEL_xOUT is shown in the table below: |
syundo0730 | 0:78ba160ba5f3 | 1738 | * |
syundo0730 | 0:78ba160ba5f3 | 1739 | * <pre> |
syundo0730 | 0:78ba160ba5f3 | 1740 | * AFS_SEL | Full Scale Range | LSB Sensitivity |
syundo0730 | 0:78ba160ba5f3 | 1741 | * --------+------------------+---------------- |
syundo0730 | 0:78ba160ba5f3 | 1742 | * 0 | +/- 2g | 8192 LSB/mg |
syundo0730 | 0:78ba160ba5f3 | 1743 | * 1 | +/- 4g | 4096 LSB/mg |
syundo0730 | 0:78ba160ba5f3 | 1744 | * 2 | +/- 8g | 2048 LSB/mg |
syundo0730 | 0:78ba160ba5f3 | 1745 | * 3 | +/- 16g | 1024 LSB/mg |
syundo0730 | 0:78ba160ba5f3 | 1746 | * </pre> |
syundo0730 | 0:78ba160ba5f3 | 1747 | * |
syundo0730 | 0:78ba160ba5f3 | 1748 | * @param x 16-bit signed integer container for X-axis acceleration |
syundo0730 | 0:78ba160ba5f3 | 1749 | * @param y 16-bit signed integer container for Y-axis acceleration |
syundo0730 | 0:78ba160ba5f3 | 1750 | * @param z 16-bit signed integer container for Z-axis acceleration |
syundo0730 | 0:78ba160ba5f3 | 1751 | * @see MPU9150_RA_GYRO_XOUT_H |
syundo0730 | 0:78ba160ba5f3 | 1752 | */ |
syundo0730 | 0:78ba160ba5f3 | 1753 | void MPU9150::getAcceleration(int16_t* x, int16_t* y, int16_t* z) { |
syundo0730 | 0:78ba160ba5f3 | 1754 | I2Cdev::readBytes(devAddr, MPU9150_RA_ACCEL_XOUT_H, 6, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1755 | *x = (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 1756 | *y = (((int16_t)buffer[2]) << 8) | buffer[3]; |
syundo0730 | 0:78ba160ba5f3 | 1757 | *z = (((int16_t)buffer[4]) << 8) | buffer[5]; |
syundo0730 | 0:78ba160ba5f3 | 1758 | } |
syundo0730 | 0:78ba160ba5f3 | 1759 | /** Get X-axis accelerometer reading. |
syundo0730 | 0:78ba160ba5f3 | 1760 | * @return X-axis acceleration measurement in 16-bit 2's complement format |
syundo0730 | 0:78ba160ba5f3 | 1761 | * @see getMotion6() |
syundo0730 | 0:78ba160ba5f3 | 1762 | * @see MPU9150_RA_ACCEL_XOUT_H |
syundo0730 | 0:78ba160ba5f3 | 1763 | */ |
syundo0730 | 0:78ba160ba5f3 | 1764 | int16_t MPU9150::getAccelerationX() { |
syundo0730 | 0:78ba160ba5f3 | 1765 | I2Cdev::readBytes(devAddr, MPU9150_RA_ACCEL_XOUT_H, 2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1766 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 1767 | } |
syundo0730 | 0:78ba160ba5f3 | 1768 | /** Get Y-axis accelerometer reading. |
syundo0730 | 0:78ba160ba5f3 | 1769 | * @return Y-axis acceleration measurement in 16-bit 2's complement format |
syundo0730 | 0:78ba160ba5f3 | 1770 | * @see getMotion6() |
syundo0730 | 0:78ba160ba5f3 | 1771 | * @see MPU9150_RA_ACCEL_YOUT_H |
syundo0730 | 0:78ba160ba5f3 | 1772 | */ |
syundo0730 | 0:78ba160ba5f3 | 1773 | int16_t MPU9150::getAccelerationY() { |
syundo0730 | 0:78ba160ba5f3 | 1774 | I2Cdev::readBytes(devAddr, MPU9150_RA_ACCEL_YOUT_H, 2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1775 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 1776 | } |
syundo0730 | 0:78ba160ba5f3 | 1777 | /** Get Z-axis accelerometer reading. |
syundo0730 | 0:78ba160ba5f3 | 1778 | * @return Z-axis acceleration measurement in 16-bit 2's complement format |
syundo0730 | 0:78ba160ba5f3 | 1779 | * @see getMotion6() |
syundo0730 | 0:78ba160ba5f3 | 1780 | * @see MPU9150_RA_ACCEL_ZOUT_H |
syundo0730 | 0:78ba160ba5f3 | 1781 | */ |
syundo0730 | 0:78ba160ba5f3 | 1782 | int16_t MPU9150::getAccelerationZ() { |
syundo0730 | 0:78ba160ba5f3 | 1783 | I2Cdev::readBytes(devAddr, MPU9150_RA_ACCEL_ZOUT_H, 2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1784 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 1785 | } |
syundo0730 | 0:78ba160ba5f3 | 1786 | |
syundo0730 | 0:78ba160ba5f3 | 1787 | // TEMP_OUT_* registers |
syundo0730 | 0:78ba160ba5f3 | 1788 | |
syundo0730 | 0:78ba160ba5f3 | 1789 | /** Get current internal temperature. |
syundo0730 | 0:78ba160ba5f3 | 1790 | * @return Temperature reading in 16-bit 2's complement format |
syundo0730 | 0:78ba160ba5f3 | 1791 | * @see MPU9150_RA_TEMP_OUT_H |
syundo0730 | 0:78ba160ba5f3 | 1792 | */ |
syundo0730 | 0:78ba160ba5f3 | 1793 | int16_t MPU9150::getTemperature() { |
syundo0730 | 0:78ba160ba5f3 | 1794 | I2Cdev::readBytes(devAddr, MPU9150_RA_TEMP_OUT_H, 2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1795 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 1796 | } |
syundo0730 | 0:78ba160ba5f3 | 1797 | |
syundo0730 | 0:78ba160ba5f3 | 1798 | // GYRO_*OUT_* registers |
syundo0730 | 0:78ba160ba5f3 | 1799 | |
syundo0730 | 0:78ba160ba5f3 | 1800 | /** Get 3-axis gyroscope readings. |
syundo0730 | 0:78ba160ba5f3 | 1801 | * These gyroscope measurement registers, along with the accelerometer |
syundo0730 | 0:78ba160ba5f3 | 1802 | * measurement registers, temperature measurement registers, and external sensor |
syundo0730 | 0:78ba160ba5f3 | 1803 | * data registers, are composed of two sets of registers: an internal register |
syundo0730 | 0:78ba160ba5f3 | 1804 | * set and a user-facing read register set. |
syundo0730 | 0:78ba160ba5f3 | 1805 | * The data within the gyroscope sensors' internal register set is always |
syundo0730 | 0:78ba160ba5f3 | 1806 | * updated at the Sample Rate. Meanwhile, the user-facing read register set |
syundo0730 | 0:78ba160ba5f3 | 1807 | * duplicates the internal register set's data values whenever the serial |
syundo0730 | 0:78ba160ba5f3 | 1808 | * interface is idle. This guarantees that a burst read of sensor registers will |
syundo0730 | 0:78ba160ba5f3 | 1809 | * read measurements from the same sampling instant. Note that if burst reads |
syundo0730 | 0:78ba160ba5f3 | 1810 | * are not used, the user is responsible for ensuring a set of single byte reads |
syundo0730 | 0:78ba160ba5f3 | 1811 | * correspond to a single sampling instant by checking the Data Ready interrupt. |
syundo0730 | 0:78ba160ba5f3 | 1812 | * |
syundo0730 | 0:78ba160ba5f3 | 1813 | * Each 16-bit gyroscope measurement has a full scale defined in FS_SEL |
syundo0730 | 0:78ba160ba5f3 | 1814 | * (Register 27). For each full scale setting, the gyroscopes' sensitivity per |
syundo0730 | 0:78ba160ba5f3 | 1815 | * LSB in GYRO_xOUT is shown in the table below: |
syundo0730 | 0:78ba160ba5f3 | 1816 | * |
syundo0730 | 0:78ba160ba5f3 | 1817 | * <pre> |
syundo0730 | 0:78ba160ba5f3 | 1818 | * FS_SEL | Full Scale Range | LSB Sensitivity |
syundo0730 | 0:78ba160ba5f3 | 1819 | * -------+--------------------+---------------- |
syundo0730 | 0:78ba160ba5f3 | 1820 | * 0 | +/- 250 degrees/s | 131 LSB/deg/s |
syundo0730 | 0:78ba160ba5f3 | 1821 | * 1 | +/- 500 degrees/s | 65.5 LSB/deg/s |
syundo0730 | 0:78ba160ba5f3 | 1822 | * 2 | +/- 1000 degrees/s | 32.8 LSB/deg/s |
syundo0730 | 0:78ba160ba5f3 | 1823 | * 3 | +/- 2000 degrees/s | 16.4 LSB/deg/s |
syundo0730 | 0:78ba160ba5f3 | 1824 | * </pre> |
syundo0730 | 0:78ba160ba5f3 | 1825 | * |
syundo0730 | 0:78ba160ba5f3 | 1826 | * @param x 16-bit signed integer container for X-axis rotation |
syundo0730 | 0:78ba160ba5f3 | 1827 | * @param y 16-bit signed integer container for Y-axis rotation |
syundo0730 | 0:78ba160ba5f3 | 1828 | * @param z 16-bit signed integer container for Z-axis rotation |
syundo0730 | 0:78ba160ba5f3 | 1829 | * @see getMotion6() |
syundo0730 | 0:78ba160ba5f3 | 1830 | * @see MPU9150_RA_GYRO_XOUT_H |
syundo0730 | 0:78ba160ba5f3 | 1831 | */ |
syundo0730 | 0:78ba160ba5f3 | 1832 | void MPU9150::getRotation(int16_t* x, int16_t* y, int16_t* z) { |
syundo0730 | 0:78ba160ba5f3 | 1833 | I2Cdev::readBytes(devAddr, MPU9150_RA_GYRO_XOUT_H, 6, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1834 | *x = (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 1835 | *y = (((int16_t)buffer[2]) << 8) | buffer[3]; |
syundo0730 | 0:78ba160ba5f3 | 1836 | *z = (((int16_t)buffer[4]) << 8) | buffer[5]; |
syundo0730 | 0:78ba160ba5f3 | 1837 | } |
syundo0730 | 0:78ba160ba5f3 | 1838 | /** Get X-axis gyroscope reading. |
syundo0730 | 0:78ba160ba5f3 | 1839 | * @return X-axis rotation measurement in 16-bit 2's complement format |
syundo0730 | 0:78ba160ba5f3 | 1840 | * @see getMotion6() |
syundo0730 | 0:78ba160ba5f3 | 1841 | * @see MPU9150_RA_GYRO_XOUT_H |
syundo0730 | 0:78ba160ba5f3 | 1842 | */ |
syundo0730 | 0:78ba160ba5f3 | 1843 | int16_t MPU9150::getRotationX() { |
syundo0730 | 0:78ba160ba5f3 | 1844 | I2Cdev::readBytes(devAddr, MPU9150_RA_GYRO_XOUT_H, 2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1845 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 1846 | } |
syundo0730 | 0:78ba160ba5f3 | 1847 | /** Get Y-axis gyroscope reading. |
syundo0730 | 0:78ba160ba5f3 | 1848 | * @return Y-axis rotation measurement in 16-bit 2's complement format |
syundo0730 | 0:78ba160ba5f3 | 1849 | * @see getMotion6() |
syundo0730 | 0:78ba160ba5f3 | 1850 | * @see MPU9150_RA_GYRO_YOUT_H |
syundo0730 | 0:78ba160ba5f3 | 1851 | */ |
syundo0730 | 0:78ba160ba5f3 | 1852 | int16_t MPU9150::getRotationY() { |
syundo0730 | 0:78ba160ba5f3 | 1853 | I2Cdev::readBytes(devAddr, MPU9150_RA_GYRO_YOUT_H, 2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1854 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 1855 | } |
syundo0730 | 0:78ba160ba5f3 | 1856 | /** Get Z-axis gyroscope reading. |
syundo0730 | 0:78ba160ba5f3 | 1857 | * @return Z-axis rotation measurement in 16-bit 2's complement format |
syundo0730 | 0:78ba160ba5f3 | 1858 | * @see getMotion6() |
syundo0730 | 0:78ba160ba5f3 | 1859 | * @see MPU9150_RA_GYRO_ZOUT_H |
syundo0730 | 0:78ba160ba5f3 | 1860 | */ |
syundo0730 | 0:78ba160ba5f3 | 1861 | int16_t MPU9150::getRotationZ() { |
syundo0730 | 0:78ba160ba5f3 | 1862 | I2Cdev::readBytes(devAddr, MPU9150_RA_GYRO_ZOUT_H, 2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1863 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 1864 | } |
syundo0730 | 0:78ba160ba5f3 | 1865 | |
syundo0730 | 0:78ba160ba5f3 | 1866 | // EXT_SENS_DATA_* registers |
syundo0730 | 0:78ba160ba5f3 | 1867 | |
syundo0730 | 0:78ba160ba5f3 | 1868 | /** Read single byte from external sensor data register. |
syundo0730 | 0:78ba160ba5f3 | 1869 | * These registers store data read from external sensors by the Slave 0, 1, 2, |
syundo0730 | 0:78ba160ba5f3 | 1870 | * and 3 on the auxiliary I2C interface. Data read by Slave 4 is stored in |
syundo0730 | 0:78ba160ba5f3 | 1871 | * I2C_SLV4_DI (Register 53). |
syundo0730 | 0:78ba160ba5f3 | 1872 | * |
syundo0730 | 0:78ba160ba5f3 | 1873 | * External sensor data is written to these registers at the Sample Rate as |
syundo0730 | 0:78ba160ba5f3 | 1874 | * defined in Register 25. This access rate can be reduced by using the Slave |
syundo0730 | 0:78ba160ba5f3 | 1875 | * Delay Enable registers (Register 103). |
syundo0730 | 0:78ba160ba5f3 | 1876 | * |
syundo0730 | 0:78ba160ba5f3 | 1877 | * External sensor data registers, along with the gyroscope measurement |
syundo0730 | 0:78ba160ba5f3 | 1878 | * registers, accelerometer measurement registers, and temperature measurement |
syundo0730 | 0:78ba160ba5f3 | 1879 | * registers, are composed of two sets of registers: an internal register set |
syundo0730 | 0:78ba160ba5f3 | 1880 | * and a user-facing read register set. |
syundo0730 | 0:78ba160ba5f3 | 1881 | * |
syundo0730 | 0:78ba160ba5f3 | 1882 | * The data within the external sensors' internal register set is always updated |
syundo0730 | 0:78ba160ba5f3 | 1883 | * at the Sample Rate (or the reduced access rate) whenever the serial interface |
syundo0730 | 0:78ba160ba5f3 | 1884 | * is idle. This guarantees that a burst read of sensor registers will read |
syundo0730 | 0:78ba160ba5f3 | 1885 | * measurements from the same sampling instant. Note that if burst reads are not |
syundo0730 | 0:78ba160ba5f3 | 1886 | * used, the user is responsible for ensuring a set of single byte reads |
syundo0730 | 0:78ba160ba5f3 | 1887 | * correspond to a single sampling instant by checking the Data Ready interrupt. |
syundo0730 | 0:78ba160ba5f3 | 1888 | * |
syundo0730 | 0:78ba160ba5f3 | 1889 | * Data is placed in these external sensor data registers according to |
syundo0730 | 0:78ba160ba5f3 | 1890 | * I2C_SLV0_CTRL, I2C_SLV1_CTRL, I2C_SLV2_CTRL, and I2C_SLV3_CTRL (Registers 39, |
syundo0730 | 0:78ba160ba5f3 | 1891 | * 42, 45, and 48). When more than zero bytes are read (I2C_SLVx_LEN > 0) from |
syundo0730 | 0:78ba160ba5f3 | 1892 | * an enabled slave (I2C_SLVx_EN = 1), the slave is read at the Sample Rate (as |
syundo0730 | 0:78ba160ba5f3 | 1893 | * defined in Register 25) or delayed rate (if specified in Register 52 and |
syundo0730 | 0:78ba160ba5f3 | 1894 | * 103). During each Sample cycle, slave reads are performed in order of Slave |
syundo0730 | 0:78ba160ba5f3 | 1895 | * number. If all slaves are enabled with more than zero bytes to be read, the |
syundo0730 | 0:78ba160ba5f3 | 1896 | * order will be Slave 0, followed by Slave 1, Slave 2, and Slave 3. |
syundo0730 | 0:78ba160ba5f3 | 1897 | * |
syundo0730 | 0:78ba160ba5f3 | 1898 | * Each enabled slave will have EXT_SENS_DATA registers associated with it by |
syundo0730 | 0:78ba160ba5f3 | 1899 | * number of bytes read (I2C_SLVx_LEN) in order of slave number, starting from |
syundo0730 | 0:78ba160ba5f3 | 1900 | * EXT_SENS_DATA_00. Note that this means enabling or disabling a slave may |
syundo0730 | 0:78ba160ba5f3 | 1901 | * change the higher numbered slaves' associated registers. Furthermore, if |
syundo0730 | 0:78ba160ba5f3 | 1902 | * fewer total bytes are being read from the external sensors as a result of |
syundo0730 | 0:78ba160ba5f3 | 1903 | * such a change, then the data remaining in the registers which no longer have |
syundo0730 | 0:78ba160ba5f3 | 1904 | * an associated slave device (i.e. high numbered registers) will remain in |
syundo0730 | 0:78ba160ba5f3 | 1905 | * these previously allocated registers unless reset. |
syundo0730 | 0:78ba160ba5f3 | 1906 | * |
syundo0730 | 0:78ba160ba5f3 | 1907 | * If the sum of the read lengths of all SLVx transactions exceed the number of |
syundo0730 | 0:78ba160ba5f3 | 1908 | * available EXT_SENS_DATA registers, the excess bytes will be dropped. There |
syundo0730 | 0:78ba160ba5f3 | 1909 | * are 24 EXT_SENS_DATA registers and hence the total read lengths between all |
syundo0730 | 0:78ba160ba5f3 | 1910 | * the slaves cannot be greater than 24 or some bytes will be lost. |
syundo0730 | 0:78ba160ba5f3 | 1911 | * |
syundo0730 | 0:78ba160ba5f3 | 1912 | * Note: Slave 4's behavior is distinct from that of Slaves 0-3. For further |
syundo0730 | 0:78ba160ba5f3 | 1913 | * information regarding the characteristics of Slave 4, please refer to |
syundo0730 | 0:78ba160ba5f3 | 1914 | * Registers 49 to 53. |
syundo0730 | 0:78ba160ba5f3 | 1915 | * |
syundo0730 | 0:78ba160ba5f3 | 1916 | * EXAMPLE: |
syundo0730 | 0:78ba160ba5f3 | 1917 | * Suppose that Slave 0 is enabled with 4 bytes to be read (I2C_SLV0_EN = 1 and |
syundo0730 | 0:78ba160ba5f3 | 1918 | * I2C_SLV0_LEN = 4) while Slave 1 is enabled with 2 bytes to be read so that |
syundo0730 | 0:78ba160ba5f3 | 1919 | * I2C_SLV1_EN = 1 and I2C_SLV1_LEN = 2. In such a situation, EXT_SENS_DATA _00 |
syundo0730 | 0:78ba160ba5f3 | 1920 | * through _03 will be associated with Slave 0, while EXT_SENS_DATA _04 and 05 |
syundo0730 | 0:78ba160ba5f3 | 1921 | * will be associated with Slave 1. If Slave 2 is enabled as well, registers |
syundo0730 | 0:78ba160ba5f3 | 1922 | * starting from EXT_SENS_DATA_06 will be allocated to Slave 2. |
syundo0730 | 0:78ba160ba5f3 | 1923 | * |
syundo0730 | 0:78ba160ba5f3 | 1924 | * If Slave 2 is disabled while Slave 3 is enabled in this same situation, then |
syundo0730 | 0:78ba160ba5f3 | 1925 | * registers starting from EXT_SENS_DATA_06 will be allocated to Slave 3 |
syundo0730 | 0:78ba160ba5f3 | 1926 | * instead. |
syundo0730 | 0:78ba160ba5f3 | 1927 | * |
syundo0730 | 0:78ba160ba5f3 | 1928 | * REGISTER ALLOCATION FOR DYNAMIC DISABLE VS. NORMAL DISABLE: |
syundo0730 | 0:78ba160ba5f3 | 1929 | * If a slave is disabled at any time, the space initially allocated to the |
syundo0730 | 0:78ba160ba5f3 | 1930 | * slave in the EXT_SENS_DATA register, will remain associated with that slave. |
syundo0730 | 0:78ba160ba5f3 | 1931 | * This is to avoid dynamic adjustment of the register allocation. |
syundo0730 | 0:78ba160ba5f3 | 1932 | * |
syundo0730 | 0:78ba160ba5f3 | 1933 | * The allocation of the EXT_SENS_DATA registers is recomputed only when (1) all |
syundo0730 | 0:78ba160ba5f3 | 1934 | * slaves are disabled, or (2) the I2C_MST_RST bit is set (Register 106). |
syundo0730 | 0:78ba160ba5f3 | 1935 | * |
syundo0730 | 0:78ba160ba5f3 | 1936 | * This above is also true if one of the slaves gets NACKed and stops |
syundo0730 | 0:78ba160ba5f3 | 1937 | * functioning. |
syundo0730 | 0:78ba160ba5f3 | 1938 | * |
syundo0730 | 0:78ba160ba5f3 | 1939 | * @param position Starting position (0-23) |
syundo0730 | 0:78ba160ba5f3 | 1940 | * @return Byte read from register |
syundo0730 | 0:78ba160ba5f3 | 1941 | */ |
syundo0730 | 0:78ba160ba5f3 | 1942 | uint8_t MPU9150::getExternalSensorByte(int position) { |
syundo0730 | 0:78ba160ba5f3 | 1943 | I2Cdev::readByte(devAddr, MPU9150_RA_EXT_SENS_DATA_00 + position, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1944 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1945 | } |
syundo0730 | 0:78ba160ba5f3 | 1946 | /** Read word (2 bytes) from external sensor data registers. |
syundo0730 | 0:78ba160ba5f3 | 1947 | * @param position Starting position (0-21) |
syundo0730 | 0:78ba160ba5f3 | 1948 | * @return Word read from register |
syundo0730 | 0:78ba160ba5f3 | 1949 | * @see getExternalSensorByte() |
syundo0730 | 0:78ba160ba5f3 | 1950 | */ |
syundo0730 | 0:78ba160ba5f3 | 1951 | uint16_t MPU9150::getExternalSensorWord(int position) { |
syundo0730 | 0:78ba160ba5f3 | 1952 | I2Cdev::readBytes(devAddr, MPU9150_RA_EXT_SENS_DATA_00 + position, 2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1953 | return (((uint16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 1954 | } |
syundo0730 | 0:78ba160ba5f3 | 1955 | /** Read double word (4 bytes) from external sensor data registers. |
syundo0730 | 0:78ba160ba5f3 | 1956 | * @param position Starting position (0-20) |
syundo0730 | 0:78ba160ba5f3 | 1957 | * @return Double word read from registers |
syundo0730 | 0:78ba160ba5f3 | 1958 | * @see getExternalSensorByte() |
syundo0730 | 0:78ba160ba5f3 | 1959 | */ |
syundo0730 | 0:78ba160ba5f3 | 1960 | uint32_t MPU9150::getExternalSensorDWord(int position) { |
syundo0730 | 0:78ba160ba5f3 | 1961 | I2Cdev::readBytes(devAddr, MPU9150_RA_EXT_SENS_DATA_00 + position, 4, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1962 | return (((uint32_t)buffer[0]) << 24) | (((uint32_t)buffer[1]) << 16) | (((uint16_t)buffer[2]) << 8) | buffer[3]; |
syundo0730 | 0:78ba160ba5f3 | 1963 | } |
syundo0730 | 0:78ba160ba5f3 | 1964 | |
syundo0730 | 0:78ba160ba5f3 | 1965 | // MOT_DETECT_STATUS register |
syundo0730 | 0:78ba160ba5f3 | 1966 | |
syundo0730 | 0:78ba160ba5f3 | 1967 | /** Get X-axis negative motion detection interrupt status. |
syundo0730 | 0:78ba160ba5f3 | 1968 | * @return Motion detection status |
syundo0730 | 0:78ba160ba5f3 | 1969 | * @see MPU9150_RA_MOT_DETECT_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1970 | * @see MPU9150_MOTION_MOT_XNEG_BIT |
syundo0730 | 0:78ba160ba5f3 | 1971 | */ |
syundo0730 | 0:78ba160ba5f3 | 1972 | bool MPU9150::getXNegMotionDetected() { |
syundo0730 | 0:78ba160ba5f3 | 1973 | I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_XNEG_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1974 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1975 | } |
syundo0730 | 0:78ba160ba5f3 | 1976 | /** Get X-axis positive motion detection interrupt status. |
syundo0730 | 0:78ba160ba5f3 | 1977 | * @return Motion detection status |
syundo0730 | 0:78ba160ba5f3 | 1978 | * @see MPU9150_RA_MOT_DETECT_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1979 | * @see MPU9150_MOTION_MOT_XPOS_BIT |
syundo0730 | 0:78ba160ba5f3 | 1980 | */ |
syundo0730 | 0:78ba160ba5f3 | 1981 | bool MPU9150::getXPosMotionDetected() { |
syundo0730 | 0:78ba160ba5f3 | 1982 | I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_XPOS_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1983 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1984 | } |
syundo0730 | 0:78ba160ba5f3 | 1985 | /** Get Y-axis negative motion detection interrupt status. |
syundo0730 | 0:78ba160ba5f3 | 1986 | * @return Motion detection status |
syundo0730 | 0:78ba160ba5f3 | 1987 | * @see MPU9150_RA_MOT_DETECT_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1988 | * @see MPU9150_MOTION_MOT_YNEG_BIT |
syundo0730 | 0:78ba160ba5f3 | 1989 | */ |
syundo0730 | 0:78ba160ba5f3 | 1990 | bool MPU9150::getYNegMotionDetected() { |
syundo0730 | 0:78ba160ba5f3 | 1991 | I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_YNEG_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 1992 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 1993 | } |
syundo0730 | 0:78ba160ba5f3 | 1994 | /** Get Y-axis positive motion detection interrupt status. |
syundo0730 | 0:78ba160ba5f3 | 1995 | * @return Motion detection status |
syundo0730 | 0:78ba160ba5f3 | 1996 | * @see MPU9150_RA_MOT_DETECT_STATUS |
syundo0730 | 0:78ba160ba5f3 | 1997 | * @see MPU9150_MOTION_MOT_YPOS_BIT |
syundo0730 | 0:78ba160ba5f3 | 1998 | */ |
syundo0730 | 0:78ba160ba5f3 | 1999 | bool MPU9150::getYPosMotionDetected() { |
syundo0730 | 0:78ba160ba5f3 | 2000 | I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_YPOS_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2001 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2002 | } |
syundo0730 | 0:78ba160ba5f3 | 2003 | /** Get Z-axis negative motion detection interrupt status. |
syundo0730 | 0:78ba160ba5f3 | 2004 | * @return Motion detection status |
syundo0730 | 0:78ba160ba5f3 | 2005 | * @see MPU9150_RA_MOT_DETECT_STATUS |
syundo0730 | 0:78ba160ba5f3 | 2006 | * @see MPU9150_MOTION_MOT_ZNEG_BIT |
syundo0730 | 0:78ba160ba5f3 | 2007 | */ |
syundo0730 | 0:78ba160ba5f3 | 2008 | bool MPU9150::getZNegMotionDetected() { |
syundo0730 | 0:78ba160ba5f3 | 2009 | I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_ZNEG_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2010 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2011 | } |
syundo0730 | 0:78ba160ba5f3 | 2012 | /** Get Z-axis positive motion detection interrupt status. |
syundo0730 | 0:78ba160ba5f3 | 2013 | * @return Motion detection status |
syundo0730 | 0:78ba160ba5f3 | 2014 | * @see MPU9150_RA_MOT_DETECT_STATUS |
syundo0730 | 0:78ba160ba5f3 | 2015 | * @see MPU9150_MOTION_MOT_ZPOS_BIT |
syundo0730 | 0:78ba160ba5f3 | 2016 | */ |
syundo0730 | 0:78ba160ba5f3 | 2017 | bool MPU9150::getZPosMotionDetected() { |
syundo0730 | 0:78ba160ba5f3 | 2018 | I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_ZPOS_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2019 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2020 | } |
syundo0730 | 0:78ba160ba5f3 | 2021 | /** Get zero motion detection interrupt status. |
syundo0730 | 0:78ba160ba5f3 | 2022 | * @return Motion detection status |
syundo0730 | 0:78ba160ba5f3 | 2023 | * @see MPU9150_RA_MOT_DETECT_STATUS |
syundo0730 | 0:78ba160ba5f3 | 2024 | * @see MPU9150_MOTION_MOT_ZRMOT_BIT |
syundo0730 | 0:78ba160ba5f3 | 2025 | */ |
syundo0730 | 0:78ba160ba5f3 | 2026 | bool MPU9150::getZeroMotionDetected() { |
syundo0730 | 0:78ba160ba5f3 | 2027 | I2Cdev::readBit(devAddr, MPU9150_RA_MOT_DETECT_STATUS, MPU9150_MOTION_MOT_ZRMOT_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2028 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2029 | } |
syundo0730 | 0:78ba160ba5f3 | 2030 | |
syundo0730 | 0:78ba160ba5f3 | 2031 | // I2C_SLV*_DO register |
syundo0730 | 0:78ba160ba5f3 | 2032 | |
syundo0730 | 0:78ba160ba5f3 | 2033 | /** Write byte to Data Output container for specified slave. |
syundo0730 | 0:78ba160ba5f3 | 2034 | * This register holds the output data written into Slave when Slave is set to |
syundo0730 | 0:78ba160ba5f3 | 2035 | * write mode. For further information regarding Slave control, please |
syundo0730 | 0:78ba160ba5f3 | 2036 | * refer to Registers 37 to 39 and immediately following. |
syundo0730 | 0:78ba160ba5f3 | 2037 | * @param num Slave number (0-3) |
syundo0730 | 0:78ba160ba5f3 | 2038 | * @param data Byte to write |
syundo0730 | 0:78ba160ba5f3 | 2039 | * @see MPU9150_RA_I2C_SLV0_DO |
syundo0730 | 0:78ba160ba5f3 | 2040 | */ |
syundo0730 | 0:78ba160ba5f3 | 2041 | void MPU9150::setSlaveOutputByte(uint8_t num, uint8_t data) { |
syundo0730 | 0:78ba160ba5f3 | 2042 | if (num > 3) return; |
syundo0730 | 0:78ba160ba5f3 | 2043 | I2Cdev::writeByte(devAddr, MPU9150_RA_I2C_SLV0_DO + num, data); |
syundo0730 | 0:78ba160ba5f3 | 2044 | } |
syundo0730 | 0:78ba160ba5f3 | 2045 | |
syundo0730 | 0:78ba160ba5f3 | 2046 | // I2C_MST_DELAY_CTRL register |
syundo0730 | 0:78ba160ba5f3 | 2047 | |
syundo0730 | 0:78ba160ba5f3 | 2048 | /** Get external data shadow delay enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2049 | * This register is used to specify the timing of external sensor data |
syundo0730 | 0:78ba160ba5f3 | 2050 | * shadowing. When DELAY_ES_SHADOW is set to 1, shadowing of external |
syundo0730 | 0:78ba160ba5f3 | 2051 | * sensor data is delayed until all data has been received. |
syundo0730 | 0:78ba160ba5f3 | 2052 | * @return Current external data shadow delay enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2053 | * @see MPU9150_RA_I2C_MST_DELAY_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2054 | * @see MPU9150_DELAYCTRL_DELAY_ES_SHADOW_BIT |
syundo0730 | 0:78ba160ba5f3 | 2055 | */ |
syundo0730 | 0:78ba160ba5f3 | 2056 | bool MPU9150::getExternalShadowDelayEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 2057 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_DELAY_CTRL, MPU9150_DELAYCTRL_DELAY_ES_SHADOW_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2058 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2059 | } |
syundo0730 | 0:78ba160ba5f3 | 2060 | /** Set external data shadow delay enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2061 | * @param enabled New external data shadow delay enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2062 | * @see getExternalShadowDelayEnabled() |
syundo0730 | 0:78ba160ba5f3 | 2063 | * @see MPU9150_RA_I2C_MST_DELAY_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2064 | * @see MPU9150_DELAYCTRL_DELAY_ES_SHADOW_BIT |
syundo0730 | 0:78ba160ba5f3 | 2065 | */ |
syundo0730 | 0:78ba160ba5f3 | 2066 | void MPU9150::setExternalShadowDelayEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2067 | I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_DELAY_CTRL, MPU9150_DELAYCTRL_DELAY_ES_SHADOW_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2068 | } |
syundo0730 | 0:78ba160ba5f3 | 2069 | /** Get slave delay enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2070 | * When a particular slave delay is enabled, the rate of access for the that |
syundo0730 | 0:78ba160ba5f3 | 2071 | * slave device is reduced. When a slave's access rate is decreased relative to |
syundo0730 | 0:78ba160ba5f3 | 2072 | * the Sample Rate, the slave is accessed every: |
syundo0730 | 0:78ba160ba5f3 | 2073 | * |
syundo0730 | 0:78ba160ba5f3 | 2074 | * 1 / (1 + I2C_MST_DLY) Samples |
syundo0730 | 0:78ba160ba5f3 | 2075 | * |
syundo0730 | 0:78ba160ba5f3 | 2076 | * This base Sample Rate in turn is determined by SMPLRT_DIV (register * 25) |
syundo0730 | 0:78ba160ba5f3 | 2077 | * and DLPF_CFG (register 26). |
syundo0730 | 0:78ba160ba5f3 | 2078 | * |
syundo0730 | 0:78ba160ba5f3 | 2079 | * For further information regarding I2C_MST_DLY, please refer to register 52. |
syundo0730 | 0:78ba160ba5f3 | 2080 | * For further information regarding the Sample Rate, please refer to register 25. |
syundo0730 | 0:78ba160ba5f3 | 2081 | * |
syundo0730 | 0:78ba160ba5f3 | 2082 | * @param num Slave number (0-4) |
syundo0730 | 0:78ba160ba5f3 | 2083 | * @return Current slave delay enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2084 | * @see MPU9150_RA_I2C_MST_DELAY_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2085 | * @see MPU9150_DELAYCTRL_I2C_SLV0_DLY_EN_BIT |
syundo0730 | 0:78ba160ba5f3 | 2086 | */ |
syundo0730 | 0:78ba160ba5f3 | 2087 | bool MPU9150::getSlaveDelayEnabled(uint8_t num) { |
syundo0730 | 0:78ba160ba5f3 | 2088 | // MPU9150_DELAYCTRL_I2C_SLV4_DLY_EN_BIT is 4, SLV3 is 3, etc. |
syundo0730 | 0:78ba160ba5f3 | 2089 | if (num > 4) return 0; |
syundo0730 | 0:78ba160ba5f3 | 2090 | I2Cdev::readBit(devAddr, MPU9150_RA_I2C_MST_DELAY_CTRL, num, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2091 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2092 | } |
syundo0730 | 0:78ba160ba5f3 | 2093 | /** Set slave delay enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2094 | * @param num Slave number (0-4) |
syundo0730 | 0:78ba160ba5f3 | 2095 | * @param enabled New slave delay enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2096 | * @see MPU9150_RA_I2C_MST_DELAY_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2097 | * @see MPU9150_DELAYCTRL_I2C_SLV0_DLY_EN_BIT |
syundo0730 | 0:78ba160ba5f3 | 2098 | */ |
syundo0730 | 0:78ba160ba5f3 | 2099 | void MPU9150::setSlaveDelayEnabled(uint8_t num, bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2100 | I2Cdev::writeBit(devAddr, MPU9150_RA_I2C_MST_DELAY_CTRL, num, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2101 | } |
syundo0730 | 0:78ba160ba5f3 | 2102 | |
syundo0730 | 0:78ba160ba5f3 | 2103 | // SIGNAL_PATH_RESET register |
syundo0730 | 0:78ba160ba5f3 | 2104 | |
syundo0730 | 0:78ba160ba5f3 | 2105 | /** Reset gyroscope signal path. |
syundo0730 | 0:78ba160ba5f3 | 2106 | * The reset will revert the signal path analog to digital converters and |
syundo0730 | 0:78ba160ba5f3 | 2107 | * filters to their power up configurations. |
syundo0730 | 0:78ba160ba5f3 | 2108 | * @see MPU9150_RA_SIGNAL_PATH_RESET |
syundo0730 | 0:78ba160ba5f3 | 2109 | * @see MPU9150_PATHRESET_GYRO_RESET_BIT |
syundo0730 | 0:78ba160ba5f3 | 2110 | */ |
syundo0730 | 0:78ba160ba5f3 | 2111 | void MPU9150::resetGyroscopePath() { |
syundo0730 | 0:78ba160ba5f3 | 2112 | I2Cdev::writeBit(devAddr, MPU9150_RA_SIGNAL_PATH_RESET, MPU9150_PATHRESET_GYRO_RESET_BIT, true); |
syundo0730 | 0:78ba160ba5f3 | 2113 | } |
syundo0730 | 0:78ba160ba5f3 | 2114 | /** Reset accelerometer signal path. |
syundo0730 | 0:78ba160ba5f3 | 2115 | * The reset will revert the signal path analog to digital converters and |
syundo0730 | 0:78ba160ba5f3 | 2116 | * filters to their power up configurations. |
syundo0730 | 0:78ba160ba5f3 | 2117 | * @see MPU9150_RA_SIGNAL_PATH_RESET |
syundo0730 | 0:78ba160ba5f3 | 2118 | * @see MPU9150_PATHRESET_ACCEL_RESET_BIT |
syundo0730 | 0:78ba160ba5f3 | 2119 | */ |
syundo0730 | 0:78ba160ba5f3 | 2120 | void MPU9150::resetAccelerometerPath() { |
syundo0730 | 0:78ba160ba5f3 | 2121 | I2Cdev::writeBit(devAddr, MPU9150_RA_SIGNAL_PATH_RESET, MPU9150_PATHRESET_ACCEL_RESET_BIT, true); |
syundo0730 | 0:78ba160ba5f3 | 2122 | } |
syundo0730 | 0:78ba160ba5f3 | 2123 | /** Reset temperature sensor signal path. |
syundo0730 | 0:78ba160ba5f3 | 2124 | * The reset will revert the signal path analog to digital converters and |
syundo0730 | 0:78ba160ba5f3 | 2125 | * filters to their power up configurations. |
syundo0730 | 0:78ba160ba5f3 | 2126 | * @see MPU9150_RA_SIGNAL_PATH_RESET |
syundo0730 | 0:78ba160ba5f3 | 2127 | * @see MPU9150_PATHRESET_TEMP_RESET_BIT |
syundo0730 | 0:78ba160ba5f3 | 2128 | */ |
syundo0730 | 0:78ba160ba5f3 | 2129 | void MPU9150::resetTemperaturePath() { |
syundo0730 | 0:78ba160ba5f3 | 2130 | I2Cdev::writeBit(devAddr, MPU9150_RA_SIGNAL_PATH_RESET, MPU9150_PATHRESET_TEMP_RESET_BIT, true); |
syundo0730 | 0:78ba160ba5f3 | 2131 | } |
syundo0730 | 0:78ba160ba5f3 | 2132 | |
syundo0730 | 0:78ba160ba5f3 | 2133 | // MOT_DETECT_CTRL register |
syundo0730 | 0:78ba160ba5f3 | 2134 | |
syundo0730 | 0:78ba160ba5f3 | 2135 | /** Get accelerometer power-on delay. |
syundo0730 | 0:78ba160ba5f3 | 2136 | * The accelerometer data path provides samples to the sensor registers, Motion |
syundo0730 | 0:78ba160ba5f3 | 2137 | * detection, Zero Motion detection, and Free Fall detection modules. The |
syundo0730 | 0:78ba160ba5f3 | 2138 | * signal path contains filters which must be flushed on wake-up with new |
syundo0730 | 0:78ba160ba5f3 | 2139 | * samples before the detection modules begin operations. The default wake-up |
syundo0730 | 0:78ba160ba5f3 | 2140 | * delay, of 4ms can be lengthened by up to 3ms. This additional delay is |
syundo0730 | 0:78ba160ba5f3 | 2141 | * specified in ACCEL_ON_DELAY in units of 1 LSB = 1 ms. The user may select |
syundo0730 | 0:78ba160ba5f3 | 2142 | * any value above zero unless instructed otherwise by InvenSense. Please refer |
syundo0730 | 0:78ba160ba5f3 | 2143 | * to Section 8 of the MPU-6000/MPU-9150 Product Specification document for |
syundo0730 | 0:78ba160ba5f3 | 2144 | * further information regarding the detection modules. |
syundo0730 | 0:78ba160ba5f3 | 2145 | * @return Current accelerometer power-on delay |
syundo0730 | 0:78ba160ba5f3 | 2146 | * @see MPU9150_RA_MOT_DETECT_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2147 | * @see MPU9150_DETECT_ACCEL_ON_DELAY_BIT |
syundo0730 | 0:78ba160ba5f3 | 2148 | */ |
syundo0730 | 0:78ba160ba5f3 | 2149 | uint8_t MPU9150::getAccelerometerPowerOnDelay() { |
syundo0730 | 0:78ba160ba5f3 | 2150 | I2Cdev::readBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_ACCEL_ON_DELAY_BIT, MPU9150_DETECT_ACCEL_ON_DELAY_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2151 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2152 | } |
syundo0730 | 0:78ba160ba5f3 | 2153 | /** Set accelerometer power-on delay. |
syundo0730 | 0:78ba160ba5f3 | 2154 | * @param delay New accelerometer power-on delay (0-3) |
syundo0730 | 0:78ba160ba5f3 | 2155 | * @see getAccelerometerPowerOnDelay() |
syundo0730 | 0:78ba160ba5f3 | 2156 | * @see MPU9150_RA_MOT_DETECT_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2157 | * @see MPU9150_DETECT_ACCEL_ON_DELAY_BIT |
syundo0730 | 0:78ba160ba5f3 | 2158 | */ |
syundo0730 | 0:78ba160ba5f3 | 2159 | void MPU9150::setAccelerometerPowerOnDelay(uint8_t delay) { |
syundo0730 | 0:78ba160ba5f3 | 2160 | I2Cdev::writeBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_ACCEL_ON_DELAY_BIT, MPU9150_DETECT_ACCEL_ON_DELAY_LENGTH, delay); |
syundo0730 | 0:78ba160ba5f3 | 2161 | } |
syundo0730 | 0:78ba160ba5f3 | 2162 | /** Get Free Fall detection counter decrement configuration. |
syundo0730 | 0:78ba160ba5f3 | 2163 | * Detection is registered by the Free Fall detection module after accelerometer |
syundo0730 | 0:78ba160ba5f3 | 2164 | * measurements meet their respective threshold conditions over a specified |
syundo0730 | 0:78ba160ba5f3 | 2165 | * number of samples. When the threshold conditions are met, the corresponding |
syundo0730 | 0:78ba160ba5f3 | 2166 | * detection counter increments by 1. The user may control the rate at which the |
syundo0730 | 0:78ba160ba5f3 | 2167 | * detection counter decrements when the threshold condition is not met by |
syundo0730 | 0:78ba160ba5f3 | 2168 | * configuring FF_COUNT. The decrement rate can be set according to the |
syundo0730 | 0:78ba160ba5f3 | 2169 | * following table: |
syundo0730 | 0:78ba160ba5f3 | 2170 | * |
syundo0730 | 0:78ba160ba5f3 | 2171 | * <pre> |
syundo0730 | 0:78ba160ba5f3 | 2172 | * FF_COUNT | Counter Decrement |
syundo0730 | 0:78ba160ba5f3 | 2173 | * ---------+------------------ |
syundo0730 | 0:78ba160ba5f3 | 2174 | * 0 | Reset |
syundo0730 | 0:78ba160ba5f3 | 2175 | * 1 | 1 |
syundo0730 | 0:78ba160ba5f3 | 2176 | * 2 | 2 |
syundo0730 | 0:78ba160ba5f3 | 2177 | * 3 | 4 |
syundo0730 | 0:78ba160ba5f3 | 2178 | * </pre> |
syundo0730 | 0:78ba160ba5f3 | 2179 | * |
syundo0730 | 0:78ba160ba5f3 | 2180 | * When FF_COUNT is configured to 0 (reset), any non-qualifying sample will |
syundo0730 | 0:78ba160ba5f3 | 2181 | * reset the counter to 0. For further information on Free Fall detection, |
syundo0730 | 0:78ba160ba5f3 | 2182 | * please refer to Registers 29 to 32. |
syundo0730 | 0:78ba160ba5f3 | 2183 | * |
syundo0730 | 0:78ba160ba5f3 | 2184 | * @return Current decrement configuration |
syundo0730 | 0:78ba160ba5f3 | 2185 | * @see MPU9150_RA_MOT_DETECT_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2186 | * @see MPU9150_DETECT_FF_COUNT_BIT |
syundo0730 | 0:78ba160ba5f3 | 2187 | */ |
syundo0730 | 0:78ba160ba5f3 | 2188 | uint8_t MPU9150::getFreefallDetectionCounterDecrement() { |
syundo0730 | 0:78ba160ba5f3 | 2189 | I2Cdev::readBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_FF_COUNT_BIT, MPU9150_DETECT_FF_COUNT_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2190 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2191 | } |
syundo0730 | 0:78ba160ba5f3 | 2192 | /** Set Free Fall detection counter decrement configuration. |
syundo0730 | 0:78ba160ba5f3 | 2193 | * @param decrement New decrement configuration value |
syundo0730 | 0:78ba160ba5f3 | 2194 | * @see getFreefallDetectionCounterDecrement() |
syundo0730 | 0:78ba160ba5f3 | 2195 | * @see MPU9150_RA_MOT_DETECT_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2196 | * @see MPU9150_DETECT_FF_COUNT_BIT |
syundo0730 | 0:78ba160ba5f3 | 2197 | */ |
syundo0730 | 0:78ba160ba5f3 | 2198 | void MPU9150::setFreefallDetectionCounterDecrement(uint8_t decrement) { |
syundo0730 | 0:78ba160ba5f3 | 2199 | I2Cdev::writeBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_FF_COUNT_BIT, MPU9150_DETECT_FF_COUNT_LENGTH, decrement); |
syundo0730 | 0:78ba160ba5f3 | 2200 | } |
syundo0730 | 0:78ba160ba5f3 | 2201 | /** Get Motion detection counter decrement configuration. |
syundo0730 | 0:78ba160ba5f3 | 2202 | * Detection is registered by the Motion detection module after accelerometer |
syundo0730 | 0:78ba160ba5f3 | 2203 | * measurements meet their respective threshold conditions over a specified |
syundo0730 | 0:78ba160ba5f3 | 2204 | * number of samples. When the threshold conditions are met, the corresponding |
syundo0730 | 0:78ba160ba5f3 | 2205 | * detection counter increments by 1. The user may control the rate at which the |
syundo0730 | 0:78ba160ba5f3 | 2206 | * detection counter decrements when the threshold condition is not met by |
syundo0730 | 0:78ba160ba5f3 | 2207 | * configuring MOT_COUNT. The decrement rate can be set according to the |
syundo0730 | 0:78ba160ba5f3 | 2208 | * following table: |
syundo0730 | 0:78ba160ba5f3 | 2209 | * |
syundo0730 | 0:78ba160ba5f3 | 2210 | * <pre> |
syundo0730 | 0:78ba160ba5f3 | 2211 | * MOT_COUNT | Counter Decrement |
syundo0730 | 0:78ba160ba5f3 | 2212 | * ----------+------------------ |
syundo0730 | 0:78ba160ba5f3 | 2213 | * 0 | Reset |
syundo0730 | 0:78ba160ba5f3 | 2214 | * 1 | 1 |
syundo0730 | 0:78ba160ba5f3 | 2215 | * 2 | 2 |
syundo0730 | 0:78ba160ba5f3 | 2216 | * 3 | 4 |
syundo0730 | 0:78ba160ba5f3 | 2217 | * </pre> |
syundo0730 | 0:78ba160ba5f3 | 2218 | * |
syundo0730 | 0:78ba160ba5f3 | 2219 | * When MOT_COUNT is configured to 0 (reset), any non-qualifying sample will |
syundo0730 | 0:78ba160ba5f3 | 2220 | * reset the counter to 0. For further information on Motion detection, |
syundo0730 | 0:78ba160ba5f3 | 2221 | * please refer to Registers 29 to 32. |
syundo0730 | 0:78ba160ba5f3 | 2222 | * |
syundo0730 | 0:78ba160ba5f3 | 2223 | */ |
syundo0730 | 0:78ba160ba5f3 | 2224 | uint8_t MPU9150::getMotionDetectionCounterDecrement() { |
syundo0730 | 0:78ba160ba5f3 | 2225 | I2Cdev::readBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_MOT_COUNT_BIT, MPU9150_DETECT_MOT_COUNT_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2226 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2227 | } |
syundo0730 | 0:78ba160ba5f3 | 2228 | /** Set Motion detection counter decrement configuration. |
syundo0730 | 0:78ba160ba5f3 | 2229 | * @param decrement New decrement configuration value |
syundo0730 | 0:78ba160ba5f3 | 2230 | * @see getMotionDetectionCounterDecrement() |
syundo0730 | 0:78ba160ba5f3 | 2231 | * @see MPU9150_RA_MOT_DETECT_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2232 | * @see MPU9150_DETECT_MOT_COUNT_BIT |
syundo0730 | 0:78ba160ba5f3 | 2233 | */ |
syundo0730 | 0:78ba160ba5f3 | 2234 | void MPU9150::setMotionDetectionCounterDecrement(uint8_t decrement) { |
syundo0730 | 0:78ba160ba5f3 | 2235 | I2Cdev::writeBits(devAddr, MPU9150_RA_MOT_DETECT_CTRL, MPU9150_DETECT_MOT_COUNT_BIT, MPU9150_DETECT_MOT_COUNT_LENGTH, decrement); |
syundo0730 | 0:78ba160ba5f3 | 2236 | } |
syundo0730 | 0:78ba160ba5f3 | 2237 | |
syundo0730 | 0:78ba160ba5f3 | 2238 | // USER_CTRL register |
syundo0730 | 0:78ba160ba5f3 | 2239 | |
syundo0730 | 0:78ba160ba5f3 | 2240 | /** Get FIFO enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2241 | * When this bit is set to 0, the FIFO buffer is disabled. The FIFO buffer |
syundo0730 | 0:78ba160ba5f3 | 2242 | * cannot be written to or read from while disabled. The FIFO buffer's state |
syundo0730 | 0:78ba160ba5f3 | 2243 | * does not change unless the MPU-60X0 is power cycled. |
syundo0730 | 0:78ba160ba5f3 | 2244 | * @return Current FIFO enabled status |
syundo0730 | 0:78ba160ba5f3 | 2245 | * @see MPU9150_RA_USER_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2246 | * @see MPU9150_USERCTRL_FIFO_EN_BIT |
syundo0730 | 0:78ba160ba5f3 | 2247 | */ |
syundo0730 | 0:78ba160ba5f3 | 2248 | bool MPU9150::getFIFOEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 2249 | I2Cdev::readBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_FIFO_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2250 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2251 | } |
syundo0730 | 0:78ba160ba5f3 | 2252 | /** Set FIFO enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2253 | * @param enabled New FIFO enabled status |
syundo0730 | 0:78ba160ba5f3 | 2254 | * @see getFIFOEnabled() |
syundo0730 | 0:78ba160ba5f3 | 2255 | * @see MPU9150_RA_USER_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2256 | * @see MPU9150_USERCTRL_FIFO_EN_BIT |
syundo0730 | 0:78ba160ba5f3 | 2257 | */ |
syundo0730 | 0:78ba160ba5f3 | 2258 | void MPU9150::setFIFOEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2259 | I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_FIFO_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2260 | } |
syundo0730 | 0:78ba160ba5f3 | 2261 | /** Get I2C Master Mode enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2262 | * When this mode is enabled, the MPU-60X0 acts as the I2C Master to the |
syundo0730 | 0:78ba160ba5f3 | 2263 | * external sensor slave devices on the auxiliary I2C bus. When this bit is |
syundo0730 | 0:78ba160ba5f3 | 2264 | * cleared to 0, the auxiliary I2C bus lines (AUX_DA and AUX_CL) are logically |
syundo0730 | 0:78ba160ba5f3 | 2265 | * driven by the primary I2C bus (SDA and SCL). This is a precondition to |
syundo0730 | 0:78ba160ba5f3 | 2266 | * enabling Bypass Mode. For further information regarding Bypass Mode, please |
syundo0730 | 0:78ba160ba5f3 | 2267 | * refer to Register 55. |
syundo0730 | 0:78ba160ba5f3 | 2268 | * @return Current I2C Master Mode enabled status |
syundo0730 | 0:78ba160ba5f3 | 2269 | * @see MPU9150_RA_USER_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2270 | * @see MPU9150_USERCTRL_I2C_MST_EN_BIT |
syundo0730 | 0:78ba160ba5f3 | 2271 | */ |
syundo0730 | 0:78ba160ba5f3 | 2272 | bool MPU9150::getI2CMasterModeEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 2273 | I2Cdev::readBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_I2C_MST_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2274 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2275 | } |
syundo0730 | 0:78ba160ba5f3 | 2276 | /** Set I2C Master Mode enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2277 | * @param enabled New I2C Master Mode enabled status |
syundo0730 | 0:78ba160ba5f3 | 2278 | * @see getI2CMasterModeEnabled() |
syundo0730 | 0:78ba160ba5f3 | 2279 | * @see MPU9150_RA_USER_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2280 | * @see MPU9150_USERCTRL_I2C_MST_EN_BIT |
syundo0730 | 0:78ba160ba5f3 | 2281 | */ |
syundo0730 | 0:78ba160ba5f3 | 2282 | void MPU9150::setI2CMasterModeEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2283 | I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_I2C_MST_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2284 | } |
syundo0730 | 0:78ba160ba5f3 | 2285 | /** Switch from I2C to SPI mode (MPU-6000 only) |
syundo0730 | 0:78ba160ba5f3 | 2286 | * If this is set, the primary SPI interface will be enabled in place of the |
syundo0730 | 0:78ba160ba5f3 | 2287 | * disabled primary I2C interface. |
syundo0730 | 0:78ba160ba5f3 | 2288 | */ |
syundo0730 | 0:78ba160ba5f3 | 2289 | void MPU9150::switchSPIEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2290 | I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_I2C_IF_DIS_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2291 | } |
syundo0730 | 0:78ba160ba5f3 | 2292 | /** Reset the FIFO. |
syundo0730 | 0:78ba160ba5f3 | 2293 | * This bit resets the FIFO buffer when set to 1 while FIFO_EN equals 0. This |
syundo0730 | 0:78ba160ba5f3 | 2294 | * bit automatically clears to 0 after the reset has been triggered. |
syundo0730 | 0:78ba160ba5f3 | 2295 | * @see MPU9150_RA_USER_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2296 | * @see MPU9150_USERCTRL_FIFO_RESET_BIT |
syundo0730 | 0:78ba160ba5f3 | 2297 | */ |
syundo0730 | 0:78ba160ba5f3 | 2298 | void MPU9150::resetFIFO() { |
syundo0730 | 0:78ba160ba5f3 | 2299 | I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_FIFO_RESET_BIT, true); |
syundo0730 | 0:78ba160ba5f3 | 2300 | } |
syundo0730 | 0:78ba160ba5f3 | 2301 | /** Reset the I2C Master. |
syundo0730 | 0:78ba160ba5f3 | 2302 | * This bit resets the I2C Master when set to 1 while I2C_MST_EN equals 0. |
syundo0730 | 0:78ba160ba5f3 | 2303 | * This bit automatically clears to 0 after the reset has been triggered. |
syundo0730 | 0:78ba160ba5f3 | 2304 | * @see MPU9150_RA_USER_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2305 | * @see MPU9150_USERCTRL_I2C_MST_RESET_BIT |
syundo0730 | 0:78ba160ba5f3 | 2306 | */ |
syundo0730 | 0:78ba160ba5f3 | 2307 | void MPU9150::resetI2CMaster() { |
syundo0730 | 0:78ba160ba5f3 | 2308 | I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_I2C_MST_RESET_BIT, true); |
syundo0730 | 0:78ba160ba5f3 | 2309 | } |
syundo0730 | 0:78ba160ba5f3 | 2310 | /** Reset all sensor registers and signal paths. |
syundo0730 | 0:78ba160ba5f3 | 2311 | * When set to 1, this bit resets the signal paths for all sensors (gyroscopes, |
syundo0730 | 0:78ba160ba5f3 | 2312 | * accelerometers, and temperature sensor). This operation will also clear the |
syundo0730 | 0:78ba160ba5f3 | 2313 | * sensor registers. This bit automatically clears to 0 after the reset has been |
syundo0730 | 0:78ba160ba5f3 | 2314 | * triggered. |
syundo0730 | 0:78ba160ba5f3 | 2315 | * |
syundo0730 | 0:78ba160ba5f3 | 2316 | * When resetting only the signal path (and not the sensor registers), please |
syundo0730 | 0:78ba160ba5f3 | 2317 | * use Register 104, SIGNAL_PATH_RESET. |
syundo0730 | 0:78ba160ba5f3 | 2318 | * |
syundo0730 | 0:78ba160ba5f3 | 2319 | * @see MPU9150_RA_USER_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2320 | * @see MPU9150_USERCTRL_SIG_COND_RESET_BIT |
syundo0730 | 0:78ba160ba5f3 | 2321 | */ |
syundo0730 | 0:78ba160ba5f3 | 2322 | void MPU9150::resetSensors() { |
syundo0730 | 0:78ba160ba5f3 | 2323 | I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_SIG_COND_RESET_BIT, true); |
syundo0730 | 0:78ba160ba5f3 | 2324 | } |
syundo0730 | 0:78ba160ba5f3 | 2325 | |
syundo0730 | 0:78ba160ba5f3 | 2326 | // PWR_MGMT_1 register |
syundo0730 | 0:78ba160ba5f3 | 2327 | |
syundo0730 | 0:78ba160ba5f3 | 2328 | /** Trigger a full device reset. |
syundo0730 | 0:78ba160ba5f3 | 2329 | * A small delay of ~50ms may be desirable after triggering a reset. |
syundo0730 | 0:78ba160ba5f3 | 2330 | * @see MPU9150_RA_PWR_MGMT_1 |
syundo0730 | 0:78ba160ba5f3 | 2331 | * @see MPU9150_PWR1_DEVICE_RESET_BIT |
syundo0730 | 0:78ba160ba5f3 | 2332 | */ |
syundo0730 | 0:78ba160ba5f3 | 2333 | void MPU9150::reset() { |
syundo0730 | 0:78ba160ba5f3 | 2334 | I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_DEVICE_RESET_BIT, true); |
syundo0730 | 0:78ba160ba5f3 | 2335 | } |
syundo0730 | 0:78ba160ba5f3 | 2336 | /** Get sleep mode status. |
syundo0730 | 0:78ba160ba5f3 | 2337 | * Setting the SLEEP bit in the register puts the device into very low power |
syundo0730 | 0:78ba160ba5f3 | 2338 | * sleep mode. In this mode, only the serial interface and internal registers |
syundo0730 | 0:78ba160ba5f3 | 2339 | * remain active, allowing for a very low standby current. Clearing this bit |
syundo0730 | 0:78ba160ba5f3 | 2340 | * puts the device back into normal mode. To save power, the individual standby |
syundo0730 | 0:78ba160ba5f3 | 2341 | * selections for each of the gyros should be used if any gyro axis is not used |
syundo0730 | 0:78ba160ba5f3 | 2342 | * by the application. |
syundo0730 | 0:78ba160ba5f3 | 2343 | * @return Current sleep mode enabled status |
syundo0730 | 0:78ba160ba5f3 | 2344 | * @see MPU9150_RA_PWR_MGMT_1 |
syundo0730 | 0:78ba160ba5f3 | 2345 | * @see MPU9150_PWR1_SLEEP_BIT |
syundo0730 | 0:78ba160ba5f3 | 2346 | */ |
syundo0730 | 0:78ba160ba5f3 | 2347 | bool MPU9150::getSleepEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 2348 | I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_SLEEP_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2349 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2350 | } |
syundo0730 | 0:78ba160ba5f3 | 2351 | /** Set sleep mode status. |
syundo0730 | 0:78ba160ba5f3 | 2352 | * @param enabled New sleep mode enabled status |
syundo0730 | 0:78ba160ba5f3 | 2353 | * @see getSleepEnabled() |
syundo0730 | 0:78ba160ba5f3 | 2354 | * @see MPU9150_RA_PWR_MGMT_1 |
syundo0730 | 0:78ba160ba5f3 | 2355 | * @see MPU9150_PWR1_SLEEP_BIT |
syundo0730 | 0:78ba160ba5f3 | 2356 | */ |
syundo0730 | 0:78ba160ba5f3 | 2357 | void MPU9150::setSleepEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2358 | I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_SLEEP_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2359 | } |
syundo0730 | 0:78ba160ba5f3 | 2360 | /** Get wake cycle enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2361 | * When this bit is set to 1 and SLEEP is disabled, the MPU-60X0 will cycle |
syundo0730 | 0:78ba160ba5f3 | 2362 | * between sleep mode and waking up to take a single sample of data from active |
syundo0730 | 0:78ba160ba5f3 | 2363 | * sensors at a rate determined by LP_WAKE_CTRL (register 108). |
syundo0730 | 0:78ba160ba5f3 | 2364 | * @return Current sleep mode enabled status |
syundo0730 | 0:78ba160ba5f3 | 2365 | * @see MPU9150_RA_PWR_MGMT_1 |
syundo0730 | 0:78ba160ba5f3 | 2366 | * @see MPU9150_PWR1_CYCLE_BIT |
syundo0730 | 0:78ba160ba5f3 | 2367 | */ |
syundo0730 | 0:78ba160ba5f3 | 2368 | bool MPU9150::getWakeCycleEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 2369 | I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_CYCLE_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2370 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2371 | } |
syundo0730 | 0:78ba160ba5f3 | 2372 | /** Set wake cycle enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2373 | * @param enabled New sleep mode enabled status |
syundo0730 | 0:78ba160ba5f3 | 2374 | * @see getWakeCycleEnabled() |
syundo0730 | 0:78ba160ba5f3 | 2375 | * @see MPU9150_RA_PWR_MGMT_1 |
syundo0730 | 0:78ba160ba5f3 | 2376 | * @see MPU9150_PWR1_CYCLE_BIT |
syundo0730 | 0:78ba160ba5f3 | 2377 | */ |
syundo0730 | 0:78ba160ba5f3 | 2378 | void MPU9150::setWakeCycleEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2379 | I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_CYCLE_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2380 | } |
syundo0730 | 0:78ba160ba5f3 | 2381 | /** Get temperature sensor enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2382 | * Control the usage of the internal temperature sensor. |
syundo0730 | 0:78ba160ba5f3 | 2383 | * |
syundo0730 | 0:78ba160ba5f3 | 2384 | * Note: this register stores the *disabled* value, but for consistency with the |
syundo0730 | 0:78ba160ba5f3 | 2385 | * rest of the code, the function is named and used with standard true/false |
syundo0730 | 0:78ba160ba5f3 | 2386 | * values to indicate whether the sensor is enabled or disabled, respectively. |
syundo0730 | 0:78ba160ba5f3 | 2387 | * |
syundo0730 | 0:78ba160ba5f3 | 2388 | * @return Current temperature sensor enabled status |
syundo0730 | 0:78ba160ba5f3 | 2389 | * @see MPU9150_RA_PWR_MGMT_1 |
syundo0730 | 0:78ba160ba5f3 | 2390 | * @see MPU9150_PWR1_TEMP_DIS_BIT |
syundo0730 | 0:78ba160ba5f3 | 2391 | */ |
syundo0730 | 0:78ba160ba5f3 | 2392 | bool MPU9150::getTempSensorEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 2393 | I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_TEMP_DIS_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2394 | return buffer[0] == 0; // 1 is actually disabled here |
syundo0730 | 0:78ba160ba5f3 | 2395 | } |
syundo0730 | 0:78ba160ba5f3 | 2396 | /** Set temperature sensor enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2397 | * Note: this register stores the *disabled* value, but for consistency with the |
syundo0730 | 0:78ba160ba5f3 | 2398 | * rest of the code, the function is named and used with standard true/false |
syundo0730 | 0:78ba160ba5f3 | 2399 | * values to indicate whether the sensor is enabled or disabled, respectively. |
syundo0730 | 0:78ba160ba5f3 | 2400 | * |
syundo0730 | 0:78ba160ba5f3 | 2401 | * @param enabled New temperature sensor enabled status |
syundo0730 | 0:78ba160ba5f3 | 2402 | * @see getTempSensorEnabled() |
syundo0730 | 0:78ba160ba5f3 | 2403 | * @see MPU9150_RA_PWR_MGMT_1 |
syundo0730 | 0:78ba160ba5f3 | 2404 | * @see MPU9150_PWR1_TEMP_DIS_BIT |
syundo0730 | 0:78ba160ba5f3 | 2405 | */ |
syundo0730 | 0:78ba160ba5f3 | 2406 | void MPU9150::setTempSensorEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2407 | // 1 is actually disabled here |
syundo0730 | 0:78ba160ba5f3 | 2408 | I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_TEMP_DIS_BIT, !enabled); |
syundo0730 | 0:78ba160ba5f3 | 2409 | } |
syundo0730 | 0:78ba160ba5f3 | 2410 | /** Get clock source setting. |
syundo0730 | 0:78ba160ba5f3 | 2411 | * @return Current clock source setting |
syundo0730 | 0:78ba160ba5f3 | 2412 | * @see MPU9150_RA_PWR_MGMT_1 |
syundo0730 | 0:78ba160ba5f3 | 2413 | * @see MPU9150_PWR1_CLKSEL_BIT |
syundo0730 | 0:78ba160ba5f3 | 2414 | * @see MPU9150_PWR1_CLKSEL_LENGTH |
syundo0730 | 0:78ba160ba5f3 | 2415 | */ |
syundo0730 | 0:78ba160ba5f3 | 2416 | uint8_t MPU9150::getClockSource() { |
syundo0730 | 0:78ba160ba5f3 | 2417 | I2Cdev::readBits(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_CLKSEL_BIT, MPU9150_PWR1_CLKSEL_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2418 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2419 | } |
syundo0730 | 0:78ba160ba5f3 | 2420 | /** Set clock source setting. |
syundo0730 | 0:78ba160ba5f3 | 2421 | * An internal 8MHz oscillator, gyroscope based clock, or external sources can |
syundo0730 | 0:78ba160ba5f3 | 2422 | * be selected as the MPU-60X0 clock source. When the internal 8 MHz oscillator |
syundo0730 | 0:78ba160ba5f3 | 2423 | * or an external source is chosen as the clock source, the MPU-60X0 can operate |
syundo0730 | 0:78ba160ba5f3 | 2424 | * in low power modes with the gyroscopes disabled. |
syundo0730 | 0:78ba160ba5f3 | 2425 | * |
syundo0730 | 0:78ba160ba5f3 | 2426 | * Upon power up, the MPU-60X0 clock source defaults to the internal oscillator. |
syundo0730 | 0:78ba160ba5f3 | 2427 | * However, it is highly recommended that the device be configured to use one of |
syundo0730 | 0:78ba160ba5f3 | 2428 | * the gyroscopes (or an external clock source) as the clock reference for |
syundo0730 | 0:78ba160ba5f3 | 2429 | * improved stability. The clock source can be selected according to the following table: |
syundo0730 | 0:78ba160ba5f3 | 2430 | * |
syundo0730 | 0:78ba160ba5f3 | 2431 | * <pre> |
syundo0730 | 0:78ba160ba5f3 | 2432 | * CLK_SEL | Clock Source |
syundo0730 | 0:78ba160ba5f3 | 2433 | * --------+-------------------------------------- |
syundo0730 | 0:78ba160ba5f3 | 2434 | * 0 | Internal oscillator |
syundo0730 | 0:78ba160ba5f3 | 2435 | * 1 | PLL with X Gyro reference |
syundo0730 | 0:78ba160ba5f3 | 2436 | * 2 | PLL with Y Gyro reference |
syundo0730 | 0:78ba160ba5f3 | 2437 | * 3 | PLL with Z Gyro reference |
syundo0730 | 0:78ba160ba5f3 | 2438 | * 4 | PLL with external 32.768kHz reference |
syundo0730 | 0:78ba160ba5f3 | 2439 | * 5 | PLL with external 19.2MHz reference |
syundo0730 | 0:78ba160ba5f3 | 2440 | * 6 | Reserved |
syundo0730 | 0:78ba160ba5f3 | 2441 | * 7 | Stops the clock and keeps the timing generator in reset |
syundo0730 | 0:78ba160ba5f3 | 2442 | * </pre> |
syundo0730 | 0:78ba160ba5f3 | 2443 | * |
syundo0730 | 0:78ba160ba5f3 | 2444 | * @param source New clock source setting |
syundo0730 | 0:78ba160ba5f3 | 2445 | * @see getClockSource() |
syundo0730 | 0:78ba160ba5f3 | 2446 | * @see MPU9150_RA_PWR_MGMT_1 |
syundo0730 | 0:78ba160ba5f3 | 2447 | * @see MPU9150_PWR1_CLKSEL_BIT |
syundo0730 | 0:78ba160ba5f3 | 2448 | * @see MPU9150_PWR1_CLKSEL_LENGTH |
syundo0730 | 0:78ba160ba5f3 | 2449 | */ |
syundo0730 | 0:78ba160ba5f3 | 2450 | void MPU9150::setClockSource(uint8_t source) { |
syundo0730 | 0:78ba160ba5f3 | 2451 | I2Cdev::writeBits(devAddr, MPU9150_RA_PWR_MGMT_1, MPU9150_PWR1_CLKSEL_BIT, MPU9150_PWR1_CLKSEL_LENGTH, source); |
syundo0730 | 0:78ba160ba5f3 | 2452 | } |
syundo0730 | 0:78ba160ba5f3 | 2453 | |
syundo0730 | 0:78ba160ba5f3 | 2454 | // PWR_MGMT_2 register |
syundo0730 | 0:78ba160ba5f3 | 2455 | |
syundo0730 | 0:78ba160ba5f3 | 2456 | /** Get wake frequency in Accel-Only Low Power Mode. |
syundo0730 | 0:78ba160ba5f3 | 2457 | * The MPU-60X0 can be put into Accerlerometer Only Low Power Mode by setting |
syundo0730 | 0:78ba160ba5f3 | 2458 | * PWRSEL to 1 in the Power Management 1 register (Register 107). In this mode, |
syundo0730 | 0:78ba160ba5f3 | 2459 | * the device will power off all devices except for the primary I2C interface, |
syundo0730 | 0:78ba160ba5f3 | 2460 | * waking only the accelerometer at fixed intervals to take a single |
syundo0730 | 0:78ba160ba5f3 | 2461 | * measurement. The frequency of wake-ups can be configured with LP_WAKE_CTRL |
syundo0730 | 0:78ba160ba5f3 | 2462 | * as shown below: |
syundo0730 | 0:78ba160ba5f3 | 2463 | * |
syundo0730 | 0:78ba160ba5f3 | 2464 | * <pre> |
syundo0730 | 0:78ba160ba5f3 | 2465 | * LP_WAKE_CTRL | Wake-up Frequency |
syundo0730 | 0:78ba160ba5f3 | 2466 | * -------------+------------------ |
syundo0730 | 0:78ba160ba5f3 | 2467 | * 0 | 1.25 Hz |
syundo0730 | 0:78ba160ba5f3 | 2468 | * 1 | 2.5 Hz |
syundo0730 | 0:78ba160ba5f3 | 2469 | * 2 | 5 Hz |
syundo0730 | 0:78ba160ba5f3 | 2470 | * 3 | 10 Hz |
syundo0730 | 0:78ba160ba5f3 | 2471 | * <pre> |
syundo0730 | 0:78ba160ba5f3 | 2472 | * |
syundo0730 | 0:78ba160ba5f3 | 2473 | * For further information regarding the MPU-60X0's power modes, please refer to |
syundo0730 | 0:78ba160ba5f3 | 2474 | * Register 107. |
syundo0730 | 0:78ba160ba5f3 | 2475 | * |
syundo0730 | 0:78ba160ba5f3 | 2476 | * @return Current wake frequency |
syundo0730 | 0:78ba160ba5f3 | 2477 | * @see MPU9150_RA_PWR_MGMT_2 |
syundo0730 | 0:78ba160ba5f3 | 2478 | */ |
syundo0730 | 0:78ba160ba5f3 | 2479 | uint8_t MPU9150::getWakeFrequency() { |
syundo0730 | 0:78ba160ba5f3 | 2480 | I2Cdev::readBits(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_LP_WAKE_CTRL_BIT, MPU9150_PWR2_LP_WAKE_CTRL_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2481 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2482 | } |
syundo0730 | 0:78ba160ba5f3 | 2483 | /** Set wake frequency in Accel-Only Low Power Mode. |
syundo0730 | 0:78ba160ba5f3 | 2484 | * @param frequency New wake frequency |
syundo0730 | 0:78ba160ba5f3 | 2485 | * @see MPU9150_RA_PWR_MGMT_2 |
syundo0730 | 0:78ba160ba5f3 | 2486 | */ |
syundo0730 | 0:78ba160ba5f3 | 2487 | void MPU9150::setWakeFrequency(uint8_t frequency) { |
syundo0730 | 0:78ba160ba5f3 | 2488 | I2Cdev::writeBits(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_LP_WAKE_CTRL_BIT, MPU9150_PWR2_LP_WAKE_CTRL_LENGTH, frequency); |
syundo0730 | 0:78ba160ba5f3 | 2489 | } |
syundo0730 | 0:78ba160ba5f3 | 2490 | |
syundo0730 | 0:78ba160ba5f3 | 2491 | /** Get X-axis accelerometer standby enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2492 | * If enabled, the X-axis will not gather or report data (or use power). |
syundo0730 | 0:78ba160ba5f3 | 2493 | * @return Current X-axis standby enabled status |
syundo0730 | 0:78ba160ba5f3 | 2494 | * @see MPU9150_RA_PWR_MGMT_2 |
syundo0730 | 0:78ba160ba5f3 | 2495 | * @see MPU9150_PWR2_STBY_XA_BIT |
syundo0730 | 0:78ba160ba5f3 | 2496 | */ |
syundo0730 | 0:78ba160ba5f3 | 2497 | bool MPU9150::getStandbyXAccelEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 2498 | I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_XA_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2499 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2500 | } |
syundo0730 | 0:78ba160ba5f3 | 2501 | /** Set X-axis accelerometer standby enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2502 | * @param New X-axis standby enabled status |
syundo0730 | 0:78ba160ba5f3 | 2503 | * @see getStandbyXAccelEnabled() |
syundo0730 | 0:78ba160ba5f3 | 2504 | * @see MPU9150_RA_PWR_MGMT_2 |
syundo0730 | 0:78ba160ba5f3 | 2505 | * @see MPU9150_PWR2_STBY_XA_BIT |
syundo0730 | 0:78ba160ba5f3 | 2506 | */ |
syundo0730 | 0:78ba160ba5f3 | 2507 | void MPU9150::setStandbyXAccelEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2508 | I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_XA_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2509 | } |
syundo0730 | 0:78ba160ba5f3 | 2510 | /** Get Y-axis accelerometer standby enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2511 | * If enabled, the Y-axis will not gather or report data (or use power). |
syundo0730 | 0:78ba160ba5f3 | 2512 | * @return Current Y-axis standby enabled status |
syundo0730 | 0:78ba160ba5f3 | 2513 | * @see MPU9150_RA_PWR_MGMT_2 |
syundo0730 | 0:78ba160ba5f3 | 2514 | * @see MPU9150_PWR2_STBY_YA_BIT |
syundo0730 | 0:78ba160ba5f3 | 2515 | */ |
syundo0730 | 0:78ba160ba5f3 | 2516 | bool MPU9150::getStandbyYAccelEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 2517 | I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_YA_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2518 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2519 | } |
syundo0730 | 0:78ba160ba5f3 | 2520 | /** Set Y-axis accelerometer standby enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2521 | * @param New Y-axis standby enabled status |
syundo0730 | 0:78ba160ba5f3 | 2522 | * @see getStandbyYAccelEnabled() |
syundo0730 | 0:78ba160ba5f3 | 2523 | * @see MPU9150_RA_PWR_MGMT_2 |
syundo0730 | 0:78ba160ba5f3 | 2524 | * @see MPU9150_PWR2_STBY_YA_BIT |
syundo0730 | 0:78ba160ba5f3 | 2525 | */ |
syundo0730 | 0:78ba160ba5f3 | 2526 | void MPU9150::setStandbyYAccelEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2527 | I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_YA_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2528 | } |
syundo0730 | 0:78ba160ba5f3 | 2529 | /** Get Z-axis accelerometer standby enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2530 | * If enabled, the Z-axis will not gather or report data (or use power). |
syundo0730 | 0:78ba160ba5f3 | 2531 | * @return Current Z-axis standby enabled status |
syundo0730 | 0:78ba160ba5f3 | 2532 | * @see MPU9150_RA_PWR_MGMT_2 |
syundo0730 | 0:78ba160ba5f3 | 2533 | * @see MPU9150_PWR2_STBY_ZA_BIT |
syundo0730 | 0:78ba160ba5f3 | 2534 | */ |
syundo0730 | 0:78ba160ba5f3 | 2535 | bool MPU9150::getStandbyZAccelEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 2536 | I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_ZA_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2537 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2538 | } |
syundo0730 | 0:78ba160ba5f3 | 2539 | /** Set Z-axis accelerometer standby enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2540 | * @param New Z-axis standby enabled status |
syundo0730 | 0:78ba160ba5f3 | 2541 | * @see getStandbyZAccelEnabled() |
syundo0730 | 0:78ba160ba5f3 | 2542 | * @see MPU9150_RA_PWR_MGMT_2 |
syundo0730 | 0:78ba160ba5f3 | 2543 | * @see MPU9150_PWR2_STBY_ZA_BIT |
syundo0730 | 0:78ba160ba5f3 | 2544 | */ |
syundo0730 | 0:78ba160ba5f3 | 2545 | void MPU9150::setStandbyZAccelEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2546 | I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_ZA_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2547 | } |
syundo0730 | 0:78ba160ba5f3 | 2548 | /** Get X-axis gyroscope standby enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2549 | * If enabled, the X-axis will not gather or report data (or use power). |
syundo0730 | 0:78ba160ba5f3 | 2550 | * @return Current X-axis standby enabled status |
syundo0730 | 0:78ba160ba5f3 | 2551 | * @see MPU9150_RA_PWR_MGMT_2 |
syundo0730 | 0:78ba160ba5f3 | 2552 | * @see MPU9150_PWR2_STBY_XG_BIT |
syundo0730 | 0:78ba160ba5f3 | 2553 | */ |
syundo0730 | 0:78ba160ba5f3 | 2554 | bool MPU9150::getStandbyXGyroEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 2555 | I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_XG_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2556 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2557 | } |
syundo0730 | 0:78ba160ba5f3 | 2558 | /** Set X-axis gyroscope standby enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2559 | * @param New X-axis standby enabled status |
syundo0730 | 0:78ba160ba5f3 | 2560 | * @see getStandbyXGyroEnabled() |
syundo0730 | 0:78ba160ba5f3 | 2561 | * @see MPU9150_RA_PWR_MGMT_2 |
syundo0730 | 0:78ba160ba5f3 | 2562 | * @see MPU9150_PWR2_STBY_XG_BIT |
syundo0730 | 0:78ba160ba5f3 | 2563 | */ |
syundo0730 | 0:78ba160ba5f3 | 2564 | void MPU9150::setStandbyXGyroEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2565 | I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_XG_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2566 | } |
syundo0730 | 0:78ba160ba5f3 | 2567 | /** Get Y-axis gyroscope standby enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2568 | * If enabled, the Y-axis will not gather or report data (or use power). |
syundo0730 | 0:78ba160ba5f3 | 2569 | * @return Current Y-axis standby enabled status |
syundo0730 | 0:78ba160ba5f3 | 2570 | * @see MPU9150_RA_PWR_MGMT_2 |
syundo0730 | 0:78ba160ba5f3 | 2571 | * @see MPU9150_PWR2_STBY_YG_BIT |
syundo0730 | 0:78ba160ba5f3 | 2572 | */ |
syundo0730 | 0:78ba160ba5f3 | 2573 | bool MPU9150::getStandbyYGyroEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 2574 | I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_YG_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2575 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2576 | } |
syundo0730 | 0:78ba160ba5f3 | 2577 | /** Set Y-axis gyroscope standby enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2578 | * @param New Y-axis standby enabled status |
syundo0730 | 0:78ba160ba5f3 | 2579 | * @see getStandbyYGyroEnabled() |
syundo0730 | 0:78ba160ba5f3 | 2580 | * @see MPU9150_RA_PWR_MGMT_2 |
syundo0730 | 0:78ba160ba5f3 | 2581 | * @see MPU9150_PWR2_STBY_YG_BIT |
syundo0730 | 0:78ba160ba5f3 | 2582 | */ |
syundo0730 | 0:78ba160ba5f3 | 2583 | void MPU9150::setStandbyYGyroEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2584 | I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_YG_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2585 | } |
syundo0730 | 0:78ba160ba5f3 | 2586 | /** Get Z-axis gyroscope standby enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2587 | * If enabled, the Z-axis will not gather or report data (or use power). |
syundo0730 | 0:78ba160ba5f3 | 2588 | * @return Current Z-axis standby enabled status |
syundo0730 | 0:78ba160ba5f3 | 2589 | * @see MPU9150_RA_PWR_MGMT_2 |
syundo0730 | 0:78ba160ba5f3 | 2590 | * @see MPU9150_PWR2_STBY_ZG_BIT |
syundo0730 | 0:78ba160ba5f3 | 2591 | */ |
syundo0730 | 0:78ba160ba5f3 | 2592 | bool MPU9150::getStandbyZGyroEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 2593 | I2Cdev::readBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_ZG_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2594 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2595 | } |
syundo0730 | 0:78ba160ba5f3 | 2596 | /** Set Z-axis gyroscope standby enabled status. |
syundo0730 | 0:78ba160ba5f3 | 2597 | * @param New Z-axis standby enabled status |
syundo0730 | 0:78ba160ba5f3 | 2598 | * @see getStandbyZGyroEnabled() |
syundo0730 | 0:78ba160ba5f3 | 2599 | * @see MPU9150_RA_PWR_MGMT_2 |
syundo0730 | 0:78ba160ba5f3 | 2600 | * @see MPU9150_PWR2_STBY_ZG_BIT |
syundo0730 | 0:78ba160ba5f3 | 2601 | */ |
syundo0730 | 0:78ba160ba5f3 | 2602 | void MPU9150::setStandbyZGyroEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2603 | I2Cdev::writeBit(devAddr, MPU9150_RA_PWR_MGMT_2, MPU9150_PWR2_STBY_ZG_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2604 | } |
syundo0730 | 0:78ba160ba5f3 | 2605 | |
syundo0730 | 0:78ba160ba5f3 | 2606 | // FIFO_COUNT* registers |
syundo0730 | 0:78ba160ba5f3 | 2607 | |
syundo0730 | 0:78ba160ba5f3 | 2608 | /** Get current FIFO buffer size. |
syundo0730 | 0:78ba160ba5f3 | 2609 | * This value indicates the number of bytes stored in the FIFO buffer. This |
syundo0730 | 0:78ba160ba5f3 | 2610 | * number is in turn the number of bytes that can be read from the FIFO buffer |
syundo0730 | 0:78ba160ba5f3 | 2611 | * and it is directly proportional to the number of samples available given the |
syundo0730 | 0:78ba160ba5f3 | 2612 | * set of sensor data bound to be stored in the FIFO (register 35 and 36). |
syundo0730 | 0:78ba160ba5f3 | 2613 | * @return Current FIFO buffer size |
syundo0730 | 0:78ba160ba5f3 | 2614 | */ |
syundo0730 | 0:78ba160ba5f3 | 2615 | uint16_t MPU9150::getFIFOCount() { |
syundo0730 | 0:78ba160ba5f3 | 2616 | I2Cdev::readBytes(devAddr, MPU9150_RA_FIFO_COUNTH, 2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2617 | return (((uint16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 2618 | } |
syundo0730 | 0:78ba160ba5f3 | 2619 | |
syundo0730 | 0:78ba160ba5f3 | 2620 | // FIFO_R_W register |
syundo0730 | 0:78ba160ba5f3 | 2621 | |
syundo0730 | 0:78ba160ba5f3 | 2622 | /** Get byte from FIFO buffer. |
syundo0730 | 0:78ba160ba5f3 | 2623 | * This register is used to read and write data from the FIFO buffer. Data is |
syundo0730 | 0:78ba160ba5f3 | 2624 | * written to the FIFO in order of register number (from lowest to highest). If |
syundo0730 | 0:78ba160ba5f3 | 2625 | * all the FIFO enable flags (see below) are enabled and all External Sensor |
syundo0730 | 0:78ba160ba5f3 | 2626 | * Data registers (Registers 73 to 96) are associated with a Slave device, the |
syundo0730 | 0:78ba160ba5f3 | 2627 | * contents of registers 59 through 96 will be written in order at the Sample |
syundo0730 | 0:78ba160ba5f3 | 2628 | * Rate. |
syundo0730 | 0:78ba160ba5f3 | 2629 | * |
syundo0730 | 0:78ba160ba5f3 | 2630 | * The contents of the sensor data registers (Registers 59 to 96) are written |
syundo0730 | 0:78ba160ba5f3 | 2631 | * into the FIFO buffer when their corresponding FIFO enable flags are set to 1 |
syundo0730 | 0:78ba160ba5f3 | 2632 | * in FIFO_EN (Register 35). An additional flag for the sensor data registers |
syundo0730 | 0:78ba160ba5f3 | 2633 | * associated with I2C Slave 3 can be found in I2C_MST_CTRL (Register 36). |
syundo0730 | 0:78ba160ba5f3 | 2634 | * |
syundo0730 | 0:78ba160ba5f3 | 2635 | * If the FIFO buffer has overflowed, the status bit FIFO_OFLOW_INT is |
syundo0730 | 0:78ba160ba5f3 | 2636 | * automatically set to 1. This bit is located in INT_STATUS (Register 58). |
syundo0730 | 0:78ba160ba5f3 | 2637 | * When the FIFO buffer has overflowed, the oldest data will be lost and new |
syundo0730 | 0:78ba160ba5f3 | 2638 | * data will be written to the FIFO. |
syundo0730 | 0:78ba160ba5f3 | 2639 | * |
syundo0730 | 0:78ba160ba5f3 | 2640 | * If the FIFO buffer is empty, reading this register will return the last byte |
syundo0730 | 0:78ba160ba5f3 | 2641 | * that was previously read from the FIFO until new data is available. The user |
syundo0730 | 0:78ba160ba5f3 | 2642 | * should check FIFO_COUNT to ensure that the FIFO buffer is not read when |
syundo0730 | 0:78ba160ba5f3 | 2643 | * empty. |
syundo0730 | 0:78ba160ba5f3 | 2644 | * |
syundo0730 | 0:78ba160ba5f3 | 2645 | * @return Byte from FIFO buffer |
syundo0730 | 0:78ba160ba5f3 | 2646 | */ |
syundo0730 | 0:78ba160ba5f3 | 2647 | uint8_t MPU9150::getFIFOByte() { |
syundo0730 | 0:78ba160ba5f3 | 2648 | I2Cdev::readByte(devAddr, MPU9150_RA_FIFO_R_W, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2649 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2650 | } |
syundo0730 | 0:78ba160ba5f3 | 2651 | void MPU9150::getFIFOBytes(uint8_t *data, uint8_t length) { |
syundo0730 | 0:78ba160ba5f3 | 2652 | I2Cdev::readBytes(devAddr, MPU9150_RA_FIFO_R_W, length, data); |
syundo0730 | 0:78ba160ba5f3 | 2653 | } |
syundo0730 | 0:78ba160ba5f3 | 2654 | /** Write byte to FIFO buffer. |
syundo0730 | 0:78ba160ba5f3 | 2655 | * @see getFIFOByte() |
syundo0730 | 0:78ba160ba5f3 | 2656 | * @see MPU9150_RA_FIFO_R_W |
syundo0730 | 0:78ba160ba5f3 | 2657 | */ |
syundo0730 | 0:78ba160ba5f3 | 2658 | void MPU9150::setFIFOByte(uint8_t data) { |
syundo0730 | 0:78ba160ba5f3 | 2659 | I2Cdev::writeByte(devAddr, MPU9150_RA_FIFO_R_W, data); |
syundo0730 | 0:78ba160ba5f3 | 2660 | } |
syundo0730 | 0:78ba160ba5f3 | 2661 | |
syundo0730 | 0:78ba160ba5f3 | 2662 | // WHO_AM_I register |
syundo0730 | 0:78ba160ba5f3 | 2663 | |
syundo0730 | 0:78ba160ba5f3 | 2664 | /** Get Device ID. |
syundo0730 | 0:78ba160ba5f3 | 2665 | * This register is used to verify the identity of the device (0b110100, 0x34). |
syundo0730 | 0:78ba160ba5f3 | 2666 | * @return Device ID (6 bits only! should be 0x34) |
syundo0730 | 0:78ba160ba5f3 | 2667 | * @see MPU9150_RA_WHO_AM_I |
syundo0730 | 0:78ba160ba5f3 | 2668 | * @see MPU9150_WHO_AM_I_BIT |
syundo0730 | 0:78ba160ba5f3 | 2669 | * @see MPU9150_WHO_AM_I_LENGTH |
syundo0730 | 0:78ba160ba5f3 | 2670 | */ |
syundo0730 | 0:78ba160ba5f3 | 2671 | uint8_t MPU9150::getDeviceID() { |
syundo0730 | 0:78ba160ba5f3 | 2672 | I2Cdev::readBits(devAddr, MPU9150_RA_WHO_AM_I, MPU9150_WHO_AM_I_BIT, MPU9150_WHO_AM_I_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2673 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2674 | } |
syundo0730 | 0:78ba160ba5f3 | 2675 | /** Set Device ID. |
syundo0730 | 0:78ba160ba5f3 | 2676 | * Write a new ID into the WHO_AM_I register (no idea why this should ever be |
syundo0730 | 0:78ba160ba5f3 | 2677 | * necessary though). |
syundo0730 | 0:78ba160ba5f3 | 2678 | * @param id New device ID to set. |
syundo0730 | 0:78ba160ba5f3 | 2679 | * @see getDeviceID() |
syundo0730 | 0:78ba160ba5f3 | 2680 | * @see MPU9150_RA_WHO_AM_I |
syundo0730 | 0:78ba160ba5f3 | 2681 | * @see MPU9150_WHO_AM_I_BIT |
syundo0730 | 0:78ba160ba5f3 | 2682 | * @see MPU9150_WHO_AM_I_LENGTH |
syundo0730 | 0:78ba160ba5f3 | 2683 | */ |
syundo0730 | 0:78ba160ba5f3 | 2684 | void MPU9150::setDeviceID(uint8_t id) { |
syundo0730 | 0:78ba160ba5f3 | 2685 | I2Cdev::writeBits(devAddr, MPU9150_RA_WHO_AM_I, MPU9150_WHO_AM_I_BIT, MPU9150_WHO_AM_I_LENGTH, id); |
syundo0730 | 0:78ba160ba5f3 | 2686 | } |
syundo0730 | 0:78ba160ba5f3 | 2687 | |
syundo0730 | 0:78ba160ba5f3 | 2688 | // ======== UNDOCUMENTED/DMP REGISTERS/METHODS ======== |
syundo0730 | 0:78ba160ba5f3 | 2689 | |
syundo0730 | 0:78ba160ba5f3 | 2690 | // XG_OFFS_TC register |
syundo0730 | 0:78ba160ba5f3 | 2691 | |
syundo0730 | 0:78ba160ba5f3 | 2692 | uint8_t MPU9150::getOTPBankValid() { |
syundo0730 | 0:78ba160ba5f3 | 2693 | I2Cdev::readBit(devAddr, MPU9150_RA_XG_OFFS_TC, MPU9150_TC_OTP_BNK_VLD_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2694 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2695 | } |
syundo0730 | 0:78ba160ba5f3 | 2696 | void MPU9150::setOTPBankValid(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2697 | I2Cdev::writeBit(devAddr, MPU9150_RA_XG_OFFS_TC, MPU9150_TC_OTP_BNK_VLD_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2698 | } |
syundo0730 | 0:78ba160ba5f3 | 2699 | int8_t MPU9150::getXGyroOffsetTC() { |
syundo0730 | 0:78ba160ba5f3 | 2700 | I2Cdev::readBits(devAddr, MPU9150_RA_XG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2701 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2702 | } |
syundo0730 | 0:78ba160ba5f3 | 2703 | void MPU9150::setXGyroOffsetTC(int8_t offset) { |
syundo0730 | 0:78ba160ba5f3 | 2704 | I2Cdev::writeBits(devAddr, MPU9150_RA_XG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, offset); |
syundo0730 | 0:78ba160ba5f3 | 2705 | } |
syundo0730 | 0:78ba160ba5f3 | 2706 | |
syundo0730 | 0:78ba160ba5f3 | 2707 | // YG_OFFS_TC register |
syundo0730 | 0:78ba160ba5f3 | 2708 | |
syundo0730 | 0:78ba160ba5f3 | 2709 | int8_t MPU9150::getYGyroOffsetTC() { |
syundo0730 | 0:78ba160ba5f3 | 2710 | I2Cdev::readBits(devAddr, MPU9150_RA_YG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2711 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2712 | } |
syundo0730 | 0:78ba160ba5f3 | 2713 | void MPU9150::setYGyroOffsetTC(int8_t offset) { |
syundo0730 | 0:78ba160ba5f3 | 2714 | I2Cdev::writeBits(devAddr, MPU9150_RA_YG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, offset); |
syundo0730 | 0:78ba160ba5f3 | 2715 | } |
syundo0730 | 0:78ba160ba5f3 | 2716 | |
syundo0730 | 0:78ba160ba5f3 | 2717 | // ZG_OFFS_TC register |
syundo0730 | 0:78ba160ba5f3 | 2718 | |
syundo0730 | 0:78ba160ba5f3 | 2719 | int8_t MPU9150::getZGyroOffsetTC() { |
syundo0730 | 0:78ba160ba5f3 | 2720 | I2Cdev::readBits(devAddr, MPU9150_RA_ZG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2721 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2722 | } |
syundo0730 | 0:78ba160ba5f3 | 2723 | void MPU9150::setZGyroOffsetTC(int8_t offset) { |
syundo0730 | 0:78ba160ba5f3 | 2724 | I2Cdev::writeBits(devAddr, MPU9150_RA_ZG_OFFS_TC, MPU9150_TC_OFFSET_BIT, MPU9150_TC_OFFSET_LENGTH, offset); |
syundo0730 | 0:78ba160ba5f3 | 2725 | } |
syundo0730 | 0:78ba160ba5f3 | 2726 | |
syundo0730 | 0:78ba160ba5f3 | 2727 | // X_FINE_GAIN register |
syundo0730 | 0:78ba160ba5f3 | 2728 | |
syundo0730 | 0:78ba160ba5f3 | 2729 | int8_t MPU9150::getXFineGain() { |
syundo0730 | 0:78ba160ba5f3 | 2730 | I2Cdev::readByte(devAddr, MPU9150_RA_X_FINE_GAIN, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2731 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2732 | } |
syundo0730 | 0:78ba160ba5f3 | 2733 | void MPU9150::setXFineGain(int8_t gain) { |
syundo0730 | 0:78ba160ba5f3 | 2734 | I2Cdev::writeByte(devAddr, MPU9150_RA_X_FINE_GAIN, gain); |
syundo0730 | 0:78ba160ba5f3 | 2735 | } |
syundo0730 | 0:78ba160ba5f3 | 2736 | |
syundo0730 | 0:78ba160ba5f3 | 2737 | // Y_FINE_GAIN register |
syundo0730 | 0:78ba160ba5f3 | 2738 | |
syundo0730 | 0:78ba160ba5f3 | 2739 | int8_t MPU9150::getYFineGain() { |
syundo0730 | 0:78ba160ba5f3 | 2740 | I2Cdev::readByte(devAddr, MPU9150_RA_Y_FINE_GAIN, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2741 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2742 | } |
syundo0730 | 0:78ba160ba5f3 | 2743 | void MPU9150::setYFineGain(int8_t gain) { |
syundo0730 | 0:78ba160ba5f3 | 2744 | I2Cdev::writeByte(devAddr, MPU9150_RA_Y_FINE_GAIN, gain); |
syundo0730 | 0:78ba160ba5f3 | 2745 | } |
syundo0730 | 0:78ba160ba5f3 | 2746 | |
syundo0730 | 0:78ba160ba5f3 | 2747 | // Z_FINE_GAIN register |
syundo0730 | 0:78ba160ba5f3 | 2748 | |
syundo0730 | 0:78ba160ba5f3 | 2749 | int8_t MPU9150::getZFineGain() { |
syundo0730 | 0:78ba160ba5f3 | 2750 | I2Cdev::readByte(devAddr, MPU9150_RA_Z_FINE_GAIN, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2751 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2752 | } |
syundo0730 | 0:78ba160ba5f3 | 2753 | void MPU9150::setZFineGain(int8_t gain) { |
syundo0730 | 0:78ba160ba5f3 | 2754 | I2Cdev::writeByte(devAddr, MPU9150_RA_Z_FINE_GAIN, gain); |
syundo0730 | 0:78ba160ba5f3 | 2755 | } |
syundo0730 | 0:78ba160ba5f3 | 2756 | |
syundo0730 | 0:78ba160ba5f3 | 2757 | // XA_OFFS_* registers |
syundo0730 | 0:78ba160ba5f3 | 2758 | |
syundo0730 | 0:78ba160ba5f3 | 2759 | int16_t MPU9150::getXAccelOffset() { |
syundo0730 | 0:78ba160ba5f3 | 2760 | I2Cdev::readBytes(devAddr, MPU9150_RA_XA_OFFS_H, 2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2761 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 2762 | } |
syundo0730 | 0:78ba160ba5f3 | 2763 | void MPU9150::setXAccelOffset(int16_t offset) { |
syundo0730 | 0:78ba160ba5f3 | 2764 | I2Cdev::writeWord(devAddr, MPU9150_RA_XA_OFFS_H, offset); |
syundo0730 | 0:78ba160ba5f3 | 2765 | } |
syundo0730 | 0:78ba160ba5f3 | 2766 | |
syundo0730 | 0:78ba160ba5f3 | 2767 | // YA_OFFS_* register |
syundo0730 | 0:78ba160ba5f3 | 2768 | |
syundo0730 | 0:78ba160ba5f3 | 2769 | int16_t MPU9150::getYAccelOffset() { |
syundo0730 | 0:78ba160ba5f3 | 2770 | I2Cdev::readBytes(devAddr, MPU9150_RA_YA_OFFS_H, 2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2771 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 2772 | } |
syundo0730 | 0:78ba160ba5f3 | 2773 | void MPU9150::setYAccelOffset(int16_t offset) { |
syundo0730 | 0:78ba160ba5f3 | 2774 | I2Cdev::writeWord(devAddr, MPU9150_RA_YA_OFFS_H, offset); |
syundo0730 | 0:78ba160ba5f3 | 2775 | } |
syundo0730 | 0:78ba160ba5f3 | 2776 | |
syundo0730 | 0:78ba160ba5f3 | 2777 | // ZA_OFFS_* register |
syundo0730 | 0:78ba160ba5f3 | 2778 | |
syundo0730 | 0:78ba160ba5f3 | 2779 | int16_t MPU9150::getZAccelOffset() { |
syundo0730 | 0:78ba160ba5f3 | 2780 | I2Cdev::readBytes(devAddr, MPU9150_RA_ZA_OFFS_H, 2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2781 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 2782 | } |
syundo0730 | 0:78ba160ba5f3 | 2783 | void MPU9150::setZAccelOffset(int16_t offset) { |
syundo0730 | 0:78ba160ba5f3 | 2784 | I2Cdev::writeWord(devAddr, MPU9150_RA_ZA_OFFS_H, offset); |
syundo0730 | 0:78ba160ba5f3 | 2785 | } |
syundo0730 | 0:78ba160ba5f3 | 2786 | |
syundo0730 | 0:78ba160ba5f3 | 2787 | // XG_OFFS_USR* registers |
syundo0730 | 0:78ba160ba5f3 | 2788 | |
syundo0730 | 0:78ba160ba5f3 | 2789 | int16_t MPU9150::getXGyroOffset() { |
syundo0730 | 0:78ba160ba5f3 | 2790 | I2Cdev::readBytes(devAddr, MPU9150_RA_XG_OFFS_USRH, 2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2791 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 2792 | } |
syundo0730 | 0:78ba160ba5f3 | 2793 | void MPU9150::setXGyroOffset(int16_t offset) { |
syundo0730 | 0:78ba160ba5f3 | 2794 | I2Cdev::writeWord(devAddr, MPU9150_RA_XG_OFFS_USRH, offset); |
syundo0730 | 0:78ba160ba5f3 | 2795 | } |
syundo0730 | 0:78ba160ba5f3 | 2796 | |
syundo0730 | 0:78ba160ba5f3 | 2797 | // YG_OFFS_USR* register |
syundo0730 | 0:78ba160ba5f3 | 2798 | |
syundo0730 | 0:78ba160ba5f3 | 2799 | int16_t MPU9150::getYGyroOffset() { |
syundo0730 | 0:78ba160ba5f3 | 2800 | I2Cdev::readBytes(devAddr, MPU9150_RA_YG_OFFS_USRH, 2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2801 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 2802 | } |
syundo0730 | 0:78ba160ba5f3 | 2803 | void MPU9150::setYGyroOffset(int16_t offset) { |
syundo0730 | 0:78ba160ba5f3 | 2804 | I2Cdev::writeWord(devAddr, MPU9150_RA_YG_OFFS_USRH, offset); |
syundo0730 | 0:78ba160ba5f3 | 2805 | } |
syundo0730 | 0:78ba160ba5f3 | 2806 | |
syundo0730 | 0:78ba160ba5f3 | 2807 | // ZG_OFFS_USR* register |
syundo0730 | 0:78ba160ba5f3 | 2808 | |
syundo0730 | 0:78ba160ba5f3 | 2809 | int16_t MPU9150::getZGyroOffset() { |
syundo0730 | 0:78ba160ba5f3 | 2810 | I2Cdev::readBytes(devAddr, MPU9150_RA_ZG_OFFS_USRH, 2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2811 | return (((int16_t)buffer[0]) << 8) | buffer[1]; |
syundo0730 | 0:78ba160ba5f3 | 2812 | } |
syundo0730 | 0:78ba160ba5f3 | 2813 | void MPU9150::setZGyroOffset(int16_t offset) { |
syundo0730 | 0:78ba160ba5f3 | 2814 | I2Cdev::writeWord(devAddr, MPU9150_RA_ZG_OFFS_USRH, offset); |
syundo0730 | 0:78ba160ba5f3 | 2815 | } |
syundo0730 | 0:78ba160ba5f3 | 2816 | |
syundo0730 | 0:78ba160ba5f3 | 2817 | // INT_ENABLE register (DMP functions) |
syundo0730 | 0:78ba160ba5f3 | 2818 | |
syundo0730 | 0:78ba160ba5f3 | 2819 | bool MPU9150::getIntPLLReadyEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 2820 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_PLL_RDY_INT_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2821 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2822 | } |
syundo0730 | 0:78ba160ba5f3 | 2823 | void MPU9150::setIntPLLReadyEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2824 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_PLL_RDY_INT_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2825 | } |
syundo0730 | 0:78ba160ba5f3 | 2826 | bool MPU9150::getIntDMPEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 2827 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_DMP_INT_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2828 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2829 | } |
syundo0730 | 0:78ba160ba5f3 | 2830 | void MPU9150::setIntDMPEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2831 | I2Cdev::writeBit(devAddr, MPU9150_RA_INT_ENABLE, MPU9150_INTERRUPT_DMP_INT_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2832 | } |
syundo0730 | 0:78ba160ba5f3 | 2833 | |
syundo0730 | 0:78ba160ba5f3 | 2834 | // DMP_INT_STATUS |
syundo0730 | 0:78ba160ba5f3 | 2835 | |
syundo0730 | 0:78ba160ba5f3 | 2836 | bool MPU9150::getDMPInt5Status() { |
syundo0730 | 0:78ba160ba5f3 | 2837 | I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_5_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2838 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2839 | } |
syundo0730 | 0:78ba160ba5f3 | 2840 | bool MPU9150::getDMPInt4Status() { |
syundo0730 | 0:78ba160ba5f3 | 2841 | I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_4_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2842 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2843 | } |
syundo0730 | 0:78ba160ba5f3 | 2844 | bool MPU9150::getDMPInt3Status() { |
syundo0730 | 0:78ba160ba5f3 | 2845 | I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_3_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2846 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2847 | } |
syundo0730 | 0:78ba160ba5f3 | 2848 | bool MPU9150::getDMPInt2Status() { |
syundo0730 | 0:78ba160ba5f3 | 2849 | I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_2_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2850 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2851 | } |
syundo0730 | 0:78ba160ba5f3 | 2852 | bool MPU9150::getDMPInt1Status() { |
syundo0730 | 0:78ba160ba5f3 | 2853 | I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_1_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2854 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2855 | } |
syundo0730 | 0:78ba160ba5f3 | 2856 | bool MPU9150::getDMPInt0Status() { |
syundo0730 | 0:78ba160ba5f3 | 2857 | I2Cdev::readBit(devAddr, MPU9150_RA_DMP_INT_STATUS, MPU9150_DMPINT_0_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2858 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2859 | } |
syundo0730 | 0:78ba160ba5f3 | 2860 | |
syundo0730 | 0:78ba160ba5f3 | 2861 | // INT_STATUS register (DMP functions) |
syundo0730 | 0:78ba160ba5f3 | 2862 | |
syundo0730 | 0:78ba160ba5f3 | 2863 | bool MPU9150::getIntPLLReadyStatus() { |
syundo0730 | 0:78ba160ba5f3 | 2864 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_PLL_RDY_INT_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2865 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2866 | } |
syundo0730 | 0:78ba160ba5f3 | 2867 | bool MPU9150::getIntDMPStatus() { |
syundo0730 | 0:78ba160ba5f3 | 2868 | I2Cdev::readBit(devAddr, MPU9150_RA_INT_STATUS, MPU9150_INTERRUPT_DMP_INT_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2869 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2870 | } |
syundo0730 | 0:78ba160ba5f3 | 2871 | |
syundo0730 | 0:78ba160ba5f3 | 2872 | // USER_CTRL register (DMP functions) |
syundo0730 | 0:78ba160ba5f3 | 2873 | |
syundo0730 | 0:78ba160ba5f3 | 2874 | bool MPU9150::getDMPEnabled() { |
syundo0730 | 0:78ba160ba5f3 | 2875 | I2Cdev::readBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_DMP_EN_BIT, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2876 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2877 | } |
syundo0730 | 0:78ba160ba5f3 | 2878 | void MPU9150::setDMPEnabled(bool enabled) { |
syundo0730 | 0:78ba160ba5f3 | 2879 | I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_DMP_EN_BIT, enabled); |
syundo0730 | 0:78ba160ba5f3 | 2880 | } |
syundo0730 | 0:78ba160ba5f3 | 2881 | void MPU9150::resetDMP() { |
syundo0730 | 0:78ba160ba5f3 | 2882 | I2Cdev::writeBit(devAddr, MPU9150_RA_USER_CTRL, MPU9150_USERCTRL_DMP_RESET_BIT, true); |
syundo0730 | 0:78ba160ba5f3 | 2883 | } |
syundo0730 | 0:78ba160ba5f3 | 2884 | |
syundo0730 | 0:78ba160ba5f3 | 2885 | // BANK_SEL register |
syundo0730 | 0:78ba160ba5f3 | 2886 | |
syundo0730 | 0:78ba160ba5f3 | 2887 | void MPU9150::setMemoryBank(uint8_t bank, bool prefetchEnabled, bool userBank) { |
syundo0730 | 0:78ba160ba5f3 | 2888 | bank &= 0x1F; |
syundo0730 | 0:78ba160ba5f3 | 2889 | if (userBank) bank |= 0x20; |
syundo0730 | 0:78ba160ba5f3 | 2890 | if (prefetchEnabled) bank |= 0x40; |
syundo0730 | 0:78ba160ba5f3 | 2891 | I2Cdev::writeByte(devAddr, MPU9150_RA_BANK_SEL, bank); |
syundo0730 | 0:78ba160ba5f3 | 2892 | } |
syundo0730 | 0:78ba160ba5f3 | 2893 | |
syundo0730 | 0:78ba160ba5f3 | 2894 | // MEM_START_ADDR register |
syundo0730 | 0:78ba160ba5f3 | 2895 | |
syundo0730 | 0:78ba160ba5f3 | 2896 | void MPU9150::setMemoryStartAddress(uint8_t address) { |
syundo0730 | 0:78ba160ba5f3 | 2897 | I2Cdev::writeByte(devAddr, MPU9150_RA_MEM_START_ADDR, address); |
syundo0730 | 0:78ba160ba5f3 | 2898 | } |
syundo0730 | 0:78ba160ba5f3 | 2899 | |
syundo0730 | 0:78ba160ba5f3 | 2900 | // MEM_R_W register |
syundo0730 | 0:78ba160ba5f3 | 2901 | |
syundo0730 | 0:78ba160ba5f3 | 2902 | uint8_t MPU9150::readMemoryByte() { |
syundo0730 | 0:78ba160ba5f3 | 2903 | I2Cdev::readByte(devAddr, MPU9150_RA_MEM_R_W, buffer); |
syundo0730 | 0:78ba160ba5f3 | 2904 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 2905 | } |
syundo0730 | 0:78ba160ba5f3 | 2906 | void MPU9150::writeMemoryByte(uint8_t data) { |
syundo0730 | 0:78ba160ba5f3 | 2907 | I2Cdev::writeByte(devAddr, MPU9150_RA_MEM_R_W, data); |
syundo0730 | 0:78ba160ba5f3 | 2908 | } |
syundo0730 | 0:78ba160ba5f3 | 2909 | void MPU9150::readMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address) { |
syundo0730 | 0:78ba160ba5f3 | 2910 | setMemoryBank(bank); |
syundo0730 | 0:78ba160ba5f3 | 2911 | setMemoryStartAddress(address); |
syundo0730 | 0:78ba160ba5f3 | 2912 | uint8_t chunkSize; |
syundo0730 | 0:78ba160ba5f3 | 2913 | for (uint16_t i = 0; i < dataSize;) { |
syundo0730 | 0:78ba160ba5f3 | 2914 | // determine correct chunk size according to bank position and data size |
syundo0730 | 0:78ba160ba5f3 | 2915 | chunkSize = MPU9150_DMP_MEMORY_CHUNK_SIZE; |
syundo0730 | 0:78ba160ba5f3 | 2916 | |
syundo0730 | 0:78ba160ba5f3 | 2917 | // make sure we don't go past the data size |
syundo0730 | 0:78ba160ba5f3 | 2918 | if (i + chunkSize > dataSize) chunkSize = dataSize - i; |
syundo0730 | 0:78ba160ba5f3 | 2919 | |
syundo0730 | 0:78ba160ba5f3 | 2920 | // make sure this chunk doesn't go past the bank boundary (256 bytes) |
syundo0730 | 0:78ba160ba5f3 | 2921 | if (chunkSize > 256 - address) chunkSize = 256 - address; |
syundo0730 | 0:78ba160ba5f3 | 2922 | |
syundo0730 | 0:78ba160ba5f3 | 2923 | // read the chunk of data as specified |
syundo0730 | 0:78ba160ba5f3 | 2924 | I2Cdev::readBytes(devAddr, MPU9150_RA_MEM_R_W, chunkSize, data + i); |
syundo0730 | 0:78ba160ba5f3 | 2925 | |
syundo0730 | 0:78ba160ba5f3 | 2926 | // increase byte index by [chunkSize] |
syundo0730 | 0:78ba160ba5f3 | 2927 | i += chunkSize; |
syundo0730 | 0:78ba160ba5f3 | 2928 | |
syundo0730 | 0:78ba160ba5f3 | 2929 | // uint8_t automatically wraps to 0 at 256 |
syundo0730 | 0:78ba160ba5f3 | 2930 | address += chunkSize; |
syundo0730 | 0:78ba160ba5f3 | 2931 | |
syundo0730 | 0:78ba160ba5f3 | 2932 | // if we aren't done, update bank (if necessary) and address |
syundo0730 | 0:78ba160ba5f3 | 2933 | if (i < dataSize) { |
syundo0730 | 0:78ba160ba5f3 | 2934 | if (address == 0) bank++; |
syundo0730 | 0:78ba160ba5f3 | 2935 | setMemoryBank(bank); |
syundo0730 | 0:78ba160ba5f3 | 2936 | setMemoryStartAddress(address); |
syundo0730 | 0:78ba160ba5f3 | 2937 | } |
syundo0730 | 0:78ba160ba5f3 | 2938 | } |
syundo0730 | 0:78ba160ba5f3 | 2939 | } |
syundo0730 | 0:78ba160ba5f3 | 2940 | bool MPU9150::writeMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify, bool useProgMem) { |
syundo0730 | 0:78ba160ba5f3 | 2941 | setMemoryBank(bank); |
syundo0730 | 0:78ba160ba5f3 | 2942 | setMemoryStartAddress(address); |
syundo0730 | 0:78ba160ba5f3 | 2943 | uint8_t chunkSize; |
syundo0730 | 0:78ba160ba5f3 | 2944 | uint8_t *verifyBuffer; |
syundo0730 | 0:78ba160ba5f3 | 2945 | uint8_t *progBuffer; |
syundo0730 | 0:78ba160ba5f3 | 2946 | uint16_t i; |
syundo0730 | 0:78ba160ba5f3 | 2947 | uint8_t j; |
syundo0730 | 0:78ba160ba5f3 | 2948 | if (verify) verifyBuffer = (uint8_t *)malloc(MPU9150_DMP_MEMORY_CHUNK_SIZE); |
syundo0730 | 0:78ba160ba5f3 | 2949 | if (useProgMem) progBuffer = (uint8_t *)malloc(MPU9150_DMP_MEMORY_CHUNK_SIZE); |
syundo0730 | 0:78ba160ba5f3 | 2950 | for (i = 0; i < dataSize;) { |
syundo0730 | 0:78ba160ba5f3 | 2951 | // determine correct chunk size according to bank position and data size |
syundo0730 | 0:78ba160ba5f3 | 2952 | chunkSize = MPU9150_DMP_MEMORY_CHUNK_SIZE; |
syundo0730 | 0:78ba160ba5f3 | 2953 | |
syundo0730 | 0:78ba160ba5f3 | 2954 | // make sure we don't go past the data size |
syundo0730 | 0:78ba160ba5f3 | 2955 | if (i + chunkSize > dataSize) chunkSize = dataSize - i; |
syundo0730 | 0:78ba160ba5f3 | 2956 | |
syundo0730 | 0:78ba160ba5f3 | 2957 | // make sure this chunk doesn't go past the bank boundary (256 bytes) |
syundo0730 | 0:78ba160ba5f3 | 2958 | if (chunkSize > 256 - address) chunkSize = 256 - address; |
syundo0730 | 0:78ba160ba5f3 | 2959 | |
syundo0730 | 0:78ba160ba5f3 | 2960 | if (useProgMem) { |
syundo0730 | 0:78ba160ba5f3 | 2961 | // write the chunk of data as specified |
syundo0730 | 0:78ba160ba5f3 | 2962 | for (j = 0; j < chunkSize; j++) progBuffer[j] = pgm_read_byte(data + i + j); |
syundo0730 | 0:78ba160ba5f3 | 2963 | } else { |
syundo0730 | 0:78ba160ba5f3 | 2964 | // write the chunk of data as specified |
syundo0730 | 0:78ba160ba5f3 | 2965 | progBuffer = (uint8_t *)data + i; |
syundo0730 | 0:78ba160ba5f3 | 2966 | } |
syundo0730 | 0:78ba160ba5f3 | 2967 | |
syundo0730 | 0:78ba160ba5f3 | 2968 | I2Cdev::writeBytes(devAddr, MPU9150_RA_MEM_R_W, chunkSize, progBuffer); |
syundo0730 | 0:78ba160ba5f3 | 2969 | |
syundo0730 | 0:78ba160ba5f3 | 2970 | // verify data if needed |
syundo0730 | 0:78ba160ba5f3 | 2971 | if (verify && verifyBuffer) { |
syundo0730 | 0:78ba160ba5f3 | 2972 | setMemoryBank(bank); |
syundo0730 | 0:78ba160ba5f3 | 2973 | setMemoryStartAddress(address); |
syundo0730 | 0:78ba160ba5f3 | 2974 | I2Cdev::readBytes(devAddr, MPU9150_RA_MEM_R_W, chunkSize, verifyBuffer); |
syundo0730 | 0:78ba160ba5f3 | 2975 | if (memcmp(progBuffer, verifyBuffer, chunkSize) != 0) { |
syundo0730 | 0:78ba160ba5f3 | 2976 | /*Serial.print("Block write verification error, bank "); |
syundo0730 | 0:78ba160ba5f3 | 2977 | Serial.print(bank, DEC); |
syundo0730 | 0:78ba160ba5f3 | 2978 | Serial.print(", address "); |
syundo0730 | 0:78ba160ba5f3 | 2979 | Serial.print(address, DEC); |
syundo0730 | 0:78ba160ba5f3 | 2980 | Serial.print("!\nExpected:"); |
syundo0730 | 0:78ba160ba5f3 | 2981 | for (j = 0; j < chunkSize; j++) { |
syundo0730 | 0:78ba160ba5f3 | 2982 | Serial.print(" 0x"); |
syundo0730 | 0:78ba160ba5f3 | 2983 | if (progBuffer[j] < 16) Serial.print("0"); |
syundo0730 | 0:78ba160ba5f3 | 2984 | Serial.print(progBuffer[j], HEX); |
syundo0730 | 0:78ba160ba5f3 | 2985 | } |
syundo0730 | 0:78ba160ba5f3 | 2986 | Serial.print("\nReceived:"); |
syundo0730 | 0:78ba160ba5f3 | 2987 | for (uint8_t j = 0; j < chunkSize; j++) { |
syundo0730 | 0:78ba160ba5f3 | 2988 | Serial.print(" 0x"); |
syundo0730 | 0:78ba160ba5f3 | 2989 | if (verifyBuffer[i + j] < 16) Serial.print("0"); |
syundo0730 | 0:78ba160ba5f3 | 2990 | Serial.print(verifyBuffer[i + j], HEX); |
syundo0730 | 0:78ba160ba5f3 | 2991 | } |
syundo0730 | 0:78ba160ba5f3 | 2992 | Serial.print("\n");*/ |
syundo0730 | 0:78ba160ba5f3 | 2993 | free(verifyBuffer); |
syundo0730 | 0:78ba160ba5f3 | 2994 | if (useProgMem) free(progBuffer); |
syundo0730 | 0:78ba160ba5f3 | 2995 | return false; // uh oh. |
syundo0730 | 0:78ba160ba5f3 | 2996 | } |
syundo0730 | 0:78ba160ba5f3 | 2997 | } |
syundo0730 | 0:78ba160ba5f3 | 2998 | |
syundo0730 | 0:78ba160ba5f3 | 2999 | // increase byte index by [chunkSize] |
syundo0730 | 0:78ba160ba5f3 | 3000 | i += chunkSize; |
syundo0730 | 0:78ba160ba5f3 | 3001 | |
syundo0730 | 0:78ba160ba5f3 | 3002 | // uint8_t automatically wraps to 0 at 256 |
syundo0730 | 0:78ba160ba5f3 | 3003 | address += chunkSize; |
syundo0730 | 0:78ba160ba5f3 | 3004 | |
syundo0730 | 0:78ba160ba5f3 | 3005 | // if we aren't done, update bank (if necessary) and address |
syundo0730 | 0:78ba160ba5f3 | 3006 | if (i < dataSize) { |
syundo0730 | 0:78ba160ba5f3 | 3007 | if (address == 0) bank++; |
syundo0730 | 0:78ba160ba5f3 | 3008 | setMemoryBank(bank); |
syundo0730 | 0:78ba160ba5f3 | 3009 | setMemoryStartAddress(address); |
syundo0730 | 0:78ba160ba5f3 | 3010 | } |
syundo0730 | 0:78ba160ba5f3 | 3011 | } |
syundo0730 | 0:78ba160ba5f3 | 3012 | if (verify) free(verifyBuffer); |
syundo0730 | 0:78ba160ba5f3 | 3013 | if (useProgMem) free(progBuffer); |
syundo0730 | 0:78ba160ba5f3 | 3014 | return true; |
syundo0730 | 0:78ba160ba5f3 | 3015 | } |
syundo0730 | 0:78ba160ba5f3 | 3016 | bool MPU9150::writeProgMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify) { |
syundo0730 | 0:78ba160ba5f3 | 3017 | return writeMemoryBlock(data, dataSize, bank, address, verify, true); |
syundo0730 | 0:78ba160ba5f3 | 3018 | } |
syundo0730 | 0:78ba160ba5f3 | 3019 | bool MPU9150::writeDMPConfigurationSet(const uint8_t *data, uint16_t dataSize, bool useProgMem) { |
syundo0730 | 0:78ba160ba5f3 | 3020 | uint8_t *progBuffer, success, special; |
syundo0730 | 0:78ba160ba5f3 | 3021 | uint16_t i, j; |
syundo0730 | 0:78ba160ba5f3 | 3022 | if (useProgMem) { |
syundo0730 | 0:78ba160ba5f3 | 3023 | progBuffer = (uint8_t *)malloc(8); // assume 8-byte blocks, realloc later if necessary |
syundo0730 | 0:78ba160ba5f3 | 3024 | } |
syundo0730 | 0:78ba160ba5f3 | 3025 | |
syundo0730 | 0:78ba160ba5f3 | 3026 | // config set data is a long string of blocks with the following structure: |
syundo0730 | 0:78ba160ba5f3 | 3027 | // [bank] [offset] [length] [byte[0], byte[1], ..., byte[length]] |
syundo0730 | 0:78ba160ba5f3 | 3028 | uint8_t bank, offset, length; |
syundo0730 | 0:78ba160ba5f3 | 3029 | for (i = 0; i < dataSize;) { |
syundo0730 | 0:78ba160ba5f3 | 3030 | if (useProgMem) { |
syundo0730 | 0:78ba160ba5f3 | 3031 | bank = pgm_read_byte(data + i++); |
syundo0730 | 0:78ba160ba5f3 | 3032 | offset = pgm_read_byte(data + i++); |
syundo0730 | 0:78ba160ba5f3 | 3033 | length = pgm_read_byte(data + i++); |
syundo0730 | 0:78ba160ba5f3 | 3034 | } else { |
syundo0730 | 0:78ba160ba5f3 | 3035 | bank = data[i++]; |
syundo0730 | 0:78ba160ba5f3 | 3036 | offset = data[i++]; |
syundo0730 | 0:78ba160ba5f3 | 3037 | length = data[i++]; |
syundo0730 | 0:78ba160ba5f3 | 3038 | } |
syundo0730 | 0:78ba160ba5f3 | 3039 | |
syundo0730 | 0:78ba160ba5f3 | 3040 | // write data or perform special action |
syundo0730 | 0:78ba160ba5f3 | 3041 | if (length > 0) { |
syundo0730 | 0:78ba160ba5f3 | 3042 | // regular block of data to write |
syundo0730 | 0:78ba160ba5f3 | 3043 | /*Serial.print("Writing config block to bank "); |
syundo0730 | 0:78ba160ba5f3 | 3044 | Serial.print(bank); |
syundo0730 | 0:78ba160ba5f3 | 3045 | Serial.print(", offset "); |
syundo0730 | 0:78ba160ba5f3 | 3046 | Serial.print(offset); |
syundo0730 | 0:78ba160ba5f3 | 3047 | Serial.print(", length="); |
syundo0730 | 0:78ba160ba5f3 | 3048 | Serial.println(length);*/ |
syundo0730 | 0:78ba160ba5f3 | 3049 | if (useProgMem) { |
syundo0730 | 0:78ba160ba5f3 | 3050 | if (sizeof(progBuffer) < length) progBuffer = (uint8_t *)realloc(progBuffer, length); |
syundo0730 | 0:78ba160ba5f3 | 3051 | for (j = 0; j < length; j++) progBuffer[j] = pgm_read_byte(data + i + j); |
syundo0730 | 0:78ba160ba5f3 | 3052 | } else { |
syundo0730 | 0:78ba160ba5f3 | 3053 | progBuffer = (uint8_t *)data + i; |
syundo0730 | 0:78ba160ba5f3 | 3054 | } |
syundo0730 | 0:78ba160ba5f3 | 3055 | success = writeMemoryBlock(progBuffer, length, bank, offset, true); |
syundo0730 | 0:78ba160ba5f3 | 3056 | i += length; |
syundo0730 | 0:78ba160ba5f3 | 3057 | } else { |
syundo0730 | 0:78ba160ba5f3 | 3058 | // special instruction |
syundo0730 | 0:78ba160ba5f3 | 3059 | // NOTE: this kind of behavior (what and when to do certain things) |
syundo0730 | 0:78ba160ba5f3 | 3060 | // is totally undocumented. This code is in here based on observed |
syundo0730 | 0:78ba160ba5f3 | 3061 | // behavior only, and exactly why (or even whether) it has to be here |
syundo0730 | 0:78ba160ba5f3 | 3062 | // is anybody's guess for now. |
syundo0730 | 0:78ba160ba5f3 | 3063 | if (useProgMem) { |
syundo0730 | 0:78ba160ba5f3 | 3064 | special = pgm_read_byte(data + i++); |
syundo0730 | 0:78ba160ba5f3 | 3065 | } else { |
syundo0730 | 0:78ba160ba5f3 | 3066 | special = data[i++]; |
syundo0730 | 0:78ba160ba5f3 | 3067 | } |
syundo0730 | 0:78ba160ba5f3 | 3068 | /*Serial.print("Special command code "); |
syundo0730 | 0:78ba160ba5f3 | 3069 | Serial.print(special, HEX); |
syundo0730 | 0:78ba160ba5f3 | 3070 | Serial.println(" found...");*/ |
syundo0730 | 0:78ba160ba5f3 | 3071 | if (special == 0x01) { |
syundo0730 | 0:78ba160ba5f3 | 3072 | // enable DMP-related interrupts |
syundo0730 | 0:78ba160ba5f3 | 3073 | |
syundo0730 | 0:78ba160ba5f3 | 3074 | //setIntZeroMotionEnabled(true); |
syundo0730 | 0:78ba160ba5f3 | 3075 | //setIntFIFOBufferOverflowEnabled(true); |
syundo0730 | 0:78ba160ba5f3 | 3076 | //setIntDMPEnabled(true); |
syundo0730 | 0:78ba160ba5f3 | 3077 | I2Cdev::writeByte(devAddr, MPU9150_RA_INT_ENABLE, 0x32); // single operation |
syundo0730 | 0:78ba160ba5f3 | 3078 | |
syundo0730 | 0:78ba160ba5f3 | 3079 | success = true; |
syundo0730 | 0:78ba160ba5f3 | 3080 | } else { |
syundo0730 | 0:78ba160ba5f3 | 3081 | // unknown special command |
syundo0730 | 0:78ba160ba5f3 | 3082 | success = false; |
syundo0730 | 0:78ba160ba5f3 | 3083 | } |
syundo0730 | 0:78ba160ba5f3 | 3084 | } |
syundo0730 | 0:78ba160ba5f3 | 3085 | |
syundo0730 | 0:78ba160ba5f3 | 3086 | if (!success) { |
syundo0730 | 0:78ba160ba5f3 | 3087 | if (useProgMem) free(progBuffer); |
syundo0730 | 0:78ba160ba5f3 | 3088 | return false; // uh oh |
syundo0730 | 0:78ba160ba5f3 | 3089 | } |
syundo0730 | 0:78ba160ba5f3 | 3090 | } |
syundo0730 | 0:78ba160ba5f3 | 3091 | if (useProgMem) free(progBuffer); |
syundo0730 | 0:78ba160ba5f3 | 3092 | return true; |
syundo0730 | 0:78ba160ba5f3 | 3093 | } |
syundo0730 | 0:78ba160ba5f3 | 3094 | bool MPU9150::writeProgDMPConfigurationSet(const uint8_t *data, uint16_t dataSize) { |
syundo0730 | 0:78ba160ba5f3 | 3095 | return writeDMPConfigurationSet(data, dataSize, true); |
syundo0730 | 0:78ba160ba5f3 | 3096 | } |
syundo0730 | 0:78ba160ba5f3 | 3097 | |
syundo0730 | 0:78ba160ba5f3 | 3098 | // DMP_CFG_1 register |
syundo0730 | 0:78ba160ba5f3 | 3099 | |
syundo0730 | 0:78ba160ba5f3 | 3100 | uint8_t MPU9150::getDMPConfig1() { |
syundo0730 | 0:78ba160ba5f3 | 3101 | I2Cdev::readByte(devAddr, MPU9150_RA_DMP_CFG_1, buffer); |
syundo0730 | 0:78ba160ba5f3 | 3102 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 3103 | } |
syundo0730 | 0:78ba160ba5f3 | 3104 | void MPU9150::setDMPConfig1(uint8_t config) { |
syundo0730 | 0:78ba160ba5f3 | 3105 | I2Cdev::writeByte(devAddr, MPU9150_RA_DMP_CFG_1, config); |
syundo0730 | 0:78ba160ba5f3 | 3106 | } |
syundo0730 | 0:78ba160ba5f3 | 3107 | |
syundo0730 | 0:78ba160ba5f3 | 3108 | // DMP_CFG_2 register |
syundo0730 | 0:78ba160ba5f3 | 3109 | |
syundo0730 | 0:78ba160ba5f3 | 3110 | uint8_t MPU9150::getDMPConfig2() { |
syundo0730 | 0:78ba160ba5f3 | 3111 | I2Cdev::readByte(devAddr, MPU9150_RA_DMP_CFG_2, buffer); |
syundo0730 | 0:78ba160ba5f3 | 3112 | return buffer[0]; |
syundo0730 | 0:78ba160ba5f3 | 3113 | } |
syundo0730 | 0:78ba160ba5f3 | 3114 | void MPU9150::setDMPConfig2(uint8_t config) { |
syundo0730 | 0:78ba160ba5f3 | 3115 | I2Cdev::writeByte(devAddr, MPU9150_RA_DMP_CFG_2, config); |
syundo0730 | 0:78ba160ba5f3 | 3116 | } |