Daiki Kato / mbed-os-lychee

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Dependents:   mbed-os-example-blinky-gr-lychee GR-Boads_Camera_sample GR-Boards_Audio_Recoder GR-Boads_Camera_DisplayApp ... more

targets/TARGET_RENESAS/TARGET_RZA1XX/common/gic.c@0:f782d9c66c49, 2018-02-02 (annotated)

Committer:
dkato
Date:
Fri Feb 02 05:42:23 2018 +0000
Revision:
0:f782d9c66c49
mbed-os for GR-LYCHEE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:f782d9c66c49 1 /**************************************************************************//**
dkato 0:f782d9c66c49 2 * @file gic.c
dkato 0:f782d9c66c49 3 * @brief Implementation of GIC functions declared in CMSIS Cortex-A9 Core Peripheral Access Layer Header File
dkato 0:f782d9c66c49 4 * @version
dkato 0:f782d9c66c49 5 * @date 19 Sept 2013
dkato 0:f782d9c66c49 6 *
dkato 0:f782d9c66c49 7 * @note
dkato 0:f782d9c66c49 8 *
dkato 0:f782d9c66c49 9 ******************************************************************************/
dkato 0:f782d9c66c49 10 /* Copyright (c) 2011 - 2013 ARM LIMITED
dkato 0:f782d9c66c49 11
dkato 0:f782d9c66c49 12 All rights reserved.
dkato 0:f782d9c66c49 13 Redistribution and use in source and binary forms, with or without
dkato 0:f782d9c66c49 14 modification, are permitted provided that the following conditions are met:
dkato 0:f782d9c66c49 15 - Redistributions of source code must retain the above copyright
dkato 0:f782d9c66c49 16 notice, this list of conditions and the following disclaimer.
dkato 0:f782d9c66c49 17 - Redistributions in binary form must reproduce the above copyright
dkato 0:f782d9c66c49 18 notice, this list of conditions and the following disclaimer in the
dkato 0:f782d9c66c49 19 documentation and/or other materials provided with the distribution.
dkato 0:f782d9c66c49 20 - Neither the name of ARM nor the names of its contributors may be used
dkato 0:f782d9c66c49 21 to endorse or promote products derived from this software without
dkato 0:f782d9c66c49 22 specific prior written permission.
dkato 0:f782d9c66c49 23 *
dkato 0:f782d9c66c49 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
dkato 0:f782d9c66c49 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
dkato 0:f782d9c66c49 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
dkato 0:f782d9c66c49 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
dkato 0:f782d9c66c49 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
dkato 0:f782d9c66c49 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
dkato 0:f782d9c66c49 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
dkato 0:f782d9c66c49 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
dkato 0:f782d9c66c49 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
dkato 0:f782d9c66c49 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
dkato 0:f782d9c66c49 34 POSSIBILITY OF SUCH DAMAGE.
dkato 0:f782d9c66c49 35 ---------------------------------------------------------------------------*/
dkato 0:f782d9c66c49 36
dkato 0:f782d9c66c49 37 #include "cmsis.h"
dkato 0:f782d9c66c49 38
dkato 0:f782d9c66c49 39 #define GICDistributor ((GICDistributor_Type *) Renesas_RZ_A1_GIC_DISTRIBUTOR_BASE ) /*!< GIC Distributor configuration struct */
dkato 0:f782d9c66c49 40 #define GICInterface ((GICInterface_Type *) Renesas_RZ_A1_GIC_INTERFACE_BASE ) /*!< GIC Interface configuration struct */
dkato 0:f782d9c66c49 41
dkato 0:f782d9c66c49 42 /* Globals for use of post-scatterloading code that must access GIC */
dkato 0:f782d9c66c49 43 const uint32_t GICDistributor_BASE = Renesas_RZ_A1_GIC_DISTRIBUTOR_BASE;
dkato 0:f782d9c66c49 44 const uint32_t GICInterface_BASE = Renesas_RZ_A1_GIC_INTERFACE_BASE;
dkato 0:f782d9c66c49 45
dkato 0:f782d9c66c49 46 void GIC_EnableDistributor(void)
dkato 0:f782d9c66c49 47 {
dkato 0:f782d9c66c49 48 GICDistributor->ICDDCR |= 1; //enable distributor
dkato 0:f782d9c66c49 49 }
dkato 0:f782d9c66c49 50
dkato 0:f782d9c66c49 51 void GIC_DisableDistributor(void)
dkato 0:f782d9c66c49 52 {
dkato 0:f782d9c66c49 53 GICDistributor->ICDDCR &=~1; //disable distributor
dkato 0:f782d9c66c49 54 }
dkato 0:f782d9c66c49 55
dkato 0:f782d9c66c49 56 uint32_t GIC_DistributorInfo(void)
dkato 0:f782d9c66c49 57 {
dkato 0:f782d9c66c49 58 return (uint32_t)(GICDistributor->ICDICTR);
dkato 0:f782d9c66c49 59 }
dkato 0:f782d9c66c49 60
dkato 0:f782d9c66c49 61 uint32_t GIC_DistributorImplementer(void)
dkato 0:f782d9c66c49 62 {
dkato 0:f782d9c66c49 63 return (uint32_t)(GICDistributor->ICDIIDR);
dkato 0:f782d9c66c49 64 }
dkato 0:f782d9c66c49 65
dkato 0:f782d9c66c49 66 void GIC_SetTarget(IRQn_Type IRQn, uint32_t cpu_target)
dkato 0:f782d9c66c49 67 {
dkato 0:f782d9c66c49 68 volatile uint8_t* field = (volatile uint8_t*)&(GICDistributor->ICDIPTR[IRQn / 4]);
dkato 0:f782d9c66c49 69 field += IRQn % 4;
dkato 0:f782d9c66c49 70 *field = (uint8_t)cpu_target & 0xf;
dkato 0:f782d9c66c49 71 }
dkato 0:f782d9c66c49 72
dkato 0:f782d9c66c49 73 void GIC_SetICDICFR (const uint32_t *ICDICFRn)
dkato 0:f782d9c66c49 74 {
dkato 0:f782d9c66c49 75 uint32_t i, num_irq;
dkato 0:f782d9c66c49 76
dkato 0:f782d9c66c49 77 //Get the maximum number of interrupts that the GIC supports
dkato 0:f782d9c66c49 78 num_irq = 32 * ((GIC_DistributorInfo() & 0x1f) + 1);
dkato 0:f782d9c66c49 79
dkato 0:f782d9c66c49 80 for (i = 0; i < (num_irq/16); i++)
dkato 0:f782d9c66c49 81 {
dkato 0:f782d9c66c49 82 GICDistributor->ICDISPR[i] = *ICDICFRn++;
dkato 0:f782d9c66c49 83 }
dkato 0:f782d9c66c49 84 }
dkato 0:f782d9c66c49 85
dkato 0:f782d9c66c49 86 uint32_t GIC_GetTarget(IRQn_Type IRQn)
dkato 0:f782d9c66c49 87 {
dkato 0:f782d9c66c49 88 volatile uint8_t* field = (volatile uint8_t*)&(GICDistributor->ICDIPTR[IRQn / 4]);
dkato 0:f782d9c66c49 89 field += IRQn % 4;
dkato 0:f782d9c66c49 90 return ((uint32_t)*field & 0xf);
dkato 0:f782d9c66c49 91 }
dkato 0:f782d9c66c49 92
dkato 0:f782d9c66c49 93 void GIC_EnableInterface(void)
dkato 0:f782d9c66c49 94 {
dkato 0:f782d9c66c49 95 GICInterface->ICCICR |= 1; //enable interface
dkato 0:f782d9c66c49 96 }
dkato 0:f782d9c66c49 97
dkato 0:f782d9c66c49 98 void GIC_DisableInterface(void)
dkato 0:f782d9c66c49 99 {
dkato 0:f782d9c66c49 100 GICInterface->ICCICR &=~1; //disable distributor
dkato 0:f782d9c66c49 101 }
dkato 0:f782d9c66c49 102
dkato 0:f782d9c66c49 103 IRQn_Type GIC_AcknowledgePending(void)
dkato 0:f782d9c66c49 104 {
dkato 0:f782d9c66c49 105 return (IRQn_Type)(GICInterface->ICCIAR);
dkato 0:f782d9c66c49 106 }
dkato 0:f782d9c66c49 107
dkato 0:f782d9c66c49 108 void GIC_EndInterrupt(IRQn_Type IRQn)
dkato 0:f782d9c66c49 109 {
dkato 0:f782d9c66c49 110 GICInterface->ICCEOIR = IRQn;
dkato 0:f782d9c66c49 111 }
dkato 0:f782d9c66c49 112
dkato 0:f782d9c66c49 113 void GIC_EnableIRQ(IRQn_Type IRQn)
dkato 0:f782d9c66c49 114 {
dkato 0:f782d9c66c49 115 GICDistributor->ICDISER[IRQn / 32] = 1 << (IRQn % 32);
dkato 0:f782d9c66c49 116 }
dkato 0:f782d9c66c49 117
dkato 0:f782d9c66c49 118 void GIC_DisableIRQ(IRQn_Type IRQn)
dkato 0:f782d9c66c49 119 {
dkato 0:f782d9c66c49 120 GICDistributor->ICDICER[IRQn / 32] = 1 << (IRQn % 32);
dkato 0:f782d9c66c49 121 }
dkato 0:f782d9c66c49 122
dkato 0:f782d9c66c49 123 void GIC_SetPendingIRQ(IRQn_Type IRQn)
dkato 0:f782d9c66c49 124 {
dkato 0:f782d9c66c49 125 GICDistributor->ICDISPR[IRQn / 32] = 1 << (IRQn % 32);
dkato 0:f782d9c66c49 126 }
dkato 0:f782d9c66c49 127
dkato 0:f782d9c66c49 128 void GIC_ClearPendingIRQ(IRQn_Type IRQn)
dkato 0:f782d9c66c49 129 {
dkato 0:f782d9c66c49 130 GICDistributor->ICDICPR[IRQn / 32] = 1 << (IRQn % 32);
dkato 0:f782d9c66c49 131 }
dkato 0:f782d9c66c49 132
dkato 0:f782d9c66c49 133 void GIC_SetLevelModel(IRQn_Type IRQn, int8_t edge_level, int8_t model)
dkato 0:f782d9c66c49 134 {
dkato 0:f782d9c66c49 135 volatile uint8_t* field = (volatile uint8_t*)&(GICDistributor->ICDICFR[IRQn / 16]);
dkato 0:f782d9c66c49 136 int bit_shift = (IRQn % 16)<<1;
dkato 0:f782d9c66c49 137 uint8_t save_byte;
dkato 0:f782d9c66c49 138
dkato 0:f782d9c66c49 139 field += (bit_shift / 8);
dkato 0:f782d9c66c49 140 bit_shift %= 8;
dkato 0:f782d9c66c49 141
dkato 0:f782d9c66c49 142 save_byte = *field;
dkato 0:f782d9c66c49 143 save_byte &= ((uint8_t)~(3u << bit_shift));
dkato 0:f782d9c66c49 144
dkato 0:f782d9c66c49 145 *field = save_byte | ((uint8_t)((edge_level<<1) | model)<< bit_shift);
dkato 0:f782d9c66c49 146 }
dkato 0:f782d9c66c49 147
dkato 0:f782d9c66c49 148 void GIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
dkato 0:f782d9c66c49 149 {
dkato 0:f782d9c66c49 150 volatile uint8_t* field = (volatile uint8_t*)&(GICDistributor->ICDIPR[IRQn / 4]);
dkato 0:f782d9c66c49 151 field += (IRQn % 4);
dkato 0:f782d9c66c49 152 *field = (uint8_t)priority;
dkato 0:f782d9c66c49 153 }
dkato 0:f782d9c66c49 154
dkato 0:f782d9c66c49 155 uint32_t GIC_GetPriority(IRQn_Type IRQn)
dkato 0:f782d9c66c49 156 {
dkato 0:f782d9c66c49 157 volatile uint8_t* field = (volatile uint8_t*)&(GICDistributor->ICDIPR[IRQn / 4]);
dkato 0:f782d9c66c49 158 field += (IRQn % 4);
dkato 0:f782d9c66c49 159 return (uint32_t)*field;
dkato 0:f782d9c66c49 160 }
dkato 0:f782d9c66c49 161
dkato 0:f782d9c66c49 162 void GIC_InterfacePriorityMask(uint32_t priority)
dkato 0:f782d9c66c49 163 {
dkato 0:f782d9c66c49 164 GICInterface->ICCPMR = priority & 0xff; //set priority mask
dkato 0:f782d9c66c49 165 }
dkato 0:f782d9c66c49 166
dkato 0:f782d9c66c49 167 void GIC_SetBinaryPoint(uint32_t binary_point)
dkato 0:f782d9c66c49 168 {
dkato 0:f782d9c66c49 169 GICInterface->ICCBPR = binary_point & 0x07; //set binary point
dkato 0:f782d9c66c49 170 }
dkato 0:f782d9c66c49 171
dkato 0:f782d9c66c49 172 uint32_t GIC_GetBinaryPoint(uint32_t binary_point)
dkato 0:f782d9c66c49 173 {
dkato 0:f782d9c66c49 174 return (uint32_t)GICInterface->ICCBPR;
dkato 0:f782d9c66c49 175 }
dkato 0:f782d9c66c49 176
dkato 0:f782d9c66c49 177 uint32_t GIC_GetIRQStatus(IRQn_Type IRQn)
dkato 0:f782d9c66c49 178 {
dkato 0:f782d9c66c49 179 uint32_t pending, active;
dkato 0:f782d9c66c49 180
dkato 0:f782d9c66c49 181 active = ((GICDistributor->ICDABR[IRQn / 32]) >> (IRQn % 32)) & 0x1;
dkato 0:f782d9c66c49 182 pending =((GICDistributor->ICDISPR[IRQn / 32]) >> (IRQn % 32)) & 0x1;
dkato 0:f782d9c66c49 183
dkato 0:f782d9c66c49 184 return ((active<<1) | pending);
dkato 0:f782d9c66c49 185 }
dkato 0:f782d9c66c49 186
dkato 0:f782d9c66c49 187 void GIC_SendSGI(IRQn_Type IRQn, uint32_t target_list, uint32_t filter_list)
dkato 0:f782d9c66c49 188 {
dkato 0:f782d9c66c49 189 GICDistributor->ICDSGIR = ((filter_list & 0x3) << 24) | ((target_list & 0xff) << 16) | (IRQn & 0xf);
dkato 0:f782d9c66c49 190 }
dkato 0:f782d9c66c49 191
dkato 0:f782d9c66c49 192 void GIC_DistInit(void)
dkato 0:f782d9c66c49 193 {
dkato 0:f782d9c66c49 194 //IRQn_Type i;
dkato 0:f782d9c66c49 195 uint32_t i;
dkato 0:f782d9c66c49 196 uint32_t num_irq = 0;
dkato 0:f782d9c66c49 197 uint32_t priority_field;
dkato 0:f782d9c66c49 198
dkato 0:f782d9c66c49 199 //A reset sets all bits in the ICDISRs corresponding to the SPIs to 0,
dkato 0:f782d9c66c49 200 //configuring all of the interrupts as Secure.
dkato 0:f782d9c66c49 201
dkato 0:f782d9c66c49 202 //Disable interrupt forwarding
dkato 0:f782d9c66c49 203 GIC_DisableDistributor();
dkato 0:f782d9c66c49 204 //Get the maximum number of interrupts that the GIC supports
dkato 0:f782d9c66c49 205 num_irq = 32 * ((GIC_DistributorInfo() & 0x1f) + 1);
dkato 0:f782d9c66c49 206
dkato 0:f782d9c66c49 207 /* Priority level is implementation defined.
dkato 0:f782d9c66c49 208 To determine the number of priority bits implemented write 0xFF to an ICDIPR
dkato 0:f782d9c66c49 209 priority field and read back the value stored.*/
dkato 0:f782d9c66c49 210 GIC_SetPriority((IRQn_Type)0, 0xff);
dkato 0:f782d9c66c49 211 priority_field = GIC_GetPriority((IRQn_Type)0);
dkato 0:f782d9c66c49 212
dkato 0:f782d9c66c49 213 for (i = 32; i < num_irq; i++)
dkato 0:f782d9c66c49 214 {
dkato 0:f782d9c66c49 215 //Disable all SPI the interrupts
dkato 0:f782d9c66c49 216 GIC_DisableIRQ((IRQn_Type)i);
dkato 0:f782d9c66c49 217 //Set level-sensitive and N-N model
dkato 0:f782d9c66c49 218 //GIC_SetLevelModel(i, 0, 0);
dkato 0:f782d9c66c49 219 //Set priority
dkato 0:f782d9c66c49 220 GIC_SetPriority((IRQn_Type)i, priority_field/2);
dkato 0:f782d9c66c49 221 //Set target list to "all cpus"
dkato 0:f782d9c66c49 222 GIC_SetTarget((IRQn_Type)i, 0xff);
dkato 0:f782d9c66c49 223 }
dkato 0:f782d9c66c49 224 /* Set level-edge and 1-N model */
dkato 0:f782d9c66c49 225 /* GICDistributor->ICDICFR[ 0] is read only */
dkato 0:f782d9c66c49 226 GICDistributor->ICDICFR[ 1] = 0x00000055;
dkato 0:f782d9c66c49 227 GICDistributor->ICDICFR[ 2] = 0xFFFD5555;
dkato 0:f782d9c66c49 228 GICDistributor->ICDICFR[ 3] = 0x555FFFFF;
dkato 0:f782d9c66c49 229 GICDistributor->ICDICFR[ 4] = 0x55555555;
dkato 0:f782d9c66c49 230 GICDistributor->ICDICFR[ 5] = 0x55555555;
dkato 0:f782d9c66c49 231 GICDistributor->ICDICFR[ 6] = 0x55555555;
dkato 0:f782d9c66c49 232 GICDistributor->ICDICFR[ 7] = 0x55555555;
dkato 0:f782d9c66c49 233 GICDistributor->ICDICFR[ 8] = 0x5555F555;
dkato 0:f782d9c66c49 234 GICDistributor->ICDICFR[ 9] = 0x55555555;
dkato 0:f782d9c66c49 235 GICDistributor->ICDICFR[10] = 0x55555555;
dkato 0:f782d9c66c49 236 GICDistributor->ICDICFR[11] = 0xF5555555;
dkato 0:f782d9c66c49 237 GICDistributor->ICDICFR[12] = 0xF555F555;
dkato 0:f782d9c66c49 238 GICDistributor->ICDICFR[13] = 0x5555F555;
dkato 0:f782d9c66c49 239 GICDistributor->ICDICFR[14] = 0x55555555;
dkato 0:f782d9c66c49 240 GICDistributor->ICDICFR[15] = 0x55555555;
dkato 0:f782d9c66c49 241 GICDistributor->ICDICFR[16] = 0x55555555;
dkato 0:f782d9c66c49 242 GICDistributor->ICDICFR[17] = 0xFD555555;
dkato 0:f782d9c66c49 243 GICDistributor->ICDICFR[18] = 0x55555557;
dkato 0:f782d9c66c49 244 GICDistributor->ICDICFR[19] = 0x55555555;
dkato 0:f782d9c66c49 245 GICDistributor->ICDICFR[20] = 0xFFD55555;
dkato 0:f782d9c66c49 246 GICDistributor->ICDICFR[21] = 0x5F55557F;
dkato 0:f782d9c66c49 247 GICDistributor->ICDICFR[22] = 0xFD55555F;
dkato 0:f782d9c66c49 248 GICDistributor->ICDICFR[23] = 0x55555557;
dkato 0:f782d9c66c49 249 GICDistributor->ICDICFR[24] = 0x55555555;
dkato 0:f782d9c66c49 250 GICDistributor->ICDICFR[25] = 0x55555555;
dkato 0:f782d9c66c49 251 GICDistributor->ICDICFR[26] = 0x55555555;
dkato 0:f782d9c66c49 252 GICDistributor->ICDICFR[27] = 0x55555555;
dkato 0:f782d9c66c49 253 GICDistributor->ICDICFR[28] = 0x55555555;
dkato 0:f782d9c66c49 254 GICDistributor->ICDICFR[29] = 0x55555555;
dkato 0:f782d9c66c49 255 GICDistributor->ICDICFR[30] = 0x55555555;
dkato 0:f782d9c66c49 256 GICDistributor->ICDICFR[31] = 0x55555555;
dkato 0:f782d9c66c49 257 GICDistributor->ICDICFR[32] = 0x55555555;
dkato 0:f782d9c66c49 258 GICDistributor->ICDICFR[33] = 0x55555555;
dkato 0:f782d9c66c49 259
dkato 0:f782d9c66c49 260 //Enable distributor
dkato 0:f782d9c66c49 261 GIC_EnableDistributor();
dkato 0:f782d9c66c49 262 }
dkato 0:f782d9c66c49 263
dkato 0:f782d9c66c49 264 void GIC_CPUInterfaceInit(void)
dkato 0:f782d9c66c49 265 {
dkato 0:f782d9c66c49 266 IRQn_Type i;
dkato 0:f782d9c66c49 267 uint32_t priority_field;
dkato 0:f782d9c66c49 268
dkato 0:f782d9c66c49 269 //A reset sets all bits in the ICDISRs corresponding to the SPIs to 0,
dkato 0:f782d9c66c49 270 //configuring all of the interrupts as Secure.
dkato 0:f782d9c66c49 271
dkato 0:f782d9c66c49 272 //Disable interrupt forwarding
dkato 0:f782d9c66c49 273 GIC_DisableInterface();
dkato 0:f782d9c66c49 274
dkato 0:f782d9c66c49 275 /* Priority level is implementation defined.
dkato 0:f782d9c66c49 276 To determine the number of priority bits implemented write 0xFF to an ICDIPR
dkato 0:f782d9c66c49 277 priority field and read back the value stored.*/
dkato 0:f782d9c66c49 278 GIC_SetPriority((IRQn_Type)0, 0xff);
dkato 0:f782d9c66c49 279 priority_field = GIC_GetPriority((IRQn_Type)0);
dkato 0:f782d9c66c49 280
dkato 0:f782d9c66c49 281 //SGI and PPI
dkato 0:f782d9c66c49 282 for (i = (IRQn_Type)0; i < 32; i++)
dkato 0:f782d9c66c49 283 {
dkato 0:f782d9c66c49 284 //Set level-sensitive and N-N model for PPI
dkato 0:f782d9c66c49 285 //if(i > 15)
dkato 0:f782d9c66c49 286 //GIC_SetLevelModel(i, 0, 0);
dkato 0:f782d9c66c49 287 //Disable SGI and PPI interrupts
dkato 0:f782d9c66c49 288 GIC_DisableIRQ(i);
dkato 0:f782d9c66c49 289 //Set priority
dkato 0:f782d9c66c49 290 GIC_SetPriority(i, priority_field/2);
dkato 0:f782d9c66c49 291 }
dkato 0:f782d9c66c49 292 //Enable interface
dkato 0:f782d9c66c49 293 GIC_EnableInterface();
dkato 0:f782d9c66c49 294 //Set binary point to 0
dkato 0:f782d9c66c49 295 GIC_SetBinaryPoint(0);
dkato 0:f782d9c66c49 296 //Set priority mask
dkato 0:f782d9c66c49 297 GIC_InterfacePriorityMask(0xff);
dkato 0:f782d9c66c49 298 }
dkato 0:f782d9c66c49 299
dkato 0:f782d9c66c49 300 void GIC_Enable(void)
dkato 0:f782d9c66c49 301 {
dkato 0:f782d9c66c49 302 GIC_DistInit();
dkato 0:f782d9c66c49 303 GIC_CPUInterfaceInit(); //per CPU
dkato 0:f782d9c66c49 304 }
dkato 0:f782d9c66c49 305