Daiki Kato / mbed-os-lychee

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Dependents:   mbed-os-example-blinky-gr-lychee GR-Boads_Camera_sample GR-Boards_Audio_Recoder GR-Boads_Camera_DisplayApp ... more

targets/TARGET_RENESAS/TARGET_RZA1XX/rtc_api.c@0:f782d9c66c49, 2018-02-02 (annotated)

Committer:
dkato
Date:
Fri Feb 02 05:42:23 2018 +0000
Revision:
0:f782d9c66c49
mbed-os for GR-LYCHEE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:f782d9c66c49 1 /* mbed Microcontroller Library
dkato 0:f782d9c66c49 2 * Copyright (c) 2006-2015 ARM Limited
dkato 0:f782d9c66c49 3 *
dkato 0:f782d9c66c49 4 * Licensed under the Apache License, Version 2.0 (the "License");
dkato 0:f782d9c66c49 5 * you may not use this file except in compliance with the License.
dkato 0:f782d9c66c49 6 * You may obtain a copy of the License at
dkato 0:f782d9c66c49 7 *
dkato 0:f782d9c66c49 8 * http://www.apache.org/licenses/LICENSE-2.0
dkato 0:f782d9c66c49 9 *
dkato 0:f782d9c66c49 10 * Unless required by applicable law or agreed to in writing, software
dkato 0:f782d9c66c49 11 * distributed under the License is distributed on an "AS IS" BASIS,
dkato 0:f782d9c66c49 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
dkato 0:f782d9c66c49 13 * See the License for the specific language governing permissions and
dkato 0:f782d9c66c49 14 * limitations under the License.
dkato 0:f782d9c66c49 15 */
dkato 0:f782d9c66c49 16
dkato 0:f782d9c66c49 17 #include "mbed_assert.h"
dkato 0:f782d9c66c49 18 #include "device.h"
dkato 0:f782d9c66c49 19
dkato 0:f782d9c66c49 20 #if DEVICE_RTC
dkato 0:f782d9c66c49 21
dkato 0:f782d9c66c49 22 #include "rtc_api.h"
dkato 0:f782d9c66c49 23 #include "iodefine.h"
dkato 0:f782d9c66c49 24 #include "mbed_drv_cfg.h"
dkato 0:f782d9c66c49 25
dkato 0:f782d9c66c49 26 #define RCR1_VAL_ON (0x08u) // AIE = 1
dkato 0:f782d9c66c49 27 #define RCR1_VAL_OFF (0x00u)
dkato 0:f782d9c66c49 28 #define RCR3_VAL (0x00u)
dkato 0:f782d9c66c49 29 #define RCR5_VAL (0x00u)
dkato 0:f782d9c66c49 30
dkato 0:f782d9c66c49 31 #ifdef USE_RTCX1_CLK
dkato 0:f782d9c66c49 32 #define RCR2_VAL_ALLSTOP (0x08u)
dkato 0:f782d9c66c49 33 #define RCR2_VAL_START (0x09u) // START = 1
dkato 0:f782d9c66c49 34 #define RCR2_VAL_RESET (0x0Au) // RESET = 1
dkato 0:f782d9c66c49 35 #define RCR5_VAL_RTCX1 (0x00u) // RCKSEL = clock rtc from RTCX1(32.768 kHz)
dkato 0:f782d9c66c49 36 #elif defined(USE_EXTAL_CLK)
dkato 0:f782d9c66c49 37 #define RCR2_VAL_ALLSTOP (0x00u)
dkato 0:f782d9c66c49 38 #define RCR2_VAL_START (0x01u) // START = 1
dkato 0:f782d9c66c49 39 #define RCR2_VAL_RESET (0x02u) // RESET = 1
dkato 0:f782d9c66c49 40 #define RCR5_VAL_EXTAL (0x01u) // RCKSEL = clock rtc from EXTAL
dkato 0:f782d9c66c49 41 #define RFRH_VAL_13333 (0x8003u) // 13.3333MHz (= 64Hz * 0x32DCD)
dkato 0:f782d9c66c49 42 #define RFRL_VAL_13333 (0x2DCDu) //
dkato 0:f782d9c66c49 43 #elif defined(USE_RTCX3_CLK)
dkato 0:f782d9c66c49 44 #define RCR2_VAL_ALLSTOP (0x08u)
dkato 0:f782d9c66c49 45 #define RCR2_VAL_START (0x09u) // START = 1
dkato 0:f782d9c66c49 46 #define RCR2_VAL_RESET (0x0Au) // RESET = 1
dkato 0:f782d9c66c49 47 #define RCR5_VAL_RTCX3 (0x02u) // RCKSEL = clock rtc from RTCX3(4.000 MHz)
dkato 0:f782d9c66c49 48 #define RFRH_VAL_4000 (0x8000u) // 4.000MHz (= 64Hz * 0xF424)
dkato 0:f782d9c66c49 49 #define RFRL_VAL_4000 (0xF424u) //
dkato 0:f782d9c66c49 50 #else
dkato 0:f782d9c66c49 51 #error Select RTC clock input !
dkato 0:f782d9c66c49 52 #endif
dkato 0:f782d9c66c49 53
dkato 0:f782d9c66c49 54 #define RFRH_VAL_MAX (0x0007u) // MAX value (= 128Hz * 0x7FFFF)
dkato 0:f782d9c66c49 55 #define RFRL_VAL_MAX (0xFFFFu) //
dkato 0:f782d9c66c49 56
dkato 0:f782d9c66c49 57 #define MASK_00_03_POS (0x000Fu)
dkato 0:f782d9c66c49 58 #define MASK_04_07_POS (0x00F0u)
dkato 0:f782d9c66c49 59 #define MASK_08_11_POS (0x0F00u)
dkato 0:f782d9c66c49 60 #define MASK_12_15_POS (0xF000u)
dkato 0:f782d9c66c49 61 #define MASK_16_20_POS (0x000F0000u)
dkato 0:f782d9c66c49 62 #define SHIFT_1_HBYTE (4u)
dkato 0:f782d9c66c49 63 #define SHIFT_2_HBYTE (8u)
dkato 0:f782d9c66c49 64 #define SHIFT_3_HBYTE (12u)
dkato 0:f782d9c66c49 65 #define SHIFT_1BYTE (8u)
dkato 0:f782d9c66c49 66 #define SHIFT_2BYTE (16u)
dkato 0:f782d9c66c49 67
dkato 0:f782d9c66c49 68 #define TIME_ERROR_VAL (0xFFFFFFFFu)
dkato 0:f782d9c66c49 69
dkato 0:f782d9c66c49 70 static int rtc_dec8_to_hex(uint8_t dec_val, uint8_t offset, int *hex_val);
dkato 0:f782d9c66c49 71 static int rtc_dec16_to_hex(uint16_t dec_val, uint16_t offset, int *hex_val);
dkato 0:f782d9c66c49 72 static uint8_t rtc_hex8_to_dec(uint8_t hex_val);
dkato 0:f782d9c66c49 73 static uint16_t rtc_hex16_to_dec(uint16_t hex_val);
dkato 0:f782d9c66c49 74
dkato 0:f782d9c66c49 75
dkato 0:f782d9c66c49 76 /*
dkato 0:f782d9c66c49 77 * Setup the RTC based on a time structure.
dkato 0:f782d9c66c49 78 * The rtc_init function should be executed first.
dkato 0:f782d9c66c49 79 * [in]
dkato 0:f782d9c66c49 80 * None.
dkato 0:f782d9c66c49 81 * [out]
dkato 0:f782d9c66c49 82 * None.
dkato 0:f782d9c66c49 83 */
dkato 0:f782d9c66c49 84 void rtc_init(void) {
dkato 0:f782d9c66c49 85 volatile uint8_t dummy_read;
dkato 0:f782d9c66c49 86
dkato 0:f782d9c66c49 87 CPG.STBCR6 &= ~(CPG_STBCR6_BIT_MSTP60);
dkato 0:f782d9c66c49 88
dkato 0:f782d9c66c49 89 // Set control register
dkato 0:f782d9c66c49 90 RTC.RCR2 = RCR2_VAL_ALLSTOP;
dkato 0:f782d9c66c49 91 RTC.RCR1 = RCR1_VAL_ON;
dkato 0:f782d9c66c49 92 RTC.RCR3 = RCR3_VAL;
dkato 0:f782d9c66c49 93
dkato 0:f782d9c66c49 94 #ifdef USE_RTCX1_CLK
dkato 0:f782d9c66c49 95 RTC.RCR5 = RCR5_VAL_RTCX1;
dkato 0:f782d9c66c49 96 RTC.RFRH = 0;
dkato 0:f782d9c66c49 97 RTC.RFRL = 0;
dkato 0:f782d9c66c49 98 #elif defined(USE_EXTAL_CLK)
dkato 0:f782d9c66c49 99 RTC.RCR5 = RCR5_VAL_EXTAL;
dkato 0:f782d9c66c49 100 RTC.RFRH = RFRH_VAL_13333;
dkato 0:f782d9c66c49 101 RTC.RFRL = RFRL_VAL_13333;
dkato 0:f782d9c66c49 102 #else
dkato 0:f782d9c66c49 103 RTC.RCR5 = RCR5_VAL_RTCX3;
dkato 0:f782d9c66c49 104 RTC.RFRH = RFRH_VAL_4000;
dkato 0:f782d9c66c49 105 RTC.RFRL = RFRL_VAL_4000;
dkato 0:f782d9c66c49 106 #endif
dkato 0:f782d9c66c49 107 // Dummy read
dkato 0:f782d9c66c49 108 dummy_read = RTC.RCR2;
dkato 0:f782d9c66c49 109 dummy_read = RTC.RCR2;
dkato 0:f782d9c66c49 110
dkato 0:f782d9c66c49 111 RTC.RCR2 = RCR2_VAL_RESET; // RESET = 1
dkato 0:f782d9c66c49 112
dkato 0:f782d9c66c49 113 // Dummy read
dkato 0:f782d9c66c49 114 dummy_read = RTC.RCR2;
dkato 0:f782d9c66c49 115 dummy_read = RTC.RCR2;
dkato 0:f782d9c66c49 116
dkato 0:f782d9c66c49 117 // Set timer and alarm. Default value :01-01-1970 00:00:00
dkato 0:f782d9c66c49 118 RTC.RSECCNT = 0;
dkato 0:f782d9c66c49 119 RTC.RMINCNT = 0;
dkato 0:f782d9c66c49 120 RTC.RHRCNT = 0;
dkato 0:f782d9c66c49 121 RTC.RWKCNT = 0;
dkato 0:f782d9c66c49 122 RTC.RDAYCNT = 1;
dkato 0:f782d9c66c49 123 RTC.RMONCNT = 1;
dkato 0:f782d9c66c49 124 RTC.RYRCNT = 0x1970;
dkato 0:f782d9c66c49 125 RTC.RSECAR = 0;
dkato 0:f782d9c66c49 126 RTC.RMINAR = 0;
dkato 0:f782d9c66c49 127 RTC.RHRAR = 0;
dkato 0:f782d9c66c49 128 RTC.RWKAR = 0;
dkato 0:f782d9c66c49 129 RTC.RDAYAR = 1;
dkato 0:f782d9c66c49 130 RTC.RMONAR = 1;
dkato 0:f782d9c66c49 131 RTC.RYRAR = 0x1970;
dkato 0:f782d9c66c49 132
dkato 0:f782d9c66c49 133 // Dummy read
dkato 0:f782d9c66c49 134 dummy_read = RTC.RYRCNT;
dkato 0:f782d9c66c49 135 dummy_read = RTC.RYRCNT;
dkato 0:f782d9c66c49 136 (void)dummy_read;
dkato 0:f782d9c66c49 137
dkato 0:f782d9c66c49 138 }
dkato 0:f782d9c66c49 139
dkato 0:f782d9c66c49 140
dkato 0:f782d9c66c49 141 /*
dkato 0:f782d9c66c49 142 * Release the RTC based on a time structure.
dkato 0:f782d9c66c49 143 * [in]
dkato 0:f782d9c66c49 144 * None.
dkato 0:f782d9c66c49 145 * [out]
dkato 0:f782d9c66c49 146 * None.
dkato 0:f782d9c66c49 147 */
dkato 0:f782d9c66c49 148 void rtc_free(void) {
dkato 0:f782d9c66c49 149 volatile uint8_t dummy_read;
dkato 0:f782d9c66c49 150
dkato 0:f782d9c66c49 151 // Set control register
dkato 0:f782d9c66c49 152 RTC.RCR2 = RCR2_VAL_ALLSTOP;
dkato 0:f782d9c66c49 153 RTC.RCR1 = RCR1_VAL_OFF;
dkato 0:f782d9c66c49 154 RTC.RCR3 = RCR3_VAL;
dkato 0:f782d9c66c49 155 RTC.RCR5 = RCR5_VAL;
dkato 0:f782d9c66c49 156 RTC.RFRH = RFRH_VAL_MAX;
dkato 0:f782d9c66c49 157 RTC.RFRL = RFRL_VAL_MAX;
dkato 0:f782d9c66c49 158
dkato 0:f782d9c66c49 159 // Dummy read
dkato 0:f782d9c66c49 160 dummy_read = RTC.RCR2;
dkato 0:f782d9c66c49 161 dummy_read = RTC.RCR2;
dkato 0:f782d9c66c49 162 RTC.RCR2 = RCR2_VAL_RESET; // RESET = 1
dkato 0:f782d9c66c49 163
dkato 0:f782d9c66c49 164 // Dummy read
dkato 0:f782d9c66c49 165 dummy_read = RTC.RCR2;
dkato 0:f782d9c66c49 166 dummy_read = RTC.RCR2;
dkato 0:f782d9c66c49 167
dkato 0:f782d9c66c49 168 // Set timer and alarm. Default value :01-01-1970 00:00:00
dkato 0:f782d9c66c49 169 RTC.RSECCNT = 0;
dkato 0:f782d9c66c49 170 RTC.RMINCNT = 0;
dkato 0:f782d9c66c49 171 RTC.RHRCNT = 0;
dkato 0:f782d9c66c49 172 RTC.RWKCNT = 0;
dkato 0:f782d9c66c49 173 RTC.RDAYCNT = 1;
dkato 0:f782d9c66c49 174 RTC.RMONCNT = 1;
dkato 0:f782d9c66c49 175 RTC.RYRCNT = 0x1970;
dkato 0:f782d9c66c49 176 RTC.RSECAR = 0;
dkato 0:f782d9c66c49 177 RTC.RMINAR = 0;
dkato 0:f782d9c66c49 178 RTC.RHRAR = 0;
dkato 0:f782d9c66c49 179 RTC.RWKAR = 0;
dkato 0:f782d9c66c49 180 RTC.RDAYAR = 1;
dkato 0:f782d9c66c49 181 RTC.RMONAR = 1;
dkato 0:f782d9c66c49 182 RTC.RYRAR = 0x1970;
dkato 0:f782d9c66c49 183
dkato 0:f782d9c66c49 184 // Dummy read
dkato 0:f782d9c66c49 185 dummy_read = RTC.RYRCNT;
dkato 0:f782d9c66c49 186 dummy_read = RTC.RYRCNT;
dkato 0:f782d9c66c49 187 (void)dummy_read;
dkato 0:f782d9c66c49 188
dkato 0:f782d9c66c49 189 }
dkato 0:f782d9c66c49 190
dkato 0:f782d9c66c49 191
dkato 0:f782d9c66c49 192 /*
dkato 0:f782d9c66c49 193 * Check the RTC has been enabled.
dkato 0:f782d9c66c49 194 * Clock Control Register RTC.RCR1(bit3): 0 = Disabled, 1 = Enabled.
dkato 0:f782d9c66c49 195 * [in]
dkato 0:f782d9c66c49 196 * None.
dkato 0:f782d9c66c49 197 * [out]
dkato 0:f782d9c66c49 198 * 0:Disabled, 1:Enabled.
dkato 0:f782d9c66c49 199 */
dkato 0:f782d9c66c49 200 int rtc_isenabled(void) {
dkato 0:f782d9c66c49 201 int ret_val = 0;
dkato 0:f782d9c66c49 202
dkato 0:f782d9c66c49 203 if ((RTC.RCR1 & RCR1_VAL_ON) != 0) { // RTC ON ?
dkato 0:f782d9c66c49 204 ret_val = 1;
dkato 0:f782d9c66c49 205 }
dkato 0:f782d9c66c49 206
dkato 0:f782d9c66c49 207 return ret_val;
dkato 0:f782d9c66c49 208 }
dkato 0:f782d9c66c49 209
dkato 0:f782d9c66c49 210
dkato 0:f782d9c66c49 211 /*
dkato 0:f782d9c66c49 212 * RTC read function.
dkato 0:f782d9c66c49 213 * [in]
dkato 0:f782d9c66c49 214 * None.
dkato 0:f782d9c66c49 215 * [out]
dkato 0:f782d9c66c49 216 * UNIX timestamp value.
dkato 0:f782d9c66c49 217 */
dkato 0:f782d9c66c49 218 time_t rtc_read(void) {
dkato 0:f782d9c66c49 219
dkato 0:f782d9c66c49 220 struct tm timeinfo;
dkato 0:f782d9c66c49 221 int err = 0;
dkato 0:f782d9c66c49 222 uint8_t tmp_regdata;
dkato 0:f782d9c66c49 223 time_t t;
dkato 0:f782d9c66c49 224
dkato 0:f782d9c66c49 225 if (rtc_isenabled() != 0) {
dkato 0:f782d9c66c49 226 RTC.RCR1 &= ~0x10u; // CIE = 0
dkato 0:f782d9c66c49 227 do {
dkato 0:f782d9c66c49 228 // before reading process
dkato 0:f782d9c66c49 229 tmp_regdata = RTC.RCR1;
dkato 0:f782d9c66c49 230 tmp_regdata &= ~0x80u; // CF = 0
dkato 0:f782d9c66c49 231 tmp_regdata |= 0x01u; // AF = 1
dkato 0:f782d9c66c49 232 RTC.RCR1 = tmp_regdata;
dkato 0:f782d9c66c49 233
dkato 0:f782d9c66c49 234 // Read RTC register
dkato 0:f782d9c66c49 235 err = rtc_dec8_to_hex(RTC.RSECCNT , 0 , &timeinfo.tm_sec);
dkato 0:f782d9c66c49 236 err += rtc_dec8_to_hex(RTC.RMINCNT , 0 , &timeinfo.tm_min);
dkato 0:f782d9c66c49 237 err += rtc_dec8_to_hex(RTC.RHRCNT , 0 , &timeinfo.tm_hour);
dkato 0:f782d9c66c49 238 err += rtc_dec8_to_hex(RTC.RDAYCNT , 0 , &timeinfo.tm_mday);
dkato 0:f782d9c66c49 239 err += rtc_dec8_to_hex(RTC.RMONCNT , 1 , &timeinfo.tm_mon);
dkato 0:f782d9c66c49 240 err += rtc_dec16_to_hex(RTC.RYRCNT , 1900 , &timeinfo.tm_year);
dkato 0:f782d9c66c49 241 } while ((RTC.RCR1 & 0x80u) != 0);
dkato 0:f782d9c66c49 242 } else {
dkato 0:f782d9c66c49 243 err = 1;
dkato 0:f782d9c66c49 244 }
dkato 0:f782d9c66c49 245
dkato 0:f782d9c66c49 246 if (err == 0) {
dkato 0:f782d9c66c49 247 // Convert to timestamp
dkato 0:f782d9c66c49 248 t = mktime(&timeinfo);
dkato 0:f782d9c66c49 249 } else {
dkato 0:f782d9c66c49 250 // Error
dkato 0:f782d9c66c49 251 t = TIME_ERROR_VAL;
dkato 0:f782d9c66c49 252 }
dkato 0:f782d9c66c49 253
dkato 0:f782d9c66c49 254 return t;
dkato 0:f782d9c66c49 255 }
dkato 0:f782d9c66c49 256
dkato 0:f782d9c66c49 257 /*
dkato 0:f782d9c66c49 258 * Dec(8bit) to Hex function for RTC.
dkato 0:f782d9c66c49 259 * [in]
dkato 0:f782d9c66c49 260 * dec_val:Decimal value (from 0x00 to 0x99).
dkato 0:f782d9c66c49 261 * offset:Subtract offset from dec_val.
dkato 0:f782d9c66c49 262 * hex_val:Pointer of output hexadecimal value.
dkato 0:f782d9c66c49 263 * [out]
dkato 0:f782d9c66c49 264 * 0:Success
dkato 0:f782d9c66c49 265 * 1:Error
dkato 0:f782d9c66c49 266 */
dkato 0:f782d9c66c49 267 static int rtc_dec8_to_hex(uint8_t dec_val, uint8_t offset, int *hex_val) {
dkato 0:f782d9c66c49 268 int err = 0;
dkato 0:f782d9c66c49 269 uint8_t ret_val;
dkato 0:f782d9c66c49 270
dkato 0:f782d9c66c49 271 if (hex_val != NULL) {
dkato 0:f782d9c66c49 272 if (((dec_val & MASK_04_07_POS) >= (0x0A << SHIFT_1_HBYTE)) ||
dkato 0:f782d9c66c49 273 ((dec_val & MASK_00_03_POS) >= 0x0A)) {
dkato 0:f782d9c66c49 274 err = 1;
dkato 0:f782d9c66c49 275 } else {
dkato 0:f782d9c66c49 276 ret_val = ((dec_val & MASK_04_07_POS) >> SHIFT_1_HBYTE) * 10 +
dkato 0:f782d9c66c49 277 (dec_val & MASK_00_03_POS);
dkato 0:f782d9c66c49 278 if (ret_val < offset) {
dkato 0:f782d9c66c49 279 err = 1;
dkato 0:f782d9c66c49 280 } else {
dkato 0:f782d9c66c49 281 *hex_val = ret_val - offset;
dkato 0:f782d9c66c49 282 }
dkato 0:f782d9c66c49 283 }
dkato 0:f782d9c66c49 284 } else {
dkato 0:f782d9c66c49 285 err = 1;
dkato 0:f782d9c66c49 286 }
dkato 0:f782d9c66c49 287
dkato 0:f782d9c66c49 288 return err;
dkato 0:f782d9c66c49 289 }
dkato 0:f782d9c66c49 290
dkato 0:f782d9c66c49 291 /*
dkato 0:f782d9c66c49 292 * Dec(16bit) to Hex function for RTC
dkato 0:f782d9c66c49 293 * [in]
dkato 0:f782d9c66c49 294 * dec_val:Decimal value (from 0x0000 to 0x9999).
dkato 0:f782d9c66c49 295 * offset:Subtract offset from dec_val.
dkato 0:f782d9c66c49 296 * hex_val:Pointer of output hexadecimal value.
dkato 0:f782d9c66c49 297 * [out]
dkato 0:f782d9c66c49 298 * 0:Success
dkato 0:f782d9c66c49 299 * 1:Error
dkato 0:f782d9c66c49 300 */
dkato 0:f782d9c66c49 301 static int rtc_dec16_to_hex(uint16_t dec_val, uint16_t offset, int *hex_val) {
dkato 0:f782d9c66c49 302 int err = 0;
dkato 0:f782d9c66c49 303 uint16_t ret_val;
dkato 0:f782d9c66c49 304
dkato 0:f782d9c66c49 305 if (hex_val != NULL) {
dkato 0:f782d9c66c49 306 if (((dec_val & MASK_12_15_POS) >= (0x0A << SHIFT_3_HBYTE)) ||
dkato 0:f782d9c66c49 307 ((dec_val & MASK_08_11_POS) >= (0x0A << SHIFT_2_HBYTE)) ||
dkato 0:f782d9c66c49 308 ((dec_val & MASK_04_07_POS) >= (0x0A << SHIFT_1_HBYTE)) ||
dkato 0:f782d9c66c49 309 ((dec_val & MASK_00_03_POS) >= 0x0A)) {
dkato 0:f782d9c66c49 310 err = 1;
dkato 0:f782d9c66c49 311 *hex_val = 0;
dkato 0:f782d9c66c49 312 } else {
dkato 0:f782d9c66c49 313 ret_val = (((dec_val & MASK_12_15_POS)) >> SHIFT_3_HBYTE) * 1000 +
dkato 0:f782d9c66c49 314 (((dec_val & MASK_08_11_POS)) >> SHIFT_2_HBYTE) * 100 +
dkato 0:f782d9c66c49 315 (((dec_val & MASK_04_07_POS)) >> SHIFT_1_HBYTE) * 10 +
dkato 0:f782d9c66c49 316 (dec_val & MASK_00_03_POS);
dkato 0:f782d9c66c49 317 if (ret_val < offset) {
dkato 0:f782d9c66c49 318 err = 1;
dkato 0:f782d9c66c49 319 } else {
dkato 0:f782d9c66c49 320 *hex_val = ret_val - offset;
dkato 0:f782d9c66c49 321 }
dkato 0:f782d9c66c49 322 }
dkato 0:f782d9c66c49 323 } else {
dkato 0:f782d9c66c49 324 err = 1;
dkato 0:f782d9c66c49 325 }
dkato 0:f782d9c66c49 326 return err;
dkato 0:f782d9c66c49 327 }
dkato 0:f782d9c66c49 328
dkato 0:f782d9c66c49 329 /*
dkato 0:f782d9c66c49 330 * RTC write function
dkato 0:f782d9c66c49 331 * [in]
dkato 0:f782d9c66c49 332 * t:UNIX timestamp value
dkato 0:f782d9c66c49 333 * [out]
dkato 0:f782d9c66c49 334 * None.
dkato 0:f782d9c66c49 335 */
dkato 0:f782d9c66c49 336 void rtc_write(time_t t) {
dkato 0:f782d9c66c49 337
dkato 0:f782d9c66c49 338 struct tm *timeinfo = localtime(&t);
dkato 0:f782d9c66c49 339 volatile uint16_t dummy_read;
dkato 0:f782d9c66c49 340
dkato 0:f782d9c66c49 341 if (rtc_isenabled() != 0) {
dkato 0:f782d9c66c49 342 RTC.RCR2 = RCR2_VAL_ALLSTOP;
dkato 0:f782d9c66c49 343 dummy_read = (uint16_t)RTC.RCR2;
dkato 0:f782d9c66c49 344 dummy_read = (uint16_t)RTC.RCR2;
dkato 0:f782d9c66c49 345 RTC.RCR2 = RCR2_VAL_RESET; // RESET = 1
dkato 0:f782d9c66c49 346 dummy_read = (uint16_t)RTC.RCR2;
dkato 0:f782d9c66c49 347 dummy_read = (uint16_t)RTC.RCR2;
dkato 0:f782d9c66c49 348
dkato 0:f782d9c66c49 349 RTC.RSECCNT = rtc_hex8_to_dec(timeinfo->tm_sec);
dkato 0:f782d9c66c49 350 RTC.RMINCNT = rtc_hex8_to_dec(timeinfo->tm_min);
dkato 0:f782d9c66c49 351 RTC.RHRCNT = rtc_hex8_to_dec(timeinfo->tm_hour);
dkato 0:f782d9c66c49 352 RTC.RDAYCNT = rtc_hex8_to_dec(timeinfo->tm_mday);
dkato 0:f782d9c66c49 353 RTC.RMONCNT = rtc_hex8_to_dec(timeinfo->tm_mon + 1);
dkato 0:f782d9c66c49 354 RTC.RYRCNT = rtc_hex16_to_dec(timeinfo->tm_year + 1900);
dkato 0:f782d9c66c49 355 dummy_read = (uint16_t)RTC.RYRCNT;
dkato 0:f782d9c66c49 356 dummy_read = (uint16_t)RTC.RYRCNT;
dkato 0:f782d9c66c49 357
dkato 0:f782d9c66c49 358 RTC.RCR2 = RCR2_VAL_START; // START = 1
dkato 0:f782d9c66c49 359
dkato 0:f782d9c66c49 360 dummy_read = (uint16_t)RTC.RCR2;
dkato 0:f782d9c66c49 361 dummy_read = (uint16_t)RTC.RCR2;
dkato 0:f782d9c66c49 362 (void)dummy_read;
dkato 0:f782d9c66c49 363 }
dkato 0:f782d9c66c49 364 }
dkato 0:f782d9c66c49 365
dkato 0:f782d9c66c49 366 /*
dkato 0:f782d9c66c49 367 * HEX to Dec(8bit) function for RTC.
dkato 0:f782d9c66c49 368 * [in]
dkato 0:f782d9c66c49 369 * hex_val:Hexadecimal value.
dkato 0:f782d9c66c49 370 * [out]
dkato 0:f782d9c66c49 371 * decimal value:From 0x00 to 0x99.
dkato 0:f782d9c66c49 372 */
dkato 0:f782d9c66c49 373 static uint8_t rtc_hex8_to_dec(uint8_t hex_val) {
dkato 0:f782d9c66c49 374 uint32_t calc_data;
dkato 0:f782d9c66c49 375
dkato 0:f782d9c66c49 376 calc_data = hex_val / 10 * 0x10;
dkato 0:f782d9c66c49 377 calc_data += hex_val % 10;
dkato 0:f782d9c66c49 378
dkato 0:f782d9c66c49 379 if (calc_data > 0x99) {
dkato 0:f782d9c66c49 380 calc_data = 0;
dkato 0:f782d9c66c49 381 }
dkato 0:f782d9c66c49 382
dkato 0:f782d9c66c49 383 return (uint8_t)calc_data;
dkato 0:f782d9c66c49 384 }
dkato 0:f782d9c66c49 385
dkato 0:f782d9c66c49 386 /*
dkato 0:f782d9c66c49 387 * HEX to Dec(16bit) function for RTC.
dkato 0:f782d9c66c49 388 * [in]
dkato 0:f782d9c66c49 389 * hex_val:Hexadecimal value.
dkato 0:f782d9c66c49 390 * [out]
dkato 0:f782d9c66c49 391 * decimal value:From 0x0000 to 0x9999.
dkato 0:f782d9c66c49 392 */
dkato 0:f782d9c66c49 393 static uint16_t rtc_hex16_to_dec(uint16_t hex_val) {
dkato 0:f782d9c66c49 394 uint32_t calc_data;
dkato 0:f782d9c66c49 395 calc_data = hex_val / 1000 * 0x1000;
dkato 0:f782d9c66c49 396 calc_data += ((hex_val / 100) % 10) * 0x100;
dkato 0:f782d9c66c49 397 calc_data += ((hex_val / 10) % 10) * 0x10;
dkato 0:f782d9c66c49 398 calc_data += hex_val % 10;
dkato 0:f782d9c66c49 399
dkato 0:f782d9c66c49 400 if (calc_data > 0x9999) {
dkato 0:f782d9c66c49 401 calc_data = 0;
dkato 0:f782d9c66c49 402 }
dkato 0:f782d9c66c49 403 return (uint16_t)calc_data;
dkato 0:f782d9c66c49 404
dkato 0:f782d9c66c49 405 }
dkato 0:f782d9c66c49 406
dkato 0:f782d9c66c49 407 #endif /* DEVICE_RTC */