Daiki Kato / mbed-os-lychee

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Dependents:   mbed-os-example-blinky-gr-lychee GR-Boads_Camera_sample GR-Boards_Audio_Recoder GR-Boads_Camera_DisplayApp ... more

targets/TARGET_RENESAS/TARGET_RZA1XX/common/pl310.h@0:f782d9c66c49, 2018-02-02 (annotated)

Committer:
dkato
Date:
Fri Feb 02 05:42:23 2018 +0000
Revision:
0:f782d9c66c49
mbed-os for GR-LYCHEE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:f782d9c66c49 1 /**************************************************************************//**
dkato 0:f782d9c66c49 2 * @file pl310.h
dkato 0:f782d9c66c49 3 * @brief Implementation of pl310 functions
dkato 0:f782d9c66c49 4 * @version
dkato 0:f782d9c66c49 5 * @date 11 June 2013
dkato 0:f782d9c66c49 6 *
dkato 0:f782d9c66c49 7 * @note
dkato 0:f782d9c66c49 8 *
dkato 0:f782d9c66c49 9 ******************************************************************************/
dkato 0:f782d9c66c49 10 /* Copyright (c) 2011 - 2013 ARM LIMITED
dkato 0:f782d9c66c49 11
dkato 0:f782d9c66c49 12 All rights reserved.
dkato 0:f782d9c66c49 13 Redistribution and use in source and binary forms, with or without
dkato 0:f782d9c66c49 14 modification, are permitted provided that the following conditions are met:
dkato 0:f782d9c66c49 15 - Redistributions of source code must retain the above copyright
dkato 0:f782d9c66c49 16 notice, this list of conditions and the following disclaimer.
dkato 0:f782d9c66c49 17 - Redistributions in binary form must reproduce the above copyright
dkato 0:f782d9c66c49 18 notice, this list of conditions and the following disclaimer in the
dkato 0:f782d9c66c49 19 documentation and/or other materials provided with the distribution.
dkato 0:f782d9c66c49 20 - Neither the name of ARM nor the names of its contributors may be used
dkato 0:f782d9c66c49 21 to endorse or promote products derived from this software without
dkato 0:f782d9c66c49 22 specific prior written permission.
dkato 0:f782d9c66c49 23 *
dkato 0:f782d9c66c49 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
dkato 0:f782d9c66c49 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
dkato 0:f782d9c66c49 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
dkato 0:f782d9c66c49 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
dkato 0:f782d9c66c49 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
dkato 0:f782d9c66c49 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
dkato 0:f782d9c66c49 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
dkato 0:f782d9c66c49 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
dkato 0:f782d9c66c49 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
dkato 0:f782d9c66c49 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
dkato 0:f782d9c66c49 34 POSSIBILITY OF SUCH DAMAGE.
dkato 0:f782d9c66c49 35 ---------------------------------------------------------------------------*/
dkato 0:f782d9c66c49 36
dkato 0:f782d9c66c49 37 #ifndef __PL310
dkato 0:f782d9c66c49 38 #define __PL310
dkato 0:f782d9c66c49 39
dkato 0:f782d9c66c49 40 typedef struct
dkato 0:f782d9c66c49 41 {
dkato 0:f782d9c66c49 42 __I uint32_t CACHE_ID; /*!< Offset: 0x0000 Cache ID Register */
dkato 0:f782d9c66c49 43 __I uint32_t CACHE_TYPE; /*!< Offset: 0x0004 Cache Type Register */
dkato 0:f782d9c66c49 44 uint32_t RESERVED0[0x3e];
dkato 0:f782d9c66c49 45 __IO uint32_t CONTROL; /*!< Offset: 0x0100 Control Register */
dkato 0:f782d9c66c49 46 __IO uint32_t AUX_CNT; /*!< Offset: 0x0104 Auxiliary Control */
dkato 0:f782d9c66c49 47 uint32_t RESERVED1[0x3e];
dkato 0:f782d9c66c49 48 __IO uint32_t EVENT_CONTROL; /*!< Offset: 0x0200 Event Counter Control */
dkato 0:f782d9c66c49 49 __IO uint32_t EVENT_COUNTER1_CONF; /*!< Offset: 0x0204 Event Counter 1 Configuration */
dkato 0:f782d9c66c49 50 __IO uint32_t EVENT_COUNTER0_CONF; /*!< Offset: 0x0208 Event Counter 1 Configuration */
dkato 0:f782d9c66c49 51 uint32_t RESERVED2[0x2];
dkato 0:f782d9c66c49 52 __IO uint32_t INTERRUPT_MASK; /*!< Offset: 0x0214 Interrupt Mask */
dkato 0:f782d9c66c49 53 __I uint32_t MASKED_INT_STATUS; /*!< Offset: 0x0218 Masked Interrupt Status */
dkato 0:f782d9c66c49 54 __I uint32_t RAW_INT_STATUS; /*!< Offset: 0x021c Raw Interrupt Status */
dkato 0:f782d9c66c49 55 __O uint32_t INTERRUPT_CLEAR; /*!< Offset: 0x0220 Interrupt Clear */
dkato 0:f782d9c66c49 56 uint32_t RESERVED3[0x143];
dkato 0:f782d9c66c49 57 __IO uint32_t CACHE_SYNC; /*!< Offset: 0x0730 Cache Sync */
dkato 0:f782d9c66c49 58 uint32_t RESERVED4[0xf];
dkato 0:f782d9c66c49 59 __IO uint32_t INV_LINE_PA; /*!< Offset: 0x0770 Invalidate Line By PA */
dkato 0:f782d9c66c49 60 uint32_t RESERVED6[2];
dkato 0:f782d9c66c49 61 __IO uint32_t INV_WAY; /*!< Offset: 0x077c Invalidate by Way */
dkato 0:f782d9c66c49 62 uint32_t RESERVED5[0xc];
dkato 0:f782d9c66c49 63 __IO uint32_t CLEAN_LINE_PA; /*!< Offset: 0x07b0 Clean Line by PA */
dkato 0:f782d9c66c49 64 uint32_t RESERVED7[1];
dkato 0:f782d9c66c49 65 __IO uint32_t CLEAN_LINE_INDEX_WAY; /*!< Offset: 0x07b8 Clean Line by Index/Way */
dkato 0:f782d9c66c49 66 __IO uint32_t CLEAN_WAY; /*!< Offset: 0x07bc Clean by Way */
dkato 0:f782d9c66c49 67 uint32_t RESERVED8[0xc];
dkato 0:f782d9c66c49 68 __IO uint32_t CLEAN_INV_LINE_PA; /*!< Offset: 0x07f0 Clean and Invalidate Line by PA */
dkato 0:f782d9c66c49 69 uint32_t RESERVED9[1];
dkato 0:f782d9c66c49 70 __IO uint32_t CLEAN_INV_LINE_INDEX_WAY; /*!< Offset: 0x07f8 Clean and Invalidate Line by Index/Way */
dkato 0:f782d9c66c49 71 __IO uint32_t CLEAN_INV_WAY; /*!< Offset: 0x07fc Clean and Invalidate by Way */
dkato 0:f782d9c66c49 72 uint32_t RESERVED10[0x40];
dkato 0:f782d9c66c49 73 __IO uint32_t DATA_LOCK_0_WAY; /*!< Offset: 0x0900 Data Lockdown 0 by Way */
dkato 0:f782d9c66c49 74 __IO uint32_t INST_LOCK_0_WAY; /*!< Offset: 0x0904 Instruction Lockdown 0 by Way */
dkato 0:f782d9c66c49 75 __IO uint32_t DATA_LOCK_1_WAY; /*!< Offset: 0x0908 Data Lockdown 1 by Way */
dkato 0:f782d9c66c49 76 __IO uint32_t INST_LOCK_1_WAY; /*!< Offset: 0x090c Instruction Lockdown 1 by Way */
dkato 0:f782d9c66c49 77 __IO uint32_t DATA_LOCK_2_WAY; /*!< Offset: 0x0910 Data Lockdown 2 by Way */
dkato 0:f782d9c66c49 78 __IO uint32_t INST_LOCK_2_WAY; /*!< Offset: 0x0914 Instruction Lockdown 2 by Way */
dkato 0:f782d9c66c49 79 __IO uint32_t DATA_LOCK_3_WAY; /*!< Offset: 0x0918 Data Lockdown 3 by Way */
dkato 0:f782d9c66c49 80 __IO uint32_t INST_LOCK_3_WAY; /*!< Offset: 0x091c Instruction Lockdown 3 by Way */
dkato 0:f782d9c66c49 81 __IO uint32_t DATA_LOCK_4_WAY; /*!< Offset: 0x0920 Data Lockdown 4 by Way */
dkato 0:f782d9c66c49 82 __IO uint32_t INST_LOCK_4_WAY; /*!< Offset: 0x0924 Instruction Lockdown 4 by Way */
dkato 0:f782d9c66c49 83 __IO uint32_t DATA_LOCK_5_WAY; /*!< Offset: 0x0928 Data Lockdown 5 by Way */
dkato 0:f782d9c66c49 84 __IO uint32_t INST_LOCK_5_WAY; /*!< Offset: 0x092c Instruction Lockdown 5 by Way */
dkato 0:f782d9c66c49 85 __IO uint32_t DATA_LOCK_6_WAY; /*!< Offset: 0x0930 Data Lockdown 5 by Way */
dkato 0:f782d9c66c49 86 __IO uint32_t INST_LOCK_6_WAY; /*!< Offset: 0x0934 Instruction Lockdown 5 by Way */
dkato 0:f782d9c66c49 87 __IO uint32_t DATA_LOCK_7_WAY; /*!< Offset: 0x0938 Data Lockdown 6 by Way */
dkato 0:f782d9c66c49 88 __IO uint32_t INST_LOCK_7_WAY; /*!< Offset: 0x093c Instruction Lockdown 6 by Way */
dkato 0:f782d9c66c49 89 uint32_t RESERVED11[0x4];
dkato 0:f782d9c66c49 90 __IO uint32_t LOCK_LINE_EN; /*!< Offset: 0x0950 Lockdown by Line Enable */
dkato 0:f782d9c66c49 91 __IO uint32_t UNLOCK_ALL_BY_WAY; /*!< Offset: 0x0954 Unlock All Lines by Way */
dkato 0:f782d9c66c49 92 uint32_t RESERVED12[0xaa];
dkato 0:f782d9c66c49 93 __IO uint32_t ADDRESS_FILTER_START; /*!< Offset: 0x0c00 Address Filtering Start */
dkato 0:f782d9c66c49 94 __IO uint32_t ADDRESS_FILTER_END; /*!< Offset: 0x0c04 Address Filtering End */
dkato 0:f782d9c66c49 95 uint32_t RESERVED13[0xce];
dkato 0:f782d9c66c49 96 __IO uint32_t DEBUG_CONTROL; /*!< Offset: 0x0f40 Debug Control Register */
dkato 0:f782d9c66c49 97
dkato 0:f782d9c66c49 98 } PL310_TypeDef;
dkato 0:f782d9c66c49 99
dkato 0:f782d9c66c49 100 #define PL310 ((PL310_TypeDef *)Renesas_RZ_A1_PL310_BASE) /*!< PL310 Declaration */
dkato 0:f782d9c66c49 101
dkato 0:f782d9c66c49 102 extern int PL310_GetID (void);
dkato 0:f782d9c66c49 103 extern int PL310_GetType (void);
dkato 0:f782d9c66c49 104 extern void PL310_InvAllByWay (void);
dkato 0:f782d9c66c49 105 extern void PL310_CleanInvAllByWay(void);
dkato 0:f782d9c66c49 106 extern void PL310_Enable(void);
dkato 0:f782d9c66c49 107 extern void PL310_Disable(void);
dkato 0:f782d9c66c49 108 extern void PL310_InvPa (void *);
dkato 0:f782d9c66c49 109 extern void PL310_CleanPa (void *);
dkato 0:f782d9c66c49 110 extern void PL310_CleanInvPa (void *);
dkato 0:f782d9c66c49 111
dkato 0:f782d9c66c49 112 #endif
dkato 0:f782d9c66c49 113
dkato 0:f782d9c66c49 114