Daiki Kato / mbed-os-lychee

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Dependents:   mbed-os-example-blinky-gr-lychee GR-Boads_Camera_sample GR-Boards_Audio_Recoder GR-Boads_Camera_DisplayApp ... more

features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_STM/TARGET_STM32F4/TARGET_NUCLEO_F429ZI/stm32f4_eth_init.c@0:f782d9c66c49, 2018-02-02 (annotated)

Committer:
dkato
Date:
Fri Feb 02 05:42:23 2018 +0000
Revision:
0:f782d9c66c49
mbed-os for GR-LYCHEE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dkato 0:f782d9c66c49 1 #include "stm32f4xx_hal.h"
dkato 0:f782d9c66c49 2
dkato 0:f782d9c66c49 3 /**
dkato 0:f782d9c66c49 4 * Override HAL Eth Init function
dkato 0:f782d9c66c49 5 */
dkato 0:f782d9c66c49 6 void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
dkato 0:f782d9c66c49 7 {
dkato 0:f782d9c66c49 8 GPIO_InitTypeDef GPIO_InitStructure;
dkato 0:f782d9c66c49 9 if (heth->Instance == ETH) {
dkato 0:f782d9c66c49 10
dkato 0:f782d9c66c49 11 /* Enable GPIOs clocks */
dkato 0:f782d9c66c49 12 __HAL_RCC_GPIOA_CLK_ENABLE();
dkato 0:f782d9c66c49 13 __HAL_RCC_GPIOB_CLK_ENABLE();
dkato 0:f782d9c66c49 14 __HAL_RCC_GPIOC_CLK_ENABLE();
dkato 0:f782d9c66c49 15 __HAL_RCC_GPIOG_CLK_ENABLE();
dkato 0:f782d9c66c49 16
dkato 0:f782d9c66c49 17 /** ETH GPIO Configuration
dkato 0:f782d9c66c49 18 RMII_REF_CLK ----------------------> PA1
dkato 0:f782d9c66c49 19 RMII_MDIO -------------------------> PA2
dkato 0:f782d9c66c49 20 RMII_MDC --------------------------> PC1
dkato 0:f782d9c66c49 21 RMII_MII_CRS_DV -------------------> PA7
dkato 0:f782d9c66c49 22 RMII_MII_RXD0 ---------------------> PC4
dkato 0:f782d9c66c49 23 RMII_MII_RXD1 ---------------------> PC5
dkato 0:f782d9c66c49 24 RMII_MII_RXER ---------------------> PG2
dkato 0:f782d9c66c49 25 RMII_MII_TX_EN --------------------> PG11
dkato 0:f782d9c66c49 26 RMII_MII_TXD0 ---------------------> PG13
dkato 0:f782d9c66c49 27 RMII_MII_TXD1 ---------------------> PB13
dkato 0:f782d9c66c49 28 */
dkato 0:f782d9c66c49 29 /* Configure PA1, PA2 and PA7 */
dkato 0:f782d9c66c49 30 GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
dkato 0:f782d9c66c49 31 GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
dkato 0:f782d9c66c49 32 GPIO_InitStructure.Pull = GPIO_NOPULL;
dkato 0:f782d9c66c49 33 GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
dkato 0:f782d9c66c49 34 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
dkato 0:f782d9c66c49 35 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
dkato 0:f782d9c66c49 36
dkato 0:f782d9c66c49 37 /* Configure PB13 */
dkato 0:f782d9c66c49 38 GPIO_InitStructure.Pin = GPIO_PIN_13;
dkato 0:f782d9c66c49 39 HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
dkato 0:f782d9c66c49 40
dkato 0:f782d9c66c49 41 /* Configure PC1, PC4 and PC5 */
dkato 0:f782d9c66c49 42 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
dkato 0:f782d9c66c49 43 HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
dkato 0:f782d9c66c49 44
dkato 0:f782d9c66c49 45 /* Configure PG2, PG11 and PG13 */
dkato 0:f782d9c66c49 46 GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13;
dkato 0:f782d9c66c49 47 HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
dkato 0:f782d9c66c49 48
dkato 0:f782d9c66c49 49 /* Enable the Ethernet global Interrupt */
dkato 0:f782d9c66c49 50 HAL_NVIC_SetPriority(ETH_IRQn, 0x7, 0);
dkato 0:f782d9c66c49 51 HAL_NVIC_EnableIRQ(ETH_IRQn);
dkato 0:f782d9c66c49 52
dkato 0:f782d9c66c49 53 /* Enable ETHERNET clock */
dkato 0:f782d9c66c49 54 __HAL_RCC_ETH_CLK_ENABLE();
dkato 0:f782d9c66c49 55 }
dkato 0:f782d9c66c49 56 }
dkato 0:f782d9c66c49 57
dkato 0:f782d9c66c49 58 /**
dkato 0:f782d9c66c49 59 * Override HAL Eth DeInit function
dkato 0:f782d9c66c49 60 */
dkato 0:f782d9c66c49 61 void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
dkato 0:f782d9c66c49 62 {
dkato 0:f782d9c66c49 63 if (heth->Instance == ETH) {
dkato 0:f782d9c66c49 64 /* Peripheral clock disable */
dkato 0:f782d9c66c49 65 __HAL_RCC_ETH_CLK_DISABLE();
dkato 0:f782d9c66c49 66
dkato 0:f782d9c66c49 67 /** ETH GPIO Configuration
dkato 0:f782d9c66c49 68 RMII_REF_CLK ----------------------> PA1
dkato 0:f782d9c66c49 69 RMII_MDIO -------------------------> PA2
dkato 0:f782d9c66c49 70 RMII_MDC --------------------------> PC1
dkato 0:f782d9c66c49 71 RMII_MII_CRS_DV -------------------> PA7
dkato 0:f782d9c66c49 72 RMII_MII_RXD0 ---------------------> PC4
dkato 0:f782d9c66c49 73 RMII_MII_RXD1 ---------------------> PC5
dkato 0:f782d9c66c49 74 RMII_MII_RXER ---------------------> PG2
dkato 0:f782d9c66c49 75 RMII_MII_TX_EN --------------------> PG11
dkato 0:f782d9c66c49 76 RMII_MII_TXD0 ---------------------> PG13
dkato 0:f782d9c66c49 77 RMII_MII_TXD1 ---------------------> PB13
dkato 0:f782d9c66c49 78 */
dkato 0:f782d9c66c49 79 HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
dkato 0:f782d9c66c49 80 HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13);
dkato 0:f782d9c66c49 81 HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
dkato 0:f782d9c66c49 82 HAL_GPIO_DeInit(GPIOG, GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13);
dkato 0:f782d9c66c49 83
dkato 0:f782d9c66c49 84 /* Disable the Ethernet global Interrupt */
dkato 0:f782d9c66c49 85 NVIC_DisableIRQ(ETH_IRQn);
dkato 0:f782d9c66c49 86 }
dkato 0:f782d9c66c49 87 }