Daiki Kato
/
mbed-dev_tmp
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Diff: targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG_STK3800/efm32wg_usb.h
- Revision:
- 50:a417edff4437
- Parent:
- 0:9b334a45a8ff
--- a/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG_STK3800/efm32wg_usb.h Wed Jan 13 12:45:11 2016 +0000
+++ b/targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG_STK3800/efm32wg_usb.h Fri Jan 15 07:45:16 2016 +0000
@@ -1,10 +1,10 @@
/**************************************************************************//**
* @file efm32wg_usb.h
* @brief EFM32WG_USB register and bit field definitions
- * @version 3.20.6
+ * @version 4.2.0
******************************************************************************
* @section License
- * <b>(C) Copyright 2014 Silicon Laboratories, Inc. http://www.silabs.com</b>
+ * <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
******************************************************************************
*
* Permission is granted to anyone to use this software for any purpose,
@@ -30,6 +30,10 @@
*
*****************************************************************************/
/**************************************************************************//**
+* @addtogroup Parts
+* @{
+******************************************************************************/
+/**************************************************************************//**
* @defgroup EFM32WG_USB
* @{
* @brief EFM32WG_USB Register Declaration
@@ -81,7 +85,6 @@
__IO uint32_t HPRT; /**< Host Port Control and Status Register */
uint32_t RESERVED6[47]; /**< Reserved registers */
-
USB_HC_TypeDef HC[14]; /**< Host Channel Registers */
uint32_t RESERVED7[80]; /**< Reserved for future use **/
@@ -110,7 +113,6 @@
__I uint32_t DIEP0TXFSTS; /**< Device IN Endpoint 0 Transmit FIFO Status Register */
uint32_t RESERVED14[1]; /**< Reserved registers */
-
USB_DIEP_TypeDef DIEP[6]; /**< Device IN Endpoint x+1 Registers */
uint32_t RESERVED15[72]; /**< Reserved for future use **/
@@ -122,70 +124,54 @@
__IO uint32_t DOEP0DMAADDR; /**< Device OUT Endpoint 0 DMA Address Register */
uint32_t RESERVED18[2]; /**< Reserved registers */
-
USB_DOEP_TypeDef DOEP[6]; /**< Device OUT Endpoint x+1 Registers */
uint32_t RESERVED19[136]; /**< Reserved for future use **/
__IO uint32_t PCGCCTL; /**< Power and Clock Gating Control Register */
uint32_t RESERVED20[127]; /**< Reserved registers */
-
__IO uint32_t FIFO0D[512]; /**< Device EP 0/Host Channel 0 FIFO */
uint32_t RESERVED21[512]; /**< Reserved registers */
-
__IO uint32_t FIFO1D[512]; /**< Device EP 1/Host Channel 1 FIFO */
uint32_t RESERVED22[512]; /**< Reserved registers */
-
__IO uint32_t FIFO2D[512]; /**< Device EP 2/Host Channel 2 FIFO */
uint32_t RESERVED23[512]; /**< Reserved registers */
-
__IO uint32_t FIFO3D[512]; /**< Device EP 3/Host Channel 3 FIFO */
uint32_t RESERVED24[512]; /**< Reserved registers */
-
__IO uint32_t FIFO4D[512]; /**< Device EP 4/Host Channel 4 FIFO */
uint32_t RESERVED25[512]; /**< Reserved registers */
-
__IO uint32_t FIFO5D[512]; /**< Device EP 5/Host Channel 5 FIFO */
uint32_t RESERVED26[512]; /**< Reserved registers */
-
__IO uint32_t FIFO6D[512]; /**< Device EP 6/Host Channel 6 FIFO */
uint32_t RESERVED27[512]; /**< Reserved registers */
-
__IO uint32_t FIFO7D[512]; /**< Host Channel 7 FIFO */
uint32_t RESERVED28[512]; /**< Reserved registers */
-
__IO uint32_t FIFO8D[512]; /**< Host Channel 8 FIFO */
uint32_t RESERVED29[512]; /**< Reserved registers */
-
__IO uint32_t FIFO9D[512]; /**< Host Channel 9 FIFO */
uint32_t RESERVED30[512]; /**< Reserved registers */
-
__IO uint32_t FIFO10D[512]; /**< Host Channel 10 FIFO */
uint32_t RESERVED31[512]; /**< Reserved registers */
-
__IO uint32_t FIFO11D[512]; /**< Host Channel 11 FIFO */
uint32_t RESERVED32[512]; /**< Reserved registers */
-
__IO uint32_t FIFO12D[512]; /**< Host Channel 12 FIFO */
uint32_t RESERVED33[512]; /**< Reserved registers */
-
__IO uint32_t FIFO13D[512]; /**< Host Channel 13 FIFO */
uint32_t RESERVED34[17920]; /**< Reserved registers */
-
__IO uint32_t FIFORAM[512]; /**< Direct Access to Data FIFO RAM for Debugging (2 KB) */
} USB_TypeDef; /** @} */
@@ -321,12 +307,12 @@
/* Bit fields for USB GOTGCTL */
#define _USB_GOTGCTL_RESETVALUE 0x00010000UL /**< Default value for USB_GOTGCTL */
#define _USB_GOTGCTL_MASK 0x001F0FFFUL /**< Mask for USB_GOTGCTL */
-#define USB_GOTGCTL_SESREQSCS (0x1UL << 0) /**< Session Request Success (device only) */
+#define USB_GOTGCTL_SESREQSCS (0x1UL << 0) /**< Session Request Success device only */
#define _USB_GOTGCTL_SESREQSCS_SHIFT 0 /**< Shift value for USB_SESREQSCS */
#define _USB_GOTGCTL_SESREQSCS_MASK 0x1UL /**< Bit mask for USB_SESREQSCS */
#define _USB_GOTGCTL_SESREQSCS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGCTL */
#define USB_GOTGCTL_SESREQSCS_DEFAULT (_USB_GOTGCTL_SESREQSCS_DEFAULT << 0) /**< Shifted mode DEFAULT for USB_GOTGCTL */
-#define USB_GOTGCTL_SESREQ (0x1UL << 1) /**< Session Request (device only) */
+#define USB_GOTGCTL_SESREQ (0x1UL << 1) /**< Session Request device only */
#define _USB_GOTGCTL_SESREQ_SHIFT 1 /**< Shift value for USB_SESREQ */
#define _USB_GOTGCTL_SESREQ_MASK 0x2UL /**< Bit mask for USB_SESREQ */
#define _USB_GOTGCTL_SESREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGCTL */
@@ -361,27 +347,27 @@
#define _USB_GOTGCTL_AVALIDOVVAL_MASK 0x80UL /**< Bit mask for USB_AVALIDOVVAL */
#define _USB_GOTGCTL_AVALIDOVVAL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGCTL */
#define USB_GOTGCTL_AVALIDOVVAL_DEFAULT (_USB_GOTGCTL_AVALIDOVVAL_DEFAULT << 7) /**< Shifted mode DEFAULT for USB_GOTGCTL */
-#define USB_GOTGCTL_HSTNEGSCS (0x1UL << 8) /**< Host Negotiation Success (device only) */
+#define USB_GOTGCTL_HSTNEGSCS (0x1UL << 8) /**< Host Negotiation Success device only */
#define _USB_GOTGCTL_HSTNEGSCS_SHIFT 8 /**< Shift value for USB_HSTNEGSCS */
#define _USB_GOTGCTL_HSTNEGSCS_MASK 0x100UL /**< Bit mask for USB_HSTNEGSCS */
#define _USB_GOTGCTL_HSTNEGSCS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGCTL */
#define USB_GOTGCTL_HSTNEGSCS_DEFAULT (_USB_GOTGCTL_HSTNEGSCS_DEFAULT << 8) /**< Shifted mode DEFAULT for USB_GOTGCTL */
-#define USB_GOTGCTL_HNPREQ (0x1UL << 9) /**< HNP Request (device only) */
+#define USB_GOTGCTL_HNPREQ (0x1UL << 9) /**< HNP Request device only */
#define _USB_GOTGCTL_HNPREQ_SHIFT 9 /**< Shift value for USB_HNPREQ */
#define _USB_GOTGCTL_HNPREQ_MASK 0x200UL /**< Bit mask for USB_HNPREQ */
#define _USB_GOTGCTL_HNPREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGCTL */
#define USB_GOTGCTL_HNPREQ_DEFAULT (_USB_GOTGCTL_HNPREQ_DEFAULT << 9) /**< Shifted mode DEFAULT for USB_GOTGCTL */
-#define USB_GOTGCTL_HSTSETHNPEN (0x1UL << 10) /**< Host Set HNP Enable (host only) */
+#define USB_GOTGCTL_HSTSETHNPEN (0x1UL << 10) /**< Host Set HNP Enable host only */
#define _USB_GOTGCTL_HSTSETHNPEN_SHIFT 10 /**< Shift value for USB_HSTSETHNPEN */
#define _USB_GOTGCTL_HSTSETHNPEN_MASK 0x400UL /**< Bit mask for USB_HSTSETHNPEN */
#define _USB_GOTGCTL_HSTSETHNPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGCTL */
#define USB_GOTGCTL_HSTSETHNPEN_DEFAULT (_USB_GOTGCTL_HSTSETHNPEN_DEFAULT << 10) /**< Shifted mode DEFAULT for USB_GOTGCTL */
-#define USB_GOTGCTL_DEVHNPEN (0x1UL << 11) /**< Device HNP Enabled (device only) */
+#define USB_GOTGCTL_DEVHNPEN (0x1UL << 11) /**< Device HNP Enabled device only */
#define _USB_GOTGCTL_DEVHNPEN_SHIFT 11 /**< Shift value for USB_DEVHNPEN */
#define _USB_GOTGCTL_DEVHNPEN_MASK 0x800UL /**< Bit mask for USB_DEVHNPEN */
#define _USB_GOTGCTL_DEVHNPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGCTL */
#define USB_GOTGCTL_DEVHNPEN_DEFAULT (_USB_GOTGCTL_DEVHNPEN_DEFAULT << 11) /**< Shifted mode DEFAULT for USB_GOTGCTL */
-#define USB_GOTGCTL_CONIDSTS (0x1UL << 16) /**< Connector ID Status (host and device) */
+#define USB_GOTGCTL_CONIDSTS (0x1UL << 16) /**< Connector ID Status host and device */
#define _USB_GOTGCTL_CONIDSTS_SHIFT 16 /**< Shift value for USB_CONIDSTS */
#define _USB_GOTGCTL_CONIDSTS_MASK 0x10000UL /**< Bit mask for USB_CONIDSTS */
#define _USB_GOTGCTL_CONIDSTS_A 0x00000000UL /**< Mode A for USB_GOTGCTL */
@@ -390,7 +376,7 @@
#define USB_GOTGCTL_CONIDSTS_A (_USB_GOTGCTL_CONIDSTS_A << 16) /**< Shifted mode A for USB_GOTGCTL */
#define USB_GOTGCTL_CONIDSTS_DEFAULT (_USB_GOTGCTL_CONIDSTS_DEFAULT << 16) /**< Shifted mode DEFAULT for USB_GOTGCTL */
#define USB_GOTGCTL_CONIDSTS_B (_USB_GOTGCTL_CONIDSTS_B << 16) /**< Shifted mode B for USB_GOTGCTL */
-#define USB_GOTGCTL_DBNCTIME (0x1UL << 17) /**< Long/Short Debounce Time (host only) */
+#define USB_GOTGCTL_DBNCTIME (0x1UL << 17) /**< Long/Short Debounce Time host only */
#define _USB_GOTGCTL_DBNCTIME_SHIFT 17 /**< Shift value for USB_DBNCTIME */
#define _USB_GOTGCTL_DBNCTIME_MASK 0x20000UL /**< Bit mask for USB_DBNCTIME */
#define _USB_GOTGCTL_DBNCTIME_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGCTL */
@@ -399,12 +385,12 @@
#define USB_GOTGCTL_DBNCTIME_DEFAULT (_USB_GOTGCTL_DBNCTIME_DEFAULT << 17) /**< Shifted mode DEFAULT for USB_GOTGCTL */
#define USB_GOTGCTL_DBNCTIME_LONG (_USB_GOTGCTL_DBNCTIME_LONG << 17) /**< Shifted mode LONG for USB_GOTGCTL */
#define USB_GOTGCTL_DBNCTIME_SHORT (_USB_GOTGCTL_DBNCTIME_SHORT << 17) /**< Shifted mode SHORT for USB_GOTGCTL */
-#define USB_GOTGCTL_ASESVLD (0x1UL << 18) /**< A-Session Valid (host only) */
+#define USB_GOTGCTL_ASESVLD (0x1UL << 18) /**< A-Session Valid host only */
#define _USB_GOTGCTL_ASESVLD_SHIFT 18 /**< Shift value for USB_ASESVLD */
#define _USB_GOTGCTL_ASESVLD_MASK 0x40000UL /**< Bit mask for USB_ASESVLD */
#define _USB_GOTGCTL_ASESVLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGCTL */
#define USB_GOTGCTL_ASESVLD_DEFAULT (_USB_GOTGCTL_ASESVLD_DEFAULT << 18) /**< Shifted mode DEFAULT for USB_GOTGCTL */
-#define USB_GOTGCTL_BSESVLD (0x1UL << 19) /**< B-Session Valid (device only) */
+#define USB_GOTGCTL_BSESVLD (0x1UL << 19) /**< B-Session Valid device only */
#define _USB_GOTGCTL_BSESVLD_SHIFT 19 /**< Shift value for USB_BSESVLD */
#define _USB_GOTGCTL_BSESVLD_MASK 0x80000UL /**< Bit mask for USB_BSESVLD */
#define _USB_GOTGCTL_BSESVLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGCTL */
@@ -422,32 +408,32 @@
/* Bit fields for USB GOTGINT */
#define _USB_GOTGINT_RESETVALUE 0x00000000UL /**< Default value for USB_GOTGINT */
#define _USB_GOTGINT_MASK 0x000E0304UL /**< Mask for USB_GOTGINT */
-#define USB_GOTGINT_SESENDDET (0x1UL << 2) /**< Session End Detected (host and device) */
+#define USB_GOTGINT_SESENDDET (0x1UL << 2) /**< Session End Detected host and device */
#define _USB_GOTGINT_SESENDDET_SHIFT 2 /**< Shift value for USB_SESENDDET */
#define _USB_GOTGINT_SESENDDET_MASK 0x4UL /**< Bit mask for USB_SESENDDET */
#define _USB_GOTGINT_SESENDDET_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGINT */
#define USB_GOTGINT_SESENDDET_DEFAULT (_USB_GOTGINT_SESENDDET_DEFAULT << 2) /**< Shifted mode DEFAULT for USB_GOTGINT */
-#define USB_GOTGINT_SESREQSUCSTSCHNG (0x1UL << 8) /**< Session Request Success Status Change (host and device) */
+#define USB_GOTGINT_SESREQSUCSTSCHNG (0x1UL << 8) /**< Session Request Success Status Change host and device */
#define _USB_GOTGINT_SESREQSUCSTSCHNG_SHIFT 8 /**< Shift value for USB_SESREQSUCSTSCHNG */
#define _USB_GOTGINT_SESREQSUCSTSCHNG_MASK 0x100UL /**< Bit mask for USB_SESREQSUCSTSCHNG */
#define _USB_GOTGINT_SESREQSUCSTSCHNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGINT */
#define USB_GOTGINT_SESREQSUCSTSCHNG_DEFAULT (_USB_GOTGINT_SESREQSUCSTSCHNG_DEFAULT << 8) /**< Shifted mode DEFAULT for USB_GOTGINT */
-#define USB_GOTGINT_HSTNEGSUCSTSCHNG (0x1UL << 9) /**< Host Negotiation Success Status Change (host and device) */
+#define USB_GOTGINT_HSTNEGSUCSTSCHNG (0x1UL << 9) /**< Host Negotiation Success Status Change host and device */
#define _USB_GOTGINT_HSTNEGSUCSTSCHNG_SHIFT 9 /**< Shift value for USB_HSTNEGSUCSTSCHNG */
#define _USB_GOTGINT_HSTNEGSUCSTSCHNG_MASK 0x200UL /**< Bit mask for USB_HSTNEGSUCSTSCHNG */
#define _USB_GOTGINT_HSTNEGSUCSTSCHNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGINT */
#define USB_GOTGINT_HSTNEGSUCSTSCHNG_DEFAULT (_USB_GOTGINT_HSTNEGSUCSTSCHNG_DEFAULT << 9) /**< Shifted mode DEFAULT for USB_GOTGINT */
-#define USB_GOTGINT_HSTNEGDET (0x1UL << 17) /**< Host Negotiation Detected (host and device) */
+#define USB_GOTGINT_HSTNEGDET (0x1UL << 17) /**< Host Negotiation Detected host and device */
#define _USB_GOTGINT_HSTNEGDET_SHIFT 17 /**< Shift value for USB_HSTNEGDET */
#define _USB_GOTGINT_HSTNEGDET_MASK 0x20000UL /**< Bit mask for USB_HSTNEGDET */
#define _USB_GOTGINT_HSTNEGDET_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGINT */
#define USB_GOTGINT_HSTNEGDET_DEFAULT (_USB_GOTGINT_HSTNEGDET_DEFAULT << 17) /**< Shifted mode DEFAULT for USB_GOTGINT */
-#define USB_GOTGINT_ADEVTOUTCHG (0x1UL << 18) /**< A-Device Timeout Change (host and device) */
+#define USB_GOTGINT_ADEVTOUTCHG (0x1UL << 18) /**< A-Device Timeout Change host and device */
#define _USB_GOTGINT_ADEVTOUTCHG_SHIFT 18 /**< Shift value for USB_ADEVTOUTCHG */
#define _USB_GOTGINT_ADEVTOUTCHG_MASK 0x40000UL /**< Bit mask for USB_ADEVTOUTCHG */
#define _USB_GOTGINT_ADEVTOUTCHG_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGINT */
#define USB_GOTGINT_ADEVTOUTCHG_DEFAULT (_USB_GOTGINT_ADEVTOUTCHG_DEFAULT << 18) /**< Shifted mode DEFAULT for USB_GOTGINT */
-#define USB_GOTGINT_DBNCEDONE (0x1UL << 19) /**< Debounce Done (host only) */
+#define USB_GOTGINT_DBNCEDONE (0x1UL << 19) /**< Debounce Done host only */
#define _USB_GOTGINT_DBNCEDONE_SHIFT 19 /**< Shift value for USB_DBNCEDONE */
#define _USB_GOTGINT_DBNCEDONE_MASK 0x80000UL /**< Bit mask for USB_DBNCEDONE */
#define _USB_GOTGINT_DBNCEDONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GOTGINT */
@@ -456,7 +442,7 @@
/* Bit fields for USB GAHBCFG */
#define _USB_GAHBCFG_RESETVALUE 0x00000000UL /**< Default value for USB_GAHBCFG */
#define _USB_GAHBCFG_MASK 0x006001BFUL /**< Mask for USB_GAHBCFG */
-#define USB_GAHBCFG_GLBLINTRMSK (0x1UL << 0) /**< Global Interrupt Mask (host and device) */
+#define USB_GAHBCFG_GLBLINTRMSK (0x1UL << 0) /**< Global Interrupt Mask host and device */
#define _USB_GAHBCFG_GLBLINTRMSK_SHIFT 0 /**< Shift value for USB_GLBLINTRMSK */
#define _USB_GAHBCFG_GLBLINTRMSK_MASK 0x1UL /**< Bit mask for USB_GLBLINTRMSK */
#define _USB_GAHBCFG_GLBLINTRMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GAHBCFG */
@@ -475,12 +461,12 @@
#define USB_GAHBCFG_HBSTLEN_INCR4 (_USB_GAHBCFG_HBSTLEN_INCR4 << 1) /**< Shifted mode INCR4 for USB_GAHBCFG */
#define USB_GAHBCFG_HBSTLEN_INCR8 (_USB_GAHBCFG_HBSTLEN_INCR8 << 1) /**< Shifted mode INCR8 for USB_GAHBCFG */
#define USB_GAHBCFG_HBSTLEN_INCR16 (_USB_GAHBCFG_HBSTLEN_INCR16 << 1) /**< Shifted mode INCR16 for USB_GAHBCFG */
-#define USB_GAHBCFG_DMAEN (0x1UL << 5) /**< DMA Enable (host and device) */
+#define USB_GAHBCFG_DMAEN (0x1UL << 5) /**< DMA Enable host and device */
#define _USB_GAHBCFG_DMAEN_SHIFT 5 /**< Shift value for USB_DMAEN */
#define _USB_GAHBCFG_DMAEN_MASK 0x20UL /**< Bit mask for USB_DMAEN */
#define _USB_GAHBCFG_DMAEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GAHBCFG */
#define USB_GAHBCFG_DMAEN_DEFAULT (_USB_GAHBCFG_DMAEN_DEFAULT << 5) /**< Shifted mode DEFAULT for USB_GAHBCFG */
-#define USB_GAHBCFG_NPTXFEMPLVL (0x1UL << 7) /**< Non-Periodic TxFIFO Empty Level (host and device) */
+#define USB_GAHBCFG_NPTXFEMPLVL (0x1UL << 7) /**< Non-Periodic TxFIFO Empty Level host and device */
#define _USB_GAHBCFG_NPTXFEMPLVL_SHIFT 7 /**< Shift value for USB_NPTXFEMPLVL */
#define _USB_GAHBCFG_NPTXFEMPLVL_MASK 0x80UL /**< Bit mask for USB_NPTXFEMPLVL */
#define _USB_GAHBCFG_NPTXFEMPLVL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GAHBCFG */
@@ -489,7 +475,7 @@
#define USB_GAHBCFG_NPTXFEMPLVL_DEFAULT (_USB_GAHBCFG_NPTXFEMPLVL_DEFAULT << 7) /**< Shifted mode DEFAULT for USB_GAHBCFG */
#define USB_GAHBCFG_NPTXFEMPLVL_HALFEMPTY (_USB_GAHBCFG_NPTXFEMPLVL_HALFEMPTY << 7) /**< Shifted mode HALFEMPTY for USB_GAHBCFG */
#define USB_GAHBCFG_NPTXFEMPLVL_EMPTY (_USB_GAHBCFG_NPTXFEMPLVL_EMPTY << 7) /**< Shifted mode EMPTY for USB_GAHBCFG */
-#define USB_GAHBCFG_PTXFEMPLVL (0x1UL << 8) /**< Periodic TxFIFO Empty Level (host only) */
+#define USB_GAHBCFG_PTXFEMPLVL (0x1UL << 8) /**< Periodic TxFIFO Empty Level host only */
#define _USB_GAHBCFG_PTXFEMPLVL_SHIFT 8 /**< Shift value for USB_PTXFEMPLVL */
#define _USB_GAHBCFG_PTXFEMPLVL_MASK 0x100UL /**< Bit mask for USB_PTXFEMPLVL */
#define _USB_GAHBCFG_PTXFEMPLVL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GAHBCFG */
@@ -516,17 +502,17 @@
#define _USB_GUSBCFG_TOUTCAL_MASK 0x7UL /**< Bit mask for USB_TOUTCAL */
#define _USB_GUSBCFG_TOUTCAL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GUSBCFG */
#define USB_GUSBCFG_TOUTCAL_DEFAULT (_USB_GUSBCFG_TOUTCAL_DEFAULT << 0) /**< Shifted mode DEFAULT for USB_GUSBCFG */
-#define USB_GUSBCFG_FSINTF (0x1UL << 5) /**< Full-Speed Serial Interface Select (host and device) */
+#define USB_GUSBCFG_FSINTF (0x1UL << 5) /**< Full-Speed Serial Interface Select host and device */
#define _USB_GUSBCFG_FSINTF_SHIFT 5 /**< Shift value for USB_FSINTF */
#define _USB_GUSBCFG_FSINTF_MASK 0x20UL /**< Bit mask for USB_FSINTF */
#define _USB_GUSBCFG_FSINTF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GUSBCFG */
#define USB_GUSBCFG_FSINTF_DEFAULT (_USB_GUSBCFG_FSINTF_DEFAULT << 5) /**< Shifted mode DEFAULT for USB_GUSBCFG */
-#define USB_GUSBCFG_SRPCAP (0x1UL << 8) /**< SRP-Capable (host and device) */
+#define USB_GUSBCFG_SRPCAP (0x1UL << 8) /**< SRP-Capable host and device */
#define _USB_GUSBCFG_SRPCAP_SHIFT 8 /**< Shift value for USB_SRPCAP */
#define _USB_GUSBCFG_SRPCAP_MASK 0x100UL /**< Bit mask for USB_SRPCAP */
#define _USB_GUSBCFG_SRPCAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GUSBCFG */
#define USB_GUSBCFG_SRPCAP_DEFAULT (_USB_GUSBCFG_SRPCAP_DEFAULT << 8) /**< Shifted mode DEFAULT for USB_GUSBCFG */
-#define USB_GUSBCFG_HNPCAP (0x1UL << 9) /**< HNP-Capable (host and device) */
+#define USB_GUSBCFG_HNPCAP (0x1UL << 9) /**< HNP-Capable host and device */
#define _USB_GUSBCFG_HNPCAP_SHIFT 9 /**< Shift value for USB_HNPCAP */
#define _USB_GUSBCFG_HNPCAP_MASK 0x200UL /**< Bit mask for USB_HNPCAP */
#define _USB_GUSBCFG_HNPCAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GUSBCFG */
@@ -535,7 +521,7 @@
#define _USB_GUSBCFG_USBTRDTIM_MASK 0x3C00UL /**< Bit mask for USB_USBTRDTIM */
#define _USB_GUSBCFG_USBTRDTIM_DEFAULT 0x00000005UL /**< Mode DEFAULT for USB_GUSBCFG */
#define USB_GUSBCFG_USBTRDTIM_DEFAULT (_USB_GUSBCFG_USBTRDTIM_DEFAULT << 10) /**< Shifted mode DEFAULT for USB_GUSBCFG */
-#define USB_GUSBCFG_TERMSELDLPULSE (0x1UL << 22) /**< TermSel DLine Pulsing Selection (device only) */
+#define USB_GUSBCFG_TERMSELDLPULSE (0x1UL << 22) /**< TermSel DLine Pulsing Selection device only */
#define _USB_GUSBCFG_TERMSELDLPULSE_SHIFT 22 /**< Shift value for USB_TERMSELDLPULSE */
#define _USB_GUSBCFG_TERMSELDLPULSE_MASK 0x400000UL /**< Bit mask for USB_TERMSELDLPULSE */
#define _USB_GUSBCFG_TERMSELDLPULSE_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GUSBCFG */
@@ -544,22 +530,22 @@
#define USB_GUSBCFG_TERMSELDLPULSE_DEFAULT (_USB_GUSBCFG_TERMSELDLPULSE_DEFAULT << 22) /**< Shifted mode DEFAULT for USB_GUSBCFG */
#define USB_GUSBCFG_TERMSELDLPULSE_TXVALID (_USB_GUSBCFG_TERMSELDLPULSE_TXVALID << 22) /**< Shifted mode TXVALID for USB_GUSBCFG */
#define USB_GUSBCFG_TERMSELDLPULSE_TERMSEL (_USB_GUSBCFG_TERMSELDLPULSE_TERMSEL << 22) /**< Shifted mode TERMSEL for USB_GUSBCFG */
-#define USB_GUSBCFG_TXENDDELAY (0x1UL << 28) /**< Tx End Delay (device only) */
+#define USB_GUSBCFG_TXENDDELAY (0x1UL << 28) /**< Tx End Delay device only */
#define _USB_GUSBCFG_TXENDDELAY_SHIFT 28 /**< Shift value for USB_TXENDDELAY */
#define _USB_GUSBCFG_TXENDDELAY_MASK 0x10000000UL /**< Bit mask for USB_TXENDDELAY */
#define _USB_GUSBCFG_TXENDDELAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GUSBCFG */
#define USB_GUSBCFG_TXENDDELAY_DEFAULT (_USB_GUSBCFG_TXENDDELAY_DEFAULT << 28) /**< Shifted mode DEFAULT for USB_GUSBCFG */
-#define USB_GUSBCFG_FORCEHSTMODE (0x1UL << 29) /**< Force Host Mode (host and device) */
+#define USB_GUSBCFG_FORCEHSTMODE (0x1UL << 29) /**< Force Host Mode host and device */
#define _USB_GUSBCFG_FORCEHSTMODE_SHIFT 29 /**< Shift value for USB_FORCEHSTMODE */
#define _USB_GUSBCFG_FORCEHSTMODE_MASK 0x20000000UL /**< Bit mask for USB_FORCEHSTMODE */
#define _USB_GUSBCFG_FORCEHSTMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GUSBCFG */
#define USB_GUSBCFG_FORCEHSTMODE_DEFAULT (_USB_GUSBCFG_FORCEHSTMODE_DEFAULT << 29) /**< Shifted mode DEFAULT for USB_GUSBCFG */
-#define USB_GUSBCFG_FORCEDEVMODE (0x1UL << 30) /**< Force Device Mode (host and device) */
+#define USB_GUSBCFG_FORCEDEVMODE (0x1UL << 30) /**< Force Device Mode host and device */
#define _USB_GUSBCFG_FORCEDEVMODE_SHIFT 30 /**< Shift value for USB_FORCEDEVMODE */
#define _USB_GUSBCFG_FORCEDEVMODE_MASK 0x40000000UL /**< Bit mask for USB_FORCEDEVMODE */
#define _USB_GUSBCFG_FORCEDEVMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GUSBCFG */
#define USB_GUSBCFG_FORCEDEVMODE_DEFAULT (_USB_GUSBCFG_FORCEDEVMODE_DEFAULT << 30) /**< Shifted mode DEFAULT for USB_GUSBCFG */
-#define USB_GUSBCFG_CORRUPTTXPKT (0x1UL << 31) /**< Corrupt Tx packet (host and device) */
+#define USB_GUSBCFG_CORRUPTTXPKT (0x1UL << 31) /**< Corrupt Tx packet host and device */
#define _USB_GUSBCFG_CORRUPTTXPKT_SHIFT 31 /**< Shift value for USB_CORRUPTTXPKT */
#define _USB_GUSBCFG_CORRUPTTXPKT_MASK 0x80000000UL /**< Bit mask for USB_CORRUPTTXPKT */
#define _USB_GUSBCFG_CORRUPTTXPKT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GUSBCFG */
@@ -568,22 +554,22 @@
/* Bit fields for USB GRSTCTL */
#define _USB_GRSTCTL_RESETVALUE 0x80000000UL /**< Default value for USB_GRSTCTL */
#define _USB_GRSTCTL_MASK 0xC00007F5UL /**< Mask for USB_GRSTCTL */
-#define USB_GRSTCTL_CSFTRST (0x1UL << 0) /**< Core Soft Reset (host and device) */
+#define USB_GRSTCTL_CSFTRST (0x1UL << 0) /**< Core Soft Reset host and device */
#define _USB_GRSTCTL_CSFTRST_SHIFT 0 /**< Shift value for USB_CSFTRST */
#define _USB_GRSTCTL_CSFTRST_MASK 0x1UL /**< Bit mask for USB_CSFTRST */
#define _USB_GRSTCTL_CSFTRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GRSTCTL */
#define USB_GRSTCTL_CSFTRST_DEFAULT (_USB_GRSTCTL_CSFTRST_DEFAULT << 0) /**< Shifted mode DEFAULT for USB_GRSTCTL */
-#define USB_GRSTCTL_FRMCNTRRST (0x1UL << 2) /**< Host Frame Counter Reset (host only) */
+#define USB_GRSTCTL_FRMCNTRRST (0x1UL << 2) /**< Host Frame Counter Reset host only */
#define _USB_GRSTCTL_FRMCNTRRST_SHIFT 2 /**< Shift value for USB_FRMCNTRRST */
#define _USB_GRSTCTL_FRMCNTRRST_MASK 0x4UL /**< Bit mask for USB_FRMCNTRRST */
#define _USB_GRSTCTL_FRMCNTRRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GRSTCTL */
#define USB_GRSTCTL_FRMCNTRRST_DEFAULT (_USB_GRSTCTL_FRMCNTRRST_DEFAULT << 2) /**< Shifted mode DEFAULT for USB_GRSTCTL */
-#define USB_GRSTCTL_RXFFLSH (0x1UL << 4) /**< RxFIFO Flush (host and device) */
+#define USB_GRSTCTL_RXFFLSH (0x1UL << 4) /**< RxFIFO Flush host and device */
#define _USB_GRSTCTL_RXFFLSH_SHIFT 4 /**< Shift value for USB_RXFFLSH */
#define _USB_GRSTCTL_RXFFLSH_MASK 0x10UL /**< Bit mask for USB_RXFFLSH */
#define _USB_GRSTCTL_RXFFLSH_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GRSTCTL */
#define USB_GRSTCTL_RXFFLSH_DEFAULT (_USB_GRSTCTL_RXFFLSH_DEFAULT << 4) /**< Shifted mode DEFAULT for USB_GRSTCTL */
-#define USB_GRSTCTL_TXFFLSH (0x1UL << 5) /**< TxFIFO Flush (host and device) */
+#define USB_GRSTCTL_TXFFLSH (0x1UL << 5) /**< TxFIFO Flush host and device */
#define _USB_GRSTCTL_TXFFLSH_SHIFT 5 /**< Shift value for USB_TXFFLSH */
#define _USB_GRSTCTL_TXFFLSH_MASK 0x20UL /**< Bit mask for USB_TXFFLSH */
#define _USB_GRSTCTL_TXFFLSH_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GRSTCTL */
@@ -608,12 +594,12 @@
#define USB_GRSTCTL_TXFNUM_F5 (_USB_GRSTCTL_TXFNUM_F5 << 6) /**< Shifted mode F5 for USB_GRSTCTL */
#define USB_GRSTCTL_TXFNUM_F6 (_USB_GRSTCTL_TXFNUM_F6 << 6) /**< Shifted mode F6 for USB_GRSTCTL */
#define USB_GRSTCTL_TXFNUM_FALL (_USB_GRSTCTL_TXFNUM_FALL << 6) /**< Shifted mode FALL for USB_GRSTCTL */
-#define USB_GRSTCTL_DMAREQ (0x1UL << 30) /**< DMA Request Signal (host and device) */
+#define USB_GRSTCTL_DMAREQ (0x1UL << 30) /**< DMA Request Signal host and device */
#define _USB_GRSTCTL_DMAREQ_SHIFT 30 /**< Shift value for USB_DMAREQ */
#define _USB_GRSTCTL_DMAREQ_MASK 0x40000000UL /**< Bit mask for USB_DMAREQ */
#define _USB_GRSTCTL_DMAREQ_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GRSTCTL */
#define USB_GRSTCTL_DMAREQ_DEFAULT (_USB_GRSTCTL_DMAREQ_DEFAULT << 30) /**< Shifted mode DEFAULT for USB_GRSTCTL */
-#define USB_GRSTCTL_AHBIDLE (0x1UL << 31) /**< AHB Master Idle (host and device) */
+#define USB_GRSTCTL_AHBIDLE (0x1UL << 31) /**< AHB Master Idle host and device */
#define _USB_GRSTCTL_AHBIDLE_SHIFT 31 /**< Shift value for USB_AHBIDLE */
#define _USB_GRSTCTL_AHBIDLE_MASK 0x80000000UL /**< Bit mask for USB_AHBIDLE */
#define _USB_GRSTCTL_AHBIDLE_DEFAULT 0x00000001UL /**< Mode DEFAULT for USB_GRSTCTL */
@@ -621,8 +607,8 @@
/* Bit fields for USB GINTSTS */
#define _USB_GINTSTS_RESETVALUE 0x14000020UL /**< Default value for USB_GINTSTS */
-#define _USB_GINTSTS_MASK 0xF7FC7CFFUL /**< Mask for USB_GINTSTS */
-#define USB_GINTSTS_CURMOD (0x1UL << 0) /**< Current Mode of Operation (host and device) */
+#define _USB_GINTSTS_MASK 0xF7FCFCFFUL /**< Mask for USB_GINTSTS */
+#define USB_GINTSTS_CURMOD (0x1UL << 0) /**< Current Mode of Operation host and device */
#define _USB_GINTSTS_CURMOD_SHIFT 0 /**< Shift value for USB_CURMOD */
#define _USB_GINTSTS_CURMOD_MASK 0x1UL /**< Bit mask for USB_CURMOD */
#define _USB_GINTSTS_CURMOD_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
@@ -631,127 +617,132 @@
#define USB_GINTSTS_CURMOD_DEFAULT (_USB_GINTSTS_CURMOD_DEFAULT << 0) /**< Shifted mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_CURMOD_DEVICE (_USB_GINTSTS_CURMOD_DEVICE << 0) /**< Shifted mode DEVICE for USB_GINTSTS */
#define USB_GINTSTS_CURMOD_HOST (_USB_GINTSTS_CURMOD_HOST << 0) /**< Shifted mode HOST for USB_GINTSTS */
-#define USB_GINTSTS_MODEMIS (0x1UL << 1) /**< Mode Mismatch Interrupt (host and device) */
+#define USB_GINTSTS_MODEMIS (0x1UL << 1) /**< Mode Mismatch Interrupt host and device */
#define _USB_GINTSTS_MODEMIS_SHIFT 1 /**< Shift value for USB_MODEMIS */
#define _USB_GINTSTS_MODEMIS_MASK 0x2UL /**< Bit mask for USB_MODEMIS */
#define _USB_GINTSTS_MODEMIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_MODEMIS_DEFAULT (_USB_GINTSTS_MODEMIS_DEFAULT << 1) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_OTGINT (0x1UL << 2) /**< OTG Interrupt (host and device) */
+#define USB_GINTSTS_OTGINT (0x1UL << 2) /**< OTG Interrupt host and device */
#define _USB_GINTSTS_OTGINT_SHIFT 2 /**< Shift value for USB_OTGINT */
#define _USB_GINTSTS_OTGINT_MASK 0x4UL /**< Bit mask for USB_OTGINT */
#define _USB_GINTSTS_OTGINT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_OTGINT_DEFAULT (_USB_GINTSTS_OTGINT_DEFAULT << 2) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_SOF (0x1UL << 3) /**< Start of Frame (host and device) */
+#define USB_GINTSTS_SOF (0x1UL << 3) /**< Start of Frame host and device */
#define _USB_GINTSTS_SOF_SHIFT 3 /**< Shift value for USB_SOF */
#define _USB_GINTSTS_SOF_MASK 0x8UL /**< Bit mask for USB_SOF */
#define _USB_GINTSTS_SOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_SOF_DEFAULT (_USB_GINTSTS_SOF_DEFAULT << 3) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_RXFLVL (0x1UL << 4) /**< RxFIFO Non-Empty (host and device) */
+#define USB_GINTSTS_RXFLVL (0x1UL << 4) /**< RxFIFO Non-Empty host and device */
#define _USB_GINTSTS_RXFLVL_SHIFT 4 /**< Shift value for USB_RXFLVL */
#define _USB_GINTSTS_RXFLVL_MASK 0x10UL /**< Bit mask for USB_RXFLVL */
#define _USB_GINTSTS_RXFLVL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_RXFLVL_DEFAULT (_USB_GINTSTS_RXFLVL_DEFAULT << 4) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_NPTXFEMP (0x1UL << 5) /**< Non-Periodic TxFIFO Empty (host only) */
+#define USB_GINTSTS_NPTXFEMP (0x1UL << 5) /**< Non-Periodic TxFIFO Empty host only */
#define _USB_GINTSTS_NPTXFEMP_SHIFT 5 /**< Shift value for USB_NPTXFEMP */
#define _USB_GINTSTS_NPTXFEMP_MASK 0x20UL /**< Bit mask for USB_NPTXFEMP */
#define _USB_GINTSTS_NPTXFEMP_DEFAULT 0x00000001UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_NPTXFEMP_DEFAULT (_USB_GINTSTS_NPTXFEMP_DEFAULT << 5) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_GINNAKEFF (0x1UL << 6) /**< Global IN Non-periodic NAK Effective (device only) */
+#define USB_GINTSTS_GINNAKEFF (0x1UL << 6) /**< Global IN Non-periodic NAK Effective device only */
#define _USB_GINTSTS_GINNAKEFF_SHIFT 6 /**< Shift value for USB_GINNAKEFF */
#define _USB_GINTSTS_GINNAKEFF_MASK 0x40UL /**< Bit mask for USB_GINNAKEFF */
#define _USB_GINTSTS_GINNAKEFF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_GINNAKEFF_DEFAULT (_USB_GINTSTS_GINNAKEFF_DEFAULT << 6) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_GOUTNAKEFF (0x1UL << 7) /**< Global OUT NAK Effective (device only) */
+#define USB_GINTSTS_GOUTNAKEFF (0x1UL << 7) /**< Global OUT NAK Effective device only */
#define _USB_GINTSTS_GOUTNAKEFF_SHIFT 7 /**< Shift value for USB_GOUTNAKEFF */
#define _USB_GINTSTS_GOUTNAKEFF_MASK 0x80UL /**< Bit mask for USB_GOUTNAKEFF */
#define _USB_GINTSTS_GOUTNAKEFF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_GOUTNAKEFF_DEFAULT (_USB_GINTSTS_GOUTNAKEFF_DEFAULT << 7) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_ERLYSUSP (0x1UL << 10) /**< Early Suspend (device only) */
+#define USB_GINTSTS_ERLYSUSP (0x1UL << 10) /**< Early Suspend device only */
#define _USB_GINTSTS_ERLYSUSP_SHIFT 10 /**< Shift value for USB_ERLYSUSP */
#define _USB_GINTSTS_ERLYSUSP_MASK 0x400UL /**< Bit mask for USB_ERLYSUSP */
#define _USB_GINTSTS_ERLYSUSP_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_ERLYSUSP_DEFAULT (_USB_GINTSTS_ERLYSUSP_DEFAULT << 10) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_USBSUSP (0x1UL << 11) /**< USB Suspend (device only) */
+#define USB_GINTSTS_USBSUSP (0x1UL << 11) /**< USB Suspend device only */
#define _USB_GINTSTS_USBSUSP_SHIFT 11 /**< Shift value for USB_USBSUSP */
#define _USB_GINTSTS_USBSUSP_MASK 0x800UL /**< Bit mask for USB_USBSUSP */
#define _USB_GINTSTS_USBSUSP_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_USBSUSP_DEFAULT (_USB_GINTSTS_USBSUSP_DEFAULT << 11) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_USBRST (0x1UL << 12) /**< USB Reset (device only) */
+#define USB_GINTSTS_USBRST (0x1UL << 12) /**< USB Reset device only */
#define _USB_GINTSTS_USBRST_SHIFT 12 /**< Shift value for USB_USBRST */
#define _USB_GINTSTS_USBRST_MASK 0x1000UL /**< Bit mask for USB_USBRST */
#define _USB_GINTSTS_USBRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_USBRST_DEFAULT (_USB_GINTSTS_USBRST_DEFAULT << 12) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_ENUMDONE (0x1UL << 13) /**< Enumeration Done (device only) */
+#define USB_GINTSTS_ENUMDONE (0x1UL << 13) /**< Enumeration Done device only */
#define _USB_GINTSTS_ENUMDONE_SHIFT 13 /**< Shift value for USB_ENUMDONE */
#define _USB_GINTSTS_ENUMDONE_MASK 0x2000UL /**< Bit mask for USB_ENUMDONE */
#define _USB_GINTSTS_ENUMDONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_ENUMDONE_DEFAULT (_USB_GINTSTS_ENUMDONE_DEFAULT << 13) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_ISOOUTDROP (0x1UL << 14) /**< Isochronous OUT Packet Dropped Interrupt (device only) */
+#define USB_GINTSTS_ISOOUTDROP (0x1UL << 14) /**< Isochronous OUT Packet Dropped Interrupt device only */
#define _USB_GINTSTS_ISOOUTDROP_SHIFT 14 /**< Shift value for USB_ISOOUTDROP */
#define _USB_GINTSTS_ISOOUTDROP_MASK 0x4000UL /**< Bit mask for USB_ISOOUTDROP */
#define _USB_GINTSTS_ISOOUTDROP_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_ISOOUTDROP_DEFAULT (_USB_GINTSTS_ISOOUTDROP_DEFAULT << 14) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_IEPINT (0x1UL << 18) /**< IN Endpoints Interrupt (device only) */
+#define USB_GINTSTS_EOPF (0x1UL << 15) /**< End of Periodic Frame Interrupt */
+#define _USB_GINTSTS_EOPF_SHIFT 15 /**< Shift value for USB_EOPF */
+#define _USB_GINTSTS_EOPF_MASK 0x8000UL /**< Bit mask for USB_EOPF */
+#define _USB_GINTSTS_EOPF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
+#define USB_GINTSTS_EOPF_DEFAULT (_USB_GINTSTS_EOPF_DEFAULT << 15) /**< Shifted mode DEFAULT for USB_GINTSTS */
+#define USB_GINTSTS_IEPINT (0x1UL << 18) /**< IN Endpoints Interrupt device only */
#define _USB_GINTSTS_IEPINT_SHIFT 18 /**< Shift value for USB_IEPINT */
#define _USB_GINTSTS_IEPINT_MASK 0x40000UL /**< Bit mask for USB_IEPINT */
#define _USB_GINTSTS_IEPINT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_IEPINT_DEFAULT (_USB_GINTSTS_IEPINT_DEFAULT << 18) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_OEPINT (0x1UL << 19) /**< OUT Endpoints Interrupt (device only) */
+#define USB_GINTSTS_OEPINT (0x1UL << 19) /**< OUT Endpoints Interrupt device only */
#define _USB_GINTSTS_OEPINT_SHIFT 19 /**< Shift value for USB_OEPINT */
#define _USB_GINTSTS_OEPINT_MASK 0x80000UL /**< Bit mask for USB_OEPINT */
#define _USB_GINTSTS_OEPINT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_OEPINT_DEFAULT (_USB_GINTSTS_OEPINT_DEFAULT << 19) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_INCOMPISOIN (0x1UL << 20) /**< Incomplete Isochronous IN Transfer (device only) */
+#define USB_GINTSTS_INCOMPISOIN (0x1UL << 20) /**< Incomplete Isochronous IN Transfer device only */
#define _USB_GINTSTS_INCOMPISOIN_SHIFT 20 /**< Shift value for USB_INCOMPISOIN */
#define _USB_GINTSTS_INCOMPISOIN_MASK 0x100000UL /**< Bit mask for USB_INCOMPISOIN */
#define _USB_GINTSTS_INCOMPISOIN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_INCOMPISOIN_DEFAULT (_USB_GINTSTS_INCOMPISOIN_DEFAULT << 20) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_INCOMPLP (0x1UL << 21) /**< Incomplete Periodic Transfer (device only) */
+#define USB_GINTSTS_INCOMPLP (0x1UL << 21) /**< Incomplete Periodic Transfer host and device */
#define _USB_GINTSTS_INCOMPLP_SHIFT 21 /**< Shift value for USB_INCOMPLP */
#define _USB_GINTSTS_INCOMPLP_MASK 0x200000UL /**< Bit mask for USB_INCOMPLP */
#define _USB_GINTSTS_INCOMPLP_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_INCOMPLP_DEFAULT (_USB_GINTSTS_INCOMPLP_DEFAULT << 21) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_FETSUSP (0x1UL << 22) /**< Data Fetch Suspended (device only) */
+#define USB_GINTSTS_FETSUSP (0x1UL << 22) /**< Data Fetch Suspended device only */
#define _USB_GINTSTS_FETSUSP_SHIFT 22 /**< Shift value for USB_FETSUSP */
#define _USB_GINTSTS_FETSUSP_MASK 0x400000UL /**< Bit mask for USB_FETSUSP */
#define _USB_GINTSTS_FETSUSP_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_FETSUSP_DEFAULT (_USB_GINTSTS_FETSUSP_DEFAULT << 22) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_RESETDET (0x1UL << 23) /**< Reset detected Interrupt (device only) */
+#define USB_GINTSTS_RESETDET (0x1UL << 23) /**< Reset detected Interrupt device only */
#define _USB_GINTSTS_RESETDET_SHIFT 23 /**< Shift value for USB_RESETDET */
#define _USB_GINTSTS_RESETDET_MASK 0x800000UL /**< Bit mask for USB_RESETDET */
#define _USB_GINTSTS_RESETDET_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_RESETDET_DEFAULT (_USB_GINTSTS_RESETDET_DEFAULT << 23) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_PRTINT (0x1UL << 24) /**< Host Port Interrupt (host only) */
+#define USB_GINTSTS_PRTINT (0x1UL << 24) /**< Host Port Interrupt host only */
#define _USB_GINTSTS_PRTINT_SHIFT 24 /**< Shift value for USB_PRTINT */
#define _USB_GINTSTS_PRTINT_MASK 0x1000000UL /**< Bit mask for USB_PRTINT */
#define _USB_GINTSTS_PRTINT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_PRTINT_DEFAULT (_USB_GINTSTS_PRTINT_DEFAULT << 24) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_HCHINT (0x1UL << 25) /**< Host Channels Interrupt (host only) */
+#define USB_GINTSTS_HCHINT (0x1UL << 25) /**< Host Channels Interrupt host only */
#define _USB_GINTSTS_HCHINT_SHIFT 25 /**< Shift value for USB_HCHINT */
#define _USB_GINTSTS_HCHINT_MASK 0x2000000UL /**< Bit mask for USB_HCHINT */
#define _USB_GINTSTS_HCHINT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_HCHINT_DEFAULT (_USB_GINTSTS_HCHINT_DEFAULT << 25) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_PTXFEMP (0x1UL << 26) /**< Periodic TxFIFO Empty (host only) */
+#define USB_GINTSTS_PTXFEMP (0x1UL << 26) /**< Periodic TxFIFO Empty host only */
#define _USB_GINTSTS_PTXFEMP_SHIFT 26 /**< Shift value for USB_PTXFEMP */
#define _USB_GINTSTS_PTXFEMP_MASK 0x4000000UL /**< Bit mask for USB_PTXFEMP */
#define _USB_GINTSTS_PTXFEMP_DEFAULT 0x00000001UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_PTXFEMP_DEFAULT (_USB_GINTSTS_PTXFEMP_DEFAULT << 26) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_CONIDSTSCHNG (0x1UL << 28) /**< Connector ID Status Change (host and device) */
+#define USB_GINTSTS_CONIDSTSCHNG (0x1UL << 28) /**< Connector ID Status Change host and device */
#define _USB_GINTSTS_CONIDSTSCHNG_SHIFT 28 /**< Shift value for USB_CONIDSTSCHNG */
#define _USB_GINTSTS_CONIDSTSCHNG_MASK 0x10000000UL /**< Bit mask for USB_CONIDSTSCHNG */
#define _USB_GINTSTS_CONIDSTSCHNG_DEFAULT 0x00000001UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_CONIDSTSCHNG_DEFAULT (_USB_GINTSTS_CONIDSTSCHNG_DEFAULT << 28) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_DISCONNINT (0x1UL << 29) /**< Disconnect Detected Interrupt (host only) */
+#define USB_GINTSTS_DISCONNINT (0x1UL << 29) /**< Disconnect Detected Interrupt host only */
#define _USB_GINTSTS_DISCONNINT_SHIFT 29 /**< Shift value for USB_DISCONNINT */
#define _USB_GINTSTS_DISCONNINT_MASK 0x20000000UL /**< Bit mask for USB_DISCONNINT */
#define _USB_GINTSTS_DISCONNINT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_DISCONNINT_DEFAULT (_USB_GINTSTS_DISCONNINT_DEFAULT << 29) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_SESSREQINT (0x1UL << 30) /**< Session Request/New Session Detected Interrupt (host and device) */
+#define USB_GINTSTS_SESSREQINT (0x1UL << 30) /**< Session Request/New Session Detected Interrupt host and device */
#define _USB_GINTSTS_SESSREQINT_SHIFT 30 /**< Shift value for USB_SESSREQINT */
#define _USB_GINTSTS_SESSREQINT_MASK 0x40000000UL /**< Bit mask for USB_SESSREQINT */
#define _USB_GINTSTS_SESSREQINT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
#define USB_GINTSTS_SESSREQINT_DEFAULT (_USB_GINTSTS_SESSREQINT_DEFAULT << 30) /**< Shifted mode DEFAULT for USB_GINTSTS */
-#define USB_GINTSTS_WKUPINT (0x1UL << 31) /**< Resume/Remote Wakeup Detected Interrupt (host and device) */
+#define USB_GINTSTS_WKUPINT (0x1UL << 31) /**< Resume/Remote Wakeup Detected Interrupt host and device */
#define _USB_GINTSTS_WKUPINT_SHIFT 31 /**< Shift value for USB_WKUPINT */
#define _USB_GINTSTS_WKUPINT_MASK 0x80000000UL /**< Bit mask for USB_WKUPINT */
#define _USB_GINTSTS_WKUPINT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTSTS */
@@ -759,128 +750,133 @@
/* Bit fields for USB GINTMSK */
#define _USB_GINTMSK_RESETVALUE 0x00000000UL /**< Default value for USB_GINTMSK */
-#define _USB_GINTMSK_MASK 0xF7FC7CFEUL /**< Mask for USB_GINTMSK */
-#define USB_GINTMSK_MODEMISMSK (0x1UL << 1) /**< Mode Mismatch Interrupt Mask (host and device) */
+#define _USB_GINTMSK_MASK 0xF7FCFCFEUL /**< Mask for USB_GINTMSK */
+#define USB_GINTMSK_MODEMISMSK (0x1UL << 1) /**< Mode Mismatch Interrupt Mask host and device */
#define _USB_GINTMSK_MODEMISMSK_SHIFT 1 /**< Shift value for USB_MODEMISMSK */
#define _USB_GINTMSK_MODEMISMSK_MASK 0x2UL /**< Bit mask for USB_MODEMISMSK */
#define _USB_GINTMSK_MODEMISMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_MODEMISMSK_DEFAULT (_USB_GINTMSK_MODEMISMSK_DEFAULT << 1) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_OTGINTMSK (0x1UL << 2) /**< OTG Interrupt Mask (host and device) */
+#define USB_GINTMSK_OTGINTMSK (0x1UL << 2) /**< OTG Interrupt Mask host and device */
#define _USB_GINTMSK_OTGINTMSK_SHIFT 2 /**< Shift value for USB_OTGINTMSK */
#define _USB_GINTMSK_OTGINTMSK_MASK 0x4UL /**< Bit mask for USB_OTGINTMSK */
#define _USB_GINTMSK_OTGINTMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_OTGINTMSK_DEFAULT (_USB_GINTMSK_OTGINTMSK_DEFAULT << 2) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_SOFMSK (0x1UL << 3) /**< Start of Frame Mask (host and device) */
+#define USB_GINTMSK_SOFMSK (0x1UL << 3) /**< Start of Frame Mask host and device */
#define _USB_GINTMSK_SOFMSK_SHIFT 3 /**< Shift value for USB_SOFMSK */
#define _USB_GINTMSK_SOFMSK_MASK 0x8UL /**< Bit mask for USB_SOFMSK */
#define _USB_GINTMSK_SOFMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_SOFMSK_DEFAULT (_USB_GINTMSK_SOFMSK_DEFAULT << 3) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_RXFLVLMSK (0x1UL << 4) /**< Receive FIFO Non-Empty Mask (host and device) */
+#define USB_GINTMSK_RXFLVLMSK (0x1UL << 4) /**< Receive FIFO Non-Empty Mask host and device */
#define _USB_GINTMSK_RXFLVLMSK_SHIFT 4 /**< Shift value for USB_RXFLVLMSK */
#define _USB_GINTMSK_RXFLVLMSK_MASK 0x10UL /**< Bit mask for USB_RXFLVLMSK */
#define _USB_GINTMSK_RXFLVLMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_RXFLVLMSK_DEFAULT (_USB_GINTMSK_RXFLVLMSK_DEFAULT << 4) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_NPTXFEMPMSK (0x1UL << 5) /**< Non-Periodic TxFIFO Empty Mask (host only) */
+#define USB_GINTMSK_NPTXFEMPMSK (0x1UL << 5) /**< Non-Periodic TxFIFO Empty Mask host only */
#define _USB_GINTMSK_NPTXFEMPMSK_SHIFT 5 /**< Shift value for USB_NPTXFEMPMSK */
#define _USB_GINTMSK_NPTXFEMPMSK_MASK 0x20UL /**< Bit mask for USB_NPTXFEMPMSK */
#define _USB_GINTMSK_NPTXFEMPMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_NPTXFEMPMSK_DEFAULT (_USB_GINTMSK_NPTXFEMPMSK_DEFAULT << 5) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_GINNAKEFFMSK (0x1UL << 6) /**< Global Non-periodic IN NAK Effective Mask (device only) */
+#define USB_GINTMSK_GINNAKEFFMSK (0x1UL << 6) /**< Global Non-periodic IN NAK Effective Mask device only */
#define _USB_GINTMSK_GINNAKEFFMSK_SHIFT 6 /**< Shift value for USB_GINNAKEFFMSK */
#define _USB_GINTMSK_GINNAKEFFMSK_MASK 0x40UL /**< Bit mask for USB_GINNAKEFFMSK */
#define _USB_GINTMSK_GINNAKEFFMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_GINNAKEFFMSK_DEFAULT (_USB_GINTMSK_GINNAKEFFMSK_DEFAULT << 6) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_GOUTNAKEFFMSK (0x1UL << 7) /**< Global OUT NAK Effective Mask (device only) */
+#define USB_GINTMSK_GOUTNAKEFFMSK (0x1UL << 7) /**< Global OUT NAK Effective Mask device only */
#define _USB_GINTMSK_GOUTNAKEFFMSK_SHIFT 7 /**< Shift value for USB_GOUTNAKEFFMSK */
#define _USB_GINTMSK_GOUTNAKEFFMSK_MASK 0x80UL /**< Bit mask for USB_GOUTNAKEFFMSK */
#define _USB_GINTMSK_GOUTNAKEFFMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_GOUTNAKEFFMSK_DEFAULT (_USB_GINTMSK_GOUTNAKEFFMSK_DEFAULT << 7) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_ERLYSUSPMSK (0x1UL << 10) /**< Early Suspend Mask (device only) */
+#define USB_GINTMSK_ERLYSUSPMSK (0x1UL << 10) /**< Early Suspend Mask device only */
#define _USB_GINTMSK_ERLYSUSPMSK_SHIFT 10 /**< Shift value for USB_ERLYSUSPMSK */
#define _USB_GINTMSK_ERLYSUSPMSK_MASK 0x400UL /**< Bit mask for USB_ERLYSUSPMSK */
#define _USB_GINTMSK_ERLYSUSPMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_ERLYSUSPMSK_DEFAULT (_USB_GINTMSK_ERLYSUSPMSK_DEFAULT << 10) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_USBSUSPMSK (0x1UL << 11) /**< USB Suspend Mask (device only) */
+#define USB_GINTMSK_USBSUSPMSK (0x1UL << 11) /**< USB Suspend Mask device only */
#define _USB_GINTMSK_USBSUSPMSK_SHIFT 11 /**< Shift value for USB_USBSUSPMSK */
#define _USB_GINTMSK_USBSUSPMSK_MASK 0x800UL /**< Bit mask for USB_USBSUSPMSK */
#define _USB_GINTMSK_USBSUSPMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_USBSUSPMSK_DEFAULT (_USB_GINTMSK_USBSUSPMSK_DEFAULT << 11) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_USBRSTMSK (0x1UL << 12) /**< USB Reset Mask (device only) */
+#define USB_GINTMSK_USBRSTMSK (0x1UL << 12) /**< USB Reset Mask device only */
#define _USB_GINTMSK_USBRSTMSK_SHIFT 12 /**< Shift value for USB_USBRSTMSK */
#define _USB_GINTMSK_USBRSTMSK_MASK 0x1000UL /**< Bit mask for USB_USBRSTMSK */
#define _USB_GINTMSK_USBRSTMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_USBRSTMSK_DEFAULT (_USB_GINTMSK_USBRSTMSK_DEFAULT << 12) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_ENUMDONEMSK (0x1UL << 13) /**< Enumeration Done Mask (device only) */
+#define USB_GINTMSK_ENUMDONEMSK (0x1UL << 13) /**< Enumeration Done Mask device only */
#define _USB_GINTMSK_ENUMDONEMSK_SHIFT 13 /**< Shift value for USB_ENUMDONEMSK */
#define _USB_GINTMSK_ENUMDONEMSK_MASK 0x2000UL /**< Bit mask for USB_ENUMDONEMSK */
#define _USB_GINTMSK_ENUMDONEMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_ENUMDONEMSK_DEFAULT (_USB_GINTMSK_ENUMDONEMSK_DEFAULT << 13) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_ISOOUTDROPMSK (0x1UL << 14) /**< Isochronous OUT Packet Dropped Interrupt Mask (device only) */
+#define USB_GINTMSK_ISOOUTDROPMSK (0x1UL << 14) /**< Isochronous OUT Packet Dropped Interrupt Mask device only */
#define _USB_GINTMSK_ISOOUTDROPMSK_SHIFT 14 /**< Shift value for USB_ISOOUTDROPMSK */
#define _USB_GINTMSK_ISOOUTDROPMSK_MASK 0x4000UL /**< Bit mask for USB_ISOOUTDROPMSK */
#define _USB_GINTMSK_ISOOUTDROPMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_ISOOUTDROPMSK_DEFAULT (_USB_GINTMSK_ISOOUTDROPMSK_DEFAULT << 14) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_IEPINTMSK (0x1UL << 18) /**< IN Endpoints Interrupt Mask (device only) */
+#define USB_GINTMSK_EOPFMSK (0x1UL << 15) /**< End of Periodic Frame Interrupt Mask device only */
+#define _USB_GINTMSK_EOPFMSK_SHIFT 15 /**< Shift value for USB_EOPFMSK */
+#define _USB_GINTMSK_EOPFMSK_MASK 0x8000UL /**< Bit mask for USB_EOPFMSK */
+#define _USB_GINTMSK_EOPFMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
+#define USB_GINTMSK_EOPFMSK_DEFAULT (_USB_GINTMSK_EOPFMSK_DEFAULT << 15) /**< Shifted mode DEFAULT for USB_GINTMSK */
+#define USB_GINTMSK_IEPINTMSK (0x1UL << 18) /**< IN Endpoints Interrupt Mask device only */
#define _USB_GINTMSK_IEPINTMSK_SHIFT 18 /**< Shift value for USB_IEPINTMSK */
#define _USB_GINTMSK_IEPINTMSK_MASK 0x40000UL /**< Bit mask for USB_IEPINTMSK */
#define _USB_GINTMSK_IEPINTMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_IEPINTMSK_DEFAULT (_USB_GINTMSK_IEPINTMSK_DEFAULT << 18) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_OEPINTMSK (0x1UL << 19) /**< OUT Endpoints Interrupt Mask (device only) */
+#define USB_GINTMSK_OEPINTMSK (0x1UL << 19) /**< OUT Endpoints Interrupt Mask device only */
#define _USB_GINTMSK_OEPINTMSK_SHIFT 19 /**< Shift value for USB_OEPINTMSK */
#define _USB_GINTMSK_OEPINTMSK_MASK 0x80000UL /**< Bit mask for USB_OEPINTMSK */
#define _USB_GINTMSK_OEPINTMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_OEPINTMSK_DEFAULT (_USB_GINTMSK_OEPINTMSK_DEFAULT << 19) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_INCOMPISOINMSK (0x1UL << 20) /**< Incomplete Isochronous IN Transfer Mask (device only) */
+#define USB_GINTMSK_INCOMPISOINMSK (0x1UL << 20) /**< Incomplete Isochronous IN Transfer Mask device only */
#define _USB_GINTMSK_INCOMPISOINMSK_SHIFT 20 /**< Shift value for USB_INCOMPISOINMSK */
#define _USB_GINTMSK_INCOMPISOINMSK_MASK 0x100000UL /**< Bit mask for USB_INCOMPISOINMSK */
#define _USB_GINTMSK_INCOMPISOINMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_INCOMPISOINMSK_DEFAULT (_USB_GINTMSK_INCOMPISOINMSK_DEFAULT << 20) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_INCOMPLPMSK (0x1UL << 21) /**< Incomplete Periodic Transfer Mask (host only) */
+#define USB_GINTMSK_INCOMPLPMSK (0x1UL << 21) /**< Incomplete Periodic Transfer Mask host and device */
#define _USB_GINTMSK_INCOMPLPMSK_SHIFT 21 /**< Shift value for USB_INCOMPLPMSK */
#define _USB_GINTMSK_INCOMPLPMSK_MASK 0x200000UL /**< Bit mask for USB_INCOMPLPMSK */
#define _USB_GINTMSK_INCOMPLPMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_INCOMPLPMSK_DEFAULT (_USB_GINTMSK_INCOMPLPMSK_DEFAULT << 21) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_FETSUSPMSK (0x1UL << 22) /**< Data Fetch Suspended Mask (device only) */
+#define USB_GINTMSK_FETSUSPMSK (0x1UL << 22) /**< Data Fetch Suspended Mask device only */
#define _USB_GINTMSK_FETSUSPMSK_SHIFT 22 /**< Shift value for USB_FETSUSPMSK */
#define _USB_GINTMSK_FETSUSPMSK_MASK 0x400000UL /**< Bit mask for USB_FETSUSPMSK */
#define _USB_GINTMSK_FETSUSPMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_FETSUSPMSK_DEFAULT (_USB_GINTMSK_FETSUSPMSK_DEFAULT << 22) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_RESETDETMSK (0x1UL << 23) /**< Reset detected Interrupt Mask (device only) */
+#define USB_GINTMSK_RESETDETMSK (0x1UL << 23) /**< Reset detected Interrupt Mask device only */
#define _USB_GINTMSK_RESETDETMSK_SHIFT 23 /**< Shift value for USB_RESETDETMSK */
#define _USB_GINTMSK_RESETDETMSK_MASK 0x800000UL /**< Bit mask for USB_RESETDETMSK */
#define _USB_GINTMSK_RESETDETMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_RESETDETMSK_DEFAULT (_USB_GINTMSK_RESETDETMSK_DEFAULT << 23) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_PRTINTMSK (0x1UL << 24) /**< Host Port Interrupt Mask (host only) */
+#define USB_GINTMSK_PRTINTMSK (0x1UL << 24) /**< Host Port Interrupt Mask host only */
#define _USB_GINTMSK_PRTINTMSK_SHIFT 24 /**< Shift value for USB_PRTINTMSK */
#define _USB_GINTMSK_PRTINTMSK_MASK 0x1000000UL /**< Bit mask for USB_PRTINTMSK */
#define _USB_GINTMSK_PRTINTMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_PRTINTMSK_DEFAULT (_USB_GINTMSK_PRTINTMSK_DEFAULT << 24) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_HCHINTMSK (0x1UL << 25) /**< Host Channels Interrupt Mask (host only) */
+#define USB_GINTMSK_HCHINTMSK (0x1UL << 25) /**< Host Channels Interrupt Mask host only */
#define _USB_GINTMSK_HCHINTMSK_SHIFT 25 /**< Shift value for USB_HCHINTMSK */
#define _USB_GINTMSK_HCHINTMSK_MASK 0x2000000UL /**< Bit mask for USB_HCHINTMSK */
#define _USB_GINTMSK_HCHINTMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_HCHINTMSK_DEFAULT (_USB_GINTMSK_HCHINTMSK_DEFAULT << 25) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_PTXFEMPMSK (0x1UL << 26) /**< Periodic TxFIFO Empty Mask (host only) */
+#define USB_GINTMSK_PTXFEMPMSK (0x1UL << 26) /**< Periodic TxFIFO Empty Mask host only */
#define _USB_GINTMSK_PTXFEMPMSK_SHIFT 26 /**< Shift value for USB_PTXFEMPMSK */
#define _USB_GINTMSK_PTXFEMPMSK_MASK 0x4000000UL /**< Bit mask for USB_PTXFEMPMSK */
#define _USB_GINTMSK_PTXFEMPMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_PTXFEMPMSK_DEFAULT (_USB_GINTMSK_PTXFEMPMSK_DEFAULT << 26) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_CONIDSTSCHNGMSK (0x1UL << 28) /**< Connector ID Status Change Mask (host and device) */
+#define USB_GINTMSK_CONIDSTSCHNGMSK (0x1UL << 28) /**< Connector ID Status Change Mask host and device */
#define _USB_GINTMSK_CONIDSTSCHNGMSK_SHIFT 28 /**< Shift value for USB_CONIDSTSCHNGMSK */
#define _USB_GINTMSK_CONIDSTSCHNGMSK_MASK 0x10000000UL /**< Bit mask for USB_CONIDSTSCHNGMSK */
#define _USB_GINTMSK_CONIDSTSCHNGMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_CONIDSTSCHNGMSK_DEFAULT (_USB_GINTMSK_CONIDSTSCHNGMSK_DEFAULT << 28) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_DISCONNINTMSK (0x1UL << 29) /**< Disconnect Detected Interrupt Mask (host and device) */
+#define USB_GINTMSK_DISCONNINTMSK (0x1UL << 29) /**< Disconnect Detected Interrupt Mask host and device */
#define _USB_GINTMSK_DISCONNINTMSK_SHIFT 29 /**< Shift value for USB_DISCONNINTMSK */
#define _USB_GINTMSK_DISCONNINTMSK_MASK 0x20000000UL /**< Bit mask for USB_DISCONNINTMSK */
#define _USB_GINTMSK_DISCONNINTMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_DISCONNINTMSK_DEFAULT (_USB_GINTMSK_DISCONNINTMSK_DEFAULT << 29) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_SESSREQINTMSK (0x1UL << 30) /**< Session Request/New Session Detected Interrupt Mask (host and device) */
+#define USB_GINTMSK_SESSREQINTMSK (0x1UL << 30) /**< Session Request/New Session Detected Interrupt Mask host and device */
#define _USB_GINTMSK_SESSREQINTMSK_SHIFT 30 /**< Shift value for USB_SESSREQINTMSK */
#define _USB_GINTMSK_SESSREQINTMSK_MASK 0x40000000UL /**< Bit mask for USB_SESSREQINTMSK */
#define _USB_GINTMSK_SESSREQINTMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
#define USB_GINTMSK_SESSREQINTMSK_DEFAULT (_USB_GINTMSK_SESSREQINTMSK_DEFAULT << 30) /**< Shifted mode DEFAULT for USB_GINTMSK */
-#define USB_GINTMSK_WKUPINTMSK (0x1UL << 31) /**< Resume/Remote Wakeup Detected Interrupt Mask (host and device) */
+#define USB_GINTMSK_WKUPINTMSK (0x1UL << 31) /**< Resume/Remote Wakeup Detected Interrupt Mask host and device */
#define _USB_GINTMSK_WKUPINTMSK_SHIFT 31 /**< Shift value for USB_WKUPINTMSK */
#define _USB_GINTMSK_WKUPINTMSK_MASK 0x80000000UL /**< Bit mask for USB_WKUPINTMSK */
#define _USB_GINTMSK_WKUPINTMSK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USB_GINTMSK */
@@ -2657,5 +2653,5 @@
#define USB_FIFORAM_FIFORAM_DEFAULT (_USB_FIFORAM_FIFORAM_DEFAULT << 0) /**< Shifted mode DEFAULT for USB_FIFORAM */
/** @} End of group EFM32WG_USB */
+/** @} End of group Parts */
-