portmacro.h

00001 /*
00002     FreeRTOS V8.2.1 - Copyright (C) 2015 Real Time Engineers Ltd.
00003     All rights reserved
00004 
00005     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
00006 
00007     This file is part of the FreeRTOS distribution.
00008 
00009     FreeRTOS is free software; you can redistribute it and/or modify it under
00010     the terms of the GNU General Public License (version 2) as published by the
00011     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
00012 
00013     ***************************************************************************
00014     >>!   NOTE: The modification to the GPL is included to allow you to     !<<
00015     >>!   distribute a combined work that includes FreeRTOS without being   !<<
00016     >>!   obliged to provide the source code for proprietary components     !<<
00017     >>!   outside of the FreeRTOS kernel.                                   !<<
00018     ***************************************************************************
00019 
00020     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
00021     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
00022     FOR A PARTICULAR PURPOSE.  Full license text is available on the following
00023     link: http://www.freertos.org/a00114.html
00024 
00025     ***************************************************************************
00026      *                                                                       *
00027      *    FreeRTOS provides completely free yet professionally developed,    *
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00031      *                                                                       *
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00037     ***************************************************************************
00038 
00039     http://www.FreeRTOS.org/FAQHelp.html - Having a problem?  Start by reading
00040     the FAQ page "My application does not run, what could be wrong?".  Have you
00041     defined configASSERT()?
00042 
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00046 
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00054     compatible FAT file system, and our tiny thread aware UDP/IP stack.
00055 
00056     http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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00058 
00059     http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
00060     Integrity Systems ltd. to sell under the OpenRTOS brand.  Low cost OpenRTOS
00061     licenses offer ticketed support, indemnification and commercial middleware.
00062 
00063     http://www.SafeRTOS.com - High Integrity Systems also provide a safety
00064     engineered and independently SIL3 certified version for use in safety and
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00066 
00067     1 tab == 4 spaces!
00068 */
00069 
00070 
00071 #ifndef PORTMACRO_H
00072 #define PORTMACRO_H
00073 
00074 #include "FreeRTOSConfig.h"
00075 
00076 #ifdef __cplusplus
00077 extern "C" {
00078 #endif
00079 
00080 /*-----------------------------------------------------------
00081  * Port specific definitions.
00082  *
00083  * The settings in this file configure FreeRTOS correctly for the
00084  * given hardware and compiler.
00085  *
00086  * These settings should not be altered.
00087  *-----------------------------------------------------------
00088  */
00089 
00090 /* Type definitions. */
00091 #define portCHAR        char
00092 #define portFLOAT       float
00093 #define portDOUBLE      double
00094 #define portLONG        long
00095 #define portSHORT       short
00096 #define portSTACK_TYPE  uint32_t
00097 #define portBASE_TYPE   long
00098 
00099 typedef portSTACK_TYPE StackType_t;
00100 typedef long BaseType_t;
00101 typedef unsigned long UBaseType_t;
00102 
00103 #if( configUSE_16_BIT_TICKS == 1 )
00104     typedef uint16_t TickType_t;
00105     #define portMAX_DELAY ( TickType_t ) 0xffff
00106 #else
00107     typedef uint32_t TickType_t;
00108     #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
00109 
00110     /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
00111     not need to be guarded with a critical section. */
00112     #define portTICK_TYPE_IS_ATOMIC 1
00113 #endif
00114 /*-----------------------------------------------------------*/
00115 
00116 /* Architecture specifics. */
00117 #define portSTACK_GROWTH            ( -1 )
00118 #define portTICK_PERIOD_MS          ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
00119 #define portBYTE_ALIGNMENT          8
00120 
00121 /* Constants used with memory barrier intrinsics. */
00122 #define portSY_FULL_READ_WRITE      ( 15 )
00123 
00124 /*-----------------------------------------------------------*/
00125 
00126 /* Scheduler utilities. */
00127 #define portYIELD()                                                             \
00128 {                                                                               \
00129     /* Set a PendSV to request a context switch. */                             \
00130     portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;                             \
00131                                                                                 \
00132     /* Barriers are normally not required but do ensure the code is completely  \
00133     within the specified behaviour for the architecture. */                     \
00134     __dsb( portSY_FULL_READ_WRITE );                                            \
00135     __isb( portSY_FULL_READ_WRITE );                                            \
00136 }
00137 /*-----------------------------------------------------------*/
00138 
00139 #define portNVIC_INT_CTRL_REG       ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
00140 #define portNVIC_PENDSVSET_BIT      ( 1UL << 28UL )
00141 #define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()
00142 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
00143 /*-----------------------------------------------------------*/
00144 
00145 /* Critical section management. */
00146 extern void vPortEnterCritical( void );
00147 extern void vPortExitCritical( void );
00148 
00149 #define portDISABLE_INTERRUPTS()                vPortRaiseBASEPRI()
00150 #define portENABLE_INTERRUPTS()                 vPortSetBASEPRI( 0 )
00151 #define portENTER_CRITICAL()                    vPortEnterCritical()
00152 #define portEXIT_CRITICAL()                     vPortExitCritical()
00153 #define portSET_INTERRUPT_MASK_FROM_ISR()       ulPortRaiseBASEPRI()
00154 #define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)    vPortSetBASEPRI(x)
00155 
00156 /*-----------------------------------------------------------*/
00157 
00158 /* Tickless idle/low power functionality. */
00159 #ifndef portSUPPRESS_TICKS_AND_SLEEP
00160     extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
00161     #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
00162 #endif
00163 /*-----------------------------------------------------------*/
00164 
00165 /* Port specific optimisations. */
00166 //#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
00167 //  #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
00168 //#endif
00169 
00170 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
00171 
00172     /* Check the configuration. */
00173     #if( configMAX_PRIORITIES > 32 )
00174         #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
00175     #endif
00176 
00177     /* Store/clear the ready priorities in a bit map. */
00178     #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
00179     #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
00180 
00181     /*-----------------------------------------------------------*/
00182 
00183     #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __clz( ( uxReadyPriorities ) ) )
00184 
00185 #endif /* taskRECORD_READY_PRIORITY */
00186 /*-----------------------------------------------------------*/
00187 
00188 /* Task function macros as described on the FreeRTOS.org WEB site.  These are
00189 not necessary for to use this port.  They are defined so the common demo files
00190 (which build with all the ports) will build. */
00191 #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
00192 #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
00193 /*-----------------------------------------------------------*/
00194 
00195 #ifdef configASSERT
00196     void vPortValidateInterruptPriority( void );
00197     #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID()  vPortValidateInterruptPriority()
00198 #endif
00199 
00200 /* portNOP() is not required by this port. */
00201 #define portNOP()
00202 
00203 #ifndef portFORCE_INLINE
00204     #define portFORCE_INLINE __forceinline
00205 #endif
00206 
00207 /*-----------------------------------------------------------*/
00208 
00209 static portFORCE_INLINE void vPortSetBASEPRI( uint32_t ulBASEPRI )
00210 {
00211     __asm
00212     {
00213         /* Barrier instructions are not used as this function is only used to
00214         lower the BASEPRI value. */
00215         msr basepri, ulBASEPRI
00216     }
00217 }
00218 /*-----------------------------------------------------------*/
00219 
00220 static portFORCE_INLINE void vPortRaiseBASEPRI( void )
00221 {
00222 uint32_t ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
00223 
00224     __asm
00225     {
00226         /* Set BASEPRI to the max syscall priority to effect a critical
00227         section. */
00228         msr basepri, ulNewBASEPRI
00229         dsb
00230         isb
00231     }
00232 }
00233 /*-----------------------------------------------------------*/
00234 
00235 static portFORCE_INLINE uint32_t ulPortRaiseBASEPRI( void )
00236 {
00237 uint32_t ulReturn, ulNewBASEPRI = configMAX_SYSCALL_INTERRUPT_PRIORITY;
00238 
00239     __asm
00240     {
00241         /* Set BASEPRI to the max syscall priority to effect a critical
00242         section. */
00243         mrs ulReturn, basepri
00244         msr basepri, ulNewBASEPRI
00245         dsb
00246         isb
00247     }
00248 
00249     return ulReturn;
00250 }
00251 /*-----------------------------------------------------------*/
00252 
00253 #ifdef __cplusplus
00254 }
00255 #endif
00256 
00257 #endif /* PORTMACRO_H */
00258 
00259