David Fletcher / Mbed 2 deprecated cc3100_Test_websock_Camera_CM4F

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Dependencies:   mbed

Diff: main.cpp

Revision:
5:75fcfdb7cae7
Parent:
4:c27adffcfec2
Child:
6:37fb696395d7
diff -r c27adffcfec2 -r 75fcfdb7cae7 main.cpp
--- a/main.cpp	Tue Jun 30 22:51:05 2015 +0000
+++ b/main.cpp	Wed Jul 01 22:45:49 2015 +0000
@@ -90,8 +90,8 @@
   /* USER CODE END MspInit 1 */
 //}
  
-DCMI_HandleTypeDef hdcmi;
-DMA_HandleTypeDef hdma_dcmi;
+//DCMI_HandleTypeDef hdcmi;
+//DMA_HandleTypeDef hdma_dcmi;
 
 /** System Clock Configuration
 */
@@ -159,6 +159,8 @@
  
 void MX_DCMI_Init()
 {
+  DCMI_HandleTypeDef hdcmi;
+  DMA_HandleTypeDef hdma_dcmi;
 
   hdcmi.Instance = DCMI;
   hdcmi.Init.SynchroMode = DCMI_SYNCHRO_HARDWARE;
@@ -278,9 +280,9 @@
    CLI_Configure();
    
 /* Initialize all configured peripherals */
-   MX_DMA_Init();
-   MX_DCMI_Init();
-   initLEDs();
+//   MX_DMA_Init();
+//   MX_DCMI_Init();
+//   initLEDs();
 
 //   toggleLed(1);
 //#ifndef NOTERM
@@ -341,6 +343,11 @@
 extern "C" void HardFault_Handler(void)
 {
   /* Go to infinite loop when Hard Fault exception occurs */
+  printf("Hard Fault Register SCB->HSFR     0x%X \r\n",SCB->HFSR);
+  printf("Call to Memory Address SCB->BFAR  0x%X ERROR!\r\n",SCB->BFAR);
+  printf("Fault bits set SCB->CFSR          0x%X \r\n",SCB->CFSR);
+  printf("Call to Memory Address SCB->MMFAR 0x%X ERROR!\r\n",SCB->MMFAR);
+  
   Uart_Write((uint8_t*)"HardFault_Handler \n\r");
   while (1)
   {
@@ -440,6 +447,8 @@
   */
 void DMA2_Stream1_IRQHandler(void)
 {
+  DCMI_HandleTypeDef hdcmi;
+  DMA_HandleTypeDef hdma_dcmi;
   Uart_Write((uint8_t*)"DMA2_Stream1_IRQHandler \n\r");
   HAL_DMA_IRQHandler(&hdma_dcmi);  
 }
@@ -451,6 +460,8 @@
   */
 void DCMI_IRQHandler(void)
 {
+  DCMI_HandleTypeDef hdcmi;
+  DMA_HandleTypeDef hdma_dcmi;
   Uart_Write((uint8_t*)"DCMI_IRQHandler \n\r");
   HAL_DCMI_IRQHandler(&hdcmi);
 }