David Fletcher / Mbed 2 deprecated cc3100_Test_websock_Camera_CM4F

Port of TI's CC3100 Websock camera demo. Using FreeRTOS, mbedTLS, also parts of Arducam for cams ov5642 and 0v2640. Can also use MT9D111. Work in progress. Be warned some parts maybe a bit flacky. This is for Seeed Arch max only, for an M3, see the demo for CM3 using the 0v5642 aducam mini.

Dependencies:   mbed

main.cpp@6:37fb696395d7, 2015-07-03 (annotated)

Committer:
dflet
Date:
Fri Jul 03 22:42:45 2015 +0000
Revision:
6:37fb696395d7
Parent:
5:75fcfdb7cae7
Child:
7:a069c1750fbc
WIP commit 7

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dflet 0:50cedd586816 1 //*****************************************************************************
dflet 0:50cedd586816 2 // main.c
dflet 0:50cedd586816 3 //
dflet 0:50cedd586816 4 // Reference code to demonstrate getting the current time using an NTP server.
dflet 0:50cedd586816 5 //
dflet 0:50cedd586816 6 // Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
dflet 0:50cedd586816 7 //
dflet 0:50cedd586816 8 //
dflet 0:50cedd586816 9 // Redistribution and use in source and binary forms, with or without
dflet 0:50cedd586816 10 // modification, are permitted provided that the following conditions
dflet 0:50cedd586816 11 // are met:
dflet 0:50cedd586816 12 //
dflet 0:50cedd586816 13 // Redistributions of source code must retain the above copyright
dflet 0:50cedd586816 14 // notice, this list of conditions and the following disclaimer.
dflet 0:50cedd586816 15 //
dflet 0:50cedd586816 16 // Redistributions in binary form must reproduce the above copyright
dflet 0:50cedd586816 17 // notice, this list of conditions and the following disclaimer in the
dflet 0:50cedd586816 18 // documentation and/or other materials provided with the
dflet 0:50cedd586816 19 // distribution.
dflet 0:50cedd586816 20 //
dflet 0:50cedd586816 21 // Neither the name of Texas Instruments Incorporated nor the names of
dflet 0:50cedd586816 22 // its contributors may be used to endorse or promote products derived
dflet 0:50cedd586816 23 // from this software without specific prior written permission.
dflet 0:50cedd586816 24 //
dflet 0:50cedd586816 25 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
dflet 0:50cedd586816 26 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
dflet 0:50cedd586816 27 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
dflet 0:50cedd586816 28 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
dflet 0:50cedd586816 29 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
dflet 0:50cedd586816 30 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
dflet 0:50cedd586816 31 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
dflet 0:50cedd586816 32 // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
dflet 0:50cedd586816 33 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
dflet 0:50cedd586816 34 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
dflet 0:50cedd586816 35 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
dflet 0:50cedd586816 36 //
dflet 0:50cedd586816 37 //*****************************************************************************
dflet 0:50cedd586816 38
dflet 0:50cedd586816 39 //****************************************************************************
dflet 0:50cedd586816 40 //
dflet 0:50cedd586816 41 //! \addtogroup main
dflet 0:50cedd586816 42 //! @{
dflet 0:50cedd586816 43 //
dflet 0:50cedd586816 44 //****************************************************************************
dflet 0:50cedd586816 45
dflet 0:50cedd586816 46 #include "mbed.h"
dflet 0:50cedd586816 47
dflet 0:50cedd586816 48 // SimpleLink include
dflet 0:50cedd586816 49 #include "cc3100_simplelink.h"
dflet 0:50cedd586816 50 #include "cc3100.h"
dflet 0:50cedd586816 51
dflet 0:50cedd586816 52 #include "httpserverapp.h"
dflet 0:50cedd586816 53
dflet 4:c27adffcfec2 54 //#include "stm32f4xx_hal.h"
dflet 4:c27adffcfec2 55 //#include "stm32f4xx_hal_rcc.h"
dflet 0:50cedd586816 56
dflet 0:50cedd586816 57 /* Free-RTOS includes */
dflet 0:50cedd586816 58 #include "osi.h"
dflet 0:50cedd586816 59
dflet 0:50cedd586816 60 #include "cli_uart.h"
dflet 0:50cedd586816 61 #include "app_config.h"
dflet 0:50cedd586816 62 #include "myBoardInit.h"
dflet 0:50cedd586816 63
dflet 0:50cedd586816 64 using namespace mbed_cc3100;
dflet 0:50cedd586816 65
dflet 0:50cedd586816 66 static void SystemClock_Config(void);
dflet 0:50cedd586816 67 static void MX_DMA_Init(void);
dflet 0:50cedd586816 68 static void MX_DCMI_Init(void);
dflet 4:c27adffcfec2 69
dflet 4:c27adffcfec2 70 void DCMI_IRQHandler(void);
dflet 4:c27adffcfec2 71 void DMA2_Stream1_IRQHandler(void);
dflet 0:50cedd586816 72
dflet 0:50cedd586816 73 /**
dflet 0:50cedd586816 74 * Initializes the Global MSP.
dflet 0:50cedd586816 75 */
dflet 0:50cedd586816 76 //void HAL_MspInit(void)
dflet 0:50cedd586816 77 //{
dflet 0:50cedd586816 78 /* USER CODE BEGIN MspInit 0 */
dflet 0:50cedd586816 79
dflet 0:50cedd586816 80 /* USER CODE END MspInit 0 */
dflet 0:50cedd586816 81
dflet 0:50cedd586816 82 // HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
dflet 0:50cedd586816 83
dflet 0:50cedd586816 84 /* System interrupt init*/
dflet 0:50cedd586816 85 /* SysTick_IRQn interrupt configuration */
dflet 0:50cedd586816 86 // HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
dflet 0:50cedd586816 87
dflet 0:50cedd586816 88 /* USER CODE BEGIN MspInit 1 */
dflet 0:50cedd586816 89
dflet 0:50cedd586816 90 /* USER CODE END MspInit 1 */
dflet 0:50cedd586816 91 //}
dflet 0:50cedd586816 92
dflet 5:75fcfdb7cae7 93 //DCMI_HandleTypeDef hdcmi;
dflet 5:75fcfdb7cae7 94 //DMA_HandleTypeDef hdma_dcmi;
dflet 0:50cedd586816 95
dflet 0:50cedd586816 96 /** System Clock Configuration
dflet 0:50cedd586816 97 */
dflet 0:50cedd586816 98 static void SystemClock_Config(void)
dflet 0:50cedd586816 99 {
dflet 0:50cedd586816 100
dflet 4:c27adffcfec2 101 SystemCoreClockUpdate();
dflet 4:c27adffcfec2 102
dflet 0:50cedd586816 103 RCC_OscInitTypeDef RCC_OscInitStruct;
dflet 0:50cedd586816 104 RCC_ClkInitTypeDef RCC_ClkInitStruct;
dflet 3:7643714ec664 105 // RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;//Used for ov7670 test
dflet 3:7643714ec664 106
dflet 0:50cedd586816 107 __PWR_CLK_ENABLE();
dflet 0:50cedd586816 108
dflet 0:50cedd586816 109 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
dflet 0:50cedd586816 110
dflet 0:50cedd586816 111 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
dflet 0:50cedd586816 112 RCC_OscInitStruct.HSEState = RCC_HSE_ON;
dflet 0:50cedd586816 113 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
dflet 0:50cedd586816 114 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
dflet 0:50cedd586816 115 RCC_OscInitStruct.PLL.PLLM = 8;
dflet 0:50cedd586816 116 RCC_OscInitStruct.PLL.PLLN = 336;
dflet 0:50cedd586816 117 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
dflet 0:50cedd586816 118 RCC_OscInitStruct.PLL.PLLQ = 7;
dflet 0:50cedd586816 119 HAL_RCC_OscConfig(&RCC_OscInitStruct);
dflet 0:50cedd586816 120
dflet 0:50cedd586816 121 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1
dflet 0:50cedd586816 122 |RCC_CLOCKTYPE_PCLK2;
dflet 0:50cedd586816 123 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
dflet 0:50cedd586816 124 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
dflet 0:50cedd586816 125 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
dflet 0:50cedd586816 126 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
dflet 0:50cedd586816 127 HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
dflet 0:50cedd586816 128
dflet 3:7643714ec664 129 //Used for ov7670 test
dflet 3:7643714ec664 130 // PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_PLLI2S;
dflet 3:7643714ec664 131 // PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
dflet 3:7643714ec664 132 // PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
dflet 3:7643714ec664 133 // HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
dflet 3:7643714ec664 134
dflet 1:1a80c1529aa3 135 /* RCC_MCODIV_5 33.6MHz mco output on pin PC_9 (cam xclk) */
dflet 1:1a80c1529aa3 136 /* RCC_MCODIV_4 42MHz mco output on pin PC_9 (cam xclk) */
dflet 1:1a80c1529aa3 137 /* RCC_MCODIV_3 56MHz mco output on pin PC_9 (cam xclk) */
dflet 6:37fb696395d7 138 // HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_3);
dflet 4:c27adffcfec2 139
dflet 6:37fb696395d7 140 /* RCC_MCODIV_1 8MHz mco output on pin PC_9 (cam xclk) */
dflet 6:37fb696395d7 141 /* RCC_MCODIV_2 4MHz mco output on pin PC_9 (cam xclk) */
dflet 6:37fb696395d7 142 /* RCC_MCODIV_4 2MHz mco output on pin PC_9 (cam xclk) */
dflet 4:c27adffcfec2 143 HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_HSE, RCC_MCODIV_4);
dflet 4:c27adffcfec2 144
dflet 3:7643714ec664 145 //Used for ov7670 test
dflet 3:7643714ec664 146 /* RCC_MCODIV_4 24MHz mco output on pin PC_9 (cam xclk) */
dflet 3:7643714ec664 147 // HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_PLLI2SCLK, RCC_MCODIV_4);
dflet 0:50cedd586816 148
dflet 0:50cedd586816 149 HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
dflet 3:7643714ec664 150
dflet 4:c27adffcfec2 151 HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
dflet 4:c27adffcfec2 152
dflet 4:c27adffcfec2 153 /* STM32F405x/407x/415x/417x Revision Z devices: prefetch is supported */
dflet 4:c27adffcfec2 154 // if (HAL_GetREVID() == 0x1001)
dflet 4:c27adffcfec2 155 // {
dflet 4:c27adffcfec2 156 /* Enable the Flash prefetch */
dflet 4:c27adffcfec2 157 // __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
dflet 4:c27adffcfec2 158 // }
dflet 3:7643714ec664 159
dflet 0:50cedd586816 160 }
dflet 0:50cedd586816 161
dflet 0:50cedd586816 162 void MX_DCMI_Init()
dflet 0:50cedd586816 163 {
dflet 5:75fcfdb7cae7 164 DCMI_HandleTypeDef hdcmi;
dflet 5:75fcfdb7cae7 165 DMA_HandleTypeDef hdma_dcmi;
dflet 0:50cedd586816 166
dflet 0:50cedd586816 167 hdcmi.Instance = DCMI;
dflet 0:50cedd586816 168 hdcmi.Init.SynchroMode = DCMI_SYNCHRO_HARDWARE;
dflet 3:7643714ec664 169 hdcmi.Init.PCKPolarity = DCMI_PCKPOLARITY_RISING;//FALLING
dflet 0:50cedd586816 170 hdcmi.Init.VSPolarity = DCMI_VSPOLARITY_LOW;
dflet 0:50cedd586816 171 hdcmi.Init.HSPolarity = DCMI_HSPOLARITY_LOW;
dflet 0:50cedd586816 172 hdcmi.Init.CaptureRate = DCMI_CR_ALL_FRAME;
dflet 0:50cedd586816 173 hdcmi.Init.ExtendedDataMode = DCMI_EXTEND_DATA_8B;
dflet 0:50cedd586816 174 #ifdef ENABLE_JPEG
dflet 0:50cedd586816 175 hdcmi.Init.JPEGMode = DCMI_JPEG_ENABLE;
dflet 0:50cedd586816 176 #else
dflet 0:50cedd586816 177 hdcmi.Init.JPEGMode = DCMI_JPEG_DISABLE;
dflet 4:c27adffcfec2 178 #endif
dflet 4:c27adffcfec2 179
dflet 4:c27adffcfec2 180 HAL_DCMI_MspInit(&hdcmi);
dflet 0:50cedd586816 181 HAL_DCMI_Init(&hdcmi);
dflet 0:50cedd586816 182
dflet 0:50cedd586816 183 }
dflet 0:50cedd586816 184
dflet 0:50cedd586816 185 /**
dflet 0:50cedd586816 186 * Enable DMA controller clock
dflet 0:50cedd586816 187 */
dflet 0:50cedd586816 188 void MX_DMA_Init(void)
dflet 0:50cedd586816 189 {
dflet 0:50cedd586816 190 /* DMA controller clock enable */
dflet 0:50cedd586816 191 __DMA2_CLK_ENABLE();
dflet 0:50cedd586816 192
dflet 0:50cedd586816 193 /* DMA interrupt init */
dflet 4:c27adffcfec2 194 HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 5, 5);
dflet 3:7643714ec664 195 // HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn);
dflet 0:50cedd586816 196
dflet 0:50cedd586816 197 }
dflet 0:50cedd586816 198
dflet 1:1a80c1529aa3 199 /* Warning if pin changes are made below then the same changes have to be made in the following files.
dflet 0:50cedd586816 200 * httpserverapp.cpp
dflet 0:50cedd586816 201 * HttpCore.cpp
dflet 0:50cedd586816 202 * HttpSocket.cpp
dflet 0:50cedd586816 203 * HttpStatic.cpp
dflet 0:50cedd586816 204 * fPtr_func.cpp
dflet 0:50cedd586816 205 */
dflet 0:50cedd586816 206
dflet 0:50cedd586816 207 /* Off board leds */
dflet 0:50cedd586816 208 DigitalOut led1(PB_15);
dflet 0:50cedd586816 209 DigitalOut led2(PB_14);
dflet 0:50cedd586816 210 //cc3100 _cc3100(NC, NC, PE_5, PE_4, PE_6, SPI(PB_5, PB_4, PB_3));//Seeed_Arch_Max irq, nHib, cs, mosi, miso, sck
dflet 0:50cedd586816 211 cc3100 _cc3100(NC, NC, PD_12, PD_13, PD_11, SPI(PB_5, PB_4, PB_3));//Seeed_Arch_Max irq, nHib, cs, mosi, miso, sck
dflet 0:50cedd586816 212
dflet 0:50cedd586816 213 void initLEDs(void);
dflet 0:50cedd586816 214 void toggleLed(int ind);
dflet 0:50cedd586816 215 static void DisplayBanner(char * AppName);
dflet 0:50cedd586816 216
dflet 0:50cedd586816 217 #define PRINT_BUF_LEN 128
dflet 0:50cedd586816 218 int8_t print_buf[PRINT_BUF_LEN];
dflet 0:50cedd586816 219
dflet 0:50cedd586816 220 //*****************************************************************************
dflet 0:50cedd586816 221 // LOCAL DEFINES
dflet 0:50cedd586816 222 //*****************************************************************************
dflet 0:50cedd586816 223 #define APP_NAME "WebSocket"
dflet 0:50cedd586816 224
dflet 0:50cedd586816 225 void initLEDs(void){
dflet 0:50cedd586816 226
dflet 0:50cedd586816 227 #if (THIS_BOARD == Seeed_Arch_Max)
dflet 0:50cedd586816 228 led1 = 0;
dflet 0:50cedd586816 229 led2 = 0;
dflet 0:50cedd586816 230 #endif
dflet 0:50cedd586816 231
dflet 0:50cedd586816 232 }
dflet 0:50cedd586816 233
dflet 0:50cedd586816 234 void toggleLed(int ind){
dflet 0:50cedd586816 235
dflet 0:50cedd586816 236 if(ind == 1){
dflet 0:50cedd586816 237 led1 = !led1;
dflet 0:50cedd586816 238 }
dflet 0:50cedd586816 239 if(ind == 2){
dflet 0:50cedd586816 240 led2 = !led2;
dflet 0:50cedd586816 241 }
dflet 0:50cedd586816 242
dflet 0:50cedd586816 243 }
dflet 0:50cedd586816 244
dflet 0:50cedd586816 245 //*****************************************************************************
dflet 0:50cedd586816 246 //
dflet 0:50cedd586816 247 //! Application startup display on UART
dflet 0:50cedd586816 248 //!
dflet 0:50cedd586816 249 //! \param none
dflet 0:50cedd586816 250 //!
dflet 0:50cedd586816 251 //! \return none
dflet 0:50cedd586816 252 //!
dflet 0:50cedd586816 253 //*****************************************************************************
dflet 0:50cedd586816 254
dflet 0:50cedd586816 255 //#ifndef NOTERM
dflet 0:50cedd586816 256 static void
dflet 0:50cedd586816 257 DisplayBanner(char * AppName)
dflet 0:50cedd586816 258 {
dflet 0:50cedd586816 259
dflet 0:50cedd586816 260 Report("\n\n\n\r");
dflet 0:50cedd586816 261 Report(" *************************************************\n\r");
dflet 0:50cedd586816 262 Report(" CC3100 %s Application \n\r", AppName);
dflet 0:50cedd586816 263 Report(" *************************************************\n\r");
dflet 0:50cedd586816 264 Report("\n\n\n\r");
dflet 0:50cedd586816 265 }
dflet 0:50cedd586816 266 //#endif
dflet 0:50cedd586816 267
dflet 0:50cedd586816 268 //****************************************************************************
dflet 0:50cedd586816 269 // MAIN FUNCTION
dflet 0:50cedd586816 270 //****************************************************************************
dflet 0:50cedd586816 271 int main(void) {
dflet 0:50cedd586816 272
dflet 0:50cedd586816 273 int rv = 0;
dflet 3:7643714ec664 274
dflet 4:c27adffcfec2 275 HAL_Init();
dflet 4:c27adffcfec2 276
dflet 0:50cedd586816 277 SystemClock_Config();
dflet 3:7643714ec664 278
dflet 0:50cedd586816 279 //
dflet 0:50cedd586816 280 // Configuring UART
dflet 0:50cedd586816 281 //
dflet 0:50cedd586816 282 CLI_Configure();
dflet 0:50cedd586816 283
dflet 0:50cedd586816 284 /* Initialize all configured peripherals */
dflet 5:75fcfdb7cae7 285 // MX_DMA_Init();
dflet 5:75fcfdb7cae7 286 // MX_DCMI_Init();
dflet 5:75fcfdb7cae7 287 // initLEDs();
dflet 0:50cedd586816 288
dflet 4:c27adffcfec2 289 // toggleLed(1);
dflet 0:50cedd586816 290 //#ifndef NOTERM
dflet 0:50cedd586816 291
dflet 0:50cedd586816 292 //
dflet 0:50cedd586816 293 // Configuring UART
dflet 0:50cedd586816 294 //
dflet 0:50cedd586816 295 // CLI_Configure();
dflet 0:50cedd586816 296
dflet 0:50cedd586816 297 memset(print_buf, 0x00, PRINT_BUF_LEN);
dflet 0:50cedd586816 298 sprintf((char*) print_buf, " \r\nSystemCoreClock = %dMHz\r\n ", SystemCoreClock /1000000);
dflet 0:50cedd586816 299 rv = Uart_Write((uint8_t *) print_buf);
dflet 0:50cedd586816 300 if(rv < 0){
dflet 0:50cedd586816 301 while(1){
dflet 0:50cedd586816 302 toggleLed(1);
dflet 0:50cedd586816 303 wait(0.1);
dflet 0:50cedd586816 304 }
dflet 0:50cedd586816 305 }
dflet 0:50cedd586816 306
dflet 0:50cedd586816 307 //
dflet 0:50cedd586816 308 // Display Application Banner
dflet 0:50cedd586816 309 //
dflet 0:50cedd586816 310 DisplayBanner(APP_NAME);
dflet 0:50cedd586816 311
dflet 0:50cedd586816 312 //#endif
dflet 0:50cedd586816 313
dflet 0:50cedd586816 314 //
dflet 0:50cedd586816 315 // Start the SimpleLink Host
dflet 0:50cedd586816 316 //
dflet 0:50cedd586816 317 VStartSimpleLinkSpawnTask(SPAWN_TASK_PRIORITY);
dflet 0:50cedd586816 318 //
dflet 0:50cedd586816 319 // Start the HttpServer Task
dflet 0:50cedd586816 320 //
dflet 0:50cedd586816 321 //
dflet 0:50cedd586816 322
dflet 0:50cedd586816 323 osi_TaskCreate(HttpServerAppTask,
dflet 0:50cedd586816 324 "WebSocketApp",
dflet 0:50cedd586816 325 OSI_STACK_SIZE,
dflet 0:50cedd586816 326 NULL,
dflet 0:50cedd586816 327 HTTP_SERVER_APP_TASK_PRIORITY,
dflet 0:50cedd586816 328 NULL );
dflet 0:50cedd586816 329
dflet 0:50cedd586816 330 Uart_Write((uint8_t*)"HttpServerApp Initialized \n\r");
dflet 0:50cedd586816 331
dflet 0:50cedd586816 332 //
dflet 0:50cedd586816 333 // Start the task scheduler
dflet 0:50cedd586816 334 //
dflet 0:50cedd586816 335 osi_start();
dflet 0:50cedd586816 336
dflet 0:50cedd586816 337 return 0;
dflet 0:50cedd586816 338 }
dflet 0:50cedd586816 339
dflet 4:c27adffcfec2 340 /**
dflet 4:c27adffcfec2 341 * @brief This function handles Hard Fault exception.
dflet 4:c27adffcfec2 342 * @param None
dflet 4:c27adffcfec2 343 * @retval None
dflet 4:c27adffcfec2 344 */
dflet 4:c27adffcfec2 345 extern "C" void HardFault_Handler(void)
dflet 4:c27adffcfec2 346 {
dflet 4:c27adffcfec2 347 /* Go to infinite loop when Hard Fault exception occurs */
dflet 5:75fcfdb7cae7 348 printf("Hard Fault Register SCB->HSFR 0x%X \r\n",SCB->HFSR);
dflet 5:75fcfdb7cae7 349 printf("Call to Memory Address SCB->BFAR 0x%X ERROR!\r\n",SCB->BFAR);
dflet 5:75fcfdb7cae7 350 printf("Fault bits set SCB->CFSR 0x%X \r\n",SCB->CFSR);
dflet 5:75fcfdb7cae7 351 printf("Call to Memory Address SCB->MMFAR 0x%X ERROR!\r\n",SCB->MMFAR);
dflet 5:75fcfdb7cae7 352
dflet 4:c27adffcfec2 353 Uart_Write((uint8_t*)"HardFault_Handler \n\r");
dflet 4:c27adffcfec2 354 while (1)
dflet 4:c27adffcfec2 355 {
dflet 4:c27adffcfec2 356 }
dflet 4:c27adffcfec2 357 }
dflet 4:c27adffcfec2 358
dflet 4:c27adffcfec2 359 /**
dflet 4:c27adffcfec2 360 * @brief This function handles Memory Manage exception.
dflet 4:c27adffcfec2 361 * @param None
dflet 4:c27adffcfec2 362 * @retval None
dflet 4:c27adffcfec2 363 */
dflet 4:c27adffcfec2 364 extern "C" void MemManage_Handler(void)
dflet 4:c27adffcfec2 365 {
dflet 4:c27adffcfec2 366 Uart_Write((uint8_t*)"MemManage_Handler \n\r");
dflet 4:c27adffcfec2 367 /* Go to infinite loop when Memory Manage exception occurs */
dflet 4:c27adffcfec2 368 while (1)
dflet 4:c27adffcfec2 369 {
dflet 4:c27adffcfec2 370 }
dflet 4:c27adffcfec2 371 }
dflet 4:c27adffcfec2 372
dflet 4:c27adffcfec2 373 /**
dflet 4:c27adffcfec2 374 * @brief This function handles Bus Fault exception.
dflet 4:c27adffcfec2 375 * @param None
dflet 4:c27adffcfec2 376 * @retval None
dflet 4:c27adffcfec2 377 */
dflet 4:c27adffcfec2 378 extern "C" void BusFault_Handler(void)
dflet 4:c27adffcfec2 379 {
dflet 4:c27adffcfec2 380 Uart_Write((uint8_t*)"BusFault_Handler \n\r");
dflet 4:c27adffcfec2 381 /* Go to infinite loop when Bus Fault exception occurs */
dflet 4:c27adffcfec2 382 while (1)
dflet 4:c27adffcfec2 383 {
dflet 4:c27adffcfec2 384 }
dflet 4:c27adffcfec2 385 }
dflet 4:c27adffcfec2 386
dflet 4:c27adffcfec2 387 /**
dflet 4:c27adffcfec2 388 * @brief This function handles Usage Fault exception.
dflet 4:c27adffcfec2 389 * @param None
dflet 4:c27adffcfec2 390 * @retval None
dflet 4:c27adffcfec2 391 */
dflet 4:c27adffcfec2 392 extern "C" void UsageFault_Handler(void)
dflet 4:c27adffcfec2 393 {
dflet 4:c27adffcfec2 394 Uart_Write((uint8_t*)"UsageFault_Handler \n\r");
dflet 4:c27adffcfec2 395 /* Go to infinite loop when Usage Fault exception occurs */
dflet 4:c27adffcfec2 396 while (1)
dflet 4:c27adffcfec2 397 {
dflet 4:c27adffcfec2 398 }
dflet 4:c27adffcfec2 399 }
dflet 4:c27adffcfec2 400
dflet 4:c27adffcfec2 401 /**
dflet 4:c27adffcfec2 402 * @brief This function handles SVCall exception.
dflet 4:c27adffcfec2 403 * @param None
dflet 4:c27adffcfec2 404 * @retval None
dflet 4:c27adffcfec2 405 */
dflet 4:c27adffcfec2 406 /*
dflet 4:c27adffcfec2 407 extern "C" void SVC_Handler(void)
dflet 4:c27adffcfec2 408 {
dflet 4:c27adffcfec2 409 Uart_Write((uint8_t*)"SVC_Handler \n\r");
dflet 4:c27adffcfec2 410 }
dflet 4:c27adffcfec2 411 */
dflet 4:c27adffcfec2 412 /**
dflet 4:c27adffcfec2 413 * @brief This function handles Debug Monitor exception.
dflet 4:c27adffcfec2 414 * @param None
dflet 4:c27adffcfec2 415 * @retval None
dflet 4:c27adffcfec2 416 */
dflet 4:c27adffcfec2 417 extern "C" void DebugMon_Handler(void)
dflet 4:c27adffcfec2 418 {
dflet 4:c27adffcfec2 419 Uart_Write((uint8_t*)"DebugMon_Handler \n\r");
dflet 4:c27adffcfec2 420 }
dflet 4:c27adffcfec2 421
dflet 4:c27adffcfec2 422 /**
dflet 4:c27adffcfec2 423 * @brief This function handles PendSVC exception.
dflet 4:c27adffcfec2 424 * @param None
dflet 4:c27adffcfec2 425 * @retval None
dflet 4:c27adffcfec2 426 */
dflet 4:c27adffcfec2 427 /*
dflet 4:c27adffcfec2 428 extern "C" void PendSV_Handler(void)
dflet 4:c27adffcfec2 429 {
dflet 4:c27adffcfec2 430 Uart_Write((uint8_t*)"PendSV_Handler \n\r");
dflet 4:c27adffcfec2 431 }
dflet 4:c27adffcfec2 432 */
dflet 4:c27adffcfec2 433 /**
dflet 4:c27adffcfec2 434 * @brief This function handles SysTick Handler.
dflet 4:c27adffcfec2 435 * @param None
dflet 4:c27adffcfec2 436 * @retval None
dflet 4:c27adffcfec2 437 */
dflet 4:c27adffcfec2 438 /*
dflet 4:c27adffcfec2 439 extern "C" void SysTick_Handler(void)
dflet 4:c27adffcfec2 440 {
dflet 4:c27adffcfec2 441 Uart_Write((uint8_t*)"SysTick_Handler \n\r");
dflet 4:c27adffcfec2 442 HAL_IncTick();
dflet 4:c27adffcfec2 443 }
dflet 4:c27adffcfec2 444 */
dflet 4:c27adffcfec2 445 /**
dflet 4:c27adffcfec2 446 * @brief DMA interrupt handler.
dflet 4:c27adffcfec2 447 * @param None
dflet 4:c27adffcfec2 448 * @retval None
dflet 4:c27adffcfec2 449 */
dflet 4:c27adffcfec2 450 void DMA2_Stream1_IRQHandler(void)
dflet 4:c27adffcfec2 451 {
dflet 5:75fcfdb7cae7 452 DCMI_HandleTypeDef hdcmi;
dflet 5:75fcfdb7cae7 453 DMA_HandleTypeDef hdma_dcmi;
dflet 4:c27adffcfec2 454 Uart_Write((uint8_t*)"DMA2_Stream1_IRQHandler \n\r");
dflet 4:c27adffcfec2 455 HAL_DMA_IRQHandler(&hdma_dcmi);
dflet 4:c27adffcfec2 456 }
dflet 4:c27adffcfec2 457
dflet 4:c27adffcfec2 458 /**
dflet 4:c27adffcfec2 459 * @brief DCMI interrupt handler.
dflet 4:c27adffcfec2 460 * @param None
dflet 4:c27adffcfec2 461 * @retval None
dflet 4:c27adffcfec2 462 */
dflet 4:c27adffcfec2 463 void DCMI_IRQHandler(void)
dflet 4:c27adffcfec2 464 {
dflet 5:75fcfdb7cae7 465 DCMI_HandleTypeDef hdcmi;
dflet 5:75fcfdb7cae7 466 DMA_HandleTypeDef hdma_dcmi;
dflet 4:c27adffcfec2 467 Uart_Write((uint8_t*)"DCMI_IRQHandler \n\r");
dflet 4:c27adffcfec2 468 HAL_DCMI_IRQHandler(&hdcmi);
dflet 4:c27adffcfec2 469 }
dflet 4:c27adffcfec2 470
dflet 0:50cedd586816 471 //*****************************************************************************
dflet 0:50cedd586816 472 //
dflet 0:50cedd586816 473 // Close the Doxygen group.
dflet 0:50cedd586816 474 //! @}
dflet 0:50cedd586816 475 //
dflet 0:50cedd586816 476 //*****************************************************************************
dflet 0:50cedd586816 477