Damien Frost / NRF2401P

My fork during debugging.

Fork of NRF2401P by Malcolm McCulloch

NRF2401P.cpp@12:ea1345de6478, 2015-07-11 (annotated)

Committer:
nixonkj
Date:
Sat Jul 11 16:44:50 2015 +0000
Revision:
12:ea1345de6478
Parent:
11:07f76589f00a
Child:
13:5cbc726f2bbb
Fix CONFIG missing in printDetails

Who changed what in which revision?

UserRevisionLine numberNew contents of line
epgmdm 0:8fd0531ae0be 1 /**
epgmdm 0:8fd0531ae0be 2 *@section DESCRIPTION
epgmdm 0:8fd0531ae0be 3 * mbed NRF2401+ Library
epgmdm 0:8fd0531ae0be 4 *@section LICENSE
epgmdm 0:8fd0531ae0be 5 * Copyright (c) 2015, Malcolm McCulloch
epgmdm 0:8fd0531ae0be 6 *
epgmdm 0:8fd0531ae0be 7 * Permission is hereby granted, free of charge, to any person obtaining a copy
epgmdm 0:8fd0531ae0be 8 * of this software and associated documentation files (the "Software"), to deal
epgmdm 0:8fd0531ae0be 9 * in the Software without restriction, including without limitation the rights
epgmdm 0:8fd0531ae0be 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
epgmdm 0:8fd0531ae0be 11 * copies of the Software, and to permit persons to whom the Software is
epgmdm 0:8fd0531ae0be 12 * furnished to do so, subject to the following conditions:
epgmdm 0:8fd0531ae0be 13 *
epgmdm 0:8fd0531ae0be 14 * The above copyright notice and this permission notice shall be included in
epgmdm 0:8fd0531ae0be 15 * all copies or substantial portions of the Software.
epgmdm 0:8fd0531ae0be 16 *
epgmdm 0:8fd0531ae0be 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
epgmdm 0:8fd0531ae0be 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
epgmdm 0:8fd0531ae0be 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
epgmdm 0:8fd0531ae0be 20 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
epgmdm 0:8fd0531ae0be 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
epgmdm 0:8fd0531ae0be 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
epgmdm 0:8fd0531ae0be 23 * THE SOFTWARE.
epgmdm 0:8fd0531ae0be 24 * @file "NRF2401P.cpp"
epgmdm 0:8fd0531ae0be 25 */
epgmdm 2:ca0a3c0bba70 26 #include "mbed.h"
epgmdm 2:ca0a3c0bba70 27 #include "NRF2401P.h"
epgmdm 2:ca0a3c0bba70 28 #include "nRF24l01.h"
epgmdm 0:8fd0531ae0be 29
epgmdm 0:8fd0531ae0be 30 NRF2401P::NRF2401P ( PinName mosi, PinName miso, PinName sclk, PinName _csn, PinName _ce ) :
epgmdm 0:8fd0531ae0be 31 csn( DigitalOut( _csn ) ), ce( DigitalOut( _ce ) )
epgmdm 0:8fd0531ae0be 32 {
epgmdm 0:8fd0531ae0be 33 addressWidth = 5;
epgmdm 0:8fd0531ae0be 34 pc = new Serial( USBTX, USBRX ); // tx, rx
nixonkj 6:77ead8abdd1c 35 if (debug) {
nixonkj 6:77ead8abdd1c 36 sprintf(logMsg, "Initialise" );
nixonkj 6:77ead8abdd1c 37 log(logMsg);
nixonkj 6:77ead8abdd1c 38 }
epgmdm 0:8fd0531ae0be 39 spi = new SPI( mosi, miso, sclk, NC ); //SPI (PinName mosi, PinName miso, PinName sclk, PinName _unused=NC)
epgmdm 0:8fd0531ae0be 40 spi->frequency( 10000000 ); // 1MHZ max 10 MHz
epgmdm 0:8fd0531ae0be 41 spi->format( 8, 0 ); // 0: 0e 08; 1: 0e 00; 2:0e 00 ;3:1c 00
epgmdm 0:8fd0531ae0be 42 csn = 1;
epgmdm 0:8fd0531ae0be 43 ce = 0;
epgmdm 0:8fd0531ae0be 44 dynamic = false;
nixonkj 6:77ead8abdd1c 45 debug = false;
nixonkj 6:77ead8abdd1c 46 }
epgmdm 0:8fd0531ae0be 47
nixonkj 6:77ead8abdd1c 48 void NRF2401P::log(char *msg)
epgmdm 0:8fd0531ae0be 49 {
epgmdm 0:8fd0531ae0be 50 if(debug) {
nixonkj 8:3e027705ce23 51 printf("\t <%s \t %s>\n\r", statusString(), msg);
epgmdm 1:ff53b1ac3bad 52 wait(0.01);
nixonkj 6:77ead8abdd1c 53 }
epgmdm 0:8fd0531ae0be 54 }
epgmdm 0:8fd0531ae0be 55
epgmdm 0:8fd0531ae0be 56 void NRF2401P::scratch()
epgmdm 0:8fd0531ae0be 57 {
epgmdm 0:8fd0531ae0be 58 int status = 0;
epgmdm 0:8fd0531ae0be 59 int register1 = 0;
epgmdm 0:8fd0531ae0be 60 ce = 0;
epgmdm 0:8fd0531ae0be 61 for ( char i = 0; i < 24; i++ ) {
epgmdm 0:8fd0531ae0be 62 csn = 0;
epgmdm 0:8fd0531ae0be 63 //wait_us(100);
epgmdm 0:8fd0531ae0be 64 status = spi->write( i );
epgmdm 0:8fd0531ae0be 65 register1 = spi->write( 0x00 );
epgmdm 0:8fd0531ae0be 66 csn = 1;
epgmdm 0:8fd0531ae0be 67 sprintf(logMsg, " register %02x (%02x) = %02x", i, status, register1 );
epgmdm 0:8fd0531ae0be 68 log(logMsg);
epgmdm 0:8fd0531ae0be 69 }
nixonkj 6:77ead8abdd1c 70 }
epgmdm 0:8fd0531ae0be 71
epgmdm 0:8fd0531ae0be 72 /**
epgmdm 2:ca0a3c0bba70 73 * start here to configure the basics of the NRF
epgmdm 2:ca0a3c0bba70 74 */
epgmdm 2:ca0a3c0bba70 75 void NRF2401P::start()
epgmdm 2:ca0a3c0bba70 76 {
nixonkj 8:3e027705ce23 77 writeReg(CONFIG, 0x0c); // set 16 bit crc
nixonkj 8:3e027705ce23 78 setTxRetry(0x01, 0x0f); // 500 uS, 15 retries
nixonkj 8:3e027705ce23 79 setRadio(0, 0x03); // 1MB/S 0dB
epgmdm 2:ca0a3c0bba70 80 setDynamicPayload();
epgmdm 2:ca0a3c0bba70 81 setChannel(76); // should be clear?
epgmdm 2:ca0a3c0bba70 82 setAddressWidth(5);
epgmdm 2:ca0a3c0bba70 83 flushRx();
epgmdm 2:ca0a3c0bba70 84 flushTx();
epgmdm 2:ca0a3c0bba70 85 setPwrUp();
epgmdm 2:ca0a3c0bba70 86 setTxMode(); // just make sure no spurious reads....
nixonkj 6:77ead8abdd1c 87 }
epgmdm 2:ca0a3c0bba70 88
epgmdm 2:ca0a3c0bba70 89 /**
nixonkj 8:3e027705ce23 90 * Sets up a receiver using shockburst and dynamic payload. Uses pipe 1
epgmdm 0:8fd0531ae0be 91 * defaults to 5 bytes
epgmdm 0:8fd0531ae0be 92 */
epgmdm 2:ca0a3c0bba70 93 void NRF2401P::quickRxSetup(int channel,long long addrRx)
epgmdm 0:8fd0531ae0be 94 {
epgmdm 2:ca0a3c0bba70 95 start();
epgmdm 0:8fd0531ae0be 96 setChannel(channel);
epgmdm 2:ca0a3c0bba70 97 setRxAddress(addrRx,1);
epgmdm 0:8fd0531ae0be 98 setRxMode();
epgmdm 0:8fd0531ae0be 99 ce=1;
nixonkj 6:77ead8abdd1c 100 wait(0.001f);
epgmdm 0:8fd0531ae0be 101 }
nixonkj 6:77ead8abdd1c 102
epgmdm 0:8fd0531ae0be 103 /**
epgmdm 0:8fd0531ae0be 104 * Sets up for receive of a message to address 0XA0A0A0
epgmdm 0:8fd0531ae0be 105 */
epgmdm 0:8fd0531ae0be 106 char NRF2401P::testReceive()
epgmdm 0:8fd0531ae0be 107 {
epgmdm 0:8fd0531ae0be 108 char message[64];
epgmdm 0:8fd0531ae0be 109 char width;
epgmdm 0:8fd0531ae0be 110 int channel = 0x12;
epgmdm 0:8fd0531ae0be 111 long long addr=0xA0B0C0;
epgmdm 0:8fd0531ae0be 112 debug = true;
epgmdm 0:8fd0531ae0be 113 quickRxSetup(channel, addr);
epgmdm 0:8fd0531ae0be 114
epgmdm 0:8fd0531ae0be 115 while (1) {
epgmdm 0:8fd0531ae0be 116 while (!isRxData()) {
epgmdm 0:8fd0531ae0be 117 //wait(0.5);
epgmdm 0:8fd0531ae0be 118 };
epgmdm 0:8fd0531ae0be 119 width=getRxData(message);
epgmdm 0:8fd0531ae0be 120 message[width]='\0';
epgmdm 0:8fd0531ae0be 121 sprintf(logMsg,"Received= [%s]",message);
epgmdm 0:8fd0531ae0be 122 log(logMsg);
nixonkj 6:77ead8abdd1c 123 }
epgmdm 0:8fd0531ae0be 124 }
epgmdm 0:8fd0531ae0be 125
nixonkj 6:77ead8abdd1c 126 char NRF2401P::setTxRetry(char delay, char numTries)
epgmdm 2:ca0a3c0bba70 127 {
epgmdm 2:ca0a3c0bba70 128 char val = (delay&0xf)<<4 | (numTries&0xf);
nixonkj 6:77ead8abdd1c 129 char chk;
nixonkj 8:3e027705ce23 130 writeReg(SETUP_RETR, val);
nixonkj 8:3e027705ce23 131 readReg(SETUP_RETR, &chk);
nixonkj 6:77ead8abdd1c 132 if (chk&0xff == val) {
nixonkj 6:77ead8abdd1c 133 return 0;
nixonkj 6:77ead8abdd1c 134 } else {
nixonkj 6:77ead8abdd1c 135 return 1;
nixonkj 6:77ead8abdd1c 136 }
epgmdm 2:ca0a3c0bba70 137 }
epgmdm 2:ca0a3c0bba70 138
epgmdm 2:ca0a3c0bba70 139 /**
epgmdm 0:8fd0531ae0be 140 * Sets up a transmitter using shockburst and dynamic payload. Uses pipe 1
epgmdm 0:8fd0531ae0be 141 * defaults to 5 bytes
epgmdm 0:8fd0531ae0be 142 */
epgmdm 0:8fd0531ae0be 143 void NRF2401P::quickTxSetup(int channel,long long addr)
epgmdm 0:8fd0531ae0be 144 {
epgmdm 2:ca0a3c0bba70 145 start();
epgmdm 0:8fd0531ae0be 146 setChannel(channel);
epgmdm 2:ca0a3c0bba70 147 setTxAddress(addr);
epgmdm 0:8fd0531ae0be 148 setTxMode();
epgmdm 0:8fd0531ae0be 149 ce=1;
epgmdm 0:8fd0531ae0be 150 wait (0.0016f); // wait for pll to settle
epgmdm 0:8fd0531ae0be 151 }
epgmdm 0:8fd0531ae0be 152
epgmdm 0:8fd0531ae0be 153 /**
epgmdm 0:8fd0531ae0be 154 * Sets up for transmit of a message to address 0XA0A0A0
epgmdm 0:8fd0531ae0be 155 */
epgmdm 0:8fd0531ae0be 156 char NRF2401P::testTransmit()
epgmdm 0:8fd0531ae0be 157 {
epgmdm 0:8fd0531ae0be 158 long long addr=0xA0B0C0;
epgmdm 0:8fd0531ae0be 159 int channel = 0x12;
epgmdm 0:8fd0531ae0be 160 char data[32] ;
epgmdm 0:8fd0531ae0be 161 int i=0;
epgmdm 0:8fd0531ae0be 162 quickRxSetup(channel, addr);
epgmdm 0:8fd0531ae0be 163 while (1) {
epgmdm 0:8fd0531ae0be 164 sprintf(data," packet %03d", i++ |100);
epgmdm 0:8fd0531ae0be 165 transmitData(data,18);
epgmdm 0:8fd0531ae0be 166 wait (1.0);
epgmdm 0:8fd0531ae0be 167 }
nixonkj 6:77ead8abdd1c 168 }
epgmdm 0:8fd0531ae0be 169
nixonkj 6:77ead8abdd1c 170 char NRF2401P::setRadio(char speed, char power)
epgmdm 0:8fd0531ae0be 171 {
nixonkj 6:77ead8abdd1c 172 char val=0, chk=0;
nixonkj 8:3e027705ce23 173 if (debug) {
nixonkj 8:3e027705ce23 174 sprintf(logMsg, "Set radio");
nixonkj 8:3e027705ce23 175 log(logMsg);
nixonkj 8:3e027705ce23 176 }
epgmdm 0:8fd0531ae0be 177 if (speed & 0x02) {
epgmdm 0:8fd0531ae0be 178 val |= (1<<5);
epgmdm 0:8fd0531ae0be 179 }
epgmdm 0:8fd0531ae0be 180 val |= (speed & 0x01)<<3;
epgmdm 0:8fd0531ae0be 181
nixonkj 6:77ead8abdd1c 182 val |= ((power & 0x03)<<1);
nixonkj 6:77ead8abdd1c 183 printf("\n\r");
nixonkj 6:77ead8abdd1c 184
nixonkj 8:3e027705ce23 185 writeReg(RF_SETUP, val);
epgmdm 0:8fd0531ae0be 186
nixonkj 6:77ead8abdd1c 187 // read register to verify settings
nixonkj 8:3e027705ce23 188 readReg(RF_SETUP, &chk);
nixonkj 6:77ead8abdd1c 189 if (chk&0x2E == val) {
nixonkj 6:77ead8abdd1c 190 return 0;
nixonkj 6:77ead8abdd1c 191 } else {
nixonkj 6:77ead8abdd1c 192 return 1;
nixonkj 6:77ead8abdd1c 193 }
epgmdm 0:8fd0531ae0be 194 }
nixonkj 6:77ead8abdd1c 195
epgmdm 0:8fd0531ae0be 196 char NRF2401P::setChannel(char chan)
epgmdm 0:8fd0531ae0be 197 {
nixonkj 6:77ead8abdd1c 198 char chk=0;
nixonkj 6:77ead8abdd1c 199 if (debug) {
nixonkj 6:77ead8abdd1c 200 sprintf(logMsg, "Set channel");
nixonkj 6:77ead8abdd1c 201 log(logMsg);
nixonkj 6:77ead8abdd1c 202 }
nixonkj 8:3e027705ce23 203 writeReg(RF_CH, (chan&0x7f));
nixonkj 8:3e027705ce23 204 readReg(RF_CH, &chk);
nixonkj 6:77ead8abdd1c 205 if (chk&0x7f == chan&0x7f) {
nixonkj 6:77ead8abdd1c 206 return 0;
nixonkj 6:77ead8abdd1c 207 } else {
nixonkj 6:77ead8abdd1c 208 return 1;
nixonkj 6:77ead8abdd1c 209 }
epgmdm 0:8fd0531ae0be 210 }
nixonkj 6:77ead8abdd1c 211
epgmdm 0:8fd0531ae0be 212 /**
epgmdm 0:8fd0531ae0be 213 * Transmits width bytes of data. width <32
epgmdm 0:8fd0531ae0be 214 */
nixonkj 6:77ead8abdd1c 215 char NRF2401P::transmitData( char *data, char width )
epgmdm 0:8fd0531ae0be 216 {
nixonkj 6:77ead8abdd1c 217 if (width>32)
nixonkj 6:77ead8abdd1c 218 return 0;
nixonkj 6:77ead8abdd1c 219 checkStatus();
nixonkj 6:77ead8abdd1c 220 if ((status>>4)&1) { // Max retries - flush tx
nixonkj 6:77ead8abdd1c 221 flushTx();
nixonkj 6:77ead8abdd1c 222 }
epgmdm 2:ca0a3c0bba70 223 //clearStatus();
epgmdm 2:ca0a3c0bba70 224 //ce = 1;
epgmdm 0:8fd0531ae0be 225 csn = 0;
nixonkj 8:3e027705ce23 226 char address = 0xA0;
epgmdm 0:8fd0531ae0be 227 int i;
epgmdm 0:8fd0531ae0be 228 // set up for writing
epgmdm 0:8fd0531ae0be 229 status = spi->write( address );
epgmdm 0:8fd0531ae0be 230 for ( i = 0; i <width; i++ ) {
epgmdm 0:8fd0531ae0be 231 spi->write( data[ i ] );
epgmdm 0:8fd0531ae0be 232 }
epgmdm 0:8fd0531ae0be 233 csn = 1;
epgmdm 3:afe8d307b5c3 234 wait(0.001);
epgmdm 3:afe8d307b5c3 235 if (debug) {
nixonkj 6:77ead8abdd1c 236 sprintf(logMsg, " Transmit data %d bytes to %02x (%02x) = %10s", width, address, status, data );
epgmdm 3:afe8d307b5c3 237 log(logMsg);
epgmdm 2:ca0a3c0bba70 238 }
epgmdm 0:8fd0531ae0be 239 return status;
epgmdm 0:8fd0531ae0be 240 }
epgmdm 0:8fd0531ae0be 241
epgmdm 0:8fd0531ae0be 242 /**
epgmdm 0:8fd0531ae0be 243 * sets acknowledge data width bytes of data. width <32
epgmdm 0:8fd0531ae0be 244 */
epgmdm 1:ff53b1ac3bad 245 char NRF2401P::acknowledgeData( char *data, char width, char pipe )
epgmdm 0:8fd0531ae0be 246 {
epgmdm 0:8fd0531ae0be 247 ce = 1;
epgmdm 0:8fd0531ae0be 248 csn = 0;
epgmdm 2:ca0a3c0bba70 249 //writeReg(0x1d,0x06); // enable payload with ack
epgmdm 2:ca0a3c0bba70 250 char address = W_ACK_PAYLOAD | (pipe&0x07);
epgmdm 0:8fd0531ae0be 251 int i;
epgmdm 0:8fd0531ae0be 252 // set up for writing
epgmdm 3:afe8d307b5c3 253 csn = 0;
epgmdm 0:8fd0531ae0be 254 status = spi->write( address );
epgmdm 0:8fd0531ae0be 255 for ( i = 0; i <width; i++ ) {
epgmdm 0:8fd0531ae0be 256 spi->write( data[ i ] );
epgmdm 0:8fd0531ae0be 257 }
epgmdm 0:8fd0531ae0be 258 csn = 1;
epgmdm 3:afe8d307b5c3 259 if (debug) {
epgmdm 3:afe8d307b5c3 260 sprintf(logMsg, " acknowledge data %d bytes to %02x (%02x) = %c", width, address, status, *data );
epgmdm 3:afe8d307b5c3 261 log(logMsg);
epgmdm 2:ca0a3c0bba70 262 }
epgmdm 0:8fd0531ae0be 263 return status;
nixonkj 6:77ead8abdd1c 264 }
epgmdm 0:8fd0531ae0be 265
epgmdm 0:8fd0531ae0be 266 /**
epgmdm 0:8fd0531ae0be 267 * Writes 1 byte data to a register
epgmdm 0:8fd0531ae0be 268 **/
nixonkj 6:77ead8abdd1c 269 void NRF2401P::writeReg( char address, char data )
epgmdm 0:8fd0531ae0be 270 {
epgmdm 0:8fd0531ae0be 271 char status = 0;
epgmdm 0:8fd0531ae0be 272 char reg;
epgmdm 0:8fd0531ae0be 273 csn = 0;
epgmdm 0:8fd0531ae0be 274 address &= 0x1F;
nixonkj 8:3e027705ce23 275 reg = address | W_REGISTER;
epgmdm 0:8fd0531ae0be 276 status = spi->write( reg );
epgmdm 0:8fd0531ae0be 277 spi->write( data );
epgmdm 0:8fd0531ae0be 278 csn = 1;
nixonkj 6:77ead8abdd1c 279 if (debug) {
nixonkj 6:77ead8abdd1c 280 sprintf(logMsg, " register write %02x (%02x) = %02x", address, status, data );
nixonkj 6:77ead8abdd1c 281 log(logMsg);
nixonkj 6:77ead8abdd1c 282 }
epgmdm 0:8fd0531ae0be 283 }
nixonkj 6:77ead8abdd1c 284
epgmdm 0:8fd0531ae0be 285 /**
epgmdm 0:8fd0531ae0be 286 * Writes width bytes data to a register, ls byte to ms byte /for adressess
epgmdm 0:8fd0531ae0be 287 **/
nixonkj 6:77ead8abdd1c 288 void NRF2401P::writeReg( char address, char *data, char width )
epgmdm 0:8fd0531ae0be 289 {
epgmdm 0:8fd0531ae0be 290 char reg;
epgmdm 0:8fd0531ae0be 291 csn = 0;
epgmdm 0:8fd0531ae0be 292 int i;
epgmdm 0:8fd0531ae0be 293 // set up for writing
epgmdm 0:8fd0531ae0be 294 address &= 0x1F;
nixonkj 8:3e027705ce23 295 reg = address| W_REGISTER;
epgmdm 0:8fd0531ae0be 296 status = spi->write( reg );
epgmdm 0:8fd0531ae0be 297 for ( i = width - 1; i >= 0; i-- ) {
epgmdm 0:8fd0531ae0be 298 spi->write( data[ i ] );
epgmdm 0:8fd0531ae0be 299 }
epgmdm 0:8fd0531ae0be 300 csn = 1;
epgmdm 2:ca0a3c0bba70 301 if (debug) {
epgmdm 2:ca0a3c0bba70 302 sprintf(logMsg, " register write %d bytes to %02x (%02x) = %02x %02x %02x", width, address, status, data[0], data[1], data[2] );
epgmdm 2:ca0a3c0bba70 303 log(logMsg);
epgmdm 2:ca0a3c0bba70 304 }
epgmdm 0:8fd0531ae0be 305 }
nixonkj 6:77ead8abdd1c 306
epgmdm 0:8fd0531ae0be 307 /**
epgmdm 0:8fd0531ae0be 308 * Reads 1 byte from a register
epgmdm 0:8fd0531ae0be 309 **/
nixonkj 6:77ead8abdd1c 310 void NRF2401P::readReg( char address, char *data )
epgmdm 0:8fd0531ae0be 311 {
epgmdm 0:8fd0531ae0be 312 csn = 0;
epgmdm 0:8fd0531ae0be 313 address &= 0x1F;
epgmdm 0:8fd0531ae0be 314 status = spi->write( address );
epgmdm 0:8fd0531ae0be 315 *data = spi->write( 0x00 );
epgmdm 0:8fd0531ae0be 316 csn = 1;
nixonkj 6:77ead8abdd1c 317 if (debug && address != 0x07) { // In debug mode: print out anything other than a status request
nixonkj 6:77ead8abdd1c 318 sprintf(logMsg, " register read %02x (%02x) = %02x", address, status, *data );
nixonkj 6:77ead8abdd1c 319 log(logMsg);
nixonkj 6:77ead8abdd1c 320 }
epgmdm 0:8fd0531ae0be 321 }
nixonkj 6:77ead8abdd1c 322
epgmdm 0:8fd0531ae0be 323 /**
nixonkj 10:8a217441c38e 324 * Reads n bytes from a register
nixonkj 10:8a217441c38e 325 **/
nixonkj 10:8a217441c38e 326 void NRF2401P::readReg( char address, char *data, char width )
nixonkj 10:8a217441c38e 327 {
nixonkj 10:8a217441c38e 328 char reg;
nixonkj 10:8a217441c38e 329 csn = 0;
nixonkj 10:8a217441c38e 330 int i;
nixonkj 10:8a217441c38e 331 // set up for writing
nixonkj 10:8a217441c38e 332 address &= 0x1F;
nixonkj 10:8a217441c38e 333 reg = address| R_REGISTER;
nixonkj 10:8a217441c38e 334 status = spi->write( reg );
nixonkj 10:8a217441c38e 335 for ( i = width - 1; i >= 0; i-- ) {
nixonkj 10:8a217441c38e 336 data[i] = spi->write( 0x00 );
nixonkj 10:8a217441c38e 337 }
nixonkj 10:8a217441c38e 338 csn = 1;
nixonkj 10:8a217441c38e 339 if (debug) {
nixonkj 10:8a217441c38e 340 sprintf(logMsg, " register read %d bytes from %02x (%02x) = ", width, address, status );
nixonkj 10:8a217441c38e 341 for ( i=0; i<width; i++)
nixonkj 10:8a217441c38e 342 sprintf(logMsg, "%s %02x", logMsg, data[i]);
nixonkj 10:8a217441c38e 343 log(logMsg);
nixonkj 10:8a217441c38e 344 }
nixonkj 10:8a217441c38e 345 }
nixonkj 10:8a217441c38e 346
nixonkj 10:8a217441c38e 347 /**
epgmdm 0:8fd0531ae0be 348 * Clears the status flags RX_DR, TX_DS, MAX_RT
epgmdm 0:8fd0531ae0be 349 */
nixonkj 6:77ead8abdd1c 350 void NRF2401P::clearStatus()
epgmdm 0:8fd0531ae0be 351 {
nixonkj 8:3e027705ce23 352 writeReg(STATUS, 0x70);
epgmdm 2:ca0a3c0bba70 353 if (debug) {
epgmdm 2:ca0a3c0bba70 354 sprintf(logMsg, "Clear status (%02x)", status );
epgmdm 2:ca0a3c0bba70 355 log(logMsg);
epgmdm 2:ca0a3c0bba70 356 }
epgmdm 0:8fd0531ae0be 357 }
nixonkj 6:77ead8abdd1c 358
epgmdm 0:8fd0531ae0be 359 /**
epgmdm 0:8fd0531ae0be 360 * flushes TX FIFO and resets status flags
epgmdm 0:8fd0531ae0be 361 */
nixonkj 6:77ead8abdd1c 362 void NRF2401P::flushTx()
epgmdm 0:8fd0531ae0be 363 {
epgmdm 0:8fd0531ae0be 364 csn = 0;
epgmdm 2:ca0a3c0bba70 365 status = spi->write( FLUSH_TX );
epgmdm 0:8fd0531ae0be 366 csn = 1;
epgmdm 0:8fd0531ae0be 367 clearStatus();
epgmdm 2:ca0a3c0bba70 368 if (debug) {
epgmdm 2:ca0a3c0bba70 369 sprintf(logMsg, "Flush TX FIFO (%02x)", status );
epgmdm 2:ca0a3c0bba70 370 log(logMsg);
epgmdm 2:ca0a3c0bba70 371 }
epgmdm 0:8fd0531ae0be 372 }
epgmdm 0:8fd0531ae0be 373
epgmdm 0:8fd0531ae0be 374 /**
epgmdm 0:8fd0531ae0be 375 * flushes RX FIFO and resets status flags
epgmdm 0:8fd0531ae0be 376 */
nixonkj 6:77ead8abdd1c 377 void NRF2401P::flushRx()
epgmdm 0:8fd0531ae0be 378 {
epgmdm 0:8fd0531ae0be 379 csn = 0;
epgmdm 2:ca0a3c0bba70 380 status = spi->write( FLUSH_RX );
epgmdm 0:8fd0531ae0be 381 csn = 1;
epgmdm 2:ca0a3c0bba70 382 clearStatus();
epgmdm 2:ca0a3c0bba70 383 if (debug) {
epgmdm 2:ca0a3c0bba70 384 sprintf(logMsg, "Flush RX FIFO (%02x)", status );
epgmdm 2:ca0a3c0bba70 385 log(logMsg);
epgmdm 2:ca0a3c0bba70 386 }
epgmdm 0:8fd0531ae0be 387 }
nixonkj 6:77ead8abdd1c 388
epgmdm 0:8fd0531ae0be 389 /**
epgmdm 0:8fd0531ae0be 390 * Sets PRIM_RX = 0;
epgmdm 0:8fd0531ae0be 391 */
nixonkj 6:77ead8abdd1c 392 char NRF2401P::setTxMode()
epgmdm 0:8fd0531ae0be 393 {
epgmdm 0:8fd0531ae0be 394 char data;
epgmdm 0:8fd0531ae0be 395 char bit;
epgmdm 2:ca0a3c0bba70 396 if (debug) {
epgmdm 2:ca0a3c0bba70 397 sprintf(logMsg, "Set Tx Mode");
epgmdm 2:ca0a3c0bba70 398 log(logMsg);
epgmdm 2:ca0a3c0bba70 399 }
nixonkj 8:3e027705ce23 400 readReg(CONFIG, &data);
epgmdm 0:8fd0531ae0be 401 data &= ~( 1 << 0 );
epgmdm 2:ca0a3c0bba70 402 flushTx();
epgmdm 2:ca0a3c0bba70 403 flushRx();
nixonkj 8:3e027705ce23 404 writeReg(CONFIG, data);
nixonkj 8:3e027705ce23 405 writeReg(RX_ADDR_P0, txAdd, addressWidth); // reset p0
nixonkj 8:3e027705ce23 406 writeReg(EN_RXADDR, 0x01); // enable pipe 0 for reading
epgmdm 0:8fd0531ae0be 407 // check
nixonkj 8:3e027705ce23 408 readReg(CONFIG, &data);
epgmdm 0:8fd0531ae0be 409 bit = ( data >> 0 ) & 1;
epgmdm 2:ca0a3c0bba70 410
epgmdm 0:8fd0531ae0be 411 ce=1;
epgmdm 0:8fd0531ae0be 412 wait(0.003);
nixonkj 6:77ead8abdd1c 413 if (bit == 0) {
nixonkj 6:77ead8abdd1c 414 return 0;
nixonkj 6:77ead8abdd1c 415 } else {
nixonkj 6:77ead8abdd1c 416 return 1;
nixonkj 6:77ead8abdd1c 417 }
epgmdm 0:8fd0531ae0be 418 }
epgmdm 0:8fd0531ae0be 419
epgmdm 0:8fd0531ae0be 420 /**
epgmdm 0:8fd0531ae0be 421 * Sets the number of bytes of the address width = 3,4,5
epgmdm 0:8fd0531ae0be 422 */
nixonkj 6:77ead8abdd1c 423 char NRF2401P::setAddressWidth( char width )
epgmdm 0:8fd0531ae0be 424 {
nixonkj 6:77ead8abdd1c 425 char chk=0;
epgmdm 0:8fd0531ae0be 426 addressWidth = width;
epgmdm 0:8fd0531ae0be 427 if ( ( width > 5 ) || ( width < 3 ) )
epgmdm 0:8fd0531ae0be 428 return false;
epgmdm 0:8fd0531ae0be 429 width -= 2;
nixonkj 8:3e027705ce23 430 writeReg(SETUP_AW, width);
nixonkj 8:3e027705ce23 431 readReg(SETUP_AW, &chk);
nixonkj 6:77ead8abdd1c 432 if (chk&0x03 == width) {
nixonkj 6:77ead8abdd1c 433 return 0;
nixonkj 6:77ead8abdd1c 434 } else {
nixonkj 6:77ead8abdd1c 435 return 1;
nixonkj 6:77ead8abdd1c 436 }
epgmdm 0:8fd0531ae0be 437 }
nixonkj 6:77ead8abdd1c 438
epgmdm 0:8fd0531ae0be 439 /**
nixonkj 6:77ead8abdd1c 440 * Sets the address, uses address width set (either 3,4 or 5)
epgmdm 0:8fd0531ae0be 441 */
epgmdm 0:8fd0531ae0be 442 char NRF2401P::setTxAddress( char *address )
epgmdm 0:8fd0531ae0be 443 {
epgmdm 2:ca0a3c0bba70 444 memcpy (txAdd,address, addressWidth);
nixonkj 8:3e027705ce23 445 writeReg(RX_ADDR_P0, address, addressWidth);
nixonkj 8:3e027705ce23 446 writeReg(TX_ADDR, address, addressWidth);
nixonkj 6:77ead8abdd1c 447 return 0; // must fix this
epgmdm 0:8fd0531ae0be 448 }
epgmdm 0:8fd0531ae0be 449
epgmdm 0:8fd0531ae0be 450 /**
epgmdm 0:8fd0531ae0be 451 * Sets the address, uses addess width set (either 3,4 or 5)
epgmdm 0:8fd0531ae0be 452 */
epgmdm 0:8fd0531ae0be 453 char NRF2401P::setTxAddress( long long address )
epgmdm 0:8fd0531ae0be 454 {
epgmdm 0:8fd0531ae0be 455 char buff[ 5 ];
epgmdm 0:8fd0531ae0be 456 buff[ 0 ] = address & 0xff;
epgmdm 0:8fd0531ae0be 457 buff[ 1 ] = ( address >> 8 ) & 0xFF;
epgmdm 0:8fd0531ae0be 458 buff[ 2 ] = ( address >> 16 ) & 0xFF;
epgmdm 0:8fd0531ae0be 459 buff[ 3 ] = ( address >> 24 ) & 0xFF;
epgmdm 0:8fd0531ae0be 460 buff[ 4 ] = ( address >> 32 ) & 0xFF;
epgmdm 0:8fd0531ae0be 461 return setTxAddress( buff );
epgmdm 0:8fd0531ae0be 462 }
epgmdm 0:8fd0531ae0be 463
epgmdm 0:8fd0531ae0be 464 /**
nixonkj 9:c21b80aaf250 465 * Sets the address, uses address width set (either 3,4 or 5)
epgmdm 2:ca0a3c0bba70 466 * Enables pipe for receiving;
epgmdm 0:8fd0531ae0be 467 */
epgmdm 0:8fd0531ae0be 468 char NRF2401P::setRxAddress( char *address, char pipe )
epgmdm 0:8fd0531ae0be 469 {
epgmdm 2:ca0a3c0bba70 470 if(debug) {
epgmdm 2:ca0a3c0bba70 471 log ("Set Rx Address");
epgmdm 2:ca0a3c0bba70 472 }
epgmdm 2:ca0a3c0bba70 473 if (pipe>5) return 0xff;
epgmdm 2:ca0a3c0bba70 474 if (pipe ==0) {
nixonkj 8:3e027705ce23 475 memcpy(pipe0Add,address, addressWidth);
epgmdm 2:ca0a3c0bba70 476 }
epgmdm 2:ca0a3c0bba70 477
epgmdm 0:8fd0531ae0be 478 char reg = 0x0A + pipe;
epgmdm 0:8fd0531ae0be 479 switch ( pipe ) {
epgmdm 0:8fd0531ae0be 480 case ( 0 ) :
epgmdm 0:8fd0531ae0be 481 case ( 1 ) : {
nixonkj 8:3e027705ce23 482 writeReg(reg, address, addressWidth); //Write to RX_ADDR_P0 or _P1
epgmdm 0:8fd0531ae0be 483 break;
epgmdm 0:8fd0531ae0be 484 }
epgmdm 0:8fd0531ae0be 485 case ( 2 ) :
epgmdm 0:8fd0531ae0be 486 case ( 3 ) :
epgmdm 0:8fd0531ae0be 487 case ( 4 ) :
epgmdm 0:8fd0531ae0be 488 case ( 5 ) : {
nixonkj 8:3e027705ce23 489 writeReg(reg, address, 1); //Write to RX_ADDR_P2 ... _P5
epgmdm 0:8fd0531ae0be 490 break;
epgmdm 0:8fd0531ae0be 491 }
epgmdm 0:8fd0531ae0be 492
epgmdm 0:8fd0531ae0be 493 }
nixonkj 8:3e027705ce23 494 readReg(EN_RXADDR, &reg);
epgmdm 2:ca0a3c0bba70 495 reg |= (1<<pipe);
nixonkj 8:3e027705ce23 496 writeReg(EN_RXADDR, reg); //Enable the pipe
nixonkj 6:77ead8abdd1c 497 return 0; // Must fix this
epgmdm 0:8fd0531ae0be 498 }
epgmdm 0:8fd0531ae0be 499
epgmdm 0:8fd0531ae0be 500 /**
epgmdm 0:8fd0531ae0be 501 * Sets the address of pipe (<=5), uses addess width set (either 3,4 or 5)
epgmdm 0:8fd0531ae0be 502 */
epgmdm 0:8fd0531ae0be 503 char NRF2401P::setRxAddress( long long address, char pipe )
epgmdm 0:8fd0531ae0be 504 {
epgmdm 0:8fd0531ae0be 505 char buff[ 5 ];
epgmdm 0:8fd0531ae0be 506 buff[ 0 ] = address & 0xff;
epgmdm 0:8fd0531ae0be 507 buff[ 1 ] = ( address >> 8 ) & 0xFF;
epgmdm 0:8fd0531ae0be 508 buff[ 2 ] = ( address >> 16 ) & 0xFF;
epgmdm 0:8fd0531ae0be 509 buff[ 3 ] = ( address >> 24 ) & 0xFF;
epgmdm 0:8fd0531ae0be 510 buff[ 4 ] = ( address >> 32 ) & 0xFF;
epgmdm 0:8fd0531ae0be 511 return setRxAddress( buff, pipe );
epgmdm 0:8fd0531ae0be 512 }
nixonkj 6:77ead8abdd1c 513
epgmdm 1:ff53b1ac3bad 514 /**
epgmdm 1:ff53b1ac3bad 515 *checks the status flag
epgmdm 1:ff53b1ac3bad 516 */
epgmdm 1:ff53b1ac3bad 517 char NRF2401P::checkStatus()
epgmdm 1:ff53b1ac3bad 518 {
nixonkj 8:3e027705ce23 519 readReg(STATUS, &status);
epgmdm 1:ff53b1ac3bad 520 return status;
epgmdm 1:ff53b1ac3bad 521 }
nixonkj 6:77ead8abdd1c 522
epgmdm 1:ff53b1ac3bad 523 /**
epgmdm 1:ff53b1ac3bad 524 * checks if Ack data available.
epgmdm 1:ff53b1ac3bad 525 */
epgmdm 1:ff53b1ac3bad 526 bool NRF2401P::isAckData()
epgmdm 1:ff53b1ac3bad 527 {
epgmdm 1:ff53b1ac3bad 528 char fifo;
nixonkj 8:3e027705ce23 529 readReg(FIFO_STATUS, &fifo);
epgmdm 1:ff53b1ac3bad 530 bool isData = !(fifo&0x01);
epgmdm 1:ff53b1ac3bad 531 return isData;
epgmdm 1:ff53b1ac3bad 532 }
epgmdm 0:8fd0531ae0be 533
epgmdm 1:ff53b1ac3bad 534 /**
epgmdm 1:ff53b1ac3bad 535 * checks if RX data available.
epgmdm 1:ff53b1ac3bad 536 */
epgmdm 0:8fd0531ae0be 537 bool NRF2401P::isRxData()
epgmdm 0:8fd0531ae0be 538 {
epgmdm 1:ff53b1ac3bad 539 checkStatus();
epgmdm 0:8fd0531ae0be 540 bool isData = (status>>6)&0x01;
epgmdm 0:8fd0531ae0be 541 return isData;
epgmdm 0:8fd0531ae0be 542 }
nixonkj 6:77ead8abdd1c 543
epgmdm 0:8fd0531ae0be 544 /**
epgmdm 0:8fd0531ae0be 545 * returns the width of the dynamic payload
epgmdm 0:8fd0531ae0be 546 */
epgmdm 0:8fd0531ae0be 547 char NRF2401P::getRxWidth()
epgmdm 0:8fd0531ae0be 548 {
epgmdm 0:8fd0531ae0be 549 char width;
epgmdm 0:8fd0531ae0be 550 if (dynamic) {
epgmdm 0:8fd0531ae0be 551 csn = 0;
epgmdm 0:8fd0531ae0be 552 status = spi->write( 0x60 );
epgmdm 0:8fd0531ae0be 553 width = spi->write(0x00);
epgmdm 0:8fd0531ae0be 554 csn = 1;
epgmdm 0:8fd0531ae0be 555
epgmdm 0:8fd0531ae0be 556 if (width>32) {
epgmdm 0:8fd0531ae0be 557 flushRx();
epgmdm 0:8fd0531ae0be 558 width=0;
epgmdm 0:8fd0531ae0be 559 }
epgmdm 0:8fd0531ae0be 560 } else {
nixonkj 8:3e027705ce23 561 readReg(RX_PW_P1, &width); // width of p1
epgmdm 0:8fd0531ae0be 562 }
epgmdm 1:ff53b1ac3bad 563 // width=18;
epgmdm 0:8fd0531ae0be 564 return width;
epgmdm 0:8fd0531ae0be 565 }
nixonkj 6:77ead8abdd1c 566
epgmdm 0:8fd0531ae0be 567 /**
epgmdm 0:8fd0531ae0be 568 * return message in buffer, mem for buffer must have been allocated.
epgmdm 0:8fd0531ae0be 569 * Return value is number of bytes of buffer
epgmdm 0:8fd0531ae0be 570 */
epgmdm 0:8fd0531ae0be 571 char NRF2401P::getRxData(char * buffer)
epgmdm 0:8fd0531ae0be 572 {
epgmdm 0:8fd0531ae0be 573 char address = 0x61;
epgmdm 0:8fd0531ae0be 574 char width;
epgmdm 0:8fd0531ae0be 575 width = getRxWidth();
epgmdm 0:8fd0531ae0be 576 bool isData = (status>>6)&0x01;
epgmdm 0:8fd0531ae0be 577 if (isData) {
epgmdm 0:8fd0531ae0be 578 csn = 0;
epgmdm 0:8fd0531ae0be 579 int i;
epgmdm 0:8fd0531ae0be 580 // set up for reading
epgmdm 0:8fd0531ae0be 581 status = spi->write( address );
epgmdm 0:8fd0531ae0be 582 for ( i = 0; i <= width; i++ ) {
epgmdm 0:8fd0531ae0be 583 buffer[i]=spi->write(0x00 );
epgmdm 0:8fd0531ae0be 584 }
epgmdm 0:8fd0531ae0be 585 csn = 1;
nixonkj 6:77ead8abdd1c 586 if (debug) {
nixonkj 6:77ead8abdd1c 587 sprintf(logMsg, "Receive data %d bytes", width );
nixonkj 6:77ead8abdd1c 588 log(logMsg);
nixonkj 6:77ead8abdd1c 589 }
epgmdm 0:8fd0531ae0be 590 clearStatus();
epgmdm 0:8fd0531ae0be 591 return width;
epgmdm 0:8fd0531ae0be 592 } else {
nixonkj 6:77ead8abdd1c 593 if (debug) {
nixonkj 6:77ead8abdd1c 594 sprintf(logMsg, "Receive NO data %d bytes", width );
nixonkj 6:77ead8abdd1c 595 log(logMsg);
nixonkj 6:77ead8abdd1c 596 }
epgmdm 0:8fd0531ae0be 597 clearStatus();
epgmdm 0:8fd0531ae0be 598 return 0;
epgmdm 0:8fd0531ae0be 599 }
epgmdm 0:8fd0531ae0be 600 }
epgmdm 0:8fd0531ae0be 601
epgmdm 0:8fd0531ae0be 602 /**
epgmdm 0:8fd0531ae0be 603 * Sets all the receive pipes to dynamic payload length
epgmdm 0:8fd0531ae0be 604 */
epgmdm 2:ca0a3c0bba70 605 void NRF2401P::setDynamicPayload()
epgmdm 0:8fd0531ae0be 606 {
epgmdm 0:8fd0531ae0be 607 dynamic = true;
nixonkj 8:3e027705ce23 608 writeReg(FEATURE, 0x07); // Enable Dyn payload, Payload with Ack and w_tx_noack command
nixonkj 8:3e027705ce23 609 writeReg(EN_AA, 0x3f); // EN_AA regi for P1 and P0
nixonkj 9:c21b80aaf250 610 writeReg(DYNPD, 0x3F); // KJN - should be 0x3F for all pipes
epgmdm 0:8fd0531ae0be 611 }
epgmdm 2:ca0a3c0bba70 612
epgmdm 0:8fd0531ae0be 613 /**
epgmdm 0:8fd0531ae0be 614 * Sets PWR_UP = 1;
nixonkj 6:77ead8abdd1c 615 * return 0 on success
epgmdm 0:8fd0531ae0be 616 */
nixonkj 6:77ead8abdd1c 617 char NRF2401P::setPwrUp()
epgmdm 0:8fd0531ae0be 618 {
epgmdm 0:8fd0531ae0be 619 char data;
epgmdm 0:8fd0531ae0be 620 char bit;
epgmdm 0:8fd0531ae0be 621 ce=1;
nixonkj 8:3e027705ce23 622 readReg(CONFIG, &data);
epgmdm 2:ca0a3c0bba70 623 if ((data>>1) &0x01) {
epgmdm 2:ca0a3c0bba70 624 return true; // Already powered up
epgmdm 2:ca0a3c0bba70 625 };
nixonkj 8:3e027705ce23 626 data |= (0x02);
nixonkj 8:3e027705ce23 627 writeReg(CONFIG, data);
epgmdm 0:8fd0531ae0be 628 // check
nixonkj 8:3e027705ce23 629 readReg(CONFIG, &data);
epgmdm 0:8fd0531ae0be 630 bit = ( data >> 1 ) & 1;
epgmdm 2:ca0a3c0bba70 631
epgmdm 0:8fd0531ae0be 632 wait(0.005); // wait 5ms
epgmdm 2:ca0a3c0bba70 633 if(debug) {
epgmdm 2:ca0a3c0bba70 634 sprintf(logMsg, "Set PWR_UP to %x", bit);
epgmdm 2:ca0a3c0bba70 635 log(logMsg);
epgmdm 2:ca0a3c0bba70 636 }
nixonkj 6:77ead8abdd1c 637 if (bit == 1) {
nixonkj 6:77ead8abdd1c 638 return 0;
nixonkj 6:77ead8abdd1c 639 } else {
nixonkj 6:77ead8abdd1c 640 return 1;
nixonkj 6:77ead8abdd1c 641 }
nixonkj 6:77ead8abdd1c 642 }
epgmdm 2:ca0a3c0bba70 643
epgmdm 0:8fd0531ae0be 644 /**
epgmdm 0:8fd0531ae0be 645 * Sets PRIM_RX = 0;
epgmdm 0:8fd0531ae0be 646 */
nixonkj 6:77ead8abdd1c 647 char NRF2401P::setRxMode()
epgmdm 0:8fd0531ae0be 648 {
epgmdm 0:8fd0531ae0be 649 char data;
epgmdm 0:8fd0531ae0be 650 char bit;
epgmdm 0:8fd0531ae0be 651 ce=1;
nixonkj 8:3e027705ce23 652 readReg(CONFIG, &data);
nixonkj 8:3e027705ce23 653 data |= (0x01);
epgmdm 2:ca0a3c0bba70 654
nixonkj 8:3e027705ce23 655 writeReg(CONFIG, data);
epgmdm 3:afe8d307b5c3 656 if (pipe0Add[0]|pipe0Add[1]|pipe0Add[2]|pipe0Add[3]|pipe0Add[4] >0) {
epgmdm 3:afe8d307b5c3 657 setRxAddress(pipe0Add,0);
epgmdm 2:ca0a3c0bba70 658 }
epgmdm 0:8fd0531ae0be 659 // check
nixonkj 8:3e027705ce23 660 readReg(CONFIG, &data);
epgmdm 0:8fd0531ae0be 661 bit = ( data >> 0 ) & 1;
epgmdm 2:ca0a3c0bba70 662
epgmdm 2:ca0a3c0bba70 663 wait (0.001);
epgmdm 0:8fd0531ae0be 664 flushRx();
epgmdm 2:ca0a3c0bba70 665 flushTx();
epgmdm 2:ca0a3c0bba70 666 if (debug) {
epgmdm 2:ca0a3c0bba70 667 sprintf(logMsg, " set PRIM_RX to %x", bit);
epgmdm 2:ca0a3c0bba70 668 log(logMsg);
epgmdm 2:ca0a3c0bba70 669 }
nixonkj 6:77ead8abdd1c 670 if ( bit == 1 ) {
nixonkj 6:77ead8abdd1c 671 return 0;
nixonkj 6:77ead8abdd1c 672 } else {
nixonkj 6:77ead8abdd1c 673 return 1;
nixonkj 6:77ead8abdd1c 674 }
epgmdm 0:8fd0531ae0be 675 }
nixonkj 6:77ead8abdd1c 676
epgmdm 0:8fd0531ae0be 677 /**
epgmdm 0:8fd0531ae0be 678 * Prints status string
epgmdm 0:8fd0531ae0be 679 */
epgmdm 0:8fd0531ae0be 680 char * NRF2401P::statusString()
epgmdm 0:8fd0531ae0be 681 {
epgmdm 0:8fd0531ae0be 682 char *msg;
epgmdm 0:8fd0531ae0be 683 msg = statusS;
epgmdm 0:8fd0531ae0be 684 if (((status>>1) & 0x07)==0x07) {
epgmdm 0:8fd0531ae0be 685 sprintf(msg,"RX empty");
epgmdm 0:8fd0531ae0be 686 } else {
epgmdm 0:8fd0531ae0be 687 sprintf(msg,"pipe %02x",(status>>1) & 0x07);
epgmdm 0:8fd0531ae0be 688 }
epgmdm 0:8fd0531ae0be 689
epgmdm 0:8fd0531ae0be 690 if ((status>>6)&0x01) strcat(msg," RX_DR,");
epgmdm 0:8fd0531ae0be 691 if ((status>>5)&0x01) strcat(msg," TX_DS,");
epgmdm 0:8fd0531ae0be 692 if ((status>>4)&0x01) strcat(msg," MAX_RT,");
epgmdm 0:8fd0531ae0be 693 if ((status>>0)&0x01) strcat(msg," TX_FLL,");
epgmdm 0:8fd0531ae0be 694
epgmdm 0:8fd0531ae0be 695 return msg;
nixonkj 9:c21b80aaf250 696 }
nixonkj 9:c21b80aaf250 697
nixonkj 11:07f76589f00a 698 void NRF2401P::printReg(char* name, char address, bool newline)
nixonkj 9:c21b80aaf250 699 {
nixonkj 9:c21b80aaf250 700 char data;
nixonkj 11:07f76589f00a 701 readReg(address, &data);
nixonkj 11:07f76589f00a 702 printf("%s = 0x%02x", name, data);
nixonkj 11:07f76589f00a 703 if (newline) {
nixonkj 11:07f76589f00a 704 printf("\r\n");
nixonkj 11:07f76589f00a 705 }
nixonkj 11:07f76589f00a 706 }
nixonkj 11:07f76589f00a 707
nixonkj 11:07f76589f00a 708 void NRF2401P::printReg(char* name, char address, char width, bool newline)
nixonkj 11:07f76589f00a 709 {
nixonkj 11:07f76589f00a 710 char data[width];
nixonkj 11:07f76589f00a 711 readReg(address, data, width);
nixonkj 11:07f76589f00a 712 printf("%s = 0x", name);
nixonkj 11:07f76589f00a 713 for (int i=width-1; i>=0; i--) {
nixonkj 11:07f76589f00a 714 printf("%02x", data[i]);
nixonkj 11:07f76589f00a 715 }
nixonkj 11:07f76589f00a 716 if (newline) {
nixonkj 11:07f76589f00a 717 printf("\r\n");
nixonkj 11:07f76589f00a 718 }
nixonkj 11:07f76589f00a 719 }
nixonkj 11:07f76589f00a 720
nixonkj 11:07f76589f00a 721 void NRF2401P::printDetails() {
nixonkj 9:c21b80aaf250 722 char status = checkStatus();
nixonkj 11:07f76589f00a 723 printf("STATUS = 0x%02x RX_DR=%x TX_DS=%x MAX_RT=%x RX_P_NO=%x TX_FULL=%x\r\n", status,
nixonkj 9:c21b80aaf250 724 (status & (1<<MASK_RX_DR))?1:0,
nixonkj 9:c21b80aaf250 725 (status & (1<<MASK_TX_DS))?1:0,
nixonkj 9:c21b80aaf250 726 (status & (1<<MASK_MAX_RT))?1:0,
nixonkj 9:c21b80aaf250 727 (status >> RX_P_NO) & 7,
nixonkj 9:c21b80aaf250 728 (status & (1<<TX_FULL))?1:0 );
nixonkj 9:c21b80aaf250 729
nixonkj 11:07f76589f00a 730 printReg("RX_ADDR_P0", RX_ADDR_P0, addressWidth);
nixonkj 11:07f76589f00a 731 printReg("RX_ADDR_P1", RX_ADDR_P1, addressWidth);
nixonkj 11:07f76589f00a 732 printReg("RX_ADDR_P2", RX_ADDR_P2, addressWidth);
nixonkj 11:07f76589f00a 733 printReg("RX_ADDR_P3", RX_ADDR_P3, addressWidth);
nixonkj 11:07f76589f00a 734 printReg("RX_ADDR_P4", RX_ADDR_P4, addressWidth);
nixonkj 11:07f76589f00a 735 printReg("RX_ADDR_P5", RX_ADDR_P5, addressWidth);
nixonkj 11:07f76589f00a 736 printReg("TX_ADDR", TX_ADDR, addressWidth);
nixonkj 10:8a217441c38e 737
nixonkj 11:07f76589f00a 738 printReg("RX_PW_P0", RX_PW_P0, false); // false for no newline, save some space
nixonkj 11:07f76589f00a 739 printReg(" RX_PW_P1", RX_PW_P1, false);
nixonkj 11:07f76589f00a 740 printReg(" RX_PW_P2", RX_PW_P2);
nixonkj 11:07f76589f00a 741 printReg("RX_PW_P3", RX_PW_P3, false);
nixonkj 11:07f76589f00a 742 printReg(" RX_PW_P4", RX_PW_P4, false);
nixonkj 11:07f76589f00a 743 printReg(" RX_PW_P5", RX_PW_P5);
nixonkj 11:07f76589f00a 744
nixonkj 11:07f76589f00a 745 printReg("EN_AA", EN_AA);
nixonkj 11:07f76589f00a 746 printReg("EN_RXADDR", EN_RXADDR);
nixonkj 11:07f76589f00a 747 printReg("RF_CH", RF_CH);
nixonkj 11:07f76589f00a 748 printReg("RF_SETUP", RF_SETUP);
nixonkj 12:ea1345de6478 749 printReg("CONFIG", CONFIG);
nixonkj 11:07f76589f00a 750 printReg("DYNPD", DYNPD);
nixonkj 11:07f76589f00a 751 printReg("FEATURE", FEATURE);
epgmdm 0:8fd0531ae0be 752 }