David Rimer / Mbed OS Gigatron_Emulator

A small emulator for the gigatron created for the STM32F746G-DISCO and an NES wii controller

WiiClassicControllerReader/WiiClassicControllerDefs.h@1:4c1f3d32fceb, 2020-03-05 (annotated)

Committer:
davidr99
Date:
Thu Mar 05 01:33:52 2020 +0000
Revision:
1:4c1f3d32fceb
Emulator all one project

Who changed what in which revision?

UserRevisionLine numberNew contents of line
davidr99 1:4c1f3d32fceb 1 /*
davidr99 1:4c1f3d32fceb 2 * WiiClassicControllerReader. A program allowing the output of one or two
davidr99 1:4c1f3d32fceb 3 * Wii Classic Controllers to be read via I2C and decoded for use, using the mbed
davidr99 1:4c1f3d32fceb 4 * microcontroller and its associated libraries.
davidr99 1:4c1f3d32fceb 5 *
davidr99 1:4c1f3d32fceb 6 * Written by Alfredo Guerrero <alfredog83@gmail.com> for the mbedGC open-source
davidr99 1:4c1f3d32fceb 7 * game console <http://www.mbedgc.com>. Based on the original code for
davidr99 1:4c1f3d32fceb 8 * the WiiNunchuckReader written by Petras Saduikis <petras@petras.co.uk>.
davidr99 1:4c1f3d32fceb 9 *
davidr99 1:4c1f3d32fceb 10 * This file is part of WiiClassicControllerReader.
davidr99 1:4c1f3d32fceb 11 *
davidr99 1:4c1f3d32fceb 12 * WiiClassicControllerReader is free software: you can redistribute it and/or modify
davidr99 1:4c1f3d32fceb 13 * it under the terms of the GNU General Public License as published by
davidr99 1:4c1f3d32fceb 14 * the Free Software Foundation, either version 3 of the License, or
davidr99 1:4c1f3d32fceb 15 * (at your option) any later version.
davidr99 1:4c1f3d32fceb 16 *
davidr99 1:4c1f3d32fceb 17 * WiiClassicControllerReader is distributed in the hope that it will be useful,
davidr99 1:4c1f3d32fceb 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
davidr99 1:4c1f3d32fceb 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
davidr99 1:4c1f3d32fceb 20 * GNU General Public License for more details.
davidr99 1:4c1f3d32fceb 21 *
davidr99 1:4c1f3d32fceb 22 * You can find a copy of the GNU General Public License at <http://www.gnu.org/licenses/>.
davidr99 1:4c1f3d32fceb 23 */
davidr99 1:4c1f3d32fceb 24
davidr99 1:4c1f3d32fceb 25 #ifndef ALFREDOG83_WIICLASSICCONTROLLERDEFS_H
davidr99 1:4c1f3d32fceb 26 #define ALFREDOG83_WIICLASSICCONTROLLERDEFS_H
davidr99 1:4c1f3d32fceb 27
davidr99 1:4c1f3d32fceb 28 // I2C
davidr99 1:4c1f3d32fceb 29 #define CONTROLLER_ADDR 0xA4 // I2C library doesn't right shift the address, so provided shifted
davidr99 1:4c1f3d32fceb 30 #define CONTROLLER_REGADDR 0x40 // relevant register address
davidr99 1:4c1f3d32fceb 31 #define CONTROLLER_READLEN 0x06 // always read this many bytes back
davidr99 1:4c1f3d32fceb 32
davidr99 1:4c1f3d32fceb 33 // bitmasks for individual buttons
davidr99 1:4c1f3d32fceb 34 // LX, LY: left analog stick X, Y (0-63)
davidr99 1:4c1f3d32fceb 35 // RX, RY: right analog stick X, Y (0-31) [RX separated among bytes 0-2]
davidr99 1:4c1f3d32fceb 36 // RT, LT: right, left trigger (0-31) [LT separated among bytes 2-3]
davidr99 1:4c1f3d32fceb 37 // B{ZR,ZL,A,B,X,Y,START,HOME,SELECT}: discrete buttons
davidr99 1:4c1f3d32fceb 38 // BD{L,R,U,D}: D-pad direction buttons
davidr99 1:4c1f3d32fceb 39 // LC,RC: digital button click of LT, RT when pressed down all the way
davidr99 1:4c1f3d32fceb 40 #define MASK_LX 0x3F // LX<5:0>
davidr99 1:4c1f3d32fceb 41 #define MASK_RX34 0xC0 // RX<4:3>
davidr99 1:4c1f3d32fceb 42 #define MASK_LY 0x3F // LY<5:0>
davidr99 1:4c1f3d32fceb 43 #define MASK_RY 0x1F // RY<4:0>
davidr99 1:4c1f3d32fceb 44 #define MASK_LT34 0x60 // LT<4:3>
davidr99 1:4c1f3d32fceb 45 #define MASK_RT 0x1F // RT<4:0>
davidr99 1:4c1f3d32fceb 46 #define MASK_BDU 0x01 // DU
davidr99 1:4c1f3d32fceb 47 #define MASK_RC_DL 0x02 // DL, RC
davidr99 1:4c1f3d32fceb 48 #define MASK_BSTART_ZR 0x04 // ZR, START
davidr99 1:4c1f3d32fceb 49 #define MASK_BHOME_X 0x08 // X, HOME
davidr99 1:4c1f3d32fceb 50 #define MASK_BSELECT_A 0x10 // A, SELECT
davidr99 1:4c1f3d32fceb 51 #define MASK_LC_Y 0x20 // LC, Y, LT<0>
davidr99 1:4c1f3d32fceb 52 #define MASK_BDD_B 0x40 // B, DD, LT<1>, RX<1>
davidr99 1:4c1f3d32fceb 53 #define MASK_BDR_ZL 0x80 // ZL, DR, LT<2>, RX<0>, RX<2>
davidr99 1:4c1f3d32fceb 54
davidr99 1:4c1f3d32fceb 55 // timing
davidr99 1:4c1f3d32fceb 56 #define I2C_READ_DELAY 0.01
davidr99 1:4c1f3d32fceb 57
davidr99 1:4c1f3d32fceb 58 // I2C status
davidr99 1:4c1f3d32fceb 59 #define I2C_OK 0 // zero on success (ACK), non-zero on fail (NACK) for read or write
davidr99 1:4c1f3d32fceb 60
davidr99 1:4c1f3d32fceb 61 #endif