Dependencies:   keypad SDHCFileSystem TextLCD mbed FPointer wave_player

Committer:
daryl2110
Date:
Mon Feb 20 07:32:56 2012 +0000
Revision:
0:57ece500234e

        

Who changed what in which revision?

UserRevisionLine numberNew contents of line
daryl2110 0:57ece500234e 1 //******************************************************************************
daryl2110 0:57ece500234e 2 //*
daryl2110 0:57ece500234e 3 //* FULLNAME: Single-Chip Microcontroller Real-Time Operating System
daryl2110 0:57ece500234e 4 //*
daryl2110 0:57ece500234e 5 //* NICKNAME: scmRTOS
daryl2110 0:57ece500234e 6 //*
daryl2110 0:57ece500234e 7 //* PROCESSOR: ARM Cortex-M3
daryl2110 0:57ece500234e 8 //*
daryl2110 0:57ece500234e 9 //* TOOLKIT: EWARM (IAR Systems)
daryl2110 0:57ece500234e 10 //*
daryl2110 0:57ece500234e 11 //* PURPOSE: Device Definitions
daryl2110 0:57ece500234e 12 //*
daryl2110 0:57ece500234e 13 //* Version: 3.10
daryl2110 0:57ece500234e 14 //*
daryl2110 0:57ece500234e 15 //* $Revision: 196 $
daryl2110 0:57ece500234e 16 //* $Date:: 2008-06-19 #$
daryl2110 0:57ece500234e 17 //*
daryl2110 0:57ece500234e 18 //* Copyright (c) 2003-2010, Harry E. Zhurov
daryl2110 0:57ece500234e 19 //*
daryl2110 0:57ece500234e 20 //* Permission is hereby granted, free of charge, to any person
daryl2110 0:57ece500234e 21 //* obtaining a copy of this software and associated documentation
daryl2110 0:57ece500234e 22 //* files (the "Software"), to deal in the Software without restriction,
daryl2110 0:57ece500234e 23 //* including without limitation the rights to use, copy, modify, merge,
daryl2110 0:57ece500234e 24 //* publish, distribute, sublicense, and/or sell copies of the Software,
daryl2110 0:57ece500234e 25 //* and to permit persons to whom the Software is furnished to do so,
daryl2110 0:57ece500234e 26 //* subject to the following conditions:
daryl2110 0:57ece500234e 27 //*
daryl2110 0:57ece500234e 28 //* The above copyright notice and this permission notice shall be included
daryl2110 0:57ece500234e 29 //* in all copies or substantial portions of the Software.
daryl2110 0:57ece500234e 30 //*
daryl2110 0:57ece500234e 31 //* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
daryl2110 0:57ece500234e 32 //* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
daryl2110 0:57ece500234e 33 //* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
daryl2110 0:57ece500234e 34 //* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
daryl2110 0:57ece500234e 35 //* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
daryl2110 0:57ece500234e 36 //* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH
daryl2110 0:57ece500234e 37 //* THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
daryl2110 0:57ece500234e 38 //*
daryl2110 0:57ece500234e 39 //* =================================================================
daryl2110 0:57ece500234e 40 //* See http://scmrtos.sourceforge.net for documentation, latest
daryl2110 0:57ece500234e 41 //* information, license and contact details.
daryl2110 0:57ece500234e 42 //* =================================================================
daryl2110 0:57ece500234e 43 //*
daryl2110 0:57ece500234e 44 //******************************************************************************
daryl2110 0:57ece500234e 45 //* Ported by Andrey Chuikin, Copyright (c) 2008-2010
daryl2110 0:57ece500234e 46
daryl2110 0:57ece500234e 47 #ifndef DEVICE_H
daryl2110 0:57ece500234e 48 #define DEVICE_H
daryl2110 0:57ece500234e 49
daryl2110 0:57ece500234e 50 #include <commdefs.h>
daryl2110 0:57ece500234e 51
daryl2110 0:57ece500234e 52 //------------------------------------------------------------------------------
daryl2110 0:57ece500234e 53 // Definitions for some processor registers in order to not include specific
daryl2110 0:57ece500234e 54 // header file for various Cortex-M3 processor derivatives.
daryl2110 0:57ece500234e 55 #define CPU_ICSR ( ( sfr_dword *) 0xE000ED04 ) // Interrupt Control State Register
daryl2110 0:57ece500234e 56 #define CPU_SYSTICKCSR ( ( sfr_dword *) 0xE000E010 ) // SysTick Control and Status Register
daryl2110 0:57ece500234e 57 #define CPU_SYSTICKCSR_EINT 0x02 // Bit for enable/disable SysTick interrupt
daryl2110 0:57ece500234e 58
daryl2110 0:57ece500234e 59
daryl2110 0:57ece500234e 60 #endif /* DEVICE_H */