Danillo Aguiar / mbed-STM32F103C8T6

Danillo Mangue Baja

Dependents:   STM32_StrainGauge

SysClockConf.cpp@4:306609fe9dc8, 2016-07-05 (annotated)

Committer:
hudakz
Date:
Tue Jul 05 21:02:59 2016 +0000
Revision:
4:306609fe9dc8
Parent:
3:a92af4b1ffe1
Child:
5:9fbbea76d6f6
Updated

Who changed what in which revision?

UserRevisionLine numberNew contents of line
hudakz 4:306609fe9dc8 1 /*
hudakz 4:306609fe9dc8 2 ******************************************************************************
hudakz 4:306609fe9dc8 3 * @file SysClockConf.c
hudakz 4:306609fe9dc8 4 * @author Zoltan Hudak
hudakz 4:306609fe9dc8 5 * @version
hudakz 4:306609fe9dc8 6 * @date 05-July-2016
hudakz 4:306609fe9dc8 7 * @brief System Clock configuration for STM32F103C8T6
hudakz 4:306609fe9dc8 8 ******************************************************************************
hudakz 4:306609fe9dc8 9 * @attention
hudakz 4:306609fe9dc8 10 *
hudakz 4:306609fe9dc8 11 * <h2><center>&copy; COPYRIGHT(c) 2016 Zoltan Hudak <hudakz@inbox.com>
hudakz 4:306609fe9dc8 12 *
hudakz 4:306609fe9dc8 13 * All rights reserved.
hudakz 4:306609fe9dc8 14
hudakz 4:306609fe9dc8 15 This program is free software: you can redistribute it and/or modify
hudakz 4:306609fe9dc8 16 it under the terms of the GNU General Public License as published by
hudakz 4:306609fe9dc8 17 the Free Software Foundation, either version 3 of the License, or
hudakz 4:306609fe9dc8 18 (at your option) any later version.
hudakz 4:306609fe9dc8 19
hudakz 4:306609fe9dc8 20 This program is distributed in the hope that it will be useful,
hudakz 4:306609fe9dc8 21 but WITHOUT ANY WARRANTY; without even the implied warranty of
hudakz 4:306609fe9dc8 22 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
hudakz 4:306609fe9dc8 23 GNU General Public License for more details.
hudakz 4:306609fe9dc8 24
hudakz 4:306609fe9dc8 25 You should have received a copy of the GNU General Public License
hudakz 4:306609fe9dc8 26 along with this program. If not, see <http://www.gnu.org/licenses/>.
hudakz 4:306609fe9dc8 27 */
hudakz 4:306609fe9dc8 28
hudakz 2:534793444c60 29 #include "SysClockConf.h"
hudakz 2:534793444c60 30 #include "mbed.h"
hudakz 2:534793444c60 31
hudakz 2:534793444c60 32 bool HSE_SystemClock_Config(int freq) {
hudakz 2:534793444c60 33 RCC_OscInitTypeDef RCC_OscInitStruct;
hudakz 2:534793444c60 34
hudakz 2:534793444c60 35 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
hudakz 2:534793444c60 36 RCC_OscInitStruct.HSEState = RCC_HSE_ON;
hudakz 2:534793444c60 37 RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
hudakz 2:534793444c60 38 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
hudakz 2:534793444c60 39 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
hudakz 2:534793444c60 40 switch(freq) {
hudakz 2:534793444c60 41 case 36:
hudakz 2:534793444c60 42 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
hudakz 2:534793444c60 43 break;
hudakz 2:534793444c60 44 case 48:
hudakz 2:534793444c60 45 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
hudakz 2:534793444c60 46 break;
hudakz 2:534793444c60 47 default:
hudakz 2:534793444c60 48 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
hudakz 2:534793444c60 49 }
hudakz 2:534793444c60 50
hudakz 2:534793444c60 51 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
hudakz 2:534793444c60 52 return false;
hudakz 2:534793444c60 53 }
hudakz 2:534793444c60 54
hudakz 2:534793444c60 55 RCC_ClkInitTypeDef RCC_ClkInitStruct;
hudakz 2:534793444c60 56
hudakz 2:534793444c60 57 RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
hudakz 2:534793444c60 58 |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
hudakz 2:534793444c60 59 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
hudakz 2:534793444c60 60 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
hudakz 2:534793444c60 61 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
hudakz 2:534793444c60 62 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
hudakz 2:534793444c60 63 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
hudakz 2:534793444c60 64 return false;
hudakz 2:534793444c60 65 }
hudakz 2:534793444c60 66
hudakz 2:534793444c60 67 RCC_PeriphCLKInitTypeDef PeriphClkInit;
hudakz 2:534793444c60 68
hudakz 2:534793444c60 69 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
hudakz 2:534793444c60 70 switch(freq) {
hudakz 2:534793444c60 71 case 36:
hudakz 2:534793444c60 72 PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
hudakz 2:534793444c60 73 break;
hudakz 2:534793444c60 74 case 48:
hudakz 2:534793444c60 75 PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV4;
hudakz 2:534793444c60 76 break;
hudakz 2:534793444c60 77 default:
hudakz 2:534793444c60 78 PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
hudakz 2:534793444c60 79 }
hudakz 2:534793444c60 80 PeriphClkInit.UsbClockSelection = RCC_USBPLLCLK_DIV1;
hudakz 2:534793444c60 81 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
hudakz 2:534793444c60 82 return false;
hudakz 2:534793444c60 83 }
hudakz 2:534793444c60 84 return true;
hudakz 2:534793444c60 85 }
hudakz 2:534793444c60 86
hudakz 3:a92af4b1ffe1 87 bool confSysClock(int freq) {
hudakz 2:534793444c60 88 HAL_RCC_DeInit();
hudakz 2:534793444c60 89 if (!HSE_SystemClock_Config(freq)) {
hudakz 2:534793444c60 90 return false;
hudakz 2:534793444c60 91 }
hudakz 2:534793444c60 92 SystemCoreClockUpdate();
hudakz 2:534793444c60 93 return true;
hudakz 2:534793444c60 94 }
hudakz 2:534793444c60 95
hudakz 2:534793444c60 96