Carter Sharer
This one compatable with brobot V3, V4, Lab6 Part 3. first commit to BroBot
Fork of
MPU6050_V3
by 
Carter Sharer
MPU6050.h@12:67002f623f48, 2016-11-11 (annotated)
- Committer:
- csharer
- Date:
- Fri Nov 11 19:20:34 2016 +0000
- Revision:
- 12:67002f623f48
- Parent:
- 8:4ee054567b6c
fixed
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| garfieldsg | 0:662207e34fba | 1 | #ifndef _MPU6050_H_ |
| garfieldsg | 0:662207e34fba | 2 | #define _MPU6050_H_ |
| garfieldsg | 0:662207e34fba | 3 | |
| garfieldsg | 0:662207e34fba | 4 | #include "I2Cdev.h" |
| syundo0730 | 6:f38dfe62d74c | 5 | |
| syundo0730 | 6:f38dfe62d74c | 6 | // supporting link: http://forum.arduino.cc/index.php?&topic=143444.msg1079517#msg1079517 |
| syundo0730 | 6:f38dfe62d74c | 7 | // also: http://forum.arduino.cc/index.php?&topic=141571.msg1062899#msg1062899s |
| syundo0730 | 7:d5845b617139 | 8 | |
| syundo0730 | 7:d5845b617139 | 9 | #ifdef __AVR__ |
| syundo0730 | 6:f38dfe62d74c | 10 | #include <avr/pgmspace.h> |
| syundo0730 | 6:f38dfe62d74c | 11 | #else |
| syundo0730 | 6:f38dfe62d74c | 12 | #define PROGMEM /* empty */ |
| syundo0730 | 8:4ee054567b6c | 13 | #define pgm_read_byte(x) (*(x)) |
| syundo0730 | 8:4ee054567b6c | 14 | #define pgm_read_word(x) (*(x)) |
| syundo0730 | 8:4ee054567b6c | 15 | #define pgm_read_float(x) (*(x)) |
| syundo0730 | 8:4ee054567b6c | 16 | #define PSTR(STR) STR |
| syundo0730 | 6:f38dfe62d74c | 17 | #endif |
| syundo0730 | 6:f38dfe62d74c | 18 | |
| garfieldsg | 0:662207e34fba | 19 | |
| garfieldsg | 0:662207e34fba | 20 | #define MPU6050_ADDRESS_AD0_LOW 0x68 // address pin low (GND), default for InvenSense evaluation board |
| garfieldsg | 0:662207e34fba | 21 | #define MPU6050_ADDRESS_AD0_HIGH 0x69 // address pin high (VCC) |
| garfieldsg | 0:662207e34fba | 22 | #define MPU6050_DEFAULT_ADDRESS MPU6050_ADDRESS_AD0_LOW |
| garfieldsg | 0:662207e34fba | 23 | |
| garfieldsg | 0:662207e34fba | 24 | #define MPU6050_RA_XG_OFFS_TC 0x00 //[7] PWR_MODE, [6:1] XG_OFFS_TC, [0] OTP_BNK_VLD |
| garfieldsg | 0:662207e34fba | 25 | #define MPU6050_RA_YG_OFFS_TC 0x01 //[7] PWR_MODE, [6:1] YG_OFFS_TC, [0] OTP_BNK_VLD |
| garfieldsg | 0:662207e34fba | 26 | #define MPU6050_RA_ZG_OFFS_TC 0x02 //[7] PWR_MODE, [6:1] ZG_OFFS_TC, [0] OTP_BNK_VLD |
| garfieldsg | 0:662207e34fba | 27 | #define MPU6050_RA_X_FINE_GAIN 0x03 //[7:0] X_FINE_GAIN |
| garfieldsg | 0:662207e34fba | 28 | #define MPU6050_RA_Y_FINE_GAIN 0x04 //[7:0] Y_FINE_GAIN |
| garfieldsg | 0:662207e34fba | 29 | #define MPU6050_RA_Z_FINE_GAIN 0x05 //[7:0] Z_FINE_GAIN |
| garfieldsg | 0:662207e34fba | 30 | #define MPU6050_RA_XA_OFFS_H 0x06 //[15:0] XA_OFFS |
| garfieldsg | 0:662207e34fba | 31 | #define MPU6050_RA_XA_OFFS_L_TC 0x07 |
| garfieldsg | 0:662207e34fba | 32 | #define MPU6050_RA_YA_OFFS_H 0x08 //[15:0] YA_OFFS |
| garfieldsg | 0:662207e34fba | 33 | #define MPU6050_RA_YA_OFFS_L_TC 0x09 |
| garfieldsg | 0:662207e34fba | 34 | #define MPU6050_RA_ZA_OFFS_H 0x0A //[15:0] ZA_OFFS |
| garfieldsg | 0:662207e34fba | 35 | #define MPU6050_RA_ZA_OFFS_L_TC 0x0B |
| syundo0730 | 7:d5845b617139 | 36 | #define MPU6050_RA_SELF_TEST_X 0x0D //[7:5] XA_TEST[4-2], [4:0] XG_TEST[4-0] |
| syundo0730 | 7:d5845b617139 | 37 | #define MPU6050_RA_SELF_TEST_Y 0x0E //[7:5] YA_TEST[4-2], [4:0] YG_TEST[4-0] |
| syundo0730 | 7:d5845b617139 | 38 | #define MPU6050_RA_SELF_TEST_Z 0x0F //[7:5] ZA_TEST[4-2], [4:0] ZG_TEST[4-0] |
| syundo0730 | 7:d5845b617139 | 39 | #define MPU6050_RA_SELF_TEST_A 0x10 //[5:4] XA_TEST[1-0], [3:2] YA_TEST[1-0], [1:0] ZA_TEST[1-0] |
| garfieldsg | 0:662207e34fba | 40 | #define MPU6050_RA_XG_OFFS_USRH 0x13 //[15:0] XG_OFFS_USR |
| garfieldsg | 0:662207e34fba | 41 | #define MPU6050_RA_XG_OFFS_USRL 0x14 |
| garfieldsg | 0:662207e34fba | 42 | #define MPU6050_RA_YG_OFFS_USRH 0x15 //[15:0] YG_OFFS_USR |
| garfieldsg | 0:662207e34fba | 43 | #define MPU6050_RA_YG_OFFS_USRL 0x16 |
| garfieldsg | 0:662207e34fba | 44 | #define MPU6050_RA_ZG_OFFS_USRH 0x17 //[15:0] ZG_OFFS_USR |
| garfieldsg | 0:662207e34fba | 45 | #define MPU6050_RA_ZG_OFFS_USRL 0x18 |
| garfieldsg | 0:662207e34fba | 46 | #define MPU6050_RA_SMPLRT_DIV 0x19 |
| garfieldsg | 0:662207e34fba | 47 | #define MPU6050_RA_CONFIG 0x1A |
| garfieldsg | 0:662207e34fba | 48 | #define MPU6050_RA_GYRO_CONFIG 0x1B |
| garfieldsg | 0:662207e34fba | 49 | #define MPU6050_RA_ACCEL_CONFIG 0x1C |
| garfieldsg | 0:662207e34fba | 50 | #define MPU6050_RA_FF_THR 0x1D |
| garfieldsg | 0:662207e34fba | 51 | #define MPU6050_RA_FF_DUR 0x1E |
| garfieldsg | 0:662207e34fba | 52 | #define MPU6050_RA_MOT_THR 0x1F |
| garfieldsg | 0:662207e34fba | 53 | #define MPU6050_RA_MOT_DUR 0x20 |
| garfieldsg | 0:662207e34fba | 54 | #define MPU6050_RA_ZRMOT_THR 0x21 |
| garfieldsg | 0:662207e34fba | 55 | #define MPU6050_RA_ZRMOT_DUR 0x22 |
| garfieldsg | 0:662207e34fba | 56 | #define MPU6050_RA_FIFO_EN 0x23 |
| garfieldsg | 0:662207e34fba | 57 | #define MPU6050_RA_I2C_MST_CTRL 0x24 |
| garfieldsg | 0:662207e34fba | 58 | #define MPU6050_RA_I2C_SLV0_ADDR 0x25 |
| garfieldsg | 0:662207e34fba | 59 | #define MPU6050_RA_I2C_SLV0_REG 0x26 |
| garfieldsg | 0:662207e34fba | 60 | #define MPU6050_RA_I2C_SLV0_CTRL 0x27 |
| garfieldsg | 0:662207e34fba | 61 | #define MPU6050_RA_I2C_SLV1_ADDR 0x28 |
| garfieldsg | 0:662207e34fba | 62 | #define MPU6050_RA_I2C_SLV1_REG 0x29 |
| garfieldsg | 0:662207e34fba | 63 | #define MPU6050_RA_I2C_SLV1_CTRL 0x2A |
| garfieldsg | 0:662207e34fba | 64 | #define MPU6050_RA_I2C_SLV2_ADDR 0x2B |
| garfieldsg | 0:662207e34fba | 65 | #define MPU6050_RA_I2C_SLV2_REG 0x2C |
| garfieldsg | 0:662207e34fba | 66 | #define MPU6050_RA_I2C_SLV2_CTRL 0x2D |
| garfieldsg | 0:662207e34fba | 67 | #define MPU6050_RA_I2C_SLV3_ADDR 0x2E |
| garfieldsg | 0:662207e34fba | 68 | #define MPU6050_RA_I2C_SLV3_REG 0x2F |
| garfieldsg | 0:662207e34fba | 69 | #define MPU6050_RA_I2C_SLV3_CTRL 0x30 |
| garfieldsg | 0:662207e34fba | 70 | #define MPU6050_RA_I2C_SLV4_ADDR 0x31 |
| garfieldsg | 0:662207e34fba | 71 | #define MPU6050_RA_I2C_SLV4_REG 0x32 |
| garfieldsg | 0:662207e34fba | 72 | #define MPU6050_RA_I2C_SLV4_DO 0x33 |
| garfieldsg | 0:662207e34fba | 73 | #define MPU6050_RA_I2C_SLV4_CTRL 0x34 |
| garfieldsg | 0:662207e34fba | 74 | #define MPU6050_RA_I2C_SLV4_DI 0x35 |
| garfieldsg | 0:662207e34fba | 75 | #define MPU6050_RA_I2C_MST_STATUS 0x36 |
| garfieldsg | 0:662207e34fba | 76 | #define MPU6050_RA_INT_PIN_CFG 0x37 |
| garfieldsg | 0:662207e34fba | 77 | #define MPU6050_RA_INT_ENABLE 0x38 |
| garfieldsg | 0:662207e34fba | 78 | #define MPU6050_RA_DMP_INT_STATUS 0x39 |
| garfieldsg | 0:662207e34fba | 79 | #define MPU6050_RA_INT_STATUS 0x3A |
| garfieldsg | 0:662207e34fba | 80 | #define MPU6050_RA_ACCEL_XOUT_H 0x3B |
| garfieldsg | 0:662207e34fba | 81 | #define MPU6050_RA_ACCEL_XOUT_L 0x3C |
| garfieldsg | 0:662207e34fba | 82 | #define MPU6050_RA_ACCEL_YOUT_H 0x3D |
| garfieldsg | 0:662207e34fba | 83 | #define MPU6050_RA_ACCEL_YOUT_L 0x3E |
| garfieldsg | 0:662207e34fba | 84 | #define MPU6050_RA_ACCEL_ZOUT_H 0x3F |
| garfieldsg | 0:662207e34fba | 85 | #define MPU6050_RA_ACCEL_ZOUT_L 0x40 |
| garfieldsg | 0:662207e34fba | 86 | #define MPU6050_RA_TEMP_OUT_H 0x41 |
| garfieldsg | 0:662207e34fba | 87 | #define MPU6050_RA_TEMP_OUT_L 0x42 |
| garfieldsg | 0:662207e34fba | 88 | #define MPU6050_RA_GYRO_XOUT_H 0x43 |
| garfieldsg | 0:662207e34fba | 89 | #define MPU6050_RA_GYRO_XOUT_L 0x44 |
| garfieldsg | 0:662207e34fba | 90 | #define MPU6050_RA_GYRO_YOUT_H 0x45 |
| garfieldsg | 0:662207e34fba | 91 | #define MPU6050_RA_GYRO_YOUT_L 0x46 |
| garfieldsg | 0:662207e34fba | 92 | #define MPU6050_RA_GYRO_ZOUT_H 0x47 |
| garfieldsg | 0:662207e34fba | 93 | #define MPU6050_RA_GYRO_ZOUT_L 0x48 |
| garfieldsg | 0:662207e34fba | 94 | #define MPU6050_RA_EXT_SENS_DATA_00 0x49 |
| garfieldsg | 0:662207e34fba | 95 | #define MPU6050_RA_EXT_SENS_DATA_01 0x4A |
| garfieldsg | 0:662207e34fba | 96 | #define MPU6050_RA_EXT_SENS_DATA_02 0x4B |
| garfieldsg | 0:662207e34fba | 97 | #define MPU6050_RA_EXT_SENS_DATA_03 0x4C |
| garfieldsg | 0:662207e34fba | 98 | #define MPU6050_RA_EXT_SENS_DATA_04 0x4D |
| garfieldsg | 0:662207e34fba | 99 | #define MPU6050_RA_EXT_SENS_DATA_05 0x4E |
| garfieldsg | 0:662207e34fba | 100 | #define MPU6050_RA_EXT_SENS_DATA_06 0x4F |
| garfieldsg | 0:662207e34fba | 101 | #define MPU6050_RA_EXT_SENS_DATA_07 0x50 |
| garfieldsg | 0:662207e34fba | 102 | #define MPU6050_RA_EXT_SENS_DATA_08 0x51 |
| garfieldsg | 0:662207e34fba | 103 | #define MPU6050_RA_EXT_SENS_DATA_09 0x52 |
| garfieldsg | 0:662207e34fba | 104 | #define MPU6050_RA_EXT_SENS_DATA_10 0x53 |
| garfieldsg | 0:662207e34fba | 105 | #define MPU6050_RA_EXT_SENS_DATA_11 0x54 |
| garfieldsg | 0:662207e34fba | 106 | #define MPU6050_RA_EXT_SENS_DATA_12 0x55 |
| garfieldsg | 0:662207e34fba | 107 | #define MPU6050_RA_EXT_SENS_DATA_13 0x56 |
| garfieldsg | 0:662207e34fba | 108 | #define MPU6050_RA_EXT_SENS_DATA_14 0x57 |
| garfieldsg | 0:662207e34fba | 109 | #define MPU6050_RA_EXT_SENS_DATA_15 0x58 |
| garfieldsg | 0:662207e34fba | 110 | #define MPU6050_RA_EXT_SENS_DATA_16 0x59 |
| garfieldsg | 0:662207e34fba | 111 | #define MPU6050_RA_EXT_SENS_DATA_17 0x5A |
| garfieldsg | 0:662207e34fba | 112 | #define MPU6050_RA_EXT_SENS_DATA_18 0x5B |
| garfieldsg | 0:662207e34fba | 113 | #define MPU6050_RA_EXT_SENS_DATA_19 0x5C |
| garfieldsg | 0:662207e34fba | 114 | #define MPU6050_RA_EXT_SENS_DATA_20 0x5D |
| garfieldsg | 0:662207e34fba | 115 | #define MPU6050_RA_EXT_SENS_DATA_21 0x5E |
| garfieldsg | 0:662207e34fba | 116 | #define MPU6050_RA_EXT_SENS_DATA_22 0x5F |
| garfieldsg | 0:662207e34fba | 117 | #define MPU6050_RA_EXT_SENS_DATA_23 0x60 |
| garfieldsg | 0:662207e34fba | 118 | #define MPU6050_RA_MOT_DETECT_STATUS 0x61 |
| garfieldsg | 0:662207e34fba | 119 | #define MPU6050_RA_I2C_SLV0_DO 0x63 |
| garfieldsg | 0:662207e34fba | 120 | #define MPU6050_RA_I2C_SLV1_DO 0x64 |
| garfieldsg | 0:662207e34fba | 121 | #define MPU6050_RA_I2C_SLV2_DO 0x65 |
| garfieldsg | 0:662207e34fba | 122 | #define MPU6050_RA_I2C_SLV3_DO 0x66 |
| garfieldsg | 0:662207e34fba | 123 | #define MPU6050_RA_I2C_MST_DELAY_CTRL 0x67 |
| garfieldsg | 0:662207e34fba | 124 | #define MPU6050_RA_SIGNAL_PATH_RESET 0x68 |
| garfieldsg | 0:662207e34fba | 125 | #define MPU6050_RA_MOT_DETECT_CTRL 0x69 |
| garfieldsg | 0:662207e34fba | 126 | #define MPU6050_RA_USER_CTRL 0x6A |
| garfieldsg | 0:662207e34fba | 127 | #define MPU6050_RA_PWR_MGMT_1 0x6B |
| garfieldsg | 0:662207e34fba | 128 | #define MPU6050_RA_PWR_MGMT_2 0x6C |
| garfieldsg | 0:662207e34fba | 129 | #define MPU6050_RA_BANK_SEL 0x6D |
| garfieldsg | 0:662207e34fba | 130 | #define MPU6050_RA_MEM_START_ADDR 0x6E |
| garfieldsg | 0:662207e34fba | 131 | #define MPU6050_RA_MEM_R_W 0x6F |
| garfieldsg | 0:662207e34fba | 132 | #define MPU6050_RA_DMP_CFG_1 0x70 |
| garfieldsg | 0:662207e34fba | 133 | #define MPU6050_RA_DMP_CFG_2 0x71 |
| garfieldsg | 0:662207e34fba | 134 | #define MPU6050_RA_FIFO_COUNTH 0x72 |
| garfieldsg | 0:662207e34fba | 135 | #define MPU6050_RA_FIFO_COUNTL 0x73 |
| garfieldsg | 0:662207e34fba | 136 | #define MPU6050_RA_FIFO_R_W 0x74 |
| garfieldsg | 0:662207e34fba | 137 | #define MPU6050_RA_WHO_AM_I 0x75 |
| garfieldsg | 0:662207e34fba | 138 | |
| syundo0730 | 7:d5845b617139 | 139 | #define MPU6050_SELF_TEST_XA_1_BIT 0x07 |
| syundo0730 | 7:d5845b617139 | 140 | #define MPU6050_SELF_TEST_XA_1_LENGTH 0x03 |
| syundo0730 | 7:d5845b617139 | 141 | #define MPU6050_SELF_TEST_XA_2_BIT 0x05 |
| syundo0730 | 7:d5845b617139 | 142 | #define MPU6050_SELF_TEST_XA_2_LENGTH 0x02 |
| syundo0730 | 7:d5845b617139 | 143 | #define MPU6050_SELF_TEST_YA_1_BIT 0x07 |
| syundo0730 | 7:d5845b617139 | 144 | #define MPU6050_SELF_TEST_YA_1_LENGTH 0x03 |
| syundo0730 | 7:d5845b617139 | 145 | #define MPU6050_SELF_TEST_YA_2_BIT 0x03 |
| syundo0730 | 7:d5845b617139 | 146 | #define MPU6050_SELF_TEST_YA_2_LENGTH 0x02 |
| syundo0730 | 7:d5845b617139 | 147 | #define MPU6050_SELF_TEST_ZA_1_BIT 0x07 |
| syundo0730 | 7:d5845b617139 | 148 | #define MPU6050_SELF_TEST_ZA_1_LENGTH 0x03 |
| syundo0730 | 7:d5845b617139 | 149 | #define MPU6050_SELF_TEST_ZA_2_BIT 0x01 |
| syundo0730 | 7:d5845b617139 | 150 | #define MPU6050_SELF_TEST_ZA_2_LENGTH 0x02 |
| syundo0730 | 7:d5845b617139 | 151 | |
| syundo0730 | 7:d5845b617139 | 152 | #define MPU6050_SELF_TEST_XG_1_BIT 0x04 |
| syundo0730 | 7:d5845b617139 | 153 | #define MPU6050_SELF_TEST_XG_1_LENGTH 0x05 |
| syundo0730 | 7:d5845b617139 | 154 | #define MPU6050_SELF_TEST_YG_1_BIT 0x04 |
| syundo0730 | 7:d5845b617139 | 155 | #define MPU6050_SELF_TEST_YG_1_LENGTH 0x05 |
| syundo0730 | 7:d5845b617139 | 156 | #define MPU6050_SELF_TEST_ZG_1_BIT 0x04 |
| syundo0730 | 7:d5845b617139 | 157 | #define MPU6050_SELF_TEST_ZG_1_LENGTH 0x05 |
| syundo0730 | 7:d5845b617139 | 158 | |
| garfieldsg | 0:662207e34fba | 159 | #define MPU6050_TC_PWR_MODE_BIT 7 |
| garfieldsg | 0:662207e34fba | 160 | #define MPU6050_TC_OFFSET_BIT 6 |
| garfieldsg | 0:662207e34fba | 161 | #define MPU6050_TC_OFFSET_LENGTH 6 |
| garfieldsg | 0:662207e34fba | 162 | #define MPU6050_TC_OTP_BNK_VLD_BIT 0 |
| garfieldsg | 0:662207e34fba | 163 | |
| garfieldsg | 0:662207e34fba | 164 | #define MPU6050_VDDIO_LEVEL_VLOGIC 0 |
| garfieldsg | 0:662207e34fba | 165 | #define MPU6050_VDDIO_LEVEL_VDD 1 |
| garfieldsg | 0:662207e34fba | 166 | |
| garfieldsg | 0:662207e34fba | 167 | #define MPU6050_CFG_EXT_SYNC_SET_BIT 5 |
| garfieldsg | 0:662207e34fba | 168 | #define MPU6050_CFG_EXT_SYNC_SET_LENGTH 3 |
| garfieldsg | 0:662207e34fba | 169 | #define MPU6050_CFG_DLPF_CFG_BIT 2 |
| garfieldsg | 0:662207e34fba | 170 | #define MPU6050_CFG_DLPF_CFG_LENGTH 3 |
| garfieldsg | 0:662207e34fba | 171 | |
| garfieldsg | 0:662207e34fba | 172 | #define MPU6050_EXT_SYNC_DISABLED 0x0 |
| garfieldsg | 0:662207e34fba | 173 | #define MPU6050_EXT_SYNC_TEMP_OUT_L 0x1 |
| garfieldsg | 0:662207e34fba | 174 | #define MPU6050_EXT_SYNC_GYRO_XOUT_L 0x2 |
| garfieldsg | 0:662207e34fba | 175 | #define MPU6050_EXT_SYNC_GYRO_YOUT_L 0x3 |
| garfieldsg | 0:662207e34fba | 176 | #define MPU6050_EXT_SYNC_GYRO_ZOUT_L 0x4 |
| garfieldsg | 0:662207e34fba | 177 | #define MPU6050_EXT_SYNC_ACCEL_XOUT_L 0x5 |
| garfieldsg | 0:662207e34fba | 178 | #define MPU6050_EXT_SYNC_ACCEL_YOUT_L 0x6 |
| garfieldsg | 0:662207e34fba | 179 | #define MPU6050_EXT_SYNC_ACCEL_ZOUT_L 0x7 |
| garfieldsg | 0:662207e34fba | 180 | |
| garfieldsg | 0:662207e34fba | 181 | #define MPU6050_DLPF_BW_256 0x00 |
| garfieldsg | 0:662207e34fba | 182 | #define MPU6050_DLPF_BW_188 0x01 |
| garfieldsg | 0:662207e34fba | 183 | #define MPU6050_DLPF_BW_98 0x02 |
| garfieldsg | 0:662207e34fba | 184 | #define MPU6050_DLPF_BW_42 0x03 |
| garfieldsg | 0:662207e34fba | 185 | #define MPU6050_DLPF_BW_20 0x04 |
| garfieldsg | 0:662207e34fba | 186 | #define MPU6050_DLPF_BW_10 0x05 |
| garfieldsg | 0:662207e34fba | 187 | #define MPU6050_DLPF_BW_5 0x06 |
| garfieldsg | 0:662207e34fba | 188 | |
| garfieldsg | 0:662207e34fba | 189 | #define MPU6050_GCONFIG_FS_SEL_BIT 4 |
| garfieldsg | 0:662207e34fba | 190 | #define MPU6050_GCONFIG_FS_SEL_LENGTH 2 |
| garfieldsg | 0:662207e34fba | 191 | |
| garfieldsg | 0:662207e34fba | 192 | #define MPU6050_GYRO_FS_250 0x00 |
| garfieldsg | 0:662207e34fba | 193 | #define MPU6050_GYRO_FS_500 0x01 |
| garfieldsg | 0:662207e34fba | 194 | #define MPU6050_GYRO_FS_1000 0x02 |
| garfieldsg | 0:662207e34fba | 195 | #define MPU6050_GYRO_FS_2000 0x03 |
| garfieldsg | 0:662207e34fba | 196 | |
| garfieldsg | 0:662207e34fba | 197 | #define MPU6050_ACONFIG_XA_ST_BIT 7 |
| garfieldsg | 0:662207e34fba | 198 | #define MPU6050_ACONFIG_YA_ST_BIT 6 |
| garfieldsg | 0:662207e34fba | 199 | #define MPU6050_ACONFIG_ZA_ST_BIT 5 |
| garfieldsg | 0:662207e34fba | 200 | #define MPU6050_ACONFIG_AFS_SEL_BIT 4 |
| garfieldsg | 0:662207e34fba | 201 | #define MPU6050_ACONFIG_AFS_SEL_LENGTH 2 |
| garfieldsg | 0:662207e34fba | 202 | #define MPU6050_ACONFIG_ACCEL_HPF_BIT 2 |
| garfieldsg | 0:662207e34fba | 203 | #define MPU6050_ACONFIG_ACCEL_HPF_LENGTH 3 |
| garfieldsg | 0:662207e34fba | 204 | |
| garfieldsg | 0:662207e34fba | 205 | #define MPU6050_ACCEL_FS_2 0x00 |
| garfieldsg | 0:662207e34fba | 206 | #define MPU6050_ACCEL_FS_4 0x01 |
| garfieldsg | 0:662207e34fba | 207 | #define MPU6050_ACCEL_FS_8 0x02 |
| garfieldsg | 0:662207e34fba | 208 | #define MPU6050_ACCEL_FS_16 0x03 |
| garfieldsg | 0:662207e34fba | 209 | |
| garfieldsg | 0:662207e34fba | 210 | #define MPU6050_DHPF_RESET 0x00 |
| garfieldsg | 0:662207e34fba | 211 | #define MPU6050_DHPF_5 0x01 |
| garfieldsg | 0:662207e34fba | 212 | #define MPU6050_DHPF_2P5 0x02 |
| garfieldsg | 0:662207e34fba | 213 | #define MPU6050_DHPF_1P25 0x03 |
| garfieldsg | 0:662207e34fba | 214 | #define MPU6050_DHPF_0P63 0x04 |
| garfieldsg | 0:662207e34fba | 215 | #define MPU6050_DHPF_HOLD 0x07 |
| garfieldsg | 0:662207e34fba | 216 | |
| garfieldsg | 0:662207e34fba | 217 | #define MPU6050_TEMP_FIFO_EN_BIT 7 |
| garfieldsg | 0:662207e34fba | 218 | #define MPU6050_XG_FIFO_EN_BIT 6 |
| garfieldsg | 0:662207e34fba | 219 | #define MPU6050_YG_FIFO_EN_BIT 5 |
| garfieldsg | 0:662207e34fba | 220 | #define MPU6050_ZG_FIFO_EN_BIT 4 |
| garfieldsg | 0:662207e34fba | 221 | #define MPU6050_ACCEL_FIFO_EN_BIT 3 |
| garfieldsg | 0:662207e34fba | 222 | #define MPU6050_SLV2_FIFO_EN_BIT 2 |
| garfieldsg | 0:662207e34fba | 223 | #define MPU6050_SLV1_FIFO_EN_BIT 1 |
| garfieldsg | 0:662207e34fba | 224 | #define MPU6050_SLV0_FIFO_EN_BIT 0 |
| garfieldsg | 0:662207e34fba | 225 | |
| garfieldsg | 0:662207e34fba | 226 | #define MPU6050_MULT_MST_EN_BIT 7 |
| garfieldsg | 0:662207e34fba | 227 | #define MPU6050_WAIT_FOR_ES_BIT 6 |
| garfieldsg | 0:662207e34fba | 228 | #define MPU6050_SLV_3_FIFO_EN_BIT 5 |
| garfieldsg | 0:662207e34fba | 229 | #define MPU6050_I2C_MST_P_NSR_BIT 4 |
| garfieldsg | 0:662207e34fba | 230 | #define MPU6050_I2C_MST_CLK_BIT 3 |
| garfieldsg | 0:662207e34fba | 231 | #define MPU6050_I2C_MST_CLK_LENGTH 4 |
| garfieldsg | 0:662207e34fba | 232 | |
| garfieldsg | 0:662207e34fba | 233 | #define MPU6050_CLOCK_DIV_348 0x0 |
| garfieldsg | 0:662207e34fba | 234 | #define MPU6050_CLOCK_DIV_333 0x1 |
| garfieldsg | 0:662207e34fba | 235 | #define MPU6050_CLOCK_DIV_320 0x2 |
| garfieldsg | 0:662207e34fba | 236 | #define MPU6050_CLOCK_DIV_308 0x3 |
| garfieldsg | 0:662207e34fba | 237 | #define MPU6050_CLOCK_DIV_296 0x4 |
| garfieldsg | 0:662207e34fba | 238 | #define MPU6050_CLOCK_DIV_286 0x5 |
| garfieldsg | 0:662207e34fba | 239 | #define MPU6050_CLOCK_DIV_276 0x6 |
| garfieldsg | 0:662207e34fba | 240 | #define MPU6050_CLOCK_DIV_267 0x7 |
| garfieldsg | 0:662207e34fba | 241 | #define MPU6050_CLOCK_DIV_258 0x8 |
| garfieldsg | 0:662207e34fba | 242 | #define MPU6050_CLOCK_DIV_500 0x9 |
| garfieldsg | 0:662207e34fba | 243 | #define MPU6050_CLOCK_DIV_471 0xA |
| garfieldsg | 0:662207e34fba | 244 | #define MPU6050_CLOCK_DIV_444 0xB |
| garfieldsg | 0:662207e34fba | 245 | #define MPU6050_CLOCK_DIV_421 0xC |
| garfieldsg | 0:662207e34fba | 246 | #define MPU6050_CLOCK_DIV_400 0xD |
| garfieldsg | 0:662207e34fba | 247 | #define MPU6050_CLOCK_DIV_381 0xE |
| garfieldsg | 0:662207e34fba | 248 | #define MPU6050_CLOCK_DIV_364 0xF |
| garfieldsg | 0:662207e34fba | 249 | |
| garfieldsg | 0:662207e34fba | 250 | #define MPU6050_I2C_SLV_RW_BIT 7 |
| garfieldsg | 0:662207e34fba | 251 | #define MPU6050_I2C_SLV_ADDR_BIT 6 |
| garfieldsg | 0:662207e34fba | 252 | #define MPU6050_I2C_SLV_ADDR_LENGTH 7 |
| garfieldsg | 0:662207e34fba | 253 | #define MPU6050_I2C_SLV_EN_BIT 7 |
| garfieldsg | 0:662207e34fba | 254 | #define MPU6050_I2C_SLV_BYTE_SW_BIT 6 |
| garfieldsg | 0:662207e34fba | 255 | #define MPU6050_I2C_SLV_REG_DIS_BIT 5 |
| garfieldsg | 0:662207e34fba | 256 | #define MPU6050_I2C_SLV_GRP_BIT 4 |
| garfieldsg | 0:662207e34fba | 257 | #define MPU6050_I2C_SLV_LEN_BIT 3 |
| garfieldsg | 0:662207e34fba | 258 | #define MPU6050_I2C_SLV_LEN_LENGTH 4 |
| garfieldsg | 0:662207e34fba | 259 | |
| garfieldsg | 0:662207e34fba | 260 | #define MPU6050_I2C_SLV4_RW_BIT 7 |
| garfieldsg | 0:662207e34fba | 261 | #define MPU6050_I2C_SLV4_ADDR_BIT 6 |
| garfieldsg | 0:662207e34fba | 262 | #define MPU6050_I2C_SLV4_ADDR_LENGTH 7 |
| garfieldsg | 0:662207e34fba | 263 | #define MPU6050_I2C_SLV4_EN_BIT 7 |
| garfieldsg | 0:662207e34fba | 264 | #define MPU6050_I2C_SLV4_INT_EN_BIT 6 |
| garfieldsg | 0:662207e34fba | 265 | #define MPU6050_I2C_SLV4_REG_DIS_BIT 5 |
| garfieldsg | 0:662207e34fba | 266 | #define MPU6050_I2C_SLV4_MST_DLY_BIT 4 |
| garfieldsg | 0:662207e34fba | 267 | #define MPU6050_I2C_SLV4_MST_DLY_LENGTH 5 |
| garfieldsg | 0:662207e34fba | 268 | |
| garfieldsg | 0:662207e34fba | 269 | #define MPU6050_MST_PASS_THROUGH_BIT 7 |
| garfieldsg | 0:662207e34fba | 270 | #define MPU6050_MST_I2C_SLV4_DONE_BIT 6 |
| garfieldsg | 0:662207e34fba | 271 | #define MPU6050_MST_I2C_LOST_ARB_BIT 5 |
| garfieldsg | 0:662207e34fba | 272 | #define MPU6050_MST_I2C_SLV4_NACK_BIT 4 |
| garfieldsg | 0:662207e34fba | 273 | #define MPU6050_MST_I2C_SLV3_NACK_BIT 3 |
| garfieldsg | 0:662207e34fba | 274 | #define MPU6050_MST_I2C_SLV2_NACK_BIT 2 |
| garfieldsg | 0:662207e34fba | 275 | #define MPU6050_MST_I2C_SLV1_NACK_BIT 1 |
| garfieldsg | 0:662207e34fba | 276 | #define MPU6050_MST_I2C_SLV0_NACK_BIT 0 |
| garfieldsg | 0:662207e34fba | 277 | |
| garfieldsg | 0:662207e34fba | 278 | #define MPU6050_INTCFG_INT_LEVEL_BIT 7 |
| garfieldsg | 0:662207e34fba | 279 | #define MPU6050_INTCFG_INT_OPEN_BIT 6 |
| garfieldsg | 0:662207e34fba | 280 | #define MPU6050_INTCFG_LATCH_INT_EN_BIT 5 |
| garfieldsg | 0:662207e34fba | 281 | #define MPU6050_INTCFG_INT_RD_CLEAR_BIT 4 |
| garfieldsg | 0:662207e34fba | 282 | #define MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT 3 |
| garfieldsg | 0:662207e34fba | 283 | #define MPU6050_INTCFG_FSYNC_INT_EN_BIT 2 |
| garfieldsg | 0:662207e34fba | 284 | #define MPU6050_INTCFG_I2C_BYPASS_EN_BIT 1 |
| garfieldsg | 0:662207e34fba | 285 | #define MPU6050_INTCFG_CLKOUT_EN_BIT 0 |
| garfieldsg | 0:662207e34fba | 286 | |
| garfieldsg | 0:662207e34fba | 287 | #define MPU6050_INTMODE_ACTIVEHIGH 0x00 |
| garfieldsg | 0:662207e34fba | 288 | #define MPU6050_INTMODE_ACTIVELOW 0x01 |
| garfieldsg | 0:662207e34fba | 289 | |
| garfieldsg | 0:662207e34fba | 290 | #define MPU6050_INTDRV_PUSHPULL 0x00 |
| garfieldsg | 0:662207e34fba | 291 | #define MPU6050_INTDRV_OPENDRAIN 0x01 |
| garfieldsg | 0:662207e34fba | 292 | |
| garfieldsg | 0:662207e34fba | 293 | #define MPU6050_INTLATCH_50USPULSE 0x00 |
| garfieldsg | 0:662207e34fba | 294 | #define MPU6050_INTLATCH_WAITCLEAR 0x01 |
| garfieldsg | 0:662207e34fba | 295 | |
| garfieldsg | 0:662207e34fba | 296 | #define MPU6050_INTCLEAR_STATUSREAD 0x00 |
| garfieldsg | 0:662207e34fba | 297 | #define MPU6050_INTCLEAR_ANYREAD 0x01 |
| garfieldsg | 0:662207e34fba | 298 | |
| garfieldsg | 0:662207e34fba | 299 | #define MPU6050_INTERRUPT_FF_BIT 7 |
| garfieldsg | 0:662207e34fba | 300 | #define MPU6050_INTERRUPT_MOT_BIT 6 |
| garfieldsg | 0:662207e34fba | 301 | #define MPU6050_INTERRUPT_ZMOT_BIT 5 |
| garfieldsg | 0:662207e34fba | 302 | #define MPU6050_INTERRUPT_FIFO_OFLOW_BIT 4 |
| garfieldsg | 0:662207e34fba | 303 | #define MPU6050_INTERRUPT_I2C_MST_INT_BIT 3 |
| garfieldsg | 0:662207e34fba | 304 | #define MPU6050_INTERRUPT_PLL_RDY_INT_BIT 2 |
| garfieldsg | 0:662207e34fba | 305 | #define MPU6050_INTERRUPT_DMP_INT_BIT 1 |
| garfieldsg | 0:662207e34fba | 306 | #define MPU6050_INTERRUPT_DATA_RDY_BIT 0 |
| garfieldsg | 0:662207e34fba | 307 | |
| garfieldsg | 0:662207e34fba | 308 | // TODO: figure out what these actually do |
| garfieldsg | 0:662207e34fba | 309 | // UMPL source code is not very obivous |
| garfieldsg | 0:662207e34fba | 310 | #define MPU6050_DMPINT_5_BIT 5 |
| garfieldsg | 0:662207e34fba | 311 | #define MPU6050_DMPINT_4_BIT 4 |
| garfieldsg | 0:662207e34fba | 312 | #define MPU6050_DMPINT_3_BIT 3 |
| garfieldsg | 0:662207e34fba | 313 | #define MPU6050_DMPINT_2_BIT 2 |
| garfieldsg | 0:662207e34fba | 314 | #define MPU6050_DMPINT_1_BIT 1 |
| garfieldsg | 0:662207e34fba | 315 | #define MPU6050_DMPINT_0_BIT 0 |
| garfieldsg | 0:662207e34fba | 316 | |
| garfieldsg | 0:662207e34fba | 317 | #define MPU6050_MOTION_MOT_XNEG_BIT 7 |
| garfieldsg | 0:662207e34fba | 318 | #define MPU6050_MOTION_MOT_XPOS_BIT 6 |
| garfieldsg | 0:662207e34fba | 319 | #define MPU6050_MOTION_MOT_YNEG_BIT 5 |
| garfieldsg | 0:662207e34fba | 320 | #define MPU6050_MOTION_MOT_YPOS_BIT 4 |
| garfieldsg | 0:662207e34fba | 321 | #define MPU6050_MOTION_MOT_ZNEG_BIT 3 |
| garfieldsg | 0:662207e34fba | 322 | #define MPU6050_MOTION_MOT_ZPOS_BIT 2 |
| garfieldsg | 0:662207e34fba | 323 | #define MPU6050_MOTION_MOT_ZRMOT_BIT 0 |
| garfieldsg | 0:662207e34fba | 324 | |
| garfieldsg | 0:662207e34fba | 325 | #define MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT 7 |
| garfieldsg | 0:662207e34fba | 326 | #define MPU6050_DELAYCTRL_I2C_SLV4_DLY_EN_BIT 4 |
| garfieldsg | 0:662207e34fba | 327 | #define MPU6050_DELAYCTRL_I2C_SLV3_DLY_EN_BIT 3 |
| garfieldsg | 0:662207e34fba | 328 | #define MPU6050_DELAYCTRL_I2C_SLV2_DLY_EN_BIT 2 |
| garfieldsg | 0:662207e34fba | 329 | #define MPU6050_DELAYCTRL_I2C_SLV1_DLY_EN_BIT 1 |
| garfieldsg | 0:662207e34fba | 330 | #define MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT 0 |
| garfieldsg | 0:662207e34fba | 331 | |
| garfieldsg | 0:662207e34fba | 332 | #define MPU6050_PATHRESET_GYRO_RESET_BIT 2 |
| garfieldsg | 0:662207e34fba | 333 | #define MPU6050_PATHRESET_ACCEL_RESET_BIT 1 |
| garfieldsg | 0:662207e34fba | 334 | #define MPU6050_PATHRESET_TEMP_RESET_BIT 0 |
| garfieldsg | 0:662207e34fba | 335 | |
| garfieldsg | 0:662207e34fba | 336 | #define MPU6050_DETECT_ACCEL_ON_DELAY_BIT 5 |
| garfieldsg | 0:662207e34fba | 337 | #define MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH 2 |
| garfieldsg | 0:662207e34fba | 338 | #define MPU6050_DETECT_FF_COUNT_BIT 3 |
| garfieldsg | 0:662207e34fba | 339 | #define MPU6050_DETECT_FF_COUNT_LENGTH 2 |
| garfieldsg | 0:662207e34fba | 340 | #define MPU6050_DETECT_MOT_COUNT_BIT 1 |
| garfieldsg | 0:662207e34fba | 341 | #define MPU6050_DETECT_MOT_COUNT_LENGTH 2 |
| garfieldsg | 0:662207e34fba | 342 | |
| garfieldsg | 0:662207e34fba | 343 | #define MPU6050_DETECT_DECREMENT_RESET 0x0 |
| garfieldsg | 0:662207e34fba | 344 | #define MPU6050_DETECT_DECREMENT_1 0x1 |
| garfieldsg | 0:662207e34fba | 345 | #define MPU6050_DETECT_DECREMENT_2 0x2 |
| garfieldsg | 0:662207e34fba | 346 | #define MPU6050_DETECT_DECREMENT_4 0x3 |
| garfieldsg | 0:662207e34fba | 347 | |
| garfieldsg | 0:662207e34fba | 348 | #define MPU6050_USERCTRL_DMP_EN_BIT 7 |
| garfieldsg | 0:662207e34fba | 349 | #define MPU6050_USERCTRL_FIFO_EN_BIT 6 |
| garfieldsg | 0:662207e34fba | 350 | #define MPU6050_USERCTRL_I2C_MST_EN_BIT 5 |
| garfieldsg | 0:662207e34fba | 351 | #define MPU6050_USERCTRL_I2C_IF_DIS_BIT 4 |
| garfieldsg | 0:662207e34fba | 352 | #define MPU6050_USERCTRL_DMP_RESET_BIT 3 |
| garfieldsg | 0:662207e34fba | 353 | #define MPU6050_USERCTRL_FIFO_RESET_BIT 2 |
| garfieldsg | 0:662207e34fba | 354 | #define MPU6050_USERCTRL_I2C_MST_RESET_BIT 1 |
| garfieldsg | 0:662207e34fba | 355 | #define MPU6050_USERCTRL_SIG_COND_RESET_BIT 0 |
| garfieldsg | 0:662207e34fba | 356 | |
| garfieldsg | 0:662207e34fba | 357 | #define MPU6050_PWR1_DEVICE_RESET_BIT 7 |
| garfieldsg | 0:662207e34fba | 358 | #define MPU6050_PWR1_SLEEP_BIT 6 |
| garfieldsg | 0:662207e34fba | 359 | #define MPU6050_PWR1_CYCLE_BIT 5 |
| garfieldsg | 0:662207e34fba | 360 | #define MPU6050_PWR1_TEMP_DIS_BIT 3 |
| garfieldsg | 0:662207e34fba | 361 | #define MPU6050_PWR1_CLKSEL_BIT 2 |
| garfieldsg | 0:662207e34fba | 362 | #define MPU6050_PWR1_CLKSEL_LENGTH 3 |
| garfieldsg | 0:662207e34fba | 363 | |
| garfieldsg | 0:662207e34fba | 364 | #define MPU6050_CLOCK_INTERNAL 0x00 |
| garfieldsg | 0:662207e34fba | 365 | #define MPU6050_CLOCK_PLL_XGYRO 0x01 |
| garfieldsg | 0:662207e34fba | 366 | #define MPU6050_CLOCK_PLL_YGYRO 0x02 |
| garfieldsg | 0:662207e34fba | 367 | #define MPU6050_CLOCK_PLL_ZGYRO 0x03 |
| garfieldsg | 0:662207e34fba | 368 | #define MPU6050_CLOCK_PLL_EXT32K 0x04 |
| garfieldsg | 0:662207e34fba | 369 | #define MPU6050_CLOCK_PLL_EXT19M 0x05 |
| garfieldsg | 0:662207e34fba | 370 | #define MPU6050_CLOCK_KEEP_RESET 0x07 |
| garfieldsg | 0:662207e34fba | 371 | |
| garfieldsg | 0:662207e34fba | 372 | #define MPU6050_PWR2_LP_WAKE_CTRL_BIT 7 |
| garfieldsg | 0:662207e34fba | 373 | #define MPU6050_PWR2_LP_WAKE_CTRL_LENGTH 2 |
| garfieldsg | 0:662207e34fba | 374 | #define MPU6050_PWR2_STBY_XA_BIT 5 |
| garfieldsg | 0:662207e34fba | 375 | #define MPU6050_PWR2_STBY_YA_BIT 4 |
| garfieldsg | 0:662207e34fba | 376 | #define MPU6050_PWR2_STBY_ZA_BIT 3 |
| garfieldsg | 0:662207e34fba | 377 | #define MPU6050_PWR2_STBY_XG_BIT 2 |
| garfieldsg | 0:662207e34fba | 378 | #define MPU6050_PWR2_STBY_YG_BIT 1 |
| garfieldsg | 0:662207e34fba | 379 | #define MPU6050_PWR2_STBY_ZG_BIT 0 |
| garfieldsg | 0:662207e34fba | 380 | |
| garfieldsg | 0:662207e34fba | 381 | #define MPU6050_WAKE_FREQ_1P25 0x0 |
| garfieldsg | 0:662207e34fba | 382 | #define MPU6050_WAKE_FREQ_2P5 0x1 |
| garfieldsg | 0:662207e34fba | 383 | #define MPU6050_WAKE_FREQ_5 0x2 |
| garfieldsg | 0:662207e34fba | 384 | #define MPU6050_WAKE_FREQ_10 0x3 |
| garfieldsg | 0:662207e34fba | 385 | |
| garfieldsg | 0:662207e34fba | 386 | #define MPU6050_BANKSEL_PRFTCH_EN_BIT 6 |
| garfieldsg | 0:662207e34fba | 387 | #define MPU6050_BANKSEL_CFG_USER_BANK_BIT 5 |
| garfieldsg | 0:662207e34fba | 388 | #define MPU6050_BANKSEL_MEM_SEL_BIT 4 |
| garfieldsg | 0:662207e34fba | 389 | #define MPU6050_BANKSEL_MEM_SEL_LENGTH 5 |
| garfieldsg | 0:662207e34fba | 390 | |
| garfieldsg | 0:662207e34fba | 391 | #define MPU6050_WHO_AM_I_BIT 6 |
| garfieldsg | 0:662207e34fba | 392 | #define MPU6050_WHO_AM_I_LENGTH 6 |
| garfieldsg | 0:662207e34fba | 393 | |
| garfieldsg | 0:662207e34fba | 394 | #define MPU6050_DMP_MEMORY_BANKS 8 |
| garfieldsg | 0:662207e34fba | 395 | #define MPU6050_DMP_MEMORY_BANK_SIZE 256 |
| garfieldsg | 0:662207e34fba | 396 | #define MPU6050_DMP_MEMORY_CHUNK_SIZE 16 |
| garfieldsg | 0:662207e34fba | 397 | |
| garfieldsg | 0:662207e34fba | 398 | // note: DMP code memory blocks defined at end of header file |
| garfieldsg | 0:662207e34fba | 399 | |
| garfieldsg | 0:662207e34fba | 400 | class MPU6050 { |
| garfieldsg | 0:662207e34fba | 401 | public: |
| garfieldsg | 0:662207e34fba | 402 | MPU6050(); |
| garfieldsg | 0:662207e34fba | 403 | MPU6050(uint8_t address); |
| garfieldsg | 0:662207e34fba | 404 | |
| garfieldsg | 0:662207e34fba | 405 | void initialize(); |
| garfieldsg | 0:662207e34fba | 406 | bool testConnection(); |
| garfieldsg | 0:662207e34fba | 407 | |
| garfieldsg | 0:662207e34fba | 408 | // AUX_VDDIO register |
| garfieldsg | 0:662207e34fba | 409 | uint8_t getAuxVDDIOLevel(); |
| garfieldsg | 0:662207e34fba | 410 | void setAuxVDDIOLevel(uint8_t level); |
| garfieldsg | 0:662207e34fba | 411 | |
| garfieldsg | 0:662207e34fba | 412 | // SMPLRT_DIV register |
| garfieldsg | 0:662207e34fba | 413 | uint8_t getRate(); |
| garfieldsg | 0:662207e34fba | 414 | void setRate(uint8_t rate); |
| garfieldsg | 0:662207e34fba | 415 | |
| garfieldsg | 0:662207e34fba | 416 | // CONFIG register |
| garfieldsg | 0:662207e34fba | 417 | uint8_t getExternalFrameSync(); |
| garfieldsg | 0:662207e34fba | 418 | void setExternalFrameSync(uint8_t sync); |
| garfieldsg | 0:662207e34fba | 419 | uint8_t getDLPFMode(); |
| garfieldsg | 0:662207e34fba | 420 | void setDLPFMode(uint8_t bandwidth); |
| garfieldsg | 0:662207e34fba | 421 | |
| garfieldsg | 0:662207e34fba | 422 | // GYRO_CONFIG register |
| garfieldsg | 0:662207e34fba | 423 | uint8_t getFullScaleGyroRange(); |
| garfieldsg | 0:662207e34fba | 424 | void setFullScaleGyroRange(uint8_t range); |
| garfieldsg | 0:662207e34fba | 425 | |
| syundo0730 | 7:d5845b617139 | 426 | // SELF_TEST registers |
| syundo0730 | 7:d5845b617139 | 427 | uint8_t getAccelXSelfTestFactoryTrim(); |
| syundo0730 | 7:d5845b617139 | 428 | uint8_t getAccelYSelfTestFactoryTrim(); |
| syundo0730 | 7:d5845b617139 | 429 | uint8_t getAccelZSelfTestFactoryTrim(); |
| syundo0730 | 7:d5845b617139 | 430 | |
| syundo0730 | 7:d5845b617139 | 431 | uint8_t getGyroXSelfTestFactoryTrim(); |
| syundo0730 | 7:d5845b617139 | 432 | uint8_t getGyroYSelfTestFactoryTrim(); |
| syundo0730 | 7:d5845b617139 | 433 | uint8_t getGyroZSelfTestFactoryTrim(); |
| syundo0730 | 7:d5845b617139 | 434 | |
| garfieldsg | 0:662207e34fba | 435 | // ACCEL_CONFIG register |
| garfieldsg | 0:662207e34fba | 436 | bool getAccelXSelfTest(); |
| garfieldsg | 0:662207e34fba | 437 | void setAccelXSelfTest(bool enabled); |
| garfieldsg | 0:662207e34fba | 438 | bool getAccelYSelfTest(); |
| garfieldsg | 0:662207e34fba | 439 | void setAccelYSelfTest(bool enabled); |
| garfieldsg | 0:662207e34fba | 440 | bool getAccelZSelfTest(); |
| garfieldsg | 0:662207e34fba | 441 | void setAccelZSelfTest(bool enabled); |
| garfieldsg | 0:662207e34fba | 442 | uint8_t getFullScaleAccelRange(); |
| garfieldsg | 0:662207e34fba | 443 | void setFullScaleAccelRange(uint8_t range); |
| garfieldsg | 0:662207e34fba | 444 | uint8_t getDHPFMode(); |
| garfieldsg | 0:662207e34fba | 445 | void setDHPFMode(uint8_t mode); |
| garfieldsg | 0:662207e34fba | 446 | |
| garfieldsg | 0:662207e34fba | 447 | // FF_THR register |
| garfieldsg | 0:662207e34fba | 448 | uint8_t getFreefallDetectionThreshold(); |
| garfieldsg | 0:662207e34fba | 449 | void setFreefallDetectionThreshold(uint8_t threshold); |
| garfieldsg | 0:662207e34fba | 450 | |
| garfieldsg | 0:662207e34fba | 451 | // FF_DUR register |
| garfieldsg | 0:662207e34fba | 452 | uint8_t getFreefallDetectionDuration(); |
| garfieldsg | 0:662207e34fba | 453 | void setFreefallDetectionDuration(uint8_t duration); |
| garfieldsg | 0:662207e34fba | 454 | |
| garfieldsg | 0:662207e34fba | 455 | // MOT_THR register |
| garfieldsg | 0:662207e34fba | 456 | uint8_t getMotionDetectionThreshold(); |
| garfieldsg | 0:662207e34fba | 457 | void setMotionDetectionThreshold(uint8_t threshold); |
| garfieldsg | 0:662207e34fba | 458 | |
| garfieldsg | 0:662207e34fba | 459 | // MOT_DUR register |
| garfieldsg | 0:662207e34fba | 460 | uint8_t getMotionDetectionDuration(); |
| garfieldsg | 0:662207e34fba | 461 | void setMotionDetectionDuration(uint8_t duration); |
| garfieldsg | 0:662207e34fba | 462 | |
| garfieldsg | 0:662207e34fba | 463 | // ZRMOT_THR register |
| garfieldsg | 0:662207e34fba | 464 | uint8_t getZeroMotionDetectionThreshold(); |
| garfieldsg | 0:662207e34fba | 465 | void setZeroMotionDetectionThreshold(uint8_t threshold); |
| garfieldsg | 0:662207e34fba | 466 | |
| garfieldsg | 0:662207e34fba | 467 | // ZRMOT_DUR register |
| garfieldsg | 0:662207e34fba | 468 | uint8_t getZeroMotionDetectionDuration(); |
| garfieldsg | 0:662207e34fba | 469 | void setZeroMotionDetectionDuration(uint8_t duration); |
| garfieldsg | 0:662207e34fba | 470 | |
| garfieldsg | 0:662207e34fba | 471 | // FIFO_EN register |
| garfieldsg | 0:662207e34fba | 472 | bool getTempFIFOEnabled(); |
| garfieldsg | 0:662207e34fba | 473 | void setTempFIFOEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 474 | bool getXGyroFIFOEnabled(); |
| garfieldsg | 0:662207e34fba | 475 | void setXGyroFIFOEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 476 | bool getYGyroFIFOEnabled(); |
| garfieldsg | 0:662207e34fba | 477 | void setYGyroFIFOEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 478 | bool getZGyroFIFOEnabled(); |
| garfieldsg | 0:662207e34fba | 479 | void setZGyroFIFOEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 480 | bool getAccelFIFOEnabled(); |
| garfieldsg | 0:662207e34fba | 481 | void setAccelFIFOEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 482 | bool getSlave2FIFOEnabled(); |
| garfieldsg | 0:662207e34fba | 483 | void setSlave2FIFOEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 484 | bool getSlave1FIFOEnabled(); |
| garfieldsg | 0:662207e34fba | 485 | void setSlave1FIFOEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 486 | bool getSlave0FIFOEnabled(); |
| garfieldsg | 0:662207e34fba | 487 | void setSlave0FIFOEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 488 | |
| garfieldsg | 0:662207e34fba | 489 | // I2C_MST_CTRL register |
| garfieldsg | 0:662207e34fba | 490 | bool getMultiMasterEnabled(); |
| garfieldsg | 0:662207e34fba | 491 | void setMultiMasterEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 492 | bool getWaitForExternalSensorEnabled(); |
| garfieldsg | 0:662207e34fba | 493 | void setWaitForExternalSensorEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 494 | bool getSlave3FIFOEnabled(); |
| garfieldsg | 0:662207e34fba | 495 | void setSlave3FIFOEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 496 | bool getSlaveReadWriteTransitionEnabled(); |
| garfieldsg | 0:662207e34fba | 497 | void setSlaveReadWriteTransitionEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 498 | uint8_t getMasterClockSpeed(); |
| garfieldsg | 0:662207e34fba | 499 | void setMasterClockSpeed(uint8_t speed); |
| garfieldsg | 0:662207e34fba | 500 | |
| garfieldsg | 0:662207e34fba | 501 | // I2C_SLV* registers (Slave 0-3) |
| garfieldsg | 0:662207e34fba | 502 | uint8_t getSlaveAddress(uint8_t num); |
| garfieldsg | 0:662207e34fba | 503 | void setSlaveAddress(uint8_t num, uint8_t address); |
| garfieldsg | 0:662207e34fba | 504 | uint8_t getSlaveRegister(uint8_t num); |
| garfieldsg | 0:662207e34fba | 505 | void setSlaveRegister(uint8_t num, uint8_t reg); |
| garfieldsg | 0:662207e34fba | 506 | bool getSlaveEnabled(uint8_t num); |
| garfieldsg | 0:662207e34fba | 507 | void setSlaveEnabled(uint8_t num, bool enabled); |
| garfieldsg | 0:662207e34fba | 508 | bool getSlaveWordByteSwap(uint8_t num); |
| garfieldsg | 0:662207e34fba | 509 | void setSlaveWordByteSwap(uint8_t num, bool enabled); |
| garfieldsg | 0:662207e34fba | 510 | bool getSlaveWriteMode(uint8_t num); |
| garfieldsg | 0:662207e34fba | 511 | void setSlaveWriteMode(uint8_t num, bool mode); |
| garfieldsg | 0:662207e34fba | 512 | bool getSlaveWordGroupOffset(uint8_t num); |
| garfieldsg | 0:662207e34fba | 513 | void setSlaveWordGroupOffset(uint8_t num, bool enabled); |
| garfieldsg | 0:662207e34fba | 514 | uint8_t getSlaveDataLength(uint8_t num); |
| garfieldsg | 0:662207e34fba | 515 | void setSlaveDataLength(uint8_t num, uint8_t length); |
| garfieldsg | 0:662207e34fba | 516 | |
| garfieldsg | 0:662207e34fba | 517 | // I2C_SLV* registers (Slave 4) |
| garfieldsg | 0:662207e34fba | 518 | uint8_t getSlave4Address(); |
| garfieldsg | 0:662207e34fba | 519 | void setSlave4Address(uint8_t address); |
| garfieldsg | 0:662207e34fba | 520 | uint8_t getSlave4Register(); |
| garfieldsg | 0:662207e34fba | 521 | void setSlave4Register(uint8_t reg); |
| garfieldsg | 0:662207e34fba | 522 | void setSlave4OutputByte(uint8_t data); |
| garfieldsg | 0:662207e34fba | 523 | bool getSlave4Enabled(); |
| garfieldsg | 0:662207e34fba | 524 | void setSlave4Enabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 525 | bool getSlave4InterruptEnabled(); |
| garfieldsg | 0:662207e34fba | 526 | void setSlave4InterruptEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 527 | bool getSlave4WriteMode(); |
| garfieldsg | 0:662207e34fba | 528 | void setSlave4WriteMode(bool mode); |
| garfieldsg | 0:662207e34fba | 529 | uint8_t getSlave4MasterDelay(); |
| garfieldsg | 0:662207e34fba | 530 | void setSlave4MasterDelay(uint8_t delay); |
| garfieldsg | 0:662207e34fba | 531 | uint8_t getSlate4InputByte(); |
| garfieldsg | 0:662207e34fba | 532 | |
| garfieldsg | 0:662207e34fba | 533 | // I2C_MST_STATUS register |
| garfieldsg | 0:662207e34fba | 534 | bool getPassthroughStatus(); |
| garfieldsg | 0:662207e34fba | 535 | bool getSlave4IsDone(); |
| garfieldsg | 0:662207e34fba | 536 | bool getLostArbitration(); |
| garfieldsg | 0:662207e34fba | 537 | bool getSlave4Nack(); |
| garfieldsg | 0:662207e34fba | 538 | bool getSlave3Nack(); |
| garfieldsg | 0:662207e34fba | 539 | bool getSlave2Nack(); |
| garfieldsg | 0:662207e34fba | 540 | bool getSlave1Nack(); |
| garfieldsg | 0:662207e34fba | 541 | bool getSlave0Nack(); |
| garfieldsg | 0:662207e34fba | 542 | |
| garfieldsg | 0:662207e34fba | 543 | // INT_PIN_CFG register |
| garfieldsg | 0:662207e34fba | 544 | bool getInterruptMode(); |
| garfieldsg | 0:662207e34fba | 545 | void setInterruptMode(bool mode); |
| garfieldsg | 0:662207e34fba | 546 | bool getInterruptDrive(); |
| garfieldsg | 0:662207e34fba | 547 | void setInterruptDrive(bool drive); |
| garfieldsg | 0:662207e34fba | 548 | bool getInterruptLatch(); |
| garfieldsg | 0:662207e34fba | 549 | void setInterruptLatch(bool latch); |
| garfieldsg | 0:662207e34fba | 550 | bool getInterruptLatchClear(); |
| garfieldsg | 0:662207e34fba | 551 | void setInterruptLatchClear(bool clear); |
| garfieldsg | 0:662207e34fba | 552 | bool getFSyncInterruptLevel(); |
| garfieldsg | 0:662207e34fba | 553 | void setFSyncInterruptLevel(bool level); |
| garfieldsg | 0:662207e34fba | 554 | bool getFSyncInterruptEnabled(); |
| garfieldsg | 0:662207e34fba | 555 | void setFSyncInterruptEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 556 | bool getI2CBypassEnabled(); |
| garfieldsg | 0:662207e34fba | 557 | void setI2CBypassEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 558 | bool getClockOutputEnabled(); |
| garfieldsg | 0:662207e34fba | 559 | void setClockOutputEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 560 | |
| garfieldsg | 0:662207e34fba | 561 | // INT_ENABLE register |
| garfieldsg | 0:662207e34fba | 562 | uint8_t getIntEnabled(); |
| garfieldsg | 0:662207e34fba | 563 | void setIntEnabled(uint8_t enabled); |
| garfieldsg | 0:662207e34fba | 564 | bool getIntFreefallEnabled(); |
| garfieldsg | 0:662207e34fba | 565 | void setIntFreefallEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 566 | bool getIntMotionEnabled(); |
| garfieldsg | 0:662207e34fba | 567 | void setIntMotionEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 568 | bool getIntZeroMotionEnabled(); |
| garfieldsg | 0:662207e34fba | 569 | void setIntZeroMotionEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 570 | bool getIntFIFOBufferOverflowEnabled(); |
| garfieldsg | 0:662207e34fba | 571 | void setIntFIFOBufferOverflowEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 572 | bool getIntI2CMasterEnabled(); |
| garfieldsg | 0:662207e34fba | 573 | void setIntI2CMasterEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 574 | bool getIntDataReadyEnabled(); |
| garfieldsg | 0:662207e34fba | 575 | void setIntDataReadyEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 576 | |
| garfieldsg | 0:662207e34fba | 577 | // INT_STATUS register |
| garfieldsg | 0:662207e34fba | 578 | uint8_t getIntStatus(); |
| garfieldsg | 0:662207e34fba | 579 | bool getIntFreefallStatus(); |
| garfieldsg | 0:662207e34fba | 580 | bool getIntMotionStatus(); |
| garfieldsg | 0:662207e34fba | 581 | bool getIntZeroMotionStatus(); |
| garfieldsg | 0:662207e34fba | 582 | bool getIntFIFOBufferOverflowStatus(); |
| garfieldsg | 0:662207e34fba | 583 | bool getIntI2CMasterStatus(); |
| garfieldsg | 0:662207e34fba | 584 | bool getIntDataReadyStatus(); |
| garfieldsg | 0:662207e34fba | 585 | |
| garfieldsg | 0:662207e34fba | 586 | // ACCEL_*OUT_* registers |
| garfieldsg | 0:662207e34fba | 587 | void getMotion9(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz, int16_t* mx, int16_t* my, int16_t* mz); |
| garfieldsg | 0:662207e34fba | 588 | void getMotion6(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz); |
| garfieldsg | 0:662207e34fba | 589 | void getAcceleration(int16_t* x, int16_t* y, int16_t* z); |
| garfieldsg | 0:662207e34fba | 590 | int16_t getAccelerationX(); |
| garfieldsg | 0:662207e34fba | 591 | int16_t getAccelerationY(); |
| garfieldsg | 0:662207e34fba | 592 | int16_t getAccelerationZ(); |
| garfieldsg | 0:662207e34fba | 593 | |
| garfieldsg | 0:662207e34fba | 594 | // TEMP_OUT_* registers |
| garfieldsg | 0:662207e34fba | 595 | int16_t getTemperature(); |
| garfieldsg | 0:662207e34fba | 596 | |
| garfieldsg | 0:662207e34fba | 597 | // GYRO_*OUT_* registers |
| garfieldsg | 0:662207e34fba | 598 | void getRotation(int16_t* x, int16_t* y, int16_t* z); |
| garfieldsg | 0:662207e34fba | 599 | int16_t getRotationX(); |
| garfieldsg | 0:662207e34fba | 600 | int16_t getRotationY(); |
| garfieldsg | 0:662207e34fba | 601 | int16_t getRotationZ(); |
| garfieldsg | 0:662207e34fba | 602 | |
| garfieldsg | 0:662207e34fba | 603 | // EXT_SENS_DATA_* registers |
| garfieldsg | 0:662207e34fba | 604 | uint8_t getExternalSensorByte(int position); |
| garfieldsg | 0:662207e34fba | 605 | uint16_t getExternalSensorWord(int position); |
| garfieldsg | 0:662207e34fba | 606 | uint32_t getExternalSensorDWord(int position); |
| garfieldsg | 0:662207e34fba | 607 | |
| garfieldsg | 0:662207e34fba | 608 | // MOT_DETECT_STATUS register |
| syundo0730 | 6:f38dfe62d74c | 609 | uint8_t getMotionStatus(); |
| garfieldsg | 0:662207e34fba | 610 | bool getXNegMotionDetected(); |
| garfieldsg | 0:662207e34fba | 611 | bool getXPosMotionDetected(); |
| garfieldsg | 0:662207e34fba | 612 | bool getYNegMotionDetected(); |
| garfieldsg | 0:662207e34fba | 613 | bool getYPosMotionDetected(); |
| garfieldsg | 0:662207e34fba | 614 | bool getZNegMotionDetected(); |
| garfieldsg | 0:662207e34fba | 615 | bool getZPosMotionDetected(); |
| garfieldsg | 0:662207e34fba | 616 | bool getZeroMotionDetected(); |
| garfieldsg | 0:662207e34fba | 617 | |
| garfieldsg | 0:662207e34fba | 618 | // I2C_SLV*_DO register |
| garfieldsg | 0:662207e34fba | 619 | void setSlaveOutputByte(uint8_t num, uint8_t data); |
| garfieldsg | 0:662207e34fba | 620 | |
| garfieldsg | 0:662207e34fba | 621 | // I2C_MST_DELAY_CTRL register |
| garfieldsg | 0:662207e34fba | 622 | bool getExternalShadowDelayEnabled(); |
| garfieldsg | 0:662207e34fba | 623 | void setExternalShadowDelayEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 624 | bool getSlaveDelayEnabled(uint8_t num); |
| garfieldsg | 0:662207e34fba | 625 | void setSlaveDelayEnabled(uint8_t num, bool enabled); |
| garfieldsg | 0:662207e34fba | 626 | |
| garfieldsg | 0:662207e34fba | 627 | // SIGNAL_PATH_RESET register |
| garfieldsg | 0:662207e34fba | 628 | void resetGyroscopePath(); |
| garfieldsg | 0:662207e34fba | 629 | void resetAccelerometerPath(); |
| garfieldsg | 0:662207e34fba | 630 | void resetTemperaturePath(); |
| garfieldsg | 0:662207e34fba | 631 | |
| garfieldsg | 0:662207e34fba | 632 | // MOT_DETECT_CTRL register |
| garfieldsg | 0:662207e34fba | 633 | uint8_t getAccelerometerPowerOnDelay(); |
| garfieldsg | 0:662207e34fba | 634 | void setAccelerometerPowerOnDelay(uint8_t delay); |
| garfieldsg | 0:662207e34fba | 635 | uint8_t getFreefallDetectionCounterDecrement(); |
| garfieldsg | 0:662207e34fba | 636 | void setFreefallDetectionCounterDecrement(uint8_t decrement); |
| garfieldsg | 0:662207e34fba | 637 | uint8_t getMotionDetectionCounterDecrement(); |
| garfieldsg | 0:662207e34fba | 638 | void setMotionDetectionCounterDecrement(uint8_t decrement); |
| garfieldsg | 0:662207e34fba | 639 | |
| garfieldsg | 0:662207e34fba | 640 | // USER_CTRL register |
| garfieldsg | 0:662207e34fba | 641 | bool getFIFOEnabled(); |
| garfieldsg | 0:662207e34fba | 642 | void setFIFOEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 643 | bool getI2CMasterModeEnabled(); |
| garfieldsg | 0:662207e34fba | 644 | void setI2CMasterModeEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 645 | void switchSPIEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 646 | void resetFIFO(); |
| garfieldsg | 0:662207e34fba | 647 | void resetI2CMaster(); |
| garfieldsg | 0:662207e34fba | 648 | void resetSensors(); |
| garfieldsg | 0:662207e34fba | 649 | |
| garfieldsg | 0:662207e34fba | 650 | // PWR_MGMT_1 register |
| garfieldsg | 0:662207e34fba | 651 | void reset(); |
| garfieldsg | 0:662207e34fba | 652 | bool getSleepEnabled(); |
| garfieldsg | 0:662207e34fba | 653 | void setSleepEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 654 | bool getWakeCycleEnabled(); |
| garfieldsg | 0:662207e34fba | 655 | void setWakeCycleEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 656 | bool getTempSensorEnabled(); |
| garfieldsg | 0:662207e34fba | 657 | void setTempSensorEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 658 | uint8_t getClockSource(); |
| garfieldsg | 0:662207e34fba | 659 | void setClockSource(uint8_t source); |
| garfieldsg | 0:662207e34fba | 660 | |
| garfieldsg | 0:662207e34fba | 661 | // PWR_MGMT_2 register |
| garfieldsg | 0:662207e34fba | 662 | uint8_t getWakeFrequency(); |
| garfieldsg | 0:662207e34fba | 663 | void setWakeFrequency(uint8_t frequency); |
| garfieldsg | 0:662207e34fba | 664 | bool getStandbyXAccelEnabled(); |
| garfieldsg | 0:662207e34fba | 665 | void setStandbyXAccelEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 666 | bool getStandbyYAccelEnabled(); |
| garfieldsg | 0:662207e34fba | 667 | void setStandbyYAccelEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 668 | bool getStandbyZAccelEnabled(); |
| garfieldsg | 0:662207e34fba | 669 | void setStandbyZAccelEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 670 | bool getStandbyXGyroEnabled(); |
| garfieldsg | 0:662207e34fba | 671 | void setStandbyXGyroEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 672 | bool getStandbyYGyroEnabled(); |
| garfieldsg | 0:662207e34fba | 673 | void setStandbyYGyroEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 674 | bool getStandbyZGyroEnabled(); |
| garfieldsg | 0:662207e34fba | 675 | void setStandbyZGyroEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 676 | |
| garfieldsg | 0:662207e34fba | 677 | // FIFO_COUNT_* registers |
| garfieldsg | 0:662207e34fba | 678 | uint16_t getFIFOCount(); |
| garfieldsg | 0:662207e34fba | 679 | |
| garfieldsg | 0:662207e34fba | 680 | // FIFO_R_W register |
| garfieldsg | 0:662207e34fba | 681 | uint8_t getFIFOByte(); |
| garfieldsg | 0:662207e34fba | 682 | void setFIFOByte(uint8_t data); |
| garfieldsg | 0:662207e34fba | 683 | void getFIFOBytes(uint8_t *data, uint8_t length); |
| garfieldsg | 0:662207e34fba | 684 | |
| garfieldsg | 0:662207e34fba | 685 | // WHO_AM_I register |
| garfieldsg | 0:662207e34fba | 686 | uint8_t getDeviceID(); |
| garfieldsg | 0:662207e34fba | 687 | void setDeviceID(uint8_t id); |
| syundo0730 | 7:d5845b617139 | 688 | |
| garfieldsg | 0:662207e34fba | 689 | // ======== UNDOCUMENTED/DMP REGISTERS/METHODS ======== |
| syundo0730 | 7:d5845b617139 | 690 | |
| garfieldsg | 0:662207e34fba | 691 | // XG_OFFS_TC register |
| garfieldsg | 0:662207e34fba | 692 | uint8_t getOTPBankValid(); |
| garfieldsg | 0:662207e34fba | 693 | void setOTPBankValid(bool enabled); |
| syundo0730 | 6:f38dfe62d74c | 694 | int8_t getXGyroOffsetTC(); |
| syundo0730 | 6:f38dfe62d74c | 695 | void setXGyroOffsetTC(int8_t offset); |
| garfieldsg | 0:662207e34fba | 696 | |
| garfieldsg | 0:662207e34fba | 697 | // YG_OFFS_TC register |
| syundo0730 | 6:f38dfe62d74c | 698 | int8_t getYGyroOffsetTC(); |
| syundo0730 | 6:f38dfe62d74c | 699 | void setYGyroOffsetTC(int8_t offset); |
| garfieldsg | 0:662207e34fba | 700 | |
| garfieldsg | 0:662207e34fba | 701 | // ZG_OFFS_TC register |
| syundo0730 | 6:f38dfe62d74c | 702 | int8_t getZGyroOffsetTC(); |
| syundo0730 | 6:f38dfe62d74c | 703 | void setZGyroOffsetTC(int8_t offset); |
| garfieldsg | 0:662207e34fba | 704 | |
| garfieldsg | 0:662207e34fba | 705 | // X_FINE_GAIN register |
| garfieldsg | 0:662207e34fba | 706 | int8_t getXFineGain(); |
| garfieldsg | 0:662207e34fba | 707 | void setXFineGain(int8_t gain); |
| garfieldsg | 0:662207e34fba | 708 | |
| garfieldsg | 0:662207e34fba | 709 | // Y_FINE_GAIN register |
| garfieldsg | 0:662207e34fba | 710 | int8_t getYFineGain(); |
| garfieldsg | 0:662207e34fba | 711 | void setYFineGain(int8_t gain); |
| garfieldsg | 0:662207e34fba | 712 | |
| garfieldsg | 0:662207e34fba | 713 | // Z_FINE_GAIN register |
| garfieldsg | 0:662207e34fba | 714 | int8_t getZFineGain(); |
| garfieldsg | 0:662207e34fba | 715 | void setZFineGain(int8_t gain); |
| garfieldsg | 0:662207e34fba | 716 | |
| garfieldsg | 0:662207e34fba | 717 | // XA_OFFS_* registers |
| garfieldsg | 0:662207e34fba | 718 | int16_t getXAccelOffset(); |
| garfieldsg | 0:662207e34fba | 719 | void setXAccelOffset(int16_t offset); |
| garfieldsg | 0:662207e34fba | 720 | |
| garfieldsg | 0:662207e34fba | 721 | // YA_OFFS_* register |
| garfieldsg | 0:662207e34fba | 722 | int16_t getYAccelOffset(); |
| garfieldsg | 0:662207e34fba | 723 | void setYAccelOffset(int16_t offset); |
| garfieldsg | 0:662207e34fba | 724 | |
| garfieldsg | 0:662207e34fba | 725 | // ZA_OFFS_* register |
| garfieldsg | 0:662207e34fba | 726 | int16_t getZAccelOffset(); |
| garfieldsg | 0:662207e34fba | 727 | void setZAccelOffset(int16_t offset); |
| garfieldsg | 0:662207e34fba | 728 | |
| garfieldsg | 0:662207e34fba | 729 | // XG_OFFS_USR* registers |
| syundo0730 | 6:f38dfe62d74c | 730 | int16_t getXGyroOffset(); |
| syundo0730 | 6:f38dfe62d74c | 731 | void setXGyroOffset(int16_t offset); |
| garfieldsg | 0:662207e34fba | 732 | |
| garfieldsg | 0:662207e34fba | 733 | // YG_OFFS_USR* register |
| syundo0730 | 6:f38dfe62d74c | 734 | int16_t getYGyroOffset(); |
| syundo0730 | 6:f38dfe62d74c | 735 | void setYGyroOffset(int16_t offset); |
| garfieldsg | 0:662207e34fba | 736 | |
| garfieldsg | 0:662207e34fba | 737 | // ZG_OFFS_USR* register |
| syundo0730 | 6:f38dfe62d74c | 738 | int16_t getZGyroOffset(); |
| syundo0730 | 6:f38dfe62d74c | 739 | void setZGyroOffset(int16_t offset); |
| syundo0730 | 7:d5845b617139 | 740 | |
| garfieldsg | 0:662207e34fba | 741 | // INT_ENABLE register (DMP functions) |
| garfieldsg | 0:662207e34fba | 742 | bool getIntPLLReadyEnabled(); |
| garfieldsg | 0:662207e34fba | 743 | void setIntPLLReadyEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 744 | bool getIntDMPEnabled(); |
| garfieldsg | 0:662207e34fba | 745 | void setIntDMPEnabled(bool enabled); |
| syundo0730 | 7:d5845b617139 | 746 | |
| garfieldsg | 0:662207e34fba | 747 | // DMP_INT_STATUS |
| garfieldsg | 0:662207e34fba | 748 | bool getDMPInt5Status(); |
| garfieldsg | 0:662207e34fba | 749 | bool getDMPInt4Status(); |
| garfieldsg | 0:662207e34fba | 750 | bool getDMPInt3Status(); |
| garfieldsg | 0:662207e34fba | 751 | bool getDMPInt2Status(); |
| garfieldsg | 0:662207e34fba | 752 | bool getDMPInt1Status(); |
| garfieldsg | 0:662207e34fba | 753 | bool getDMPInt0Status(); |
| garfieldsg | 0:662207e34fba | 754 | |
| garfieldsg | 0:662207e34fba | 755 | // INT_STATUS register (DMP functions) |
| garfieldsg | 0:662207e34fba | 756 | bool getIntPLLReadyStatus(); |
| garfieldsg | 0:662207e34fba | 757 | bool getIntDMPStatus(); |
| syundo0730 | 7:d5845b617139 | 758 | |
| garfieldsg | 0:662207e34fba | 759 | // USER_CTRL register (DMP functions) |
| garfieldsg | 0:662207e34fba | 760 | bool getDMPEnabled(); |
| garfieldsg | 0:662207e34fba | 761 | void setDMPEnabled(bool enabled); |
| garfieldsg | 0:662207e34fba | 762 | void resetDMP(); |
| syundo0730 | 7:d5845b617139 | 763 | |
| garfieldsg | 0:662207e34fba | 764 | // BANK_SEL register |
| garfieldsg | 0:662207e34fba | 765 | void setMemoryBank(uint8_t bank, bool prefetchEnabled=false, bool userBank=false); |
| syundo0730 | 7:d5845b617139 | 766 | |
| garfieldsg | 0:662207e34fba | 767 | // MEM_START_ADDR register |
| garfieldsg | 0:662207e34fba | 768 | void setMemoryStartAddress(uint8_t address); |
| syundo0730 | 7:d5845b617139 | 769 | |
| garfieldsg | 0:662207e34fba | 770 | // MEM_R_W register |
| garfieldsg | 0:662207e34fba | 771 | uint8_t readMemoryByte(); |
| garfieldsg | 0:662207e34fba | 772 | void writeMemoryByte(uint8_t data); |
| garfieldsg | 0:662207e34fba | 773 | void readMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank=0, uint8_t address=0); |
| garfieldsg | 0:662207e34fba | 774 | bool writeMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank=0, uint8_t address=0, bool verify=true, bool useProgMem=false); |
| garfieldsg | 0:662207e34fba | 775 | bool writeProgMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank=0, uint8_t address=0, bool verify=true); |
| garfieldsg | 0:662207e34fba | 776 | |
| garfieldsg | 0:662207e34fba | 777 | bool writeDMPConfigurationSet(const uint8_t *data, uint16_t dataSize, bool useProgMem=false); |
| garfieldsg | 0:662207e34fba | 778 | bool writeProgDMPConfigurationSet(const uint8_t *data, uint16_t dataSize); |
| garfieldsg | 0:662207e34fba | 779 | |
| garfieldsg | 0:662207e34fba | 780 | // DMP_CFG_1 register |
| garfieldsg | 0:662207e34fba | 781 | uint8_t getDMPConfig1(); |
| garfieldsg | 0:662207e34fba | 782 | void setDMPConfig1(uint8_t config); |
| garfieldsg | 0:662207e34fba | 783 | |
| garfieldsg | 0:662207e34fba | 784 | // DMP_CFG_2 register |
| garfieldsg | 0:662207e34fba | 785 | uint8_t getDMPConfig2(); |
| garfieldsg | 0:662207e34fba | 786 | void setDMPConfig2(uint8_t config); |
| garfieldsg | 0:662207e34fba | 787 | |
| garfieldsg | 0:662207e34fba | 788 | // special methods for MotionApps 2.0 implementation |
| garfieldsg | 0:662207e34fba | 789 | #ifdef MPU6050_INCLUDE_DMP_MOTIONAPPS20 |
| garfieldsg | 0:662207e34fba | 790 | uint8_t *dmpPacketBuffer; |
| garfieldsg | 0:662207e34fba | 791 | uint16_t dmpPacketSize; |
| garfieldsg | 0:662207e34fba | 792 | |
| garfieldsg | 0:662207e34fba | 793 | uint8_t dmpInitialize(); |
| garfieldsg | 0:662207e34fba | 794 | bool dmpPacketAvailable(); |
| garfieldsg | 0:662207e34fba | 795 | |
| garfieldsg | 0:662207e34fba | 796 | uint8_t dmpSetFIFORate(uint8_t fifoRate); |
| garfieldsg | 0:662207e34fba | 797 | uint8_t dmpGetFIFORate(); |
| garfieldsg | 0:662207e34fba | 798 | uint8_t dmpGetSampleStepSizeMS(); |
| garfieldsg | 0:662207e34fba | 799 | uint8_t dmpGetSampleFrequency(); |
| garfieldsg | 0:662207e34fba | 800 | int32_t dmpDecodeTemperature(int8_t tempReg); |
| syundo0730 | 7:d5845b617139 | 801 | |
| garfieldsg | 0:662207e34fba | 802 | // Register callbacks after a packet of FIFO data is processed |
| garfieldsg | 0:662207e34fba | 803 | //uint8_t dmpRegisterFIFORateProcess(inv_obj_func func, int16_t priority); |
| garfieldsg | 0:662207e34fba | 804 | //uint8_t dmpUnregisterFIFORateProcess(inv_obj_func func); |
| garfieldsg | 0:662207e34fba | 805 | uint8_t dmpRunFIFORateProcesses(); |
| syundo0730 | 7:d5845b617139 | 806 | |
| garfieldsg | 0:662207e34fba | 807 | // Setup FIFO for various output |
| garfieldsg | 0:662207e34fba | 808 | uint8_t dmpSendQuaternion(uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 809 | uint8_t dmpSendGyro(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 810 | uint8_t dmpSendAccel(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 811 | uint8_t dmpSendLinearAccel(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 812 | uint8_t dmpSendLinearAccelInWorld(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 813 | uint8_t dmpSendControlData(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 814 | uint8_t dmpSendSensorData(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 815 | uint8_t dmpSendExternalSensorData(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 816 | uint8_t dmpSendGravity(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 817 | uint8_t dmpSendPacketNumber(uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 818 | uint8_t dmpSendQuantizedAccel(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 819 | uint8_t dmpSendEIS(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 820 | |
| garfieldsg | 0:662207e34fba | 821 | // Get Fixed Point data from FIFO |
| garfieldsg | 0:662207e34fba | 822 | uint8_t dmpGetAccel(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 823 | uint8_t dmpGetAccel(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 824 | uint8_t dmpGetAccel(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 825 | uint8_t dmpGetQuaternion(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 826 | uint8_t dmpGetQuaternion(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 827 | uint8_t dmpGetQuaternion(Quaternion *q, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 828 | uint8_t dmpGet6AxisQuaternion(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 829 | uint8_t dmpGet6AxisQuaternion(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 830 | uint8_t dmpGet6AxisQuaternion(Quaternion *q, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 831 | uint8_t dmpGetRelativeQuaternion(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 832 | uint8_t dmpGetRelativeQuaternion(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 833 | uint8_t dmpGetRelativeQuaternion(Quaternion *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 834 | uint8_t dmpGetGyro(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 835 | uint8_t dmpGetGyro(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 836 | uint8_t dmpGetGyro(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 837 | uint8_t dmpSetLinearAccelFilterCoefficient(float coef); |
| garfieldsg | 0:662207e34fba | 838 | uint8_t dmpGetLinearAccel(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 839 | uint8_t dmpGetLinearAccel(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 840 | uint8_t dmpGetLinearAccel(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 841 | uint8_t dmpGetLinearAccel(VectorInt16 *v, VectorInt16 *vRaw, VectorFloat *gravity); |
| garfieldsg | 0:662207e34fba | 842 | uint8_t dmpGetLinearAccelInWorld(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 843 | uint8_t dmpGetLinearAccelInWorld(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 844 | uint8_t dmpGetLinearAccelInWorld(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 845 | uint8_t dmpGetLinearAccelInWorld(VectorInt16 *v, VectorInt16 *vReal, Quaternion *q); |
| garfieldsg | 0:662207e34fba | 846 | uint8_t dmpGetGyroAndAccelSensor(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 847 | uint8_t dmpGetGyroAndAccelSensor(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 848 | uint8_t dmpGetGyroAndAccelSensor(VectorInt16 *g, VectorInt16 *a, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 849 | uint8_t dmpGetGyroSensor(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 850 | uint8_t dmpGetGyroSensor(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 851 | uint8_t dmpGetGyroSensor(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 852 | uint8_t dmpGetControlData(int32_t *data, const uint8_t* packet=0); |
| syundo0730 | 3:25e1a5a10e53 | 853 | uint8_t dmpGetTemperature(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 854 | uint8_t dmpGetGravity(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 855 | uint8_t dmpGetGravity(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 856 | uint8_t dmpGetGravity(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 857 | uint8_t dmpGetGravity(VectorFloat *v, Quaternion *q); |
| garfieldsg | 0:662207e34fba | 858 | uint8_t dmpGetUnquantizedAccel(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 859 | uint8_t dmpGetUnquantizedAccel(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 860 | uint8_t dmpGetUnquantizedAccel(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 861 | uint8_t dmpGetQuantizedAccel(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 862 | uint8_t dmpGetQuantizedAccel(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 863 | uint8_t dmpGetQuantizedAccel(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 864 | uint8_t dmpGetExternalSensorData(int32_t *data, uint16_t size, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 865 | uint8_t dmpGetEIS(int32_t *data, const uint8_t* packet=0); |
| syundo0730 | 7:d5845b617139 | 866 | |
| garfieldsg | 0:662207e34fba | 867 | uint8_t dmpGetEuler(float *data, Quaternion *q); |
| garfieldsg | 0:662207e34fba | 868 | uint8_t dmpGetYawPitchRoll(float *data, Quaternion *q, VectorFloat *gravity); |
| garfieldsg | 0:662207e34fba | 869 | |
| garfieldsg | 0:662207e34fba | 870 | // Get Floating Point data from FIFO |
| garfieldsg | 0:662207e34fba | 871 | uint8_t dmpGetAccelFloat(float *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 872 | uint8_t dmpGetQuaternionFloat(float *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 873 | |
| garfieldsg | 0:662207e34fba | 874 | uint8_t dmpProcessFIFOPacket(const unsigned char *dmpData); |
| garfieldsg | 0:662207e34fba | 875 | uint8_t dmpReadAndProcessFIFOPacket(uint8_t numPackets, uint8_t *processed=NULL); |
| garfieldsg | 0:662207e34fba | 876 | |
| garfieldsg | 0:662207e34fba | 877 | uint8_t dmpSetFIFOProcessedCallback(void (*func) (void)); |
| garfieldsg | 0:662207e34fba | 878 | |
| garfieldsg | 0:662207e34fba | 879 | uint8_t dmpInitFIFOParam(); |
| garfieldsg | 0:662207e34fba | 880 | uint8_t dmpCloseFIFO(); |
| garfieldsg | 0:662207e34fba | 881 | uint8_t dmpSetGyroDataSource(uint8_t source); |
| garfieldsg | 0:662207e34fba | 882 | uint8_t dmpDecodeQuantizedAccel(); |
| garfieldsg | 0:662207e34fba | 883 | uint32_t dmpGetGyroSumOfSquare(); |
| garfieldsg | 0:662207e34fba | 884 | uint32_t dmpGetAccelSumOfSquare(); |
| garfieldsg | 0:662207e34fba | 885 | void dmpOverrideQuaternion(long *q); |
| garfieldsg | 0:662207e34fba | 886 | uint16_t dmpGetFIFOPacketSize(); |
| garfieldsg | 0:662207e34fba | 887 | #endif |
| garfieldsg | 0:662207e34fba | 888 | |
| garfieldsg | 0:662207e34fba | 889 | // special methods for MotionApps 4.1 implementation |
| garfieldsg | 0:662207e34fba | 890 | #ifdef MPU6050_INCLUDE_DMP_MOTIONAPPS41 |
| garfieldsg | 0:662207e34fba | 891 | uint8_t *dmpPacketBuffer; |
| garfieldsg | 0:662207e34fba | 892 | uint16_t dmpPacketSize; |
| garfieldsg | 0:662207e34fba | 893 | |
| garfieldsg | 0:662207e34fba | 894 | uint8_t dmpInitialize(); |
| garfieldsg | 0:662207e34fba | 895 | bool dmpPacketAvailable(); |
| garfieldsg | 0:662207e34fba | 896 | |
| garfieldsg | 0:662207e34fba | 897 | uint8_t dmpSetFIFORate(uint8_t fifoRate); |
| garfieldsg | 0:662207e34fba | 898 | uint8_t dmpGetFIFORate(); |
| garfieldsg | 0:662207e34fba | 899 | uint8_t dmpGetSampleStepSizeMS(); |
| garfieldsg | 0:662207e34fba | 900 | uint8_t dmpGetSampleFrequency(); |
| garfieldsg | 0:662207e34fba | 901 | int32_t dmpDecodeTemperature(int8_t tempReg); |
| syundo0730 | 7:d5845b617139 | 902 | |
| garfieldsg | 0:662207e34fba | 903 | // Register callbacks after a packet of FIFO data is processed |
| garfieldsg | 0:662207e34fba | 904 | //uint8_t dmpRegisterFIFORateProcess(inv_obj_func func, int16_t priority); |
| garfieldsg | 0:662207e34fba | 905 | //uint8_t dmpUnregisterFIFORateProcess(inv_obj_func func); |
| garfieldsg | 0:662207e34fba | 906 | uint8_t dmpRunFIFORateProcesses(); |
| syundo0730 | 7:d5845b617139 | 907 | |
| garfieldsg | 0:662207e34fba | 908 | // Setup FIFO for various output |
| garfieldsg | 0:662207e34fba | 909 | uint8_t dmpSendQuaternion(uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 910 | uint8_t dmpSendGyro(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 911 | uint8_t dmpSendAccel(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 912 | uint8_t dmpSendLinearAccel(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 913 | uint8_t dmpSendLinearAccelInWorld(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 914 | uint8_t dmpSendControlData(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 915 | uint8_t dmpSendSensorData(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 916 | uint8_t dmpSendExternalSensorData(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 917 | uint8_t dmpSendGravity(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 918 | uint8_t dmpSendPacketNumber(uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 919 | uint8_t dmpSendQuantizedAccel(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 920 | uint8_t dmpSendEIS(uint_fast16_t elements, uint_fast16_t accuracy); |
| garfieldsg | 0:662207e34fba | 921 | |
| garfieldsg | 0:662207e34fba | 922 | // Get Fixed Point data from FIFO |
| garfieldsg | 0:662207e34fba | 923 | uint8_t dmpGetAccel(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 924 | uint8_t dmpGetAccel(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 925 | uint8_t dmpGetAccel(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 926 | uint8_t dmpGetQuaternion(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 927 | uint8_t dmpGetQuaternion(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 928 | uint8_t dmpGetQuaternion(Quaternion *q, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 929 | uint8_t dmpGet6AxisQuaternion(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 930 | uint8_t dmpGet6AxisQuaternion(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 931 | uint8_t dmpGet6AxisQuaternion(Quaternion *q, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 932 | uint8_t dmpGetRelativeQuaternion(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 933 | uint8_t dmpGetRelativeQuaternion(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 934 | uint8_t dmpGetRelativeQuaternion(Quaternion *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 935 | uint8_t dmpGetGyro(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 936 | uint8_t dmpGetGyro(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 937 | uint8_t dmpGetGyro(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 938 | uint8_t dmpGetMag(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 939 | uint8_t dmpSetLinearAccelFilterCoefficient(float coef); |
| garfieldsg | 0:662207e34fba | 940 | uint8_t dmpGetLinearAccel(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 941 | uint8_t dmpGetLinearAccel(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 942 | uint8_t dmpGetLinearAccel(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 943 | uint8_t dmpGetLinearAccel(VectorInt16 *v, VectorInt16 *vRaw, VectorFloat *gravity); |
| garfieldsg | 0:662207e34fba | 944 | uint8_t dmpGetLinearAccelInWorld(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 945 | uint8_t dmpGetLinearAccelInWorld(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 946 | uint8_t dmpGetLinearAccelInWorld(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 947 | uint8_t dmpGetLinearAccelInWorld(VectorInt16 *v, VectorInt16 *vReal, Quaternion *q); |
| garfieldsg | 0:662207e34fba | 948 | uint8_t dmpGetGyroAndAccelSensor(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 949 | uint8_t dmpGetGyroAndAccelSensor(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 950 | uint8_t dmpGetGyroAndAccelSensor(VectorInt16 *g, VectorInt16 *a, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 951 | uint8_t dmpGetGyroSensor(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 952 | uint8_t dmpGetGyroSensor(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 953 | uint8_t dmpGetGyroSensor(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 954 | uint8_t dmpGetControlData(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 955 | uint8_t dmpGetTemperature(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 956 | uint8_t dmpGetGravity(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 957 | uint8_t dmpGetGravity(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 958 | uint8_t dmpGetGravity(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 959 | uint8_t dmpGetGravity(VectorFloat *v, Quaternion *q); |
| garfieldsg | 0:662207e34fba | 960 | uint8_t dmpGetUnquantizedAccel(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 961 | uint8_t dmpGetUnquantizedAccel(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 962 | uint8_t dmpGetUnquantizedAccel(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 963 | uint8_t dmpGetQuantizedAccel(int32_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 964 | uint8_t dmpGetQuantizedAccel(int16_t *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 965 | uint8_t dmpGetQuantizedAccel(VectorInt16 *v, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 966 | uint8_t dmpGetExternalSensorData(int32_t *data, uint16_t size, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 967 | uint8_t dmpGetEIS(int32_t *data, const uint8_t* packet=0); |
| syundo0730 | 7:d5845b617139 | 968 | |
| garfieldsg | 0:662207e34fba | 969 | uint8_t dmpGetEuler(float *data, Quaternion *q); |
| garfieldsg | 0:662207e34fba | 970 | uint8_t dmpGetYawPitchRoll(float *data, Quaternion *q, VectorFloat *gravity); |
| garfieldsg | 0:662207e34fba | 971 | |
| garfieldsg | 0:662207e34fba | 972 | // Get Floating Point data from FIFO |
| garfieldsg | 0:662207e34fba | 973 | uint8_t dmpGetAccelFloat(float *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 974 | uint8_t dmpGetQuaternionFloat(float *data, const uint8_t* packet=0); |
| garfieldsg | 0:662207e34fba | 975 | |
| garfieldsg | 0:662207e34fba | 976 | uint8_t dmpProcessFIFOPacket(const unsigned char *dmpData); |
| garfieldsg | 0:662207e34fba | 977 | uint8_t dmpReadAndProcessFIFOPacket(uint8_t numPackets, uint8_t *processed=NULL); |
| garfieldsg | 0:662207e34fba | 978 | |
| garfieldsg | 0:662207e34fba | 979 | uint8_t dmpSetFIFOProcessedCallback(void (*func) (void)); |
| garfieldsg | 0:662207e34fba | 980 | |
| garfieldsg | 0:662207e34fba | 981 | uint8_t dmpInitFIFOParam(); |
| garfieldsg | 0:662207e34fba | 982 | uint8_t dmpCloseFIFO(); |
| garfieldsg | 0:662207e34fba | 983 | uint8_t dmpSetGyroDataSource(uint8_t source); |
| garfieldsg | 0:662207e34fba | 984 | uint8_t dmpDecodeQuantizedAccel(); |
| garfieldsg | 0:662207e34fba | 985 | uint32_t dmpGetGyroSumOfSquare(); |
| garfieldsg | 0:662207e34fba | 986 | uint32_t dmpGetAccelSumOfSquare(); |
| garfieldsg | 0:662207e34fba | 987 | void dmpOverrideQuaternion(long *q); |
| garfieldsg | 0:662207e34fba | 988 | uint16_t dmpGetFIFOPacketSize(); |
| garfieldsg | 0:662207e34fba | 989 | #endif |
| garfieldsg | 0:662207e34fba | 990 | |
| garfieldsg | 0:662207e34fba | 991 | private: |
| garfieldsg | 0:662207e34fba | 992 | uint8_t devAddr; |
| garfieldsg | 0:662207e34fba | 993 | uint8_t buffer[14]; |
| garfieldsg | 0:662207e34fba | 994 | }; |
| garfieldsg | 0:662207e34fba | 995 | |
| garfieldsg | 0:662207e34fba | 996 | #endif /* _MPU6050_H_ */ |