MPU6050_Lab6_Part3 - This one compatable with brobot V3, V4, Lab6 Part…

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Carter Sharer / MPU6050_Lab6_Part3

This one compatable with brobot V3, V4, Lab6 Part 3. first commit to BroBot

Dependencies: I2Cdev

Dependents: robotcode

Fork of MPU6050_V3 by Carter Sharer

MPU6050.cpp@12:67002f623f48, 2016-11-11 (annotated)

Committer:: csharer
Date:: Fri Nov 11 19:20:34 2016 +0000
Revision:: 12:67002f623f48
Parent:: 7:d5845b617139

fixed

Who changed what in which revision?

User	Revision	Line number	New contents of line
garfieldsg	0:662207e34fba	1	#include "MPU6050.h"
garfieldsg	0:662207e34fba	2
garfieldsg	0:662207e34fba	3	/** Default constructor, uses default I2C address.
garfieldsg	0:662207e34fba	4	* @see MPU6050_DEFAULT_ADDRESS
garfieldsg	0:662207e34fba	5	*/
syundo0730	6:f38dfe62d74c	6	MPU6050::MPU6050() {
garfieldsg	0:662207e34fba	7	devAddr = MPU6050_DEFAULT_ADDRESS;
garfieldsg	0:662207e34fba	8	}
garfieldsg	0:662207e34fba	9
garfieldsg	0:662207e34fba	10	/** Specific address constructor.
garfieldsg	0:662207e34fba	11	* @param address I2C address
garfieldsg	0:662207e34fba	12	* @see MPU6050_DEFAULT_ADDRESS
garfieldsg	0:662207e34fba	13	* @see MPU6050_ADDRESS_AD0_LOW
garfieldsg	0:662207e34fba	14	* @see MPU6050_ADDRESS_AD0_HIGH
garfieldsg	0:662207e34fba	15	*/
syundo0730	6:f38dfe62d74c	16	MPU6050::MPU6050(uint8_t address) {
garfieldsg	0:662207e34fba	17	devAddr = address;
garfieldsg	0:662207e34fba	18	}
garfieldsg	0:662207e34fba	19
garfieldsg	0:662207e34fba	20	/** Power on and prepare for general usage.
garfieldsg	0:662207e34fba	21	* This will activate the device and take it out of sleep mode (which must be done
garfieldsg	0:662207e34fba	22	* after start-up). This function also sets both the accelerometer and the gyroscope
garfieldsg	0:662207e34fba	23	* to their most sensitive settings, namely +/- 2g and +/- 250 degrees/sec, and sets
garfieldsg	0:662207e34fba	24	* the clock source to use the X Gyro for reference, which is slightly better than
garfieldsg	0:662207e34fba	25	* the default internal clock source.
garfieldsg	0:662207e34fba	26	*/
syundo0730	6:f38dfe62d74c	27	void MPU6050::initialize() {
garfieldsg	0:662207e34fba	28	setClockSource(MPU6050_CLOCK_PLL_XGYRO);
garfieldsg	0:662207e34fba	29	setFullScaleGyroRange(MPU6050_GYRO_FS_250);
garfieldsg	0:662207e34fba	30	setFullScaleAccelRange(MPU6050_ACCEL_FS_2);
garfieldsg	0:662207e34fba	31	setSleepEnabled(false); // thanks to Jack Elston for pointing this one out!
garfieldsg	0:662207e34fba	32	}
garfieldsg	0:662207e34fba	33
garfieldsg	0:662207e34fba	34	/** Verify the I2C connection.
garfieldsg	0:662207e34fba	35	* Make sure the device is connected and responds as expected.
garfieldsg	0:662207e34fba	36	* @return True if connection is valid, false otherwise
garfieldsg	0:662207e34fba	37	*/
syundo0730	6:f38dfe62d74c	38	bool MPU6050::testConnection() {
syundo0730	6:f38dfe62d74c	39	return getDeviceID() == 0x34;
garfieldsg	0:662207e34fba	40	}
garfieldsg	0:662207e34fba	41
garfieldsg	0:662207e34fba	42	// AUX_VDDIO register (InvenSense demo code calls this RA_*G_OFFS_TC)
garfieldsg	0:662207e34fba	43
garfieldsg	0:662207e34fba	44	/** Get the auxiliary I2C supply voltage level.
garfieldsg	0:662207e34fba	45	* When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to
garfieldsg	0:662207e34fba	46	* 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to
garfieldsg	0:662207e34fba	47	* the MPU-6000, which does not have a VLOGIC pin.
garfieldsg	0:662207e34fba	48	* @return I2C supply voltage level (0=VLOGIC, 1=VDD)
garfieldsg	0:662207e34fba	49	*/
syundo0730	6:f38dfe62d74c	50	uint8_t MPU6050::getAuxVDDIOLevel() {
syundo0730	7:d5845b617139	51	I2Cdev::readBit(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_PWR_MODE_BIT, buffer);
garfieldsg	0:662207e34fba	52	return buffer[0];
garfieldsg	0:662207e34fba	53	}
garfieldsg	0:662207e34fba	54	/** Set the auxiliary I2C supply voltage level.
garfieldsg	0:662207e34fba	55	* When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to
garfieldsg	0:662207e34fba	56	* 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to
garfieldsg	0:662207e34fba	57	* the MPU-6000, which does not have a VLOGIC pin.
garfieldsg	0:662207e34fba	58	* @param level I2C supply voltage level (0=VLOGIC, 1=VDD)
garfieldsg	0:662207e34fba	59	*/
syundo0730	6:f38dfe62d74c	60	void MPU6050::setAuxVDDIOLevel(uint8_t level) {
syundo0730	7:d5845b617139	61	I2Cdev::writeBit(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_PWR_MODE_BIT, level);
garfieldsg	0:662207e34fba	62	}
garfieldsg	0:662207e34fba	63
garfieldsg	0:662207e34fba	64	// SMPLRT_DIV register
garfieldsg	0:662207e34fba	65
garfieldsg	0:662207e34fba	66	/** Get gyroscope output rate divider.
garfieldsg	0:662207e34fba	67	* The sensor register output, FIFO output, DMP sampling, Motion detection, Zero
garfieldsg	0:662207e34fba	68	* Motion detection, and Free Fall detection are all based on the Sample Rate.
garfieldsg	0:662207e34fba	69	* The Sample Rate is generated by dividing the gyroscope output rate by
garfieldsg	0:662207e34fba	70	* SMPLRT_DIV:
garfieldsg	0:662207e34fba	71	*
garfieldsg	0:662207e34fba	72	* Sample Rate = Gyroscope Output Rate / (1 + SMPLRT_DIV)
garfieldsg	0:662207e34fba	73	*
garfieldsg	0:662207e34fba	74	* where Gyroscope Output Rate = 8kHz when the DLPF is disabled (DLPF_CFG = 0 or
garfieldsg	0:662207e34fba	75	* 7), and 1kHz when the DLPF is enabled (see Register 26).
garfieldsg	0:662207e34fba	76	*
garfieldsg	0:662207e34fba	77	* Note: The accelerometer output rate is 1kHz. This means that for a Sample
garfieldsg	0:662207e34fba	78	* Rate greater than 1kHz, the same accelerometer sample may be output to the
garfieldsg	0:662207e34fba	79	* FIFO, DMP, and sensor registers more than once.
garfieldsg	0:662207e34fba	80	*
garfieldsg	0:662207e34fba	81	* For a diagram of the gyroscope and accelerometer signal paths, see Section 8
garfieldsg	0:662207e34fba	82	* of the MPU-6000/MPU-6050 Product Specification document.
garfieldsg	0:662207e34fba	83	*
garfieldsg	0:662207e34fba	84	* @return Current sample rate
garfieldsg	0:662207e34fba	85	* @see MPU6050_RA_SMPLRT_DIV
garfieldsg	0:662207e34fba	86	*/
syundo0730	6:f38dfe62d74c	87	uint8_t MPU6050::getRate() {
syundo0730	7:d5845b617139	88	I2Cdev::readByte(devAddr, MPU6050_RA_SMPLRT_DIV, buffer);
garfieldsg	0:662207e34fba	89	return buffer[0];
garfieldsg	0:662207e34fba	90	}
garfieldsg	0:662207e34fba	91	/** Set gyroscope sample rate divider.
garfieldsg	0:662207e34fba	92	* @param rate New sample rate divider
garfieldsg	0:662207e34fba	93	* @see getRate()
garfieldsg	0:662207e34fba	94	* @see MPU6050_RA_SMPLRT_DIV
garfieldsg	0:662207e34fba	95	*/
syundo0730	6:f38dfe62d74c	96	void MPU6050::setRate(uint8_t rate) {
syundo0730	7:d5845b617139	97	I2Cdev::writeByte(devAddr, MPU6050_RA_SMPLRT_DIV, rate);
garfieldsg	0:662207e34fba	98	}
garfieldsg	0:662207e34fba	99
garfieldsg	0:662207e34fba	100	// CONFIG register
garfieldsg	0:662207e34fba	101
garfieldsg	0:662207e34fba	102	/** Get external FSYNC configuration.
garfieldsg	0:662207e34fba	103	* Configures the external Frame Synchronization (FSYNC) pin sampling. An
garfieldsg	0:662207e34fba	104	* external signal connected to the FSYNC pin can be sampled by configuring
garfieldsg	0:662207e34fba	105	* EXT_SYNC_SET. Signal changes to the FSYNC pin are latched so that short
garfieldsg	0:662207e34fba	106	* strobes may be captured. The latched FSYNC signal will be sampled at the
garfieldsg	0:662207e34fba	107	* Sampling Rate, as defined in register 25. After sampling, the latch will
garfieldsg	0:662207e34fba	108	* reset to the current FSYNC signal state.
garfieldsg	0:662207e34fba	109	*
garfieldsg	0:662207e34fba	110	* The sampled value will be reported in place of the least significant bit in
garfieldsg	0:662207e34fba	111	* a sensor data register determined by the value of EXT_SYNC_SET according to
garfieldsg	0:662207e34fba	112	* the following table.
garfieldsg	0:662207e34fba	113	*
garfieldsg	0:662207e34fba	114	* <pre>
garfieldsg	0:662207e34fba	115	* EXT_SYNC_SET \| FSYNC Bit Location
garfieldsg	0:662207e34fba	116	* -------------+-------------------
garfieldsg	0:662207e34fba	117	* 0 \| Input disabled
garfieldsg	0:662207e34fba	118	* 1 \| TEMP_OUT_L[0]
garfieldsg	0:662207e34fba	119	* 2 \| GYRO_XOUT_L[0]
garfieldsg	0:662207e34fba	120	* 3 \| GYRO_YOUT_L[0]
garfieldsg	0:662207e34fba	121	* 4 \| GYRO_ZOUT_L[0]
garfieldsg	0:662207e34fba	122	* 5 \| ACCEL_XOUT_L[0]
garfieldsg	0:662207e34fba	123	* 6 \| ACCEL_YOUT_L[0]
garfieldsg	0:662207e34fba	124	* 7 \| ACCEL_ZOUT_L[0]
garfieldsg	0:662207e34fba	125	* </pre>
garfieldsg	0:662207e34fba	126	*
garfieldsg	0:662207e34fba	127	* @return FSYNC configuration value
garfieldsg	0:662207e34fba	128	*/
syundo0730	6:f38dfe62d74c	129	uint8_t MPU6050::getExternalFrameSync() {
syundo0730	7:d5845b617139	130	I2Cdev::readBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_EXT_SYNC_SET_BIT, MPU6050_CFG_EXT_SYNC_SET_LENGTH, buffer);
garfieldsg	0:662207e34fba	131	return buffer[0];
garfieldsg	0:662207e34fba	132	}
garfieldsg	0:662207e34fba	133	/** Set external FSYNC configuration.
garfieldsg	0:662207e34fba	134	* @see getExternalFrameSync()
garfieldsg	0:662207e34fba	135	* @see MPU6050_RA_CONFIG
garfieldsg	0:662207e34fba	136	* @param sync New FSYNC configuration value
garfieldsg	0:662207e34fba	137	*/
syundo0730	6:f38dfe62d74c	138	void MPU6050::setExternalFrameSync(uint8_t sync) {
syundo0730	7:d5845b617139	139	I2Cdev::writeBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_EXT_SYNC_SET_BIT, MPU6050_CFG_EXT_SYNC_SET_LENGTH, sync);
garfieldsg	0:662207e34fba	140	}
garfieldsg	0:662207e34fba	141	/** Get digital low-pass filter configuration.
garfieldsg	0:662207e34fba	142	* The DLPF_CFG parameter sets the digital low pass filter configuration. It
garfieldsg	0:662207e34fba	143	* also determines the internal sampling rate used by the device as shown in
garfieldsg	0:662207e34fba	144	* the table below.
garfieldsg	0:662207e34fba	145	*
garfieldsg	0:662207e34fba	146	* Note: The accelerometer output rate is 1kHz. This means that for a Sample
garfieldsg	0:662207e34fba	147	* Rate greater than 1kHz, the same accelerometer sample may be output to the
garfieldsg	0:662207e34fba	148	* FIFO, DMP, and sensor registers more than once.
garfieldsg	0:662207e34fba	149	*
garfieldsg	0:662207e34fba	150	* <pre>
garfieldsg	0:662207e34fba	151	* \| ACCELEROMETER \| GYROSCOPE
garfieldsg	0:662207e34fba	152	* DLPF_CFG \| Bandwidth \| Delay \| Bandwidth \| Delay \| Sample Rate
garfieldsg	0:662207e34fba	153	* ---------+-----------+--------+-----------+--------+-------------
garfieldsg	0:662207e34fba	154	* 0 \| 260Hz \| 0ms \| 256Hz \| 0.98ms \| 8kHz
garfieldsg	0:662207e34fba	155	* 1 \| 184Hz \| 2.0ms \| 188Hz \| 1.9ms \| 1kHz
garfieldsg	0:662207e34fba	156	* 2 \| 94Hz \| 3.0ms \| 98Hz \| 2.8ms \| 1kHz
garfieldsg	0:662207e34fba	157	* 3 \| 44Hz \| 4.9ms \| 42Hz \| 4.8ms \| 1kHz
garfieldsg	0:662207e34fba	158	* 4 \| 21Hz \| 8.5ms \| 20Hz \| 8.3ms \| 1kHz
garfieldsg	0:662207e34fba	159	* 5 \| 10Hz \| 13.8ms \| 10Hz \| 13.4ms \| 1kHz
garfieldsg	0:662207e34fba	160	* 6 \| 5Hz \| 19.0ms \| 5Hz \| 18.6ms \| 1kHz
garfieldsg	0:662207e34fba	161	* 7 \| -- Reserved -- \| -- Reserved -- \| Reserved
garfieldsg	0:662207e34fba	162	* </pre>
garfieldsg	0:662207e34fba	163	*
garfieldsg	0:662207e34fba	164	* @return DLFP configuration
garfieldsg	0:662207e34fba	165	* @see MPU6050_RA_CONFIG
garfieldsg	0:662207e34fba	166	* @see MPU6050_CFG_DLPF_CFG_BIT
garfieldsg	0:662207e34fba	167	* @see MPU6050_CFG_DLPF_CFG_LENGTH
garfieldsg	0:662207e34fba	168	*/
syundo0730	6:f38dfe62d74c	169	uint8_t MPU6050::getDLPFMode() {
syundo0730	7:d5845b617139	170	I2Cdev::readBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_DLPF_CFG_BIT, MPU6050_CFG_DLPF_CFG_LENGTH, buffer);
garfieldsg	0:662207e34fba	171	return buffer[0];
garfieldsg	0:662207e34fba	172	}
garfieldsg	0:662207e34fba	173	/** Set digital low-pass filter configuration.
garfieldsg	0:662207e34fba	174	* @param mode New DLFP configuration setting
garfieldsg	0:662207e34fba	175	* @see getDLPFBandwidth()
garfieldsg	0:662207e34fba	176	* @see MPU6050_DLPF_BW_256
garfieldsg	0:662207e34fba	177	* @see MPU6050_RA_CONFIG
garfieldsg	0:662207e34fba	178	* @see MPU6050_CFG_DLPF_CFG_BIT
garfieldsg	0:662207e34fba	179	* @see MPU6050_CFG_DLPF_CFG_LENGTH
garfieldsg	0:662207e34fba	180	*/
syundo0730	6:f38dfe62d74c	181	void MPU6050::setDLPFMode(uint8_t mode) {
syundo0730	7:d5845b617139	182	I2Cdev::writeBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_DLPF_CFG_BIT, MPU6050_CFG_DLPF_CFG_LENGTH, mode);
garfieldsg	0:662207e34fba	183	}
garfieldsg	0:662207e34fba	184
garfieldsg	0:662207e34fba	185	// GYRO_CONFIG register
garfieldsg	0:662207e34fba	186
garfieldsg	0:662207e34fba	187	/** Get full-scale gyroscope range.
garfieldsg	0:662207e34fba	188	* The FS_SEL parameter allows setting the full-scale range of the gyro sensors,
garfieldsg	0:662207e34fba	189	* as described in the table below.
garfieldsg	0:662207e34fba	190	*
garfieldsg	0:662207e34fba	191	* <pre>
garfieldsg	0:662207e34fba	192	* 0 = +/- 250 degrees/sec
garfieldsg	0:662207e34fba	193	* 1 = +/- 500 degrees/sec
garfieldsg	0:662207e34fba	194	* 2 = +/- 1000 degrees/sec
garfieldsg	0:662207e34fba	195	* 3 = +/- 2000 degrees/sec
garfieldsg	0:662207e34fba	196	* </pre>
garfieldsg	0:662207e34fba	197	*
garfieldsg	0:662207e34fba	198	* @return Current full-scale gyroscope range setting
garfieldsg	0:662207e34fba	199	* @see MPU6050_GYRO_FS_250
garfieldsg	0:662207e34fba	200	* @see MPU6050_RA_GYRO_CONFIG
garfieldsg	0:662207e34fba	201	* @see MPU6050_GCONFIG_FS_SEL_BIT
garfieldsg	0:662207e34fba	202	* @see MPU6050_GCONFIG_FS_SEL_LENGTH
garfieldsg	0:662207e34fba	203	*/
syundo0730	6:f38dfe62d74c	204	uint8_t MPU6050::getFullScaleGyroRange() {
syundo0730	7:d5845b617139	205	I2Cdev::readBits(devAddr, MPU6050_RA_GYRO_CONFIG, MPU6050_GCONFIG_FS_SEL_BIT, MPU6050_GCONFIG_FS_SEL_LENGTH, buffer);
garfieldsg	0:662207e34fba	206	return buffer[0];
garfieldsg	0:662207e34fba	207	}
garfieldsg	0:662207e34fba	208	/** Set full-scale gyroscope range.
garfieldsg	0:662207e34fba	209	* @param range New full-scale gyroscope range value
garfieldsg	0:662207e34fba	210	* @see getFullScaleRange()
garfieldsg	0:662207e34fba	211	* @see MPU6050_GYRO_FS_250
garfieldsg	0:662207e34fba	212	* @see MPU6050_RA_GYRO_CONFIG
garfieldsg	0:662207e34fba	213	* @see MPU6050_GCONFIG_FS_SEL_BIT
garfieldsg	0:662207e34fba	214	* @see MPU6050_GCONFIG_FS_SEL_LENGTH
garfieldsg	0:662207e34fba	215	*/
syundo0730	6:f38dfe62d74c	216	void MPU6050::setFullScaleGyroRange(uint8_t range) {
syundo0730	7:d5845b617139	217	I2Cdev::writeBits(devAddr, MPU6050_RA_GYRO_CONFIG, MPU6050_GCONFIG_FS_SEL_BIT, MPU6050_GCONFIG_FS_SEL_LENGTH, range);
syundo0730	7:d5845b617139	218	}
syundo0730	7:d5845b617139	219
syundo0730	7:d5845b617139	220	// SELF TEST FACTORY TRIM VALUES
syundo0730	7:d5845b617139	221
syundo0730	7:d5845b617139	222	/** Get self-test factory trim value for accelerometer X axis.
syundo0730	7:d5845b617139	223	* @return factory trim value
syundo0730	7:d5845b617139	224	* @see MPU6050_RA_SELF_TEST_X
syundo0730	7:d5845b617139	225	*/
syundo0730	7:d5845b617139	226	uint8_t MPU6050::getAccelXSelfTestFactoryTrim() {
syundo0730	7:d5845b617139	227	I2Cdev::readByte(devAddr, MPU6050_RA_SELF_TEST_X, &buffer[0]);
syundo0730	7:d5845b617139	228	I2Cdev::readByte(devAddr, MPU6050_RA_SELF_TEST_A, &buffer[1]);
syundo0730	7:d5845b617139	229	return (buffer[0]>>3) \| ((buffer[1]>>4) & 0x03);
syundo0730	7:d5845b617139	230	}
syundo0730	7:d5845b617139	231
syundo0730	7:d5845b617139	232	/** Get self-test factory trim value for accelerometer Y axis.
syundo0730	7:d5845b617139	233	* @return factory trim value
syundo0730	7:d5845b617139	234	* @see MPU6050_RA_SELF_TEST_Y
syundo0730	7:d5845b617139	235	*/
syundo0730	7:d5845b617139	236	uint8_t MPU6050::getAccelYSelfTestFactoryTrim() {
syundo0730	7:d5845b617139	237	I2Cdev::readByte(devAddr, MPU6050_RA_SELF_TEST_Y, &buffer[0]);
syundo0730	7:d5845b617139	238	I2Cdev::readByte(devAddr, MPU6050_RA_SELF_TEST_A, &buffer[1]);
syundo0730	7:d5845b617139	239	return (buffer[0]>>3) \| ((buffer[1]>>2) & 0x03);
syundo0730	7:d5845b617139	240	}
syundo0730	7:d5845b617139	241
syundo0730	7:d5845b617139	242	/** Get self-test factory trim value for accelerometer Z axis.
syundo0730	7:d5845b617139	243	* @return factory trim value
syundo0730	7:d5845b617139	244	* @see MPU6050_RA_SELF_TEST_Z
syundo0730	7:d5845b617139	245	*/
syundo0730	7:d5845b617139	246	uint8_t MPU6050::getAccelZSelfTestFactoryTrim() {
syundo0730	7:d5845b617139	247	I2Cdev::readBytes(devAddr, MPU6050_RA_SELF_TEST_Z, 2, buffer);
syundo0730	7:d5845b617139	248	return (buffer[0]>>3) \| (buffer[1] & 0x03);
syundo0730	7:d5845b617139	249	}
syundo0730	7:d5845b617139	250
syundo0730	7:d5845b617139	251	/** Get self-test factory trim value for gyro X axis.
syundo0730	7:d5845b617139	252	* @return factory trim value
syundo0730	7:d5845b617139	253	* @see MPU6050_RA_SELF_TEST_X
syundo0730	7:d5845b617139	254	*/
syundo0730	7:d5845b617139	255	uint8_t MPU6050::getGyroXSelfTestFactoryTrim() {
syundo0730	7:d5845b617139	256	I2Cdev::readByte(devAddr, MPU6050_RA_SELF_TEST_X, buffer);
syundo0730	7:d5845b617139	257	return (buffer[0] & 0x1F);
syundo0730	7:d5845b617139	258	}
syundo0730	7:d5845b617139	259
syundo0730	7:d5845b617139	260	/** Get self-test factory trim value for gyro Y axis.
syundo0730	7:d5845b617139	261	* @return factory trim value
syundo0730	7:d5845b617139	262	* @see MPU6050_RA_SELF_TEST_Y
syundo0730	7:d5845b617139	263	*/
syundo0730	7:d5845b617139	264	uint8_t MPU6050::getGyroYSelfTestFactoryTrim() {
syundo0730	7:d5845b617139	265	I2Cdev::readByte(devAddr, MPU6050_RA_SELF_TEST_Y, buffer);
syundo0730	7:d5845b617139	266	return (buffer[0] & 0x1F);
syundo0730	7:d5845b617139	267	}
syundo0730	7:d5845b617139	268
syundo0730	7:d5845b617139	269	/** Get self-test factory trim value for gyro Z axis.
syundo0730	7:d5845b617139	270	* @return factory trim value
syundo0730	7:d5845b617139	271	* @see MPU6050_RA_SELF_TEST_Z
syundo0730	7:d5845b617139	272	*/
syundo0730	7:d5845b617139	273	uint8_t MPU6050::getGyroZSelfTestFactoryTrim() {
syundo0730	7:d5845b617139	274	I2Cdev::readByte(devAddr, MPU6050_RA_SELF_TEST_Z, buffer);
syundo0730	7:d5845b617139	275	return (buffer[0] & 0x1F);
garfieldsg	0:662207e34fba	276	}
garfieldsg	0:662207e34fba	277
garfieldsg	0:662207e34fba	278	// ACCEL_CONFIG register
garfieldsg	0:662207e34fba	279
garfieldsg	0:662207e34fba	280	/** Get self-test enabled setting for accelerometer X axis.
garfieldsg	0:662207e34fba	281	* @return Self-test enabled value
garfieldsg	0:662207e34fba	282	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	283	*/
syundo0730	6:f38dfe62d74c	284	bool MPU6050::getAccelXSelfTest() {
syundo0730	7:d5845b617139	285	I2Cdev::readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_XA_ST_BIT, buffer);
garfieldsg	0:662207e34fba	286	return buffer[0];
garfieldsg	0:662207e34fba	287	}
garfieldsg	0:662207e34fba	288	/** Get self-test enabled setting for accelerometer X axis.
garfieldsg	0:662207e34fba	289	* @param enabled Self-test enabled value
garfieldsg	0:662207e34fba	290	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	291	*/
syundo0730	6:f38dfe62d74c	292	void MPU6050::setAccelXSelfTest(bool enabled) {
syundo0730	7:d5845b617139	293	I2Cdev::writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_XA_ST_BIT, enabled);
garfieldsg	0:662207e34fba	294	}
garfieldsg	0:662207e34fba	295	/** Get self-test enabled value for accelerometer Y axis.
garfieldsg	0:662207e34fba	296	* @return Self-test enabled value
garfieldsg	0:662207e34fba	297	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	298	*/
syundo0730	6:f38dfe62d74c	299	bool MPU6050::getAccelYSelfTest() {
syundo0730	7:d5845b617139	300	I2Cdev::readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_YA_ST_BIT, buffer);
garfieldsg	0:662207e34fba	301	return buffer[0];
garfieldsg	0:662207e34fba	302	}
garfieldsg	0:662207e34fba	303	/** Get self-test enabled value for accelerometer Y axis.
garfieldsg	0:662207e34fba	304	* @param enabled Self-test enabled value
garfieldsg	0:662207e34fba	305	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	306	*/
syundo0730	6:f38dfe62d74c	307	void MPU6050::setAccelYSelfTest(bool enabled) {
syundo0730	7:d5845b617139	308	I2Cdev::writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_YA_ST_BIT, enabled);
garfieldsg	0:662207e34fba	309	}
garfieldsg	0:662207e34fba	310	/** Get self-test enabled value for accelerometer Z axis.
garfieldsg	0:662207e34fba	311	* @return Self-test enabled value
garfieldsg	0:662207e34fba	312	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	313	*/
syundo0730	6:f38dfe62d74c	314	bool MPU6050::getAccelZSelfTest() {
syundo0730	7:d5845b617139	315	I2Cdev::readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ZA_ST_BIT, buffer);
garfieldsg	0:662207e34fba	316	return buffer[0];
garfieldsg	0:662207e34fba	317	}
garfieldsg	0:662207e34fba	318	/** Set self-test enabled value for accelerometer Z axis.
garfieldsg	0:662207e34fba	319	* @param enabled Self-test enabled value
garfieldsg	0:662207e34fba	320	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	321	*/
syundo0730	6:f38dfe62d74c	322	void MPU6050::setAccelZSelfTest(bool enabled) {
syundo0730	7:d5845b617139	323	I2Cdev::writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ZA_ST_BIT, enabled);
garfieldsg	0:662207e34fba	324	}
garfieldsg	0:662207e34fba	325	/** Get full-scale accelerometer range.
garfieldsg	0:662207e34fba	326	* The FS_SEL parameter allows setting the full-scale range of the accelerometer
garfieldsg	0:662207e34fba	327	* sensors, as described in the table below.
garfieldsg	0:662207e34fba	328	*
garfieldsg	0:662207e34fba	329	* <pre>
garfieldsg	0:662207e34fba	330	* 0 = +/- 2g
garfieldsg	0:662207e34fba	331	* 1 = +/- 4g
garfieldsg	0:662207e34fba	332	* 2 = +/- 8g
garfieldsg	0:662207e34fba	333	* 3 = +/- 16g
garfieldsg	0:662207e34fba	334	* </pre>
garfieldsg	0:662207e34fba	335	*
garfieldsg	0:662207e34fba	336	* @return Current full-scale accelerometer range setting
garfieldsg	0:662207e34fba	337	* @see MPU6050_ACCEL_FS_2
garfieldsg	0:662207e34fba	338	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	339	* @see MPU6050_ACONFIG_AFS_SEL_BIT
garfieldsg	0:662207e34fba	340	* @see MPU6050_ACONFIG_AFS_SEL_LENGTH
garfieldsg	0:662207e34fba	341	*/
syundo0730	6:f38dfe62d74c	342	uint8_t MPU6050::getFullScaleAccelRange() {
syundo0730	7:d5845b617139	343	I2Cdev::readBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_AFS_SEL_BIT, MPU6050_ACONFIG_AFS_SEL_LENGTH, buffer);
garfieldsg	0:662207e34fba	344	return buffer[0];
garfieldsg	0:662207e34fba	345	}
garfieldsg	0:662207e34fba	346	/** Set full-scale accelerometer range.
garfieldsg	0:662207e34fba	347	* @param range New full-scale accelerometer range setting
garfieldsg	0:662207e34fba	348	* @see getFullScaleAccelRange()
garfieldsg	0:662207e34fba	349	*/
syundo0730	6:f38dfe62d74c	350	void MPU6050::setFullScaleAccelRange(uint8_t range) {
syundo0730	7:d5845b617139	351	I2Cdev::writeBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_AFS_SEL_BIT, MPU6050_ACONFIG_AFS_SEL_LENGTH, range);
garfieldsg	0:662207e34fba	352	}
garfieldsg	0:662207e34fba	353	/** Get the high-pass filter configuration.
garfieldsg	0:662207e34fba	354	* The DHPF is a filter module in the path leading to motion detectors (Free
garfieldsg	0:662207e34fba	355	* Fall, Motion threshold, and Zero Motion). The high pass filter output is not
garfieldsg	0:662207e34fba	356	* available to the data registers (see Figure in Section 8 of the MPU-6000/
garfieldsg	0:662207e34fba	357	* MPU-6050 Product Specification document).
garfieldsg	0:662207e34fba	358	*
garfieldsg	0:662207e34fba	359	* The high pass filter has three modes:
garfieldsg	0:662207e34fba	360	*
garfieldsg	0:662207e34fba	361	* <pre>
garfieldsg	0:662207e34fba	362	* Reset: The filter output settles to zero within one sample. This
garfieldsg	0:662207e34fba	363	* effectively disables the high pass filter. This mode may be toggled
garfieldsg	0:662207e34fba	364	* to quickly settle the filter.
garfieldsg	0:662207e34fba	365	*
garfieldsg	0:662207e34fba	366	* On: The high pass filter will pass signals above the cut off frequency.
garfieldsg	0:662207e34fba	367	*
garfieldsg	0:662207e34fba	368	* Hold: When triggered, the filter holds the present sample. The filter
garfieldsg	0:662207e34fba	369	* output will be the difference between the input sample and the held
garfieldsg	0:662207e34fba	370	* sample.
garfieldsg	0:662207e34fba	371	* </pre>
garfieldsg	0:662207e34fba	372	*
garfieldsg	0:662207e34fba	373	* <pre>
garfieldsg	0:662207e34fba	374	* ACCEL_HPF \| Filter Mode \| Cut-off Frequency
garfieldsg	0:662207e34fba	375	* ----------+-------------+------------------
garfieldsg	0:662207e34fba	376	* 0 \| Reset \| None
garfieldsg	0:662207e34fba	377	* 1 \| On \| 5Hz
garfieldsg	0:662207e34fba	378	* 2 \| On \| 2.5Hz
garfieldsg	0:662207e34fba	379	* 3 \| On \| 1.25Hz
garfieldsg	0:662207e34fba	380	* 4 \| On \| 0.63Hz
garfieldsg	0:662207e34fba	381	* 7 \| Hold \| None
garfieldsg	0:662207e34fba	382	* </pre>
garfieldsg	0:662207e34fba	383	*
garfieldsg	0:662207e34fba	384	* @return Current high-pass filter configuration
garfieldsg	0:662207e34fba	385	* @see MPU6050_DHPF_RESET
garfieldsg	0:662207e34fba	386	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	387	*/
syundo0730	6:f38dfe62d74c	388	uint8_t MPU6050::getDHPFMode() {
syundo0730	7:d5845b617139	389	I2Cdev::readBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ACCEL_HPF_BIT, MPU6050_ACONFIG_ACCEL_HPF_LENGTH, buffer);
garfieldsg	0:662207e34fba	390	return buffer[0];
garfieldsg	0:662207e34fba	391	}
garfieldsg	0:662207e34fba	392	/** Set the high-pass filter configuration.
garfieldsg	0:662207e34fba	393	* @param bandwidth New high-pass filter configuration
garfieldsg	0:662207e34fba	394	* @see setDHPFMode()
garfieldsg	0:662207e34fba	395	* @see MPU6050_DHPF_RESET
garfieldsg	0:662207e34fba	396	* @see MPU6050_RA_ACCEL_CONFIG
garfieldsg	0:662207e34fba	397	*/
syundo0730	6:f38dfe62d74c	398	void MPU6050::setDHPFMode(uint8_t bandwidth) {
syundo0730	7:d5845b617139	399	I2Cdev::writeBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ACCEL_HPF_BIT, MPU6050_ACONFIG_ACCEL_HPF_LENGTH, bandwidth);
garfieldsg	0:662207e34fba	400	}
garfieldsg	0:662207e34fba	401
garfieldsg	0:662207e34fba	402	// FF_THR register
garfieldsg	0:662207e34fba	403
garfieldsg	0:662207e34fba	404	/** Get free-fall event acceleration threshold.
garfieldsg	0:662207e34fba	405	* This register configures the detection threshold for Free Fall event
garfieldsg	0:662207e34fba	406	* detection. The unit of FF_THR is 1LSB = 2mg. Free Fall is detected when the
garfieldsg	0:662207e34fba	407	* absolute value of the accelerometer measurements for the three axes are each
garfieldsg	0:662207e34fba	408	* less than the detection threshold. This condition increments the Free Fall
garfieldsg	0:662207e34fba	409	* duration counter (Register 30). The Free Fall interrupt is triggered when the
garfieldsg	0:662207e34fba	410	* Free Fall duration counter reaches the time specified in FF_DUR.
garfieldsg	0:662207e34fba	411	*
garfieldsg	0:662207e34fba	412	* For more details on the Free Fall detection interrupt, see Section 8.2 of the
garfieldsg	0:662207e34fba	413	* MPU-6000/MPU-6050 Product Specification document as well as Registers 56 and
garfieldsg	0:662207e34fba	414	* 58 of this document.
garfieldsg	0:662207e34fba	415	*
garfieldsg	0:662207e34fba	416	* @return Current free-fall acceleration threshold value (LSB = 2mg)
garfieldsg	0:662207e34fba	417	* @see MPU6050_RA_FF_THR
garfieldsg	0:662207e34fba	418	*/
syundo0730	6:f38dfe62d74c	419	uint8_t MPU6050::getFreefallDetectionThreshold() {
syundo0730	7:d5845b617139	420	I2Cdev::readByte(devAddr, MPU6050_RA_FF_THR, buffer);
garfieldsg	0:662207e34fba	421	return buffer[0];
garfieldsg	0:662207e34fba	422	}
garfieldsg	0:662207e34fba	423	/** Get free-fall event acceleration threshold.
garfieldsg	0:662207e34fba	424	* @param threshold New free-fall acceleration threshold value (LSB = 2mg)
garfieldsg	0:662207e34fba	425	* @see getFreefallDetectionThreshold()
garfieldsg	0:662207e34fba	426	* @see MPU6050_RA_FF_THR
garfieldsg	0:662207e34fba	427	*/
syundo0730	6:f38dfe62d74c	428	void MPU6050::setFreefallDetectionThreshold(uint8_t threshold) {
syundo0730	7:d5845b617139	429	I2Cdev::writeByte(devAddr, MPU6050_RA_FF_THR, threshold);
garfieldsg	0:662207e34fba	430	}
garfieldsg	0:662207e34fba	431
garfieldsg	0:662207e34fba	432	// FF_DUR register
garfieldsg	0:662207e34fba	433
garfieldsg	0:662207e34fba	434	/** Get free-fall event duration threshold.
garfieldsg	0:662207e34fba	435	* This register configures the duration counter threshold for Free Fall event
garfieldsg	0:662207e34fba	436	* detection. The duration counter ticks at 1kHz, therefore FF_DUR has a unit
garfieldsg	0:662207e34fba	437	* of 1 LSB = 1 ms.
garfieldsg	0:662207e34fba	438	*
garfieldsg	0:662207e34fba	439	* The Free Fall duration counter increments while the absolute value of the
garfieldsg	0:662207e34fba	440	* accelerometer measurements are each less than the detection threshold
garfieldsg	0:662207e34fba	441	* (Register 29). The Free Fall interrupt is triggered when the Free Fall
garfieldsg	0:662207e34fba	442	* duration counter reaches the time specified in this register.
garfieldsg	0:662207e34fba	443	*
garfieldsg	0:662207e34fba	444	* For more details on the Free Fall detection interrupt, see Section 8.2 of
garfieldsg	0:662207e34fba	445	* the MPU-6000/MPU-6050 Product Specification document as well as Registers 56
garfieldsg	0:662207e34fba	446	* and 58 of this document.
garfieldsg	0:662207e34fba	447	*
garfieldsg	0:662207e34fba	448	* @return Current free-fall duration threshold value (LSB = 1ms)
garfieldsg	0:662207e34fba	449	* @see MPU6050_RA_FF_DUR
garfieldsg	0:662207e34fba	450	*/
syundo0730	6:f38dfe62d74c	451	uint8_t MPU6050::getFreefallDetectionDuration() {
syundo0730	7:d5845b617139	452	I2Cdev::readByte(devAddr, MPU6050_RA_FF_DUR, buffer);
garfieldsg	0:662207e34fba	453	return buffer[0];
garfieldsg	0:662207e34fba	454	}
garfieldsg	0:662207e34fba	455	/** Get free-fall event duration threshold.
garfieldsg	0:662207e34fba	456	* @param duration New free-fall duration threshold value (LSB = 1ms)
garfieldsg	0:662207e34fba	457	* @see getFreefallDetectionDuration()
garfieldsg	0:662207e34fba	458	* @see MPU6050_RA_FF_DUR
garfieldsg	0:662207e34fba	459	*/
syundo0730	6:f38dfe62d74c	460	void MPU6050::setFreefallDetectionDuration(uint8_t duration) {
syundo0730	7:d5845b617139	461	I2Cdev::writeByte(devAddr, MPU6050_RA_FF_DUR, duration);
garfieldsg	0:662207e34fba	462	}
garfieldsg	0:662207e34fba	463
garfieldsg	0:662207e34fba	464	// MOT_THR register
garfieldsg	0:662207e34fba	465
garfieldsg	0:662207e34fba	466	/** Get motion detection event acceleration threshold.
garfieldsg	0:662207e34fba	467	* This register configures the detection threshold for Motion interrupt
garfieldsg	0:662207e34fba	468	* generation. The unit of MOT_THR is 1LSB = 2mg. Motion is detected when the
garfieldsg	0:662207e34fba	469	* absolute value of any of the accelerometer measurements exceeds this Motion
garfieldsg	0:662207e34fba	470	* detection threshold. This condition increments the Motion detection duration
garfieldsg	0:662207e34fba	471	* counter (Register 32). The Motion detection interrupt is triggered when the
garfieldsg	0:662207e34fba	472	* Motion Detection counter reaches the time count specified in MOT_DUR
garfieldsg	0:662207e34fba	473	* (Register 32).
garfieldsg	0:662207e34fba	474	*
garfieldsg	0:662207e34fba	475	* The Motion interrupt will indicate the axis and polarity of detected motion
garfieldsg	0:662207e34fba	476	* in MOT_DETECT_STATUS (Register 97).
garfieldsg	0:662207e34fba	477	*
garfieldsg	0:662207e34fba	478	* For more details on the Motion detection interrupt, see Section 8.3 of the
garfieldsg	0:662207e34fba	479	* MPU-6000/MPU-6050 Product Specification document as well as Registers 56 and
garfieldsg	0:662207e34fba	480	* 58 of this document.
garfieldsg	0:662207e34fba	481	*
garfieldsg	0:662207e34fba	482	* @return Current motion detection acceleration threshold value (LSB = 2mg)
garfieldsg	0:662207e34fba	483	* @see MPU6050_RA_MOT_THR
garfieldsg	0:662207e34fba	484	*/
syundo0730	6:f38dfe62d74c	485	uint8_t MPU6050::getMotionDetectionThreshold() {
syundo0730	7:d5845b617139	486	I2Cdev::readByte(devAddr, MPU6050_RA_MOT_THR, buffer);
garfieldsg	0:662207e34fba	487	return buffer[0];
garfieldsg	0:662207e34fba	488	}
syundo0730	7:d5845b617139	489	/** Set motion detection event acceleration threshold.
garfieldsg	0:662207e34fba	490	* @param threshold New motion detection acceleration threshold value (LSB = 2mg)
garfieldsg	0:662207e34fba	491	* @see getMotionDetectionThreshold()
garfieldsg	0:662207e34fba	492	* @see MPU6050_RA_MOT_THR
garfieldsg	0:662207e34fba	493	*/
syundo0730	6:f38dfe62d74c	494	void MPU6050::setMotionDetectionThreshold(uint8_t threshold) {
syundo0730	7:d5845b617139	495	I2Cdev::writeByte(devAddr, MPU6050_RA_MOT_THR, threshold);
garfieldsg	0:662207e34fba	496	}
garfieldsg	0:662207e34fba	497
garfieldsg	0:662207e34fba	498	// MOT_DUR register
garfieldsg	0:662207e34fba	499
garfieldsg	0:662207e34fba	500	/** Get motion detection event duration threshold.
garfieldsg	0:662207e34fba	501	* This register configures the duration counter threshold for Motion interrupt
garfieldsg	0:662207e34fba	502	* generation. The duration counter ticks at 1 kHz, therefore MOT_DUR has a unit
garfieldsg	0:662207e34fba	503	* of 1LSB = 1ms. The Motion detection duration counter increments when the
garfieldsg	0:662207e34fba	504	* absolute value of any of the accelerometer measurements exceeds the Motion
garfieldsg	0:662207e34fba	505	* detection threshold (Register 31). The Motion detection interrupt is
garfieldsg	0:662207e34fba	506	* triggered when the Motion detection counter reaches the time count specified
garfieldsg	0:662207e34fba	507	* in this register.
garfieldsg	0:662207e34fba	508	*
garfieldsg	0:662207e34fba	509	* For more details on the Motion detection interrupt, see Section 8.3 of the
garfieldsg	0:662207e34fba	510	* MPU-6000/MPU-6050 Product Specification document.
garfieldsg	0:662207e34fba	511	*
garfieldsg	0:662207e34fba	512	* @return Current motion detection duration threshold value (LSB = 1ms)
garfieldsg	0:662207e34fba	513	* @see MPU6050_RA_MOT_DUR
garfieldsg	0:662207e34fba	514	*/
syundo0730	6:f38dfe62d74c	515	uint8_t MPU6050::getMotionDetectionDuration() {
syundo0730	7:d5845b617139	516	I2Cdev::readByte(devAddr, MPU6050_RA_MOT_DUR, buffer);
garfieldsg	0:662207e34fba	517	return buffer[0];
garfieldsg	0:662207e34fba	518	}
garfieldsg	0:662207e34fba	519	/** Set motion detection event duration threshold.
garfieldsg	0:662207e34fba	520	* @param duration New motion detection duration threshold value (LSB = 1ms)
garfieldsg	0:662207e34fba	521	* @see getMotionDetectionDuration()
garfieldsg	0:662207e34fba	522	* @see MPU6050_RA_MOT_DUR
garfieldsg	0:662207e34fba	523	*/
syundo0730	6:f38dfe62d74c	524	void MPU6050::setMotionDetectionDuration(uint8_t duration) {
syundo0730	7:d5845b617139	525	I2Cdev::writeByte(devAddr, MPU6050_RA_MOT_DUR, duration);
garfieldsg	0:662207e34fba	526	}
garfieldsg	0:662207e34fba	527
garfieldsg	0:662207e34fba	528	// ZRMOT_THR register
garfieldsg	0:662207e34fba	529
garfieldsg	0:662207e34fba	530	/** Get zero motion detection event acceleration threshold.
garfieldsg	0:662207e34fba	531	* This register configures the detection threshold for Zero Motion interrupt
garfieldsg	0:662207e34fba	532	* generation. The unit of ZRMOT_THR is 1LSB = 2mg. Zero Motion is detected when
garfieldsg	0:662207e34fba	533	* the absolute value of the accelerometer measurements for the 3 axes are each
garfieldsg	0:662207e34fba	534	* less than the detection threshold. This condition increments the Zero Motion
garfieldsg	0:662207e34fba	535	* duration counter (Register 34). The Zero Motion interrupt is triggered when
garfieldsg	0:662207e34fba	536	* the Zero Motion duration counter reaches the time count specified in
garfieldsg	0:662207e34fba	537	* ZRMOT_DUR (Register 34).
garfieldsg	0:662207e34fba	538	*
garfieldsg	0:662207e34fba	539	* Unlike Free Fall or Motion detection, Zero Motion detection triggers an
garfieldsg	0:662207e34fba	540	* interrupt both when Zero Motion is first detected and when Zero Motion is no
garfieldsg	0:662207e34fba	541	* longer detected.
garfieldsg	0:662207e34fba	542	*
garfieldsg	0:662207e34fba	543	* When a zero motion event is detected, a Zero Motion Status will be indicated
garfieldsg	0:662207e34fba	544	* in the MOT_DETECT_STATUS register (Register 97). When a motion-to-zero-motion
garfieldsg	0:662207e34fba	545	* condition is detected, the status bit is set to 1. When a zero-motion-to-
garfieldsg	0:662207e34fba	546	* motion condition is detected, the status bit is set to 0.
garfieldsg	0:662207e34fba	547	*
garfieldsg	0:662207e34fba	548	* For more details on the Zero Motion detection interrupt, see Section 8.4 of
garfieldsg	0:662207e34fba	549	* the MPU-6000/MPU-6050 Product Specification document as well as Registers 56
garfieldsg	0:662207e34fba	550	* and 58 of this document.
garfieldsg	0:662207e34fba	551	*
garfieldsg	0:662207e34fba	552	* @return Current zero motion detection acceleration threshold value (LSB = 2mg)
garfieldsg	0:662207e34fba	553	* @see MPU6050_RA_ZRMOT_THR
garfieldsg	0:662207e34fba	554	*/
syundo0730	6:f38dfe62d74c	555	uint8_t MPU6050::getZeroMotionDetectionThreshold() {
syundo0730	7:d5845b617139	556	I2Cdev::readByte(devAddr, MPU6050_RA_ZRMOT_THR, buffer);
garfieldsg	0:662207e34fba	557	return buffer[0];
garfieldsg	0:662207e34fba	558	}
garfieldsg	0:662207e34fba	559	/** Set zero motion detection event acceleration threshold.
garfieldsg	0:662207e34fba	560	* @param threshold New zero motion detection acceleration threshold value (LSB = 2mg)
garfieldsg	0:662207e34fba	561	* @see getZeroMotionDetectionThreshold()
garfieldsg	0:662207e34fba	562	* @see MPU6050_RA_ZRMOT_THR
garfieldsg	0:662207e34fba	563	*/
syundo0730	6:f38dfe62d74c	564	void MPU6050::setZeroMotionDetectionThreshold(uint8_t threshold) {
syundo0730	7:d5845b617139	565	I2Cdev::writeByte(devAddr, MPU6050_RA_ZRMOT_THR, threshold);
garfieldsg	0:662207e34fba	566	}
garfieldsg	0:662207e34fba	567
garfieldsg	0:662207e34fba	568	// ZRMOT_DUR register
garfieldsg	0:662207e34fba	569
garfieldsg	0:662207e34fba	570	/** Get zero motion detection event duration threshold.
garfieldsg	0:662207e34fba	571	* This register configures the duration counter threshold for Zero Motion
garfieldsg	0:662207e34fba	572	* interrupt generation. The duration counter ticks at 16 Hz, therefore
garfieldsg	0:662207e34fba	573	* ZRMOT_DUR has a unit of 1 LSB = 64 ms. The Zero Motion duration counter
garfieldsg	0:662207e34fba	574	* increments while the absolute value of the accelerometer measurements are
garfieldsg	0:662207e34fba	575	* each less than the detection threshold (Register 33). The Zero Motion
garfieldsg	0:662207e34fba	576	* interrupt is triggered when the Zero Motion duration counter reaches the time
garfieldsg	0:662207e34fba	577	* count specified in this register.
garfieldsg	0:662207e34fba	578	*
garfieldsg	0:662207e34fba	579	* For more details on the Zero Motion detection interrupt, see Section 8.4 of
garfieldsg	0:662207e34fba	580	* the MPU-6000/MPU-6050 Product Specification document, as well as Registers 56
garfieldsg	0:662207e34fba	581	* and 58 of this document.
garfieldsg	0:662207e34fba	582	*
garfieldsg	0:662207e34fba	583	* @return Current zero motion detection duration threshold value (LSB = 64ms)
garfieldsg	0:662207e34fba	584	* @see MPU6050_RA_ZRMOT_DUR
garfieldsg	0:662207e34fba	585	*/
syundo0730	6:f38dfe62d74c	586	uint8_t MPU6050::getZeroMotionDetectionDuration() {
syundo0730	7:d5845b617139	587	I2Cdev::readByte(devAddr, MPU6050_RA_ZRMOT_DUR, buffer);
garfieldsg	0:662207e34fba	588	return buffer[0];
garfieldsg	0:662207e34fba	589	}
garfieldsg	0:662207e34fba	590	/** Set zero motion detection event duration threshold.
garfieldsg	0:662207e34fba	591	* @param duration New zero motion detection duration threshold value (LSB = 1ms)
garfieldsg	0:662207e34fba	592	* @see getZeroMotionDetectionDuration()
garfieldsg	0:662207e34fba	593	* @see MPU6050_RA_ZRMOT_DUR
garfieldsg	0:662207e34fba	594	*/
syundo0730	6:f38dfe62d74c	595	void MPU6050::setZeroMotionDetectionDuration(uint8_t duration) {
syundo0730	7:d5845b617139	596	I2Cdev::writeByte(devAddr, MPU6050_RA_ZRMOT_DUR, duration);
garfieldsg	0:662207e34fba	597	}
garfieldsg	0:662207e34fba	598
garfieldsg	0:662207e34fba	599	// FIFO_EN register
garfieldsg	0:662207e34fba	600
garfieldsg	0:662207e34fba	601	/** Get temperature FIFO enabled value.
garfieldsg	0:662207e34fba	602	* When set to 1, this bit enables TEMP_OUT_H and TEMP_OUT_L (Registers 65 and
garfieldsg	0:662207e34fba	603	* 66) to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	604	* @return Current temperature FIFO enabled value
garfieldsg	0:662207e34fba	605	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	606	*/
syundo0730	6:f38dfe62d74c	607	bool MPU6050::getTempFIFOEnabled() {
syundo0730	7:d5845b617139	608	I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_TEMP_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	609	return buffer[0];
garfieldsg	0:662207e34fba	610	}
garfieldsg	0:662207e34fba	611	/** Set temperature FIFO enabled value.
garfieldsg	0:662207e34fba	612	* @param enabled New temperature FIFO enabled value
garfieldsg	0:662207e34fba	613	* @see getTempFIFOEnabled()
garfieldsg	0:662207e34fba	614	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	615	*/
syundo0730	6:f38dfe62d74c	616	void MPU6050::setTempFIFOEnabled(bool enabled) {
syundo0730	7:d5845b617139	617	I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_TEMP_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	618	}
garfieldsg	0:662207e34fba	619	/** Get gyroscope X-axis FIFO enabled value.
garfieldsg	0:662207e34fba	620	* When set to 1, this bit enables GYRO_XOUT_H and GYRO_XOUT_L (Registers 67 and
garfieldsg	0:662207e34fba	621	* 68) to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	622	* @return Current gyroscope X-axis FIFO enabled value
garfieldsg	0:662207e34fba	623	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	624	*/
syundo0730	6:f38dfe62d74c	625	bool MPU6050::getXGyroFIFOEnabled() {
syundo0730	7:d5845b617139	626	I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_XG_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	627	return buffer[0];
garfieldsg	0:662207e34fba	628	}
garfieldsg	0:662207e34fba	629	/** Set gyroscope X-axis FIFO enabled value.
garfieldsg	0:662207e34fba	630	* @param enabled New gyroscope X-axis FIFO enabled value
garfieldsg	0:662207e34fba	631	* @see getXGyroFIFOEnabled()
garfieldsg	0:662207e34fba	632	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	633	*/
syundo0730	6:f38dfe62d74c	634	void MPU6050::setXGyroFIFOEnabled(bool enabled) {
syundo0730	7:d5845b617139	635	I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_XG_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	636	}
garfieldsg	0:662207e34fba	637	/** Get gyroscope Y-axis FIFO enabled value.
garfieldsg	0:662207e34fba	638	* When set to 1, this bit enables GYRO_YOUT_H and GYRO_YOUT_L (Registers 69 and
garfieldsg	0:662207e34fba	639	* 70) to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	640	* @return Current gyroscope Y-axis FIFO enabled value
garfieldsg	0:662207e34fba	641	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	642	*/
syundo0730	6:f38dfe62d74c	643	bool MPU6050::getYGyroFIFOEnabled() {
syundo0730	7:d5845b617139	644	I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_YG_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	645	return buffer[0];
garfieldsg	0:662207e34fba	646	}
garfieldsg	0:662207e34fba	647	/** Set gyroscope Y-axis FIFO enabled value.
garfieldsg	0:662207e34fba	648	* @param enabled New gyroscope Y-axis FIFO enabled value
garfieldsg	0:662207e34fba	649	* @see getYGyroFIFOEnabled()
garfieldsg	0:662207e34fba	650	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	651	*/
syundo0730	6:f38dfe62d74c	652	void MPU6050::setYGyroFIFOEnabled(bool enabled) {
syundo0730	7:d5845b617139	653	I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_YG_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	654	}
garfieldsg	0:662207e34fba	655	/** Get gyroscope Z-axis FIFO enabled value.
garfieldsg	0:662207e34fba	656	* When set to 1, this bit enables GYRO_ZOUT_H and GYRO_ZOUT_L (Registers 71 and
garfieldsg	0:662207e34fba	657	* 72) to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	658	* @return Current gyroscope Z-axis FIFO enabled value
garfieldsg	0:662207e34fba	659	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	660	*/
syundo0730	6:f38dfe62d74c	661	bool MPU6050::getZGyroFIFOEnabled() {
syundo0730	7:d5845b617139	662	I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ZG_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	663	return buffer[0];
garfieldsg	0:662207e34fba	664	}
garfieldsg	0:662207e34fba	665	/** Set gyroscope Z-axis FIFO enabled value.
garfieldsg	0:662207e34fba	666	* @param enabled New gyroscope Z-axis FIFO enabled value
garfieldsg	0:662207e34fba	667	* @see getZGyroFIFOEnabled()
garfieldsg	0:662207e34fba	668	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	669	*/
syundo0730	6:f38dfe62d74c	670	void MPU6050::setZGyroFIFOEnabled(bool enabled) {
syundo0730	7:d5845b617139	671	I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ZG_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	672	}
garfieldsg	0:662207e34fba	673	/** Get accelerometer FIFO enabled value.
garfieldsg	0:662207e34fba	674	* When set to 1, this bit enables ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H,
garfieldsg	0:662207e34fba	675	* ACCEL_YOUT_L, ACCEL_ZOUT_H, and ACCEL_ZOUT_L (Registers 59 to 64) to be
garfieldsg	0:662207e34fba	676	* written into the FIFO buffer.
garfieldsg	0:662207e34fba	677	* @return Current accelerometer FIFO enabled value
garfieldsg	0:662207e34fba	678	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	679	*/
syundo0730	6:f38dfe62d74c	680	bool MPU6050::getAccelFIFOEnabled() {
syundo0730	7:d5845b617139	681	I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ACCEL_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	682	return buffer[0];
garfieldsg	0:662207e34fba	683	}
garfieldsg	0:662207e34fba	684	/** Set accelerometer FIFO enabled value.
garfieldsg	0:662207e34fba	685	* @param enabled New accelerometer FIFO enabled value
garfieldsg	0:662207e34fba	686	* @see getAccelFIFOEnabled()
garfieldsg	0:662207e34fba	687	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	688	*/
syundo0730	6:f38dfe62d74c	689	void MPU6050::setAccelFIFOEnabled(bool enabled) {
syundo0730	7:d5845b617139	690	I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ACCEL_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	691	}
garfieldsg	0:662207e34fba	692	/** Get Slave 2 FIFO enabled value.
garfieldsg	0:662207e34fba	693	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
garfieldsg	0:662207e34fba	694	* associated with Slave 2 to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	695	* @return Current Slave 2 FIFO enabled value
garfieldsg	0:662207e34fba	696	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	697	*/
syundo0730	6:f38dfe62d74c	698	bool MPU6050::getSlave2FIFOEnabled() {
syundo0730	7:d5845b617139	699	I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV2_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	700	return buffer[0];
garfieldsg	0:662207e34fba	701	}
garfieldsg	0:662207e34fba	702	/** Set Slave 2 FIFO enabled value.
garfieldsg	0:662207e34fba	703	* @param enabled New Slave 2 FIFO enabled value
garfieldsg	0:662207e34fba	704	* @see getSlave2FIFOEnabled()
garfieldsg	0:662207e34fba	705	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	706	*/
syundo0730	6:f38dfe62d74c	707	void MPU6050::setSlave2FIFOEnabled(bool enabled) {
syundo0730	7:d5845b617139	708	I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV2_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	709	}
garfieldsg	0:662207e34fba	710	/** Get Slave 1 FIFO enabled value.
garfieldsg	0:662207e34fba	711	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
garfieldsg	0:662207e34fba	712	* associated with Slave 1 to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	713	* @return Current Slave 1 FIFO enabled value
garfieldsg	0:662207e34fba	714	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	715	*/
syundo0730	6:f38dfe62d74c	716	bool MPU6050::getSlave1FIFOEnabled() {
syundo0730	7:d5845b617139	717	I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV1_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	718	return buffer[0];
garfieldsg	0:662207e34fba	719	}
garfieldsg	0:662207e34fba	720	/** Set Slave 1 FIFO enabled value.
garfieldsg	0:662207e34fba	721	* @param enabled New Slave 1 FIFO enabled value
garfieldsg	0:662207e34fba	722	* @see getSlave1FIFOEnabled()
garfieldsg	0:662207e34fba	723	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	724	*/
syundo0730	6:f38dfe62d74c	725	void MPU6050::setSlave1FIFOEnabled(bool enabled) {
syundo0730	7:d5845b617139	726	I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV1_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	727	}
garfieldsg	0:662207e34fba	728	/** Get Slave 0 FIFO enabled value.
garfieldsg	0:662207e34fba	729	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
garfieldsg	0:662207e34fba	730	* associated with Slave 0 to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	731	* @return Current Slave 0 FIFO enabled value
garfieldsg	0:662207e34fba	732	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	733	*/
syundo0730	6:f38dfe62d74c	734	bool MPU6050::getSlave0FIFOEnabled() {
syundo0730	7:d5845b617139	735	I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV0_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	736	return buffer[0];
garfieldsg	0:662207e34fba	737	}
garfieldsg	0:662207e34fba	738	/** Set Slave 0 FIFO enabled value.
garfieldsg	0:662207e34fba	739	* @param enabled New Slave 0 FIFO enabled value
garfieldsg	0:662207e34fba	740	* @see getSlave0FIFOEnabled()
garfieldsg	0:662207e34fba	741	* @see MPU6050_RA_FIFO_EN
garfieldsg	0:662207e34fba	742	*/
syundo0730	6:f38dfe62d74c	743	void MPU6050::setSlave0FIFOEnabled(bool enabled) {
syundo0730	7:d5845b617139	744	I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV0_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	745	}
garfieldsg	0:662207e34fba	746
garfieldsg	0:662207e34fba	747	// I2C_MST_CTRL register
garfieldsg	0:662207e34fba	748
garfieldsg	0:662207e34fba	749	/** Get multi-master enabled value.
garfieldsg	0:662207e34fba	750	* Multi-master capability allows multiple I2C masters to operate on the same
garfieldsg	0:662207e34fba	751	* bus. In circuits where multi-master capability is required, set MULT_MST_EN
garfieldsg	0:662207e34fba	752	* to 1. This will increase current drawn by approximately 30uA.
garfieldsg	0:662207e34fba	753	*
garfieldsg	0:662207e34fba	754	* In circuits where multi-master capability is required, the state of the I2C
garfieldsg	0:662207e34fba	755	* bus must always be monitored by each separate I2C Master. Before an I2C
garfieldsg	0:662207e34fba	756	* Master can assume arbitration of the bus, it must first confirm that no other
garfieldsg	0:662207e34fba	757	* I2C Master has arbitration of the bus. When MULT_MST_EN is set to 1, the
garfieldsg	0:662207e34fba	758	* MPU-60X0's bus arbitration detection logic is turned on, enabling it to
garfieldsg	0:662207e34fba	759	* detect when the bus is available.
garfieldsg	0:662207e34fba	760	*
garfieldsg	0:662207e34fba	761	* @return Current multi-master enabled value
garfieldsg	0:662207e34fba	762	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	763	*/
syundo0730	6:f38dfe62d74c	764	bool MPU6050::getMultiMasterEnabled() {
syundo0730	7:d5845b617139	765	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_MULT_MST_EN_BIT, buffer);
garfieldsg	0:662207e34fba	766	return buffer[0];
garfieldsg	0:662207e34fba	767	}
garfieldsg	0:662207e34fba	768	/** Set multi-master enabled value.
garfieldsg	0:662207e34fba	769	* @param enabled New multi-master enabled value
garfieldsg	0:662207e34fba	770	* @see getMultiMasterEnabled()
garfieldsg	0:662207e34fba	771	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	772	*/
syundo0730	6:f38dfe62d74c	773	void MPU6050::setMultiMasterEnabled(bool enabled) {
syundo0730	7:d5845b617139	774	I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_MULT_MST_EN_BIT, enabled);
garfieldsg	0:662207e34fba	775	}
garfieldsg	0:662207e34fba	776	/** Get wait-for-external-sensor-data enabled value.
garfieldsg	0:662207e34fba	777	* When the WAIT_FOR_ES bit is set to 1, the Data Ready interrupt will be
garfieldsg	0:662207e34fba	778	* delayed until External Sensor data from the Slave Devices are loaded into the
garfieldsg	0:662207e34fba	779	* EXT_SENS_DATA registers. This is used to ensure that both the internal sensor
garfieldsg	0:662207e34fba	780	* data (i.e. from gyro and accel) and external sensor data have been loaded to
garfieldsg	0:662207e34fba	781	* their respective data registers (i.e. the data is synced) when the Data Ready
garfieldsg	0:662207e34fba	782	* interrupt is triggered.
garfieldsg	0:662207e34fba	783	*
garfieldsg	0:662207e34fba	784	* @return Current wait-for-external-sensor-data enabled value
garfieldsg	0:662207e34fba	785	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	786	*/
syundo0730	6:f38dfe62d74c	787	bool MPU6050::getWaitForExternalSensorEnabled() {
syundo0730	7:d5845b617139	788	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_WAIT_FOR_ES_BIT, buffer);
garfieldsg	0:662207e34fba	789	return buffer[0];
garfieldsg	0:662207e34fba	790	}
garfieldsg	0:662207e34fba	791	/** Set wait-for-external-sensor-data enabled value.
garfieldsg	0:662207e34fba	792	* @param enabled New wait-for-external-sensor-data enabled value
garfieldsg	0:662207e34fba	793	* @see getWaitForExternalSensorEnabled()
garfieldsg	0:662207e34fba	794	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	795	*/
syundo0730	6:f38dfe62d74c	796	void MPU6050::setWaitForExternalSensorEnabled(bool enabled) {
syundo0730	7:d5845b617139	797	I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_WAIT_FOR_ES_BIT, enabled);
garfieldsg	0:662207e34fba	798	}
garfieldsg	0:662207e34fba	799	/** Get Slave 3 FIFO enabled value.
garfieldsg	0:662207e34fba	800	* When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
garfieldsg	0:662207e34fba	801	* associated with Slave 3 to be written into the FIFO buffer.
garfieldsg	0:662207e34fba	802	* @return Current Slave 3 FIFO enabled value
garfieldsg	0:662207e34fba	803	* @see MPU6050_RA_MST_CTRL
garfieldsg	0:662207e34fba	804	*/
syundo0730	6:f38dfe62d74c	805	bool MPU6050::getSlave3FIFOEnabled() {
syundo0730	7:d5845b617139	806	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_SLV_3_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	807	return buffer[0];
garfieldsg	0:662207e34fba	808	}
garfieldsg	0:662207e34fba	809	/** Set Slave 3 FIFO enabled value.
garfieldsg	0:662207e34fba	810	* @param enabled New Slave 3 FIFO enabled value
garfieldsg	0:662207e34fba	811	* @see getSlave3FIFOEnabled()
garfieldsg	0:662207e34fba	812	* @see MPU6050_RA_MST_CTRL
garfieldsg	0:662207e34fba	813	*/
syundo0730	6:f38dfe62d74c	814	void MPU6050::setSlave3FIFOEnabled(bool enabled) {
syundo0730	7:d5845b617139	815	I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_SLV_3_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	816	}
garfieldsg	0:662207e34fba	817	/** Get slave read/write transition enabled value.
garfieldsg	0:662207e34fba	818	* The I2C_MST_P_NSR bit configures the I2C Master's transition from one slave
garfieldsg	0:662207e34fba	819	* read to the next slave read. If the bit equals 0, there will be a restart
garfieldsg	0:662207e34fba	820	* between reads. If the bit equals 1, there will be a stop followed by a start
garfieldsg	0:662207e34fba	821	* of the following read. When a write transaction follows a read transaction,
garfieldsg	0:662207e34fba	822	* the stop followed by a start of the successive write will be always used.
garfieldsg	0:662207e34fba	823	*
garfieldsg	0:662207e34fba	824	* @return Current slave read/write transition enabled value
garfieldsg	0:662207e34fba	825	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	826	*/
syundo0730	6:f38dfe62d74c	827	bool MPU6050::getSlaveReadWriteTransitionEnabled() {
syundo0730	7:d5845b617139	828	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_P_NSR_BIT, buffer);
garfieldsg	0:662207e34fba	829	return buffer[0];
garfieldsg	0:662207e34fba	830	}
garfieldsg	0:662207e34fba	831	/** Set slave read/write transition enabled value.
garfieldsg	0:662207e34fba	832	* @param enabled New slave read/write transition enabled value
garfieldsg	0:662207e34fba	833	* @see getSlaveReadWriteTransitionEnabled()
garfieldsg	0:662207e34fba	834	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	835	*/
syundo0730	6:f38dfe62d74c	836	void MPU6050::setSlaveReadWriteTransitionEnabled(bool enabled) {
syundo0730	7:d5845b617139	837	I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_P_NSR_BIT, enabled);
garfieldsg	0:662207e34fba	838	}
garfieldsg	0:662207e34fba	839	/** Get I2C master clock speed.
garfieldsg	0:662207e34fba	840	* I2C_MST_CLK is a 4 bit unsigned value which configures a divider on the
garfieldsg	0:662207e34fba	841	* MPU-60X0 internal 8MHz clock. It sets the I2C master clock speed according to
garfieldsg	0:662207e34fba	842	* the following table:
garfieldsg	0:662207e34fba	843	*
garfieldsg	0:662207e34fba	844	* <pre>
garfieldsg	0:662207e34fba	845	* I2C_MST_CLK \| I2C Master Clock Speed \| 8MHz Clock Divider
garfieldsg	0:662207e34fba	846	* ------------+------------------------+-------------------
garfieldsg	0:662207e34fba	847	* 0 \| 348kHz \| 23
garfieldsg	0:662207e34fba	848	* 1 \| 333kHz \| 24
garfieldsg	0:662207e34fba	849	* 2 \| 320kHz \| 25
garfieldsg	0:662207e34fba	850	* 3 \| 308kHz \| 26
garfieldsg	0:662207e34fba	851	* 4 \| 296kHz \| 27
garfieldsg	0:662207e34fba	852	* 5 \| 286kHz \| 28
garfieldsg	0:662207e34fba	853	* 6 \| 276kHz \| 29
garfieldsg	0:662207e34fba	854	* 7 \| 267kHz \| 30
garfieldsg	0:662207e34fba	855	* 8 \| 258kHz \| 31
garfieldsg	0:662207e34fba	856	* 9 \| 500kHz \| 16
garfieldsg	0:662207e34fba	857	* 10 \| 471kHz \| 17
garfieldsg	0:662207e34fba	858	* 11 \| 444kHz \| 18
garfieldsg	0:662207e34fba	859	* 12 \| 421kHz \| 19
garfieldsg	0:662207e34fba	860	* 13 \| 400kHz \| 20
garfieldsg	0:662207e34fba	861	* 14 \| 381kHz \| 21
garfieldsg	0:662207e34fba	862	* 15 \| 364kHz \| 22
garfieldsg	0:662207e34fba	863	* </pre>
garfieldsg	0:662207e34fba	864	*
garfieldsg	0:662207e34fba	865	* @return Current I2C master clock speed
garfieldsg	0:662207e34fba	866	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	867	*/
syundo0730	6:f38dfe62d74c	868	uint8_t MPU6050::getMasterClockSpeed() {
syundo0730	7:d5845b617139	869	I2Cdev::readBits(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_CLK_BIT, MPU6050_I2C_MST_CLK_LENGTH, buffer);
garfieldsg	0:662207e34fba	870	return buffer[0];
garfieldsg	0:662207e34fba	871	}
garfieldsg	0:662207e34fba	872	/** Set I2C master clock speed.
garfieldsg	0:662207e34fba	873	* @reparam speed Current I2C master clock speed
garfieldsg	0:662207e34fba	874	* @see MPU6050_RA_I2C_MST_CTRL
garfieldsg	0:662207e34fba	875	*/
syundo0730	6:f38dfe62d74c	876	void MPU6050::setMasterClockSpeed(uint8_t speed) {
syundo0730	7:d5845b617139	877	I2Cdev::writeBits(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_CLK_BIT, MPU6050_I2C_MST_CLK_LENGTH, speed);
garfieldsg	0:662207e34fba	878	}
garfieldsg	0:662207e34fba	879
garfieldsg	0:662207e34fba	880	// I2C_SLV* registers (Slave 0-3)
garfieldsg	0:662207e34fba	881
garfieldsg	0:662207e34fba	882	/** Get the I2C address of the specified slave (0-3).
garfieldsg	0:662207e34fba	883	* Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read
garfieldsg	0:662207e34fba	884	* operation, and if it is cleared, then it's a write operation. The remaining
garfieldsg	0:662207e34fba	885	* bits (6-0) are the 7-bit device address of the slave device.
garfieldsg	0:662207e34fba	886	*
syundo0730	7:d5845b617139	887	* In read mode, the result of the read is placed in the lowest available
garfieldsg	0:662207e34fba	888	* EXT_SENS_DATA register. For further information regarding the allocation of
garfieldsg	0:662207e34fba	889	* read results, please refer to the EXT_SENS_DATA register description
garfieldsg	0:662207e34fba	890	* (Registers 73 - 96).
garfieldsg	0:662207e34fba	891	*
garfieldsg	0:662207e34fba	892	* The MPU-6050 supports a total of five slaves, but Slave 4 has unique
garfieldsg	0:662207e34fba	893	* characteristics, and so it has its own functions (getSlave4* and setSlave4*).
garfieldsg	0:662207e34fba	894	*
garfieldsg	0:662207e34fba	895	* I2C data transactions are performed at the Sample Rate, as defined in
garfieldsg	0:662207e34fba	896	* Register 25. The user is responsible for ensuring that I2C data transactions
garfieldsg	0:662207e34fba	897	* to and from each enabled Slave can be completed within a single period of the
garfieldsg	0:662207e34fba	898	* Sample Rate.
garfieldsg	0:662207e34fba	899	*
garfieldsg	0:662207e34fba	900	* The I2C slave access rate can be reduced relative to the Sample Rate. This
garfieldsg	0:662207e34fba	901	* reduced access rate is determined by I2C_MST_DLY (Register 52). Whether a
garfieldsg	0:662207e34fba	902	* slave's access rate is reduced relative to the Sample Rate is determined by
garfieldsg	0:662207e34fba	903	* I2C_MST_DELAY_CTRL (Register 103).
garfieldsg	0:662207e34fba	904	*
garfieldsg	0:662207e34fba	905	* The processing order for the slaves is fixed. The sequence followed for
garfieldsg	0:662207e34fba	906	* processing the slaves is Slave 0, Slave 1, Slave 2, Slave 3 and Slave 4. If a
garfieldsg	0:662207e34fba	907	* particular Slave is disabled it will be skipped.
garfieldsg	0:662207e34fba	908	*
garfieldsg	0:662207e34fba	909	* Each slave can either be accessed at the sample rate or at a reduced sample
garfieldsg	0:662207e34fba	910	* rate. In a case where some slaves are accessed at the Sample Rate and some
garfieldsg	0:662207e34fba	911	* slaves are accessed at the reduced rate, the sequence of accessing the slaves
garfieldsg	0:662207e34fba	912	* (Slave 0 to Slave 4) is still followed. However, the reduced rate slaves will
garfieldsg	0:662207e34fba	913	* be skipped if their access rate dictates that they should not be accessed
garfieldsg	0:662207e34fba	914	* during that particular cycle. For further information regarding the reduced
garfieldsg	0:662207e34fba	915	* access rate, please refer to Register 52. Whether a slave is accessed at the
garfieldsg	0:662207e34fba	916	* Sample Rate or at the reduced rate is determined by the Delay Enable bits in
garfieldsg	0:662207e34fba	917	* Register 103.
garfieldsg	0:662207e34fba	918	*
garfieldsg	0:662207e34fba	919	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	920	* @return Current address for specified slave
garfieldsg	0:662207e34fba	921	* @see MPU6050_RA_I2C_SLV0_ADDR
garfieldsg	0:662207e34fba	922	*/
syundo0730	6:f38dfe62d74c	923	uint8_t MPU6050::getSlaveAddress(uint8_t num) {
garfieldsg	0:662207e34fba	924	if (num > 3) return 0;
syundo0730	7:d5845b617139	925	I2Cdev::readByte(devAddr, MPU6050_RA_I2C_SLV0_ADDR + num*3, buffer);
garfieldsg	0:662207e34fba	926	return buffer[0];
garfieldsg	0:662207e34fba	927	}
garfieldsg	0:662207e34fba	928	/** Set the I2C address of the specified slave (0-3).
garfieldsg	0:662207e34fba	929	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	930	* @param address New address for specified slave
garfieldsg	0:662207e34fba	931	* @see getSlaveAddress()
garfieldsg	0:662207e34fba	932	* @see MPU6050_RA_I2C_SLV0_ADDR
garfieldsg	0:662207e34fba	933	*/
syundo0730	6:f38dfe62d74c	934	void MPU6050::setSlaveAddress(uint8_t num, uint8_t address) {
garfieldsg	0:662207e34fba	935	if (num > 3) return;
syundo0730	7:d5845b617139	936	I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV0_ADDR + num*3, address);
garfieldsg	0:662207e34fba	937	}
garfieldsg	0:662207e34fba	938	/** Get the active internal register for the specified slave (0-3).
garfieldsg	0:662207e34fba	939	* Read/write operations for this slave will be done to whatever internal
garfieldsg	0:662207e34fba	940	* register address is stored in this MPU register.
garfieldsg	0:662207e34fba	941	*
garfieldsg	0:662207e34fba	942	* The MPU-6050 supports a total of five slaves, but Slave 4 has unique
garfieldsg	0:662207e34fba	943	* characteristics, and so it has its own functions.
garfieldsg	0:662207e34fba	944	*
garfieldsg	0:662207e34fba	945	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	946	* @return Current active register for specified slave
garfieldsg	0:662207e34fba	947	* @see MPU6050_RA_I2C_SLV0_REG
garfieldsg	0:662207e34fba	948	*/
syundo0730	6:f38dfe62d74c	949	uint8_t MPU6050::getSlaveRegister(uint8_t num) {
garfieldsg	0:662207e34fba	950	if (num > 3) return 0;
syundo0730	7:d5845b617139	951	I2Cdev::readByte(devAddr, MPU6050_RA_I2C_SLV0_REG + num*3, buffer);
garfieldsg	0:662207e34fba	952	return buffer[0];
garfieldsg	0:662207e34fba	953	}
garfieldsg	0:662207e34fba	954	/** Set the active internal register for the specified slave (0-3).
garfieldsg	0:662207e34fba	955	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	956	* @param reg New active register for specified slave
garfieldsg	0:662207e34fba	957	* @see getSlaveRegister()
garfieldsg	0:662207e34fba	958	* @see MPU6050_RA_I2C_SLV0_REG
garfieldsg	0:662207e34fba	959	*/
syundo0730	6:f38dfe62d74c	960	void MPU6050::setSlaveRegister(uint8_t num, uint8_t reg) {
garfieldsg	0:662207e34fba	961	if (num > 3) return;
syundo0730	7:d5845b617139	962	I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV0_REG + num*3, reg);
garfieldsg	0:662207e34fba	963	}
garfieldsg	0:662207e34fba	964	/** Get the enabled value for the specified slave (0-3).
garfieldsg	0:662207e34fba	965	* When set to 1, this bit enables Slave 0 for data transfer operations. When
garfieldsg	0:662207e34fba	966	* cleared to 0, this bit disables Slave 0 from data transfer operations.
garfieldsg	0:662207e34fba	967	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	968	* @return Current enabled value for specified slave
garfieldsg	0:662207e34fba	969	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	970	*/
syundo0730	6:f38dfe62d74c	971	bool MPU6050::getSlaveEnabled(uint8_t num) {
garfieldsg	0:662207e34fba	972	if (num > 3) return 0;
syundo0730	7:d5845b617139	973	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_EN_BIT, buffer);
garfieldsg	0:662207e34fba	974	return buffer[0];
garfieldsg	0:662207e34fba	975	}
garfieldsg	0:662207e34fba	976	/** Set the enabled value for the specified slave (0-3).
garfieldsg	0:662207e34fba	977	* @param num Slave number (0-3)
syundo0730	6:f38dfe62d74c	978	* @param enabled New enabled value for specified slave
garfieldsg	0:662207e34fba	979	* @see getSlaveEnabled()
garfieldsg	0:662207e34fba	980	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	981	*/
syundo0730	6:f38dfe62d74c	982	void MPU6050::setSlaveEnabled(uint8_t num, bool enabled) {
garfieldsg	0:662207e34fba	983	if (num > 3) return;
syundo0730	7:d5845b617139	984	I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_EN_BIT, enabled);
garfieldsg	0:662207e34fba	985	}
garfieldsg	0:662207e34fba	986	/** Get word pair byte-swapping enabled for the specified slave (0-3).
garfieldsg	0:662207e34fba	987	* When set to 1, this bit enables byte swapping. When byte swapping is enabled,
garfieldsg	0:662207e34fba	988	* the high and low bytes of a word pair are swapped. Please refer to
garfieldsg	0:662207e34fba	989	* I2C_SLV0_GRP for the pairing convention of the word pairs. When cleared to 0,
garfieldsg	0:662207e34fba	990	* bytes transferred to and from Slave 0 will be written to EXT_SENS_DATA
garfieldsg	0:662207e34fba	991	* registers in the order they were transferred.
garfieldsg	0:662207e34fba	992	*
garfieldsg	0:662207e34fba	993	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	994	* @return Current word pair byte-swapping enabled value for specified slave
garfieldsg	0:662207e34fba	995	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	996	*/
syundo0730	6:f38dfe62d74c	997	bool MPU6050::getSlaveWordByteSwap(uint8_t num) {
garfieldsg	0:662207e34fba	998	if (num > 3) return 0;
syundo0730	7:d5845b617139	999	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_BYTE_SW_BIT, buffer);
garfieldsg	0:662207e34fba	1000	return buffer[0];
garfieldsg	0:662207e34fba	1001	}
garfieldsg	0:662207e34fba	1002	/** Set word pair byte-swapping enabled for the specified slave (0-3).
garfieldsg	0:662207e34fba	1003	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1004	* @param enabled New word pair byte-swapping enabled value for specified slave
garfieldsg	0:662207e34fba	1005	* @see getSlaveWordByteSwap()
garfieldsg	0:662207e34fba	1006	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1007	*/
syundo0730	6:f38dfe62d74c	1008	void MPU6050::setSlaveWordByteSwap(uint8_t num, bool enabled) {
garfieldsg	0:662207e34fba	1009	if (num > 3) return;
syundo0730	7:d5845b617139	1010	I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_BYTE_SW_BIT, enabled);
garfieldsg	0:662207e34fba	1011	}
garfieldsg	0:662207e34fba	1012	/** Get write mode for the specified slave (0-3).
garfieldsg	0:662207e34fba	1013	* When set to 1, the transaction will read or write data only. When cleared to
garfieldsg	0:662207e34fba	1014	* 0, the transaction will write a register address prior to reading or writing
garfieldsg	0:662207e34fba	1015	* data. This should equal 0 when specifying the register address within the
garfieldsg	0:662207e34fba	1016	* Slave device to/from which the ensuing data transaction will take place.
garfieldsg	0:662207e34fba	1017	*
garfieldsg	0:662207e34fba	1018	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1019	* @return Current write mode for specified slave (0 = register address + data, 1 = data only)
garfieldsg	0:662207e34fba	1020	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1021	*/
syundo0730	6:f38dfe62d74c	1022	bool MPU6050::getSlaveWriteMode(uint8_t num) {
garfieldsg	0:662207e34fba	1023	if (num > 3) return 0;
syundo0730	7:d5845b617139	1024	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_REG_DIS_BIT, buffer);
garfieldsg	0:662207e34fba	1025	return buffer[0];
garfieldsg	0:662207e34fba	1026	}
garfieldsg	0:662207e34fba	1027	/** Set write mode for the specified slave (0-3).
garfieldsg	0:662207e34fba	1028	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1029	* @param mode New write mode for specified slave (0 = register address + data, 1 = data only)
garfieldsg	0:662207e34fba	1030	* @see getSlaveWriteMode()
garfieldsg	0:662207e34fba	1031	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1032	*/
syundo0730	6:f38dfe62d74c	1033	void MPU6050::setSlaveWriteMode(uint8_t num, bool mode) {
garfieldsg	0:662207e34fba	1034	if (num > 3) return;
syundo0730	7:d5845b617139	1035	I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_REG_DIS_BIT, mode);
garfieldsg	0:662207e34fba	1036	}
garfieldsg	0:662207e34fba	1037	/** Get word pair grouping order offset for the specified slave (0-3).
garfieldsg	0:662207e34fba	1038	* This sets specifies the grouping order of word pairs received from registers.
garfieldsg	0:662207e34fba	1039	* When cleared to 0, bytes from register addresses 0 and 1, 2 and 3, etc (even,
garfieldsg	0:662207e34fba	1040	* then odd register addresses) are paired to form a word. When set to 1, bytes
garfieldsg	0:662207e34fba	1041	* from register addresses are paired 1 and 2, 3 and 4, etc. (odd, then even
garfieldsg	0:662207e34fba	1042	* register addresses) are paired to form a word.
garfieldsg	0:662207e34fba	1043	*
garfieldsg	0:662207e34fba	1044	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1045	* @return Current word pair grouping order offset for specified slave
garfieldsg	0:662207e34fba	1046	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1047	*/
syundo0730	6:f38dfe62d74c	1048	bool MPU6050::getSlaveWordGroupOffset(uint8_t num) {
garfieldsg	0:662207e34fba	1049	if (num > 3) return 0;
syundo0730	7:d5845b617139	1050	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_GRP_BIT, buffer);
garfieldsg	0:662207e34fba	1051	return buffer[0];
garfieldsg	0:662207e34fba	1052	}
garfieldsg	0:662207e34fba	1053	/** Set word pair grouping order offset for the specified slave (0-3).
garfieldsg	0:662207e34fba	1054	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1055	* @param enabled New word pair grouping order offset for specified slave
garfieldsg	0:662207e34fba	1056	* @see getSlaveWordGroupOffset()
garfieldsg	0:662207e34fba	1057	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1058	*/
syundo0730	6:f38dfe62d74c	1059	void MPU6050::setSlaveWordGroupOffset(uint8_t num, bool enabled) {
garfieldsg	0:662207e34fba	1060	if (num > 3) return;
syundo0730	7:d5845b617139	1061	I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_GRP_BIT, enabled);
garfieldsg	0:662207e34fba	1062	}
garfieldsg	0:662207e34fba	1063	/** Get number of bytes to read for the specified slave (0-3).
garfieldsg	0:662207e34fba	1064	* Specifies the number of bytes transferred to and from Slave 0. Clearing this
garfieldsg	0:662207e34fba	1065	* bit to 0 is equivalent to disabling the register by writing 0 to I2C_SLV0_EN.
garfieldsg	0:662207e34fba	1066	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1067	* @return Number of bytes to read for specified slave
garfieldsg	0:662207e34fba	1068	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1069	*/
syundo0730	6:f38dfe62d74c	1070	uint8_t MPU6050::getSlaveDataLength(uint8_t num) {
garfieldsg	0:662207e34fba	1071	if (num > 3) return 0;
syundo0730	7:d5845b617139	1072	I2Cdev::readBits(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_LEN_BIT, MPU6050_I2C_SLV_LEN_LENGTH, buffer);
garfieldsg	0:662207e34fba	1073	return buffer[0];
garfieldsg	0:662207e34fba	1074	}
garfieldsg	0:662207e34fba	1075	/** Set number of bytes to read for the specified slave (0-3).
garfieldsg	0:662207e34fba	1076	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	1077	* @param length Number of bytes to read for specified slave
garfieldsg	0:662207e34fba	1078	* @see getSlaveDataLength()
garfieldsg	0:662207e34fba	1079	* @see MPU6050_RA_I2C_SLV0_CTRL
garfieldsg	0:662207e34fba	1080	*/
syundo0730	6:f38dfe62d74c	1081	void MPU6050::setSlaveDataLength(uint8_t num, uint8_t length) {
garfieldsg	0:662207e34fba	1082	if (num > 3) return;
syundo0730	7:d5845b617139	1083	I2Cdev::writeBits(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_LEN_BIT, MPU6050_I2C_SLV_LEN_LENGTH, length);
garfieldsg	0:662207e34fba	1084	}
garfieldsg	0:662207e34fba	1085
garfieldsg	0:662207e34fba	1086	// I2C_SLV* registers (Slave 4)
garfieldsg	0:662207e34fba	1087
garfieldsg	0:662207e34fba	1088	/** Get the I2C address of Slave 4.
garfieldsg	0:662207e34fba	1089	* Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read
garfieldsg	0:662207e34fba	1090	* operation, and if it is cleared, then it's a write operation. The remaining
garfieldsg	0:662207e34fba	1091	* bits (6-0) are the 7-bit device address of the slave device.
garfieldsg	0:662207e34fba	1092	*
garfieldsg	0:662207e34fba	1093	* @return Current address for Slave 4
garfieldsg	0:662207e34fba	1094	* @see getSlaveAddress()
garfieldsg	0:662207e34fba	1095	* @see MPU6050_RA_I2C_SLV4_ADDR
garfieldsg	0:662207e34fba	1096	*/
syundo0730	6:f38dfe62d74c	1097	uint8_t MPU6050::getSlave4Address() {
syundo0730	7:d5845b617139	1098	I2Cdev::readByte(devAddr, MPU6050_RA_I2C_SLV4_ADDR, buffer);
garfieldsg	0:662207e34fba	1099	return buffer[0];
garfieldsg	0:662207e34fba	1100	}
garfieldsg	0:662207e34fba	1101	/** Set the I2C address of Slave 4.
garfieldsg	0:662207e34fba	1102	* @param address New address for Slave 4
garfieldsg	0:662207e34fba	1103	* @see getSlave4Address()
garfieldsg	0:662207e34fba	1104	* @see MPU6050_RA_I2C_SLV4_ADDR
garfieldsg	0:662207e34fba	1105	*/
syundo0730	6:f38dfe62d74c	1106	void MPU6050::setSlave4Address(uint8_t address) {
syundo0730	7:d5845b617139	1107	I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV4_ADDR, address);
garfieldsg	0:662207e34fba	1108	}
garfieldsg	0:662207e34fba	1109	/** Get the active internal register for the Slave 4.
garfieldsg	0:662207e34fba	1110	* Read/write operations for this slave will be done to whatever internal
garfieldsg	0:662207e34fba	1111	* register address is stored in this MPU register.
garfieldsg	0:662207e34fba	1112	*
garfieldsg	0:662207e34fba	1113	* @return Current active register for Slave 4
garfieldsg	0:662207e34fba	1114	* @see MPU6050_RA_I2C_SLV4_REG
garfieldsg	0:662207e34fba	1115	*/
syundo0730	6:f38dfe62d74c	1116	uint8_t MPU6050::getSlave4Register() {
syundo0730	7:d5845b617139	1117	I2Cdev::readByte(devAddr, MPU6050_RA_I2C_SLV4_REG, buffer);
garfieldsg	0:662207e34fba	1118	return buffer[0];
garfieldsg	0:662207e34fba	1119	}
garfieldsg	0:662207e34fba	1120	/** Set the active internal register for Slave 4.
garfieldsg	0:662207e34fba	1121	* @param reg New active register for Slave 4
garfieldsg	0:662207e34fba	1122	* @see getSlave4Register()
garfieldsg	0:662207e34fba	1123	* @see MPU6050_RA_I2C_SLV4_REG
garfieldsg	0:662207e34fba	1124	*/
syundo0730	6:f38dfe62d74c	1125	void MPU6050::setSlave4Register(uint8_t reg) {
syundo0730	7:d5845b617139	1126	I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV4_REG, reg);
garfieldsg	0:662207e34fba	1127	}
garfieldsg	0:662207e34fba	1128	/** Set new byte to write to Slave 4.
garfieldsg	0:662207e34fba	1129	* This register stores the data to be written into the Slave 4. If I2C_SLV4_RW
garfieldsg	0:662207e34fba	1130	* is set 1 (set to read), this register has no effect.
garfieldsg	0:662207e34fba	1131	* @param data New byte to write to Slave 4
garfieldsg	0:662207e34fba	1132	* @see MPU6050_RA_I2C_SLV4_DO
garfieldsg	0:662207e34fba	1133	*/
syundo0730	6:f38dfe62d74c	1134	void MPU6050::setSlave4OutputByte(uint8_t data) {
syundo0730	7:d5845b617139	1135	I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV4_DO, data);
garfieldsg	0:662207e34fba	1136	}
garfieldsg	0:662207e34fba	1137	/** Get the enabled value for the Slave 4.
garfieldsg	0:662207e34fba	1138	* When set to 1, this bit enables Slave 4 for data transfer operations. When
garfieldsg	0:662207e34fba	1139	* cleared to 0, this bit disables Slave 4 from data transfer operations.
garfieldsg	0:662207e34fba	1140	* @return Current enabled value for Slave 4
garfieldsg	0:662207e34fba	1141	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1142	*/
syundo0730	6:f38dfe62d74c	1143	bool MPU6050::getSlave4Enabled() {
syundo0730	7:d5845b617139	1144	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_EN_BIT, buffer);
garfieldsg	0:662207e34fba	1145	return buffer[0];
garfieldsg	0:662207e34fba	1146	}
garfieldsg	0:662207e34fba	1147	/** Set the enabled value for Slave 4.
garfieldsg	0:662207e34fba	1148	* @param enabled New enabled value for Slave 4
garfieldsg	0:662207e34fba	1149	* @see getSlave4Enabled()
garfieldsg	0:662207e34fba	1150	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1151	*/
syundo0730	6:f38dfe62d74c	1152	void MPU6050::setSlave4Enabled(bool enabled) {
syundo0730	7:d5845b617139	1153	I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_EN_BIT, enabled);
garfieldsg	0:662207e34fba	1154	}
garfieldsg	0:662207e34fba	1155	/** Get the enabled value for Slave 4 transaction interrupts.
garfieldsg	0:662207e34fba	1156	* When set to 1, this bit enables the generation of an interrupt signal upon
garfieldsg	0:662207e34fba	1157	* completion of a Slave 4 transaction. When cleared to 0, this bit disables the
garfieldsg	0:662207e34fba	1158	* generation of an interrupt signal upon completion of a Slave 4 transaction.
garfieldsg	0:662207e34fba	1159	* The interrupt status can be observed in Register 54.
garfieldsg	0:662207e34fba	1160	*
garfieldsg	0:662207e34fba	1161	* @return Current enabled value for Slave 4 transaction interrupts.
garfieldsg	0:662207e34fba	1162	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1163	*/
syundo0730	6:f38dfe62d74c	1164	bool MPU6050::getSlave4InterruptEnabled() {
syundo0730	7:d5845b617139	1165	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_INT_EN_BIT, buffer);
garfieldsg	0:662207e34fba	1166	return buffer[0];
garfieldsg	0:662207e34fba	1167	}
garfieldsg	0:662207e34fba	1168	/** Set the enabled value for Slave 4 transaction interrupts.
garfieldsg	0:662207e34fba	1169	* @param enabled New enabled value for Slave 4 transaction interrupts.
garfieldsg	0:662207e34fba	1170	* @see getSlave4InterruptEnabled()
garfieldsg	0:662207e34fba	1171	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1172	*/
syundo0730	6:f38dfe62d74c	1173	void MPU6050::setSlave4InterruptEnabled(bool enabled) {
syundo0730	7:d5845b617139	1174	I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_INT_EN_BIT, enabled);
garfieldsg	0:662207e34fba	1175	}
garfieldsg	0:662207e34fba	1176	/** Get write mode for Slave 4.
garfieldsg	0:662207e34fba	1177	* When set to 1, the transaction will read or write data only. When cleared to
garfieldsg	0:662207e34fba	1178	* 0, the transaction will write a register address prior to reading or writing
garfieldsg	0:662207e34fba	1179	* data. This should equal 0 when specifying the register address within the
garfieldsg	0:662207e34fba	1180	* Slave device to/from which the ensuing data transaction will take place.
garfieldsg	0:662207e34fba	1181	*
garfieldsg	0:662207e34fba	1182	* @return Current write mode for Slave 4 (0 = register address + data, 1 = data only)
garfieldsg	0:662207e34fba	1183	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1184	*/
syundo0730	6:f38dfe62d74c	1185	bool MPU6050::getSlave4WriteMode() {
syundo0730	7:d5845b617139	1186	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_REG_DIS_BIT, buffer);
garfieldsg	0:662207e34fba	1187	return buffer[0];
garfieldsg	0:662207e34fba	1188	}
garfieldsg	0:662207e34fba	1189	/** Set write mode for the Slave 4.
garfieldsg	0:662207e34fba	1190	* @param mode New write mode for Slave 4 (0 = register address + data, 1 = data only)
garfieldsg	0:662207e34fba	1191	* @see getSlave4WriteMode()
garfieldsg	0:662207e34fba	1192	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1193	*/
syundo0730	6:f38dfe62d74c	1194	void MPU6050::setSlave4WriteMode(bool mode) {
syundo0730	7:d5845b617139	1195	I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_REG_DIS_BIT, mode);
garfieldsg	0:662207e34fba	1196	}
garfieldsg	0:662207e34fba	1197	/** Get Slave 4 master delay value.
garfieldsg	0:662207e34fba	1198	* This configures the reduced access rate of I2C slaves relative to the Sample
garfieldsg	0:662207e34fba	1199	* Rate. When a slave's access rate is decreased relative to the Sample Rate,
garfieldsg	0:662207e34fba	1200	* the slave is accessed every:
garfieldsg	0:662207e34fba	1201	*
garfieldsg	0:662207e34fba	1202	* 1 / (1 + I2C_MST_DLY) samples
garfieldsg	0:662207e34fba	1203	*
garfieldsg	0:662207e34fba	1204	* This base Sample Rate in turn is determined by SMPLRT_DIV (register 25) and
garfieldsg	0:662207e34fba	1205	* DLPF_CFG (register 26). Whether a slave's access rate is reduced relative to
garfieldsg	0:662207e34fba	1206	* the Sample Rate is determined by I2C_MST_DELAY_CTRL (register 103). For
garfieldsg	0:662207e34fba	1207	* further information regarding the Sample Rate, please refer to register 25.
garfieldsg	0:662207e34fba	1208	*
garfieldsg	0:662207e34fba	1209	* @return Current Slave 4 master delay value
garfieldsg	0:662207e34fba	1210	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1211	*/
syundo0730	6:f38dfe62d74c	1212	uint8_t MPU6050::getSlave4MasterDelay() {
syundo0730	7:d5845b617139	1213	I2Cdev::readBits(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_MST_DLY_BIT, MPU6050_I2C_SLV4_MST_DLY_LENGTH, buffer);
garfieldsg	0:662207e34fba	1214	return buffer[0];
garfieldsg	0:662207e34fba	1215	}
garfieldsg	0:662207e34fba	1216	/** Set Slave 4 master delay value.
garfieldsg	0:662207e34fba	1217	* @param delay New Slave 4 master delay value
garfieldsg	0:662207e34fba	1218	* @see getSlave4MasterDelay()
garfieldsg	0:662207e34fba	1219	* @see MPU6050_RA_I2C_SLV4_CTRL
garfieldsg	0:662207e34fba	1220	*/
syundo0730	6:f38dfe62d74c	1221	void MPU6050::setSlave4MasterDelay(uint8_t delay) {
syundo0730	7:d5845b617139	1222	I2Cdev::writeBits(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_MST_DLY_BIT, MPU6050_I2C_SLV4_MST_DLY_LENGTH, delay);
garfieldsg	0:662207e34fba	1223	}
garfieldsg	0:662207e34fba	1224	/** Get last available byte read from Slave 4.
garfieldsg	0:662207e34fba	1225	* This register stores the data read from Slave 4. This field is populated
garfieldsg	0:662207e34fba	1226	* after a read transaction.
garfieldsg	0:662207e34fba	1227	* @return Last available byte read from to Slave 4
garfieldsg	0:662207e34fba	1228	* @see MPU6050_RA_I2C_SLV4_DI
garfieldsg	0:662207e34fba	1229	*/
syundo0730	6:f38dfe62d74c	1230	uint8_t MPU6050::getSlate4InputByte() {
syundo0730	7:d5845b617139	1231	I2Cdev::readByte(devAddr, MPU6050_RA_I2C_SLV4_DI, buffer);
garfieldsg	0:662207e34fba	1232	return buffer[0];
garfieldsg	0:662207e34fba	1233	}
garfieldsg	0:662207e34fba	1234
garfieldsg	0:662207e34fba	1235	// I2C_MST_STATUS register
garfieldsg	0:662207e34fba	1236
garfieldsg	0:662207e34fba	1237	/** Get FSYNC interrupt status.
garfieldsg	0:662207e34fba	1238	* This bit reflects the status of the FSYNC interrupt from an external device
garfieldsg	0:662207e34fba	1239	* into the MPU-60X0. This is used as a way to pass an external interrupt
garfieldsg	0:662207e34fba	1240	* through the MPU-60X0 to the host application processor. When set to 1, this
garfieldsg	0:662207e34fba	1241	* bit will cause an interrupt if FSYNC_INT_EN is asserted in INT_PIN_CFG
garfieldsg	0:662207e34fba	1242	* (Register 55).
garfieldsg	0:662207e34fba	1243	* @return FSYNC interrupt status
garfieldsg	0:662207e34fba	1244	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1245	*/
syundo0730	6:f38dfe62d74c	1246	bool MPU6050::getPassthroughStatus() {
syundo0730	7:d5845b617139	1247	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_PASS_THROUGH_BIT, buffer);
garfieldsg	0:662207e34fba	1248	return buffer[0];
garfieldsg	0:662207e34fba	1249	}
garfieldsg	0:662207e34fba	1250	/** Get Slave 4 transaction done status.
garfieldsg	0:662207e34fba	1251	* Automatically sets to 1 when a Slave 4 transaction has completed. This
garfieldsg	0:662207e34fba	1252	* triggers an interrupt if the I2C_MST_INT_EN bit in the INT_ENABLE register
garfieldsg	0:662207e34fba	1253	* (Register 56) is asserted and if the SLV_4_DONE_INT bit is asserted in the
garfieldsg	0:662207e34fba	1254	* I2C_SLV4_CTRL register (Register 52).
garfieldsg	0:662207e34fba	1255	* @return Slave 4 transaction done status
garfieldsg	0:662207e34fba	1256	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1257	*/
syundo0730	6:f38dfe62d74c	1258	bool MPU6050::getSlave4IsDone() {
syundo0730	7:d5845b617139	1259	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV4_DONE_BIT, buffer);
garfieldsg	0:662207e34fba	1260	return buffer[0];
garfieldsg	0:662207e34fba	1261	}
garfieldsg	0:662207e34fba	1262	/** Get master arbitration lost status.
garfieldsg	0:662207e34fba	1263	* This bit automatically sets to 1 when the I2C Master has lost arbitration of
garfieldsg	0:662207e34fba	1264	* the auxiliary I2C bus (an error condition). This triggers an interrupt if the
garfieldsg	0:662207e34fba	1265	* I2C_MST_INT_EN bit in the INT_ENABLE register (Register 56) is asserted.
garfieldsg	0:662207e34fba	1266	* @return Master arbitration lost status
garfieldsg	0:662207e34fba	1267	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1268	*/
syundo0730	6:f38dfe62d74c	1269	bool MPU6050::getLostArbitration() {
syundo0730	7:d5845b617139	1270	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_LOST_ARB_BIT, buffer);
garfieldsg	0:662207e34fba	1271	return buffer[0];
garfieldsg	0:662207e34fba	1272	}
garfieldsg	0:662207e34fba	1273	/** Get Slave 4 NACK status.
garfieldsg	0:662207e34fba	1274	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
garfieldsg	0:662207e34fba	1275	* transaction with Slave 4. This triggers an interrupt if the I2C_MST_INT_EN
garfieldsg	0:662207e34fba	1276	* bit in the INT_ENABLE register (Register 56) is asserted.
garfieldsg	0:662207e34fba	1277	* @return Slave 4 NACK interrupt status
garfieldsg	0:662207e34fba	1278	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1279	*/
syundo0730	6:f38dfe62d74c	1280	bool MPU6050::getSlave4Nack() {
syundo0730	7:d5845b617139	1281	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV4_NACK_BIT, buffer);
garfieldsg	0:662207e34fba	1282	return buffer[0];
garfieldsg	0:662207e34fba	1283	}
garfieldsg	0:662207e34fba	1284	/** Get Slave 3 NACK status.
garfieldsg	0:662207e34fba	1285	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
garfieldsg	0:662207e34fba	1286	* transaction with Slave 3. This triggers an interrupt if the I2C_MST_INT_EN
garfieldsg	0:662207e34fba	1287	* bit in the INT_ENABLE register (Register 56) is asserted.
garfieldsg	0:662207e34fba	1288	* @return Slave 3 NACK interrupt status
garfieldsg	0:662207e34fba	1289	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1290	*/
syundo0730	6:f38dfe62d74c	1291	bool MPU6050::getSlave3Nack() {
syundo0730	7:d5845b617139	1292	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV3_NACK_BIT, buffer);
garfieldsg	0:662207e34fba	1293	return buffer[0];
garfieldsg	0:662207e34fba	1294	}
garfieldsg	0:662207e34fba	1295	/** Get Slave 2 NACK status.
garfieldsg	0:662207e34fba	1296	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
garfieldsg	0:662207e34fba	1297	* transaction with Slave 2. This triggers an interrupt if the I2C_MST_INT_EN
garfieldsg	0:662207e34fba	1298	* bit in the INT_ENABLE register (Register 56) is asserted.
garfieldsg	0:662207e34fba	1299	* @return Slave 2 NACK interrupt status
garfieldsg	0:662207e34fba	1300	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1301	*/
syundo0730	6:f38dfe62d74c	1302	bool MPU6050::getSlave2Nack() {
syundo0730	7:d5845b617139	1303	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV2_NACK_BIT, buffer);
garfieldsg	0:662207e34fba	1304	return buffer[0];
garfieldsg	0:662207e34fba	1305	}
garfieldsg	0:662207e34fba	1306	/** Get Slave 1 NACK status.
garfieldsg	0:662207e34fba	1307	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
garfieldsg	0:662207e34fba	1308	* transaction with Slave 1. This triggers an interrupt if the I2C_MST_INT_EN
garfieldsg	0:662207e34fba	1309	* bit in the INT_ENABLE register (Register 56) is asserted.
garfieldsg	0:662207e34fba	1310	* @return Slave 1 NACK interrupt status
garfieldsg	0:662207e34fba	1311	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1312	*/
syundo0730	6:f38dfe62d74c	1313	bool MPU6050::getSlave1Nack() {
syundo0730	7:d5845b617139	1314	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV1_NACK_BIT, buffer);
garfieldsg	0:662207e34fba	1315	return buffer[0];
garfieldsg	0:662207e34fba	1316	}
garfieldsg	0:662207e34fba	1317	/** Get Slave 0 NACK status.
garfieldsg	0:662207e34fba	1318	* This bit automatically sets to 1 when the I2C Master receives a NACK in a
garfieldsg	0:662207e34fba	1319	* transaction with Slave 0. This triggers an interrupt if the I2C_MST_INT_EN
garfieldsg	0:662207e34fba	1320	* bit in the INT_ENABLE register (Register 56) is asserted.
garfieldsg	0:662207e34fba	1321	* @return Slave 0 NACK interrupt status
garfieldsg	0:662207e34fba	1322	* @see MPU6050_RA_I2C_MST_STATUS
garfieldsg	0:662207e34fba	1323	*/
syundo0730	6:f38dfe62d74c	1324	bool MPU6050::getSlave0Nack() {
syundo0730	7:d5845b617139	1325	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV0_NACK_BIT, buffer);
garfieldsg	0:662207e34fba	1326	return buffer[0];
garfieldsg	0:662207e34fba	1327	}
garfieldsg	0:662207e34fba	1328
garfieldsg	0:662207e34fba	1329	// INT_PIN_CFG register
garfieldsg	0:662207e34fba	1330
garfieldsg	0:662207e34fba	1331	/** Get interrupt logic level mode.
garfieldsg	0:662207e34fba	1332	* Will be set 0 for active-high, 1 for active-low.
garfieldsg	0:662207e34fba	1333	* @return Current interrupt mode (0=active-high, 1=active-low)
garfieldsg	0:662207e34fba	1334	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1335	* @see MPU6050_INTCFG_INT_LEVEL_BIT
garfieldsg	0:662207e34fba	1336	*/
syundo0730	6:f38dfe62d74c	1337	bool MPU6050::getInterruptMode() {
syundo0730	7:d5845b617139	1338	I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_LEVEL_BIT, buffer);
garfieldsg	0:662207e34fba	1339	return buffer[0];
garfieldsg	0:662207e34fba	1340	}
garfieldsg	0:662207e34fba	1341	/** Set interrupt logic level mode.
garfieldsg	0:662207e34fba	1342	* @param mode New interrupt mode (0=active-high, 1=active-low)
garfieldsg	0:662207e34fba	1343	* @see getInterruptMode()
garfieldsg	0:662207e34fba	1344	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1345	* @see MPU6050_INTCFG_INT_LEVEL_BIT
garfieldsg	0:662207e34fba	1346	*/
syundo0730	6:f38dfe62d74c	1347	void MPU6050::setInterruptMode(bool mode) {
syundo0730	7:d5845b617139	1348	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_LEVEL_BIT, mode);
garfieldsg	0:662207e34fba	1349	}
garfieldsg	0:662207e34fba	1350	/** Get interrupt drive mode.
garfieldsg	0:662207e34fba	1351	* Will be set 0 for push-pull, 1 for open-drain.
garfieldsg	0:662207e34fba	1352	* @return Current interrupt drive mode (0=push-pull, 1=open-drain)
garfieldsg	0:662207e34fba	1353	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1354	* @see MPU6050_INTCFG_INT_OPEN_BIT
garfieldsg	0:662207e34fba	1355	*/
syundo0730	6:f38dfe62d74c	1356	bool MPU6050::getInterruptDrive() {
syundo0730	7:d5845b617139	1357	I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_OPEN_BIT, buffer);
garfieldsg	0:662207e34fba	1358	return buffer[0];
garfieldsg	0:662207e34fba	1359	}
garfieldsg	0:662207e34fba	1360	/** Set interrupt drive mode.
garfieldsg	0:662207e34fba	1361	* @param drive New interrupt drive mode (0=push-pull, 1=open-drain)
garfieldsg	0:662207e34fba	1362	* @see getInterruptDrive()
garfieldsg	0:662207e34fba	1363	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1364	* @see MPU6050_INTCFG_INT_OPEN_BIT
garfieldsg	0:662207e34fba	1365	*/
syundo0730	6:f38dfe62d74c	1366	void MPU6050::setInterruptDrive(bool drive) {
syundo0730	7:d5845b617139	1367	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_OPEN_BIT, drive);
garfieldsg	0:662207e34fba	1368	}
garfieldsg	0:662207e34fba	1369	/** Get interrupt latch mode.
garfieldsg	0:662207e34fba	1370	* Will be set 0 for 50us-pulse, 1 for latch-until-int-cleared.
garfieldsg	0:662207e34fba	1371	* @return Current latch mode (0=50us-pulse, 1=latch-until-int-cleared)
garfieldsg	0:662207e34fba	1372	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1373	* @see MPU6050_INTCFG_LATCH_INT_EN_BIT
garfieldsg	0:662207e34fba	1374	*/
syundo0730	6:f38dfe62d74c	1375	bool MPU6050::getInterruptLatch() {
syundo0730	7:d5845b617139	1376	I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_LATCH_INT_EN_BIT, buffer);
garfieldsg	0:662207e34fba	1377	return buffer[0];
garfieldsg	0:662207e34fba	1378	}
garfieldsg	0:662207e34fba	1379	/** Set interrupt latch mode.
garfieldsg	0:662207e34fba	1380	* @param latch New latch mode (0=50us-pulse, 1=latch-until-int-cleared)
garfieldsg	0:662207e34fba	1381	* @see getInterruptLatch()
garfieldsg	0:662207e34fba	1382	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1383	* @see MPU6050_INTCFG_LATCH_INT_EN_BIT
garfieldsg	0:662207e34fba	1384	*/
syundo0730	6:f38dfe62d74c	1385	void MPU6050::setInterruptLatch(bool latch) {
syundo0730	7:d5845b617139	1386	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_LATCH_INT_EN_BIT, latch);
garfieldsg	0:662207e34fba	1387	}
garfieldsg	0:662207e34fba	1388	/** Get interrupt latch clear mode.
garfieldsg	0:662207e34fba	1389	* Will be set 0 for status-read-only, 1 for any-register-read.
garfieldsg	0:662207e34fba	1390	* @return Current latch clear mode (0=status-read-only, 1=any-register-read)
garfieldsg	0:662207e34fba	1391	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1392	* @see MPU6050_INTCFG_INT_RD_CLEAR_BIT
garfieldsg	0:662207e34fba	1393	*/
syundo0730	6:f38dfe62d74c	1394	bool MPU6050::getInterruptLatchClear() {
syundo0730	7:d5845b617139	1395	I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_RD_CLEAR_BIT, buffer);
garfieldsg	0:662207e34fba	1396	return buffer[0];
garfieldsg	0:662207e34fba	1397	}
garfieldsg	0:662207e34fba	1398	/** Set interrupt latch clear mode.
garfieldsg	0:662207e34fba	1399	* @param clear New latch clear mode (0=status-read-only, 1=any-register-read)
garfieldsg	0:662207e34fba	1400	* @see getInterruptLatchClear()
garfieldsg	0:662207e34fba	1401	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1402	* @see MPU6050_INTCFG_INT_RD_CLEAR_BIT
garfieldsg	0:662207e34fba	1403	*/
syundo0730	6:f38dfe62d74c	1404	void MPU6050::setInterruptLatchClear(bool clear) {
syundo0730	7:d5845b617139	1405	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_RD_CLEAR_BIT, clear);
garfieldsg	0:662207e34fba	1406	}
garfieldsg	0:662207e34fba	1407	/** Get FSYNC interrupt logic level mode.
garfieldsg	0:662207e34fba	1408	* @return Current FSYNC interrupt mode (0=active-high, 1=active-low)
garfieldsg	0:662207e34fba	1409	* @see getFSyncInterruptMode()
garfieldsg	0:662207e34fba	1410	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1411	* @see MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT
garfieldsg	0:662207e34fba	1412	*/
syundo0730	6:f38dfe62d74c	1413	bool MPU6050::getFSyncInterruptLevel() {
syundo0730	7:d5845b617139	1414	I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT, buffer);
garfieldsg	0:662207e34fba	1415	return buffer[0];
garfieldsg	0:662207e34fba	1416	}
garfieldsg	0:662207e34fba	1417	/** Set FSYNC interrupt logic level mode.
garfieldsg	0:662207e34fba	1418	* @param mode New FSYNC interrupt mode (0=active-high, 1=active-low)
garfieldsg	0:662207e34fba	1419	* @see getFSyncInterruptMode()
garfieldsg	0:662207e34fba	1420	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1421	* @see MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT
garfieldsg	0:662207e34fba	1422	*/
syundo0730	6:f38dfe62d74c	1423	void MPU6050::setFSyncInterruptLevel(bool level) {
syundo0730	7:d5845b617139	1424	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT, level);
garfieldsg	0:662207e34fba	1425	}
garfieldsg	0:662207e34fba	1426	/** Get FSYNC pin interrupt enabled setting.
garfieldsg	0:662207e34fba	1427	* Will be set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1428	* @return Current interrupt enabled setting
garfieldsg	0:662207e34fba	1429	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1430	* @see MPU6050_INTCFG_FSYNC_INT_EN_BIT
garfieldsg	0:662207e34fba	1431	*/
syundo0730	6:f38dfe62d74c	1432	bool MPU6050::getFSyncInterruptEnabled() {
syundo0730	7:d5845b617139	1433	I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_EN_BIT, buffer);
garfieldsg	0:662207e34fba	1434	return buffer[0];
garfieldsg	0:662207e34fba	1435	}
garfieldsg	0:662207e34fba	1436	/** Set FSYNC pin interrupt enabled setting.
garfieldsg	0:662207e34fba	1437	* @param enabled New FSYNC pin interrupt enabled setting
garfieldsg	0:662207e34fba	1438	* @see getFSyncInterruptEnabled()
garfieldsg	0:662207e34fba	1439	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1440	* @see MPU6050_INTCFG_FSYNC_INT_EN_BIT
garfieldsg	0:662207e34fba	1441	*/
syundo0730	6:f38dfe62d74c	1442	void MPU6050::setFSyncInterruptEnabled(bool enabled) {
syundo0730	7:d5845b617139	1443	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_EN_BIT, enabled);
garfieldsg	0:662207e34fba	1444	}
garfieldsg	0:662207e34fba	1445	/** Get I2C bypass enabled status.
garfieldsg	0:662207e34fba	1446	* When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to
garfieldsg	0:662207e34fba	1447	* 0, the host application processor will be able to directly access the
garfieldsg	0:662207e34fba	1448	* auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host
garfieldsg	0:662207e34fba	1449	* application processor will not be able to directly access the auxiliary I2C
garfieldsg	0:662207e34fba	1450	* bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106
garfieldsg	0:662207e34fba	1451	* bit[5]).
garfieldsg	0:662207e34fba	1452	* @return Current I2C bypass enabled status
garfieldsg	0:662207e34fba	1453	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1454	* @see MPU6050_INTCFG_I2C_BYPASS_EN_BIT
garfieldsg	0:662207e34fba	1455	*/
syundo0730	6:f38dfe62d74c	1456	bool MPU6050::getI2CBypassEnabled() {
syundo0730	7:d5845b617139	1457	I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_I2C_BYPASS_EN_BIT, buffer);
garfieldsg	0:662207e34fba	1458	return buffer[0];
garfieldsg	0:662207e34fba	1459	}
garfieldsg	0:662207e34fba	1460	/** Set I2C bypass enabled status.
garfieldsg	0:662207e34fba	1461	* When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to
garfieldsg	0:662207e34fba	1462	* 0, the host application processor will be able to directly access the
garfieldsg	0:662207e34fba	1463	* auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host
garfieldsg	0:662207e34fba	1464	* application processor will not be able to directly access the auxiliary I2C
garfieldsg	0:662207e34fba	1465	* bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106
garfieldsg	0:662207e34fba	1466	* bit[5]).
garfieldsg	0:662207e34fba	1467	* @param enabled New I2C bypass enabled status
garfieldsg	0:662207e34fba	1468	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1469	* @see MPU6050_INTCFG_I2C_BYPASS_EN_BIT
garfieldsg	0:662207e34fba	1470	*/
syundo0730	6:f38dfe62d74c	1471	void MPU6050::setI2CBypassEnabled(bool enabled) {
syundo0730	7:d5845b617139	1472	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_I2C_BYPASS_EN_BIT, enabled);
garfieldsg	0:662207e34fba	1473	}
garfieldsg	0:662207e34fba	1474	/** Get reference clock output enabled status.
garfieldsg	0:662207e34fba	1475	* When this bit is equal to 1, a reference clock output is provided at the
garfieldsg	0:662207e34fba	1476	* CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For
garfieldsg	0:662207e34fba	1477	* further information regarding CLKOUT, please refer to the MPU-60X0 Product
garfieldsg	0:662207e34fba	1478	* Specification document.
garfieldsg	0:662207e34fba	1479	* @return Current reference clock output enabled status
garfieldsg	0:662207e34fba	1480	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1481	* @see MPU6050_INTCFG_CLKOUT_EN_BIT
garfieldsg	0:662207e34fba	1482	*/
syundo0730	6:f38dfe62d74c	1483	bool MPU6050::getClockOutputEnabled() {
syundo0730	7:d5845b617139	1484	I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_CLKOUT_EN_BIT, buffer);
garfieldsg	0:662207e34fba	1485	return buffer[0];
garfieldsg	0:662207e34fba	1486	}
garfieldsg	0:662207e34fba	1487	/** Set reference clock output enabled status.
garfieldsg	0:662207e34fba	1488	* When this bit is equal to 1, a reference clock output is provided at the
garfieldsg	0:662207e34fba	1489	* CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For
garfieldsg	0:662207e34fba	1490	* further information regarding CLKOUT, please refer to the MPU-60X0 Product
garfieldsg	0:662207e34fba	1491	* Specification document.
garfieldsg	0:662207e34fba	1492	* @param enabled New reference clock output enabled status
garfieldsg	0:662207e34fba	1493	* @see MPU6050_RA_INT_PIN_CFG
garfieldsg	0:662207e34fba	1494	* @see MPU6050_INTCFG_CLKOUT_EN_BIT
garfieldsg	0:662207e34fba	1495	*/
syundo0730	6:f38dfe62d74c	1496	void MPU6050::setClockOutputEnabled(bool enabled) {
syundo0730	7:d5845b617139	1497	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_CLKOUT_EN_BIT, enabled);
garfieldsg	0:662207e34fba	1498	}
garfieldsg	0:662207e34fba	1499
garfieldsg	0:662207e34fba	1500	// INT_ENABLE register
garfieldsg	0:662207e34fba	1501
garfieldsg	0:662207e34fba	1502	/** Get full interrupt enabled status.
garfieldsg	0:662207e34fba	1503	* Full register byte for all interrupts, for quick reading. Each bit will be
garfieldsg	0:662207e34fba	1504	* set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1505	* @return Current interrupt enabled status
garfieldsg	0:662207e34fba	1506	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1507	* @see MPU6050_INTERRUPT_FF_BIT
garfieldsg	0:662207e34fba	1508	**/
syundo0730	6:f38dfe62d74c	1509	uint8_t MPU6050::getIntEnabled() {
syundo0730	7:d5845b617139	1510	I2Cdev::readByte(devAddr, MPU6050_RA_INT_ENABLE, buffer);
garfieldsg	0:662207e34fba	1511	return buffer[0];
garfieldsg	0:662207e34fba	1512	}
garfieldsg	0:662207e34fba	1513	/** Set full interrupt enabled status.
garfieldsg	0:662207e34fba	1514	* Full register byte for all interrupts, for quick reading. Each bit should be
garfieldsg	0:662207e34fba	1515	* set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1516	* @param enabled New interrupt enabled status
garfieldsg	0:662207e34fba	1517	* @see getIntFreefallEnabled()
garfieldsg	0:662207e34fba	1518	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1519	* @see MPU6050_INTERRUPT_FF_BIT
garfieldsg	0:662207e34fba	1520	**/
syundo0730	6:f38dfe62d74c	1521	void MPU6050::setIntEnabled(uint8_t enabled) {
syundo0730	7:d5845b617139	1522	I2Cdev::writeByte(devAddr, MPU6050_RA_INT_ENABLE, enabled);
garfieldsg	0:662207e34fba	1523	}
garfieldsg	0:662207e34fba	1524	/** Get Free Fall interrupt enabled status.
garfieldsg	0:662207e34fba	1525	* Will be set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1526	* @return Current interrupt enabled status
garfieldsg	0:662207e34fba	1527	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1528	* @see MPU6050_INTERRUPT_FF_BIT
garfieldsg	0:662207e34fba	1529	**/
syundo0730	6:f38dfe62d74c	1530	bool MPU6050::getIntFreefallEnabled() {
syundo0730	7:d5845b617139	1531	I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FF_BIT, buffer);
garfieldsg	0:662207e34fba	1532	return buffer[0];
garfieldsg	0:662207e34fba	1533	}
garfieldsg	0:662207e34fba	1534	/** Set Free Fall interrupt enabled status.
garfieldsg	0:662207e34fba	1535	* @param enabled New interrupt enabled status
garfieldsg	0:662207e34fba	1536	* @see getIntFreefallEnabled()
garfieldsg	0:662207e34fba	1537	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1538	* @see MPU6050_INTERRUPT_FF_BIT
garfieldsg	0:662207e34fba	1539	**/
syundo0730	6:f38dfe62d74c	1540	void MPU6050::setIntFreefallEnabled(bool enabled) {
syundo0730	7:d5845b617139	1541	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FF_BIT, enabled);
garfieldsg	0:662207e34fba	1542	}
garfieldsg	0:662207e34fba	1543	/** Get Motion Detection interrupt enabled status.
garfieldsg	0:662207e34fba	1544	* Will be set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1545	* @return Current interrupt enabled status
garfieldsg	0:662207e34fba	1546	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1547	* @see MPU6050_INTERRUPT_MOT_BIT
garfieldsg	0:662207e34fba	1548	**/
syundo0730	6:f38dfe62d74c	1549	bool MPU6050::getIntMotionEnabled() {
syundo0730	7:d5845b617139	1550	I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_MOT_BIT, buffer);
garfieldsg	0:662207e34fba	1551	return buffer[0];
garfieldsg	0:662207e34fba	1552	}
garfieldsg	0:662207e34fba	1553	/** Set Motion Detection interrupt enabled status.
garfieldsg	0:662207e34fba	1554	* @param enabled New interrupt enabled status
garfieldsg	0:662207e34fba	1555	* @see getIntMotionEnabled()
garfieldsg	0:662207e34fba	1556	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1557	* @see MPU6050_INTERRUPT_MOT_BIT
garfieldsg	0:662207e34fba	1558	**/
syundo0730	6:f38dfe62d74c	1559	void MPU6050::setIntMotionEnabled(bool enabled) {
syundo0730	7:d5845b617139	1560	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_MOT_BIT, enabled);
garfieldsg	0:662207e34fba	1561	}
garfieldsg	0:662207e34fba	1562	/** Get Zero Motion Detection interrupt enabled status.
garfieldsg	0:662207e34fba	1563	* Will be set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1564	* @return Current interrupt enabled status
garfieldsg	0:662207e34fba	1565	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1566	* @see MPU6050_INTERRUPT_ZMOT_BIT
garfieldsg	0:662207e34fba	1567	**/
syundo0730	6:f38dfe62d74c	1568	bool MPU6050::getIntZeroMotionEnabled() {
syundo0730	7:d5845b617139	1569	I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_ZMOT_BIT, buffer);
garfieldsg	0:662207e34fba	1570	return buffer[0];
garfieldsg	0:662207e34fba	1571	}
garfieldsg	0:662207e34fba	1572	/** Set Zero Motion Detection interrupt enabled status.
garfieldsg	0:662207e34fba	1573	* @param enabled New interrupt enabled status
garfieldsg	0:662207e34fba	1574	* @see getIntZeroMotionEnabled()
garfieldsg	0:662207e34fba	1575	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1576	* @see MPU6050_INTERRUPT_ZMOT_BIT
garfieldsg	0:662207e34fba	1577	**/
syundo0730	6:f38dfe62d74c	1578	void MPU6050::setIntZeroMotionEnabled(bool enabled) {
syundo0730	7:d5845b617139	1579	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_ZMOT_BIT, enabled);
garfieldsg	0:662207e34fba	1580	}
garfieldsg	0:662207e34fba	1581	/** Get FIFO Buffer Overflow interrupt enabled status.
garfieldsg	0:662207e34fba	1582	* Will be set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1583	* @return Current interrupt enabled status
garfieldsg	0:662207e34fba	1584	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1585	* @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT
garfieldsg	0:662207e34fba	1586	**/
syundo0730	6:f38dfe62d74c	1587	bool MPU6050::getIntFIFOBufferOverflowEnabled() {
syundo0730	7:d5845b617139	1588	I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, buffer);
garfieldsg	0:662207e34fba	1589	return buffer[0];
garfieldsg	0:662207e34fba	1590	}
garfieldsg	0:662207e34fba	1591	/** Set FIFO Buffer Overflow interrupt enabled status.
garfieldsg	0:662207e34fba	1592	* @param enabled New interrupt enabled status
garfieldsg	0:662207e34fba	1593	* @see getIntFIFOBufferOverflowEnabled()
garfieldsg	0:662207e34fba	1594	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1595	* @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT
garfieldsg	0:662207e34fba	1596	**/
syundo0730	6:f38dfe62d74c	1597	void MPU6050::setIntFIFOBufferOverflowEnabled(bool enabled) {
syundo0730	7:d5845b617139	1598	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, enabled);
garfieldsg	0:662207e34fba	1599	}
garfieldsg	0:662207e34fba	1600	/** Get I2C Master interrupt enabled status.
garfieldsg	0:662207e34fba	1601	* This enables any of the I2C Master interrupt sources to generate an
garfieldsg	0:662207e34fba	1602	* interrupt. Will be set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1603	* @return Current interrupt enabled status
garfieldsg	0:662207e34fba	1604	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1605	* @see MPU6050_INTERRUPT_I2C_MST_INT_BIT
garfieldsg	0:662207e34fba	1606	**/
syundo0730	6:f38dfe62d74c	1607	bool MPU6050::getIntI2CMasterEnabled() {
syundo0730	7:d5845b617139	1608	I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_I2C_MST_INT_BIT, buffer);
garfieldsg	0:662207e34fba	1609	return buffer[0];
garfieldsg	0:662207e34fba	1610	}
garfieldsg	0:662207e34fba	1611	/** Set I2C Master interrupt enabled status.
garfieldsg	0:662207e34fba	1612	* @param enabled New interrupt enabled status
garfieldsg	0:662207e34fba	1613	* @see getIntI2CMasterEnabled()
garfieldsg	0:662207e34fba	1614	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1615	* @see MPU6050_INTERRUPT_I2C_MST_INT_BIT
garfieldsg	0:662207e34fba	1616	**/
syundo0730	6:f38dfe62d74c	1617	void MPU6050::setIntI2CMasterEnabled(bool enabled) {
syundo0730	7:d5845b617139	1618	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_I2C_MST_INT_BIT, enabled);
garfieldsg	0:662207e34fba	1619	}
garfieldsg	0:662207e34fba	1620	/** Get Data Ready interrupt enabled setting.
garfieldsg	0:662207e34fba	1621	* This event occurs each time a write operation to all of the sensor registers
garfieldsg	0:662207e34fba	1622	* has been completed. Will be set 0 for disabled, 1 for enabled.
garfieldsg	0:662207e34fba	1623	* @return Current interrupt enabled status
garfieldsg	0:662207e34fba	1624	* @see MPU6050_RA_INT_ENABLE
garfieldsg	0:662207e34fba	1625	* @see MPU6050_INTERRUPT_DATA_RDY_BIT
garfieldsg	0:662207e34fba	1626	*/
syundo0730	6:f38dfe62d74c	1627	bool MPU6050::getIntDataReadyEnabled() {
syundo0730	7:d5845b617139	1628	I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DATA_RDY_BIT, buffer);
garfieldsg	0:662207e34fba	1629	return buffer[0];
garfieldsg	0:662207e34fba	1630	}
garfieldsg	0:662207e34fba	1631	/** Set Data Ready interrupt enabled status.
garfieldsg	0:662207e34fba	1632	* @param enabled New interrupt enabled status
garfieldsg	0:662207e34fba	1633	* @see getIntDataReadyEnabled()
garfieldsg	0:662207e34fba	1634	* @see MPU6050_RA_INT_CFG
garfieldsg	0:662207e34fba	1635	* @see MPU6050_INTERRUPT_DATA_RDY_BIT
garfieldsg	0:662207e34fba	1636	*/
syundo0730	6:f38dfe62d74c	1637	void MPU6050::setIntDataReadyEnabled(bool enabled) {
syundo0730	7:d5845b617139	1638	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DATA_RDY_BIT, enabled);
garfieldsg	0:662207e34fba	1639	}
garfieldsg	0:662207e34fba	1640
garfieldsg	0:662207e34fba	1641	// INT_STATUS register
garfieldsg	0:662207e34fba	1642
garfieldsg	0:662207e34fba	1643	/** Get full set of interrupt status bits.
garfieldsg	0:662207e34fba	1644	* These bits clear to 0 after the register has been read. Very useful
garfieldsg	0:662207e34fba	1645	* for getting multiple INT statuses, since each single bit read clears
garfieldsg	0:662207e34fba	1646	* all of them because it has to read the whole byte.
garfieldsg	0:662207e34fba	1647	* @return Current interrupt status
garfieldsg	0:662207e34fba	1648	* @see MPU6050_RA_INT_STATUS
garfieldsg	0:662207e34fba	1649	*/
syundo0730	6:f38dfe62d74c	1650	uint8_t MPU6050::getIntStatus() {
syundo0730	7:d5845b617139	1651	I2Cdev::readByte(devAddr, MPU6050_RA_INT_STATUS, buffer);
garfieldsg	0:662207e34fba	1652	return buffer[0];
garfieldsg	0:662207e34fba	1653	}
garfieldsg	0:662207e34fba	1654	/** Get Free Fall interrupt status.
garfieldsg	0:662207e34fba	1655	* This bit automatically sets to 1 when a Free Fall interrupt has been
garfieldsg	0:662207e34fba	1656	* generated. The bit clears to 0 after the register has been read.
garfieldsg	0:662207e34fba	1657	* @return Current interrupt status
garfieldsg	0:662207e34fba	1658	* @see MPU6050_RA_INT_STATUS
garfieldsg	0:662207e34fba	1659	* @see MPU6050_INTERRUPT_FF_BIT
garfieldsg	0:662207e34fba	1660	*/
syundo0730	6:f38dfe62d74c	1661	bool MPU6050::getIntFreefallStatus() {
syundo0730	7:d5845b617139	1662	I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_FF_BIT, buffer);
garfieldsg	0:662207e34fba	1663	return buffer[0];
garfieldsg	0:662207e34fba	1664	}
garfieldsg	0:662207e34fba	1665	/** Get Motion Detection interrupt status.
garfieldsg	0:662207e34fba	1666	* This bit automatically sets to 1 when a Motion Detection interrupt has been
garfieldsg	0:662207e34fba	1667	* generated. The bit clears to 0 after the register has been read.
garfieldsg	0:662207e34fba	1668	* @return Current interrupt status
garfieldsg	0:662207e34fba	1669	* @see MPU6050_RA_INT_STATUS
garfieldsg	0:662207e34fba	1670	* @see MPU6050_INTERRUPT_MOT_BIT
garfieldsg	0:662207e34fba	1671	*/
syundo0730	6:f38dfe62d74c	1672	bool MPU6050::getIntMotionStatus() {
syundo0730	7:d5845b617139	1673	I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_MOT_BIT, buffer);
garfieldsg	0:662207e34fba	1674	return buffer[0];
garfieldsg	0:662207e34fba	1675	}
garfieldsg	0:662207e34fba	1676	/** Get Zero Motion Detection interrupt status.
garfieldsg	0:662207e34fba	1677	* This bit automatically sets to 1 when a Zero Motion Detection interrupt has
garfieldsg	0:662207e34fba	1678	* been generated. The bit clears to 0 after the register has been read.
garfieldsg	0:662207e34fba	1679	* @return Current interrupt status
garfieldsg	0:662207e34fba	1680	* @see MPU6050_RA_INT_STATUS
garfieldsg	0:662207e34fba	1681	* @see MPU6050_INTERRUPT_ZMOT_BIT
garfieldsg	0:662207e34fba	1682	*/
syundo0730	6:f38dfe62d74c	1683	bool MPU6050::getIntZeroMotionStatus() {
syundo0730	7:d5845b617139	1684	I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_ZMOT_BIT, buffer);
garfieldsg	0:662207e34fba	1685	return buffer[0];
garfieldsg	0:662207e34fba	1686	}
garfieldsg	0:662207e34fba	1687	/** Get FIFO Buffer Overflow interrupt status.
garfieldsg	0:662207e34fba	1688	* This bit automatically sets to 1 when a Free Fall interrupt has been
garfieldsg	0:662207e34fba	1689	* generated. The bit clears to 0 after the register has been read.
garfieldsg	0:662207e34fba	1690	* @return Current interrupt status
garfieldsg	0:662207e34fba	1691	* @see MPU6050_RA_INT_STATUS
garfieldsg	0:662207e34fba	1692	* @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT
garfieldsg	0:662207e34fba	1693	*/
syundo0730	6:f38dfe62d74c	1694	bool MPU6050::getIntFIFOBufferOverflowStatus() {
syundo0730	7:d5845b617139	1695	I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, buffer);
garfieldsg	0:662207e34fba	1696	return buffer[0];
garfieldsg	0:662207e34fba	1697	}
garfieldsg	0:662207e34fba	1698	/** Get I2C Master interrupt status.
garfieldsg	0:662207e34fba	1699	* This bit automatically sets to 1 when an I2C Master interrupt has been
garfieldsg	0:662207e34fba	1700	* generated. For a list of I2C Master interrupts, please refer to Register 54.
garfieldsg	0:662207e34fba	1701	* The bit clears to 0 after the register has been read.
garfieldsg	0:662207e34fba	1702	* @return Current interrupt status
garfieldsg	0:662207e34fba	1703	* @see MPU6050_RA_INT_STATUS
garfieldsg	0:662207e34fba	1704	* @see MPU6050_INTERRUPT_I2C_MST_INT_BIT
garfieldsg	0:662207e34fba	1705	*/
syundo0730	6:f38dfe62d74c	1706	bool MPU6050::getIntI2CMasterStatus() {
syundo0730	7:d5845b617139	1707	I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_I2C_MST_INT_BIT, buffer);
garfieldsg	0:662207e34fba	1708	return buffer[0];
garfieldsg	0:662207e34fba	1709	}
garfieldsg	0:662207e34fba	1710	/** Get Data Ready interrupt status.
garfieldsg	0:662207e34fba	1711	* This bit automatically sets to 1 when a Data Ready interrupt has been
garfieldsg	0:662207e34fba	1712	* generated. The bit clears to 0 after the register has been read.
garfieldsg	0:662207e34fba	1713	* @return Current interrupt status
garfieldsg	0:662207e34fba	1714	* @see MPU6050_RA_INT_STATUS
garfieldsg	0:662207e34fba	1715	* @see MPU6050_INTERRUPT_DATA_RDY_BIT
garfieldsg	0:662207e34fba	1716	*/
syundo0730	6:f38dfe62d74c	1717	bool MPU6050::getIntDataReadyStatus() {
syundo0730	7:d5845b617139	1718	I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_DATA_RDY_BIT, buffer);
garfieldsg	0:662207e34fba	1719	return buffer[0];
garfieldsg	0:662207e34fba	1720	}
garfieldsg	0:662207e34fba	1721
garfieldsg	0:662207e34fba	1722	// ACCEL_OUT_ registers
garfieldsg	0:662207e34fba	1723
garfieldsg	0:662207e34fba	1724	/** Get raw 9-axis motion sensor readings (accel/gyro/compass).
garfieldsg	0:662207e34fba	1725	* FUNCTION NOT FULLY IMPLEMENTED YET.
garfieldsg	0:662207e34fba	1726	* @param ax 16-bit signed integer container for accelerometer X-axis value
garfieldsg	0:662207e34fba	1727	* @param ay 16-bit signed integer container for accelerometer Y-axis value
garfieldsg	0:662207e34fba	1728	* @param az 16-bit signed integer container for accelerometer Z-axis value
garfieldsg	0:662207e34fba	1729	* @param gx 16-bit signed integer container for gyroscope X-axis value
garfieldsg	0:662207e34fba	1730	* @param gy 16-bit signed integer container for gyroscope Y-axis value
garfieldsg	0:662207e34fba	1731	* @param gz 16-bit signed integer container for gyroscope Z-axis value
garfieldsg	0:662207e34fba	1732	* @param mx 16-bit signed integer container for magnetometer X-axis value
garfieldsg	0:662207e34fba	1733	* @param my 16-bit signed integer container for magnetometer Y-axis value
garfieldsg	0:662207e34fba	1734	* @param mz 16-bit signed integer container for magnetometer Z-axis value
garfieldsg	0:662207e34fba	1735	* @see getMotion6()
garfieldsg	0:662207e34fba	1736	* @see getAcceleration()
garfieldsg	0:662207e34fba	1737	* @see getRotation()
garfieldsg	0:662207e34fba	1738	* @see MPU6050_RA_ACCEL_XOUT_H
garfieldsg	0:662207e34fba	1739	*/
syundo0730	6:f38dfe62d74c	1740	void MPU6050::getMotion9(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz, int16_t* mx, int16_t* my, int16_t* mz) {
garfieldsg	0:662207e34fba	1741	getMotion6(ax, ay, az, gx, gy, gz);
syundo0730	6:f38dfe62d74c	1742	// TODO: magnetometer integration
garfieldsg	0:662207e34fba	1743	}
garfieldsg	0:662207e34fba	1744	/** Get raw 6-axis motion sensor readings (accel/gyro).
garfieldsg	0:662207e34fba	1745	* Retrieves all currently available motion sensor values.
garfieldsg	0:662207e34fba	1746	* @param ax 16-bit signed integer container for accelerometer X-axis value
garfieldsg	0:662207e34fba	1747	* @param ay 16-bit signed integer container for accelerometer Y-axis value
garfieldsg	0:662207e34fba	1748	* @param az 16-bit signed integer container for accelerometer Z-axis value
garfieldsg	0:662207e34fba	1749	* @param gx 16-bit signed integer container for gyroscope X-axis value
garfieldsg	0:662207e34fba	1750	* @param gy 16-bit signed integer container for gyroscope Y-axis value
garfieldsg	0:662207e34fba	1751	* @param gz 16-bit signed integer container for gyroscope Z-axis value
garfieldsg	0:662207e34fba	1752	* @see getAcceleration()
garfieldsg	0:662207e34fba	1753	* @see getRotation()
garfieldsg	0:662207e34fba	1754	* @see MPU6050_RA_ACCEL_XOUT_H
garfieldsg	0:662207e34fba	1755	*/
syundo0730	6:f38dfe62d74c	1756	void MPU6050::getMotion6(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz) {
syundo0730	7:d5845b617139	1757	I2Cdev::readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 14, buffer);
garfieldsg	0:662207e34fba	1758	*ax = (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1759	*ay = (((int16_t)buffer[2]) << 8) \| buffer[3];
garfieldsg	0:662207e34fba	1760	*az = (((int16_t)buffer[4]) << 8) \| buffer[5];
garfieldsg	0:662207e34fba	1761	*gx = (((int16_t)buffer[8]) << 8) \| buffer[9];
garfieldsg	0:662207e34fba	1762	*gy = (((int16_t)buffer[10]) << 8) \| buffer[11];
garfieldsg	0:662207e34fba	1763	*gz = (((int16_t)buffer[12]) << 8) \| buffer[13];
garfieldsg	0:662207e34fba	1764	}
garfieldsg	0:662207e34fba	1765	/** Get 3-axis accelerometer readings.
garfieldsg	0:662207e34fba	1766	* These registers store the most recent accelerometer measurements.
garfieldsg	0:662207e34fba	1767	* Accelerometer measurements are written to these registers at the Sample Rate
garfieldsg	0:662207e34fba	1768	* as defined in Register 25.
garfieldsg	0:662207e34fba	1769	*
garfieldsg	0:662207e34fba	1770	* The accelerometer measurement registers, along with the temperature
garfieldsg	0:662207e34fba	1771	* measurement registers, gyroscope measurement registers, and external sensor
garfieldsg	0:662207e34fba	1772	* data registers, are composed of two sets of registers: an internal register
garfieldsg	0:662207e34fba	1773	* set and a user-facing read register set.
garfieldsg	0:662207e34fba	1774	*
garfieldsg	0:662207e34fba	1775	* The data within the accelerometer sensors' internal register set is always
garfieldsg	0:662207e34fba	1776	* updated at the Sample Rate. Meanwhile, the user-facing read register set
garfieldsg	0:662207e34fba	1777	* duplicates the internal register set's data values whenever the serial
garfieldsg	0:662207e34fba	1778	* interface is idle. This guarantees that a burst read of sensor registers will
garfieldsg	0:662207e34fba	1779	* read measurements from the same sampling instant. Note that if burst reads
garfieldsg	0:662207e34fba	1780	* are not used, the user is responsible for ensuring a set of single byte reads
garfieldsg	0:662207e34fba	1781	* correspond to a single sampling instant by checking the Data Ready interrupt.
garfieldsg	0:662207e34fba	1782	*
garfieldsg	0:662207e34fba	1783	* Each 16-bit accelerometer measurement has a full scale defined in ACCEL_FS
garfieldsg	0:662207e34fba	1784	* (Register 28). For each full scale setting, the accelerometers' sensitivity
garfieldsg	0:662207e34fba	1785	* per LSB in ACCEL_xOUT is shown in the table below:
garfieldsg	0:662207e34fba	1786	*
garfieldsg	0:662207e34fba	1787	* <pre>
garfieldsg	0:662207e34fba	1788	* AFS_SEL \| Full Scale Range \| LSB Sensitivity
garfieldsg	0:662207e34fba	1789	* --------+------------------+----------------
garfieldsg	0:662207e34fba	1790	* 0 \| +/- 2g \| 8192 LSB/mg
garfieldsg	0:662207e34fba	1791	* 1 \| +/- 4g \| 4096 LSB/mg
garfieldsg	0:662207e34fba	1792	* 2 \| +/- 8g \| 2048 LSB/mg
garfieldsg	0:662207e34fba	1793	* 3 \| +/- 16g \| 1024 LSB/mg
garfieldsg	0:662207e34fba	1794	* </pre>
garfieldsg	0:662207e34fba	1795	*
garfieldsg	0:662207e34fba	1796	* @param x 16-bit signed integer container for X-axis acceleration
garfieldsg	0:662207e34fba	1797	* @param y 16-bit signed integer container for Y-axis acceleration
garfieldsg	0:662207e34fba	1798	* @param z 16-bit signed integer container for Z-axis acceleration
garfieldsg	0:662207e34fba	1799	* @see MPU6050_RA_GYRO_XOUT_H
garfieldsg	0:662207e34fba	1800	*/
syundo0730	6:f38dfe62d74c	1801	void MPU6050::getAcceleration(int16_t* x, int16_t* y, int16_t* z) {
syundo0730	7:d5845b617139	1802	I2Cdev::readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 6, buffer);
garfieldsg	0:662207e34fba	1803	*x = (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1804	*y = (((int16_t)buffer[2]) << 8) \| buffer[3];
garfieldsg	0:662207e34fba	1805	*z = (((int16_t)buffer[4]) << 8) \| buffer[5];
garfieldsg	0:662207e34fba	1806	}
garfieldsg	0:662207e34fba	1807	/** Get X-axis accelerometer reading.
garfieldsg	0:662207e34fba	1808	* @return X-axis acceleration measurement in 16-bit 2's complement format
garfieldsg	0:662207e34fba	1809	* @see getMotion6()
garfieldsg	0:662207e34fba	1810	* @see MPU6050_RA_ACCEL_XOUT_H
garfieldsg	0:662207e34fba	1811	*/
syundo0730	6:f38dfe62d74c	1812	int16_t MPU6050::getAccelerationX() {
syundo0730	7:d5845b617139	1813	I2Cdev::readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 2, buffer);
garfieldsg	0:662207e34fba	1814	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1815	}
garfieldsg	0:662207e34fba	1816	/** Get Y-axis accelerometer reading.
garfieldsg	0:662207e34fba	1817	* @return Y-axis acceleration measurement in 16-bit 2's complement format
garfieldsg	0:662207e34fba	1818	* @see getMotion6()
garfieldsg	0:662207e34fba	1819	* @see MPU6050_RA_ACCEL_YOUT_H
garfieldsg	0:662207e34fba	1820	*/
syundo0730	6:f38dfe62d74c	1821	int16_t MPU6050::getAccelerationY() {
syundo0730	7:d5845b617139	1822	I2Cdev::readBytes(devAddr, MPU6050_RA_ACCEL_YOUT_H, 2, buffer);
garfieldsg	0:662207e34fba	1823	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1824	}
garfieldsg	0:662207e34fba	1825	/** Get Z-axis accelerometer reading.
garfieldsg	0:662207e34fba	1826	* @return Z-axis acceleration measurement in 16-bit 2's complement format
garfieldsg	0:662207e34fba	1827	* @see getMotion6()
garfieldsg	0:662207e34fba	1828	* @see MPU6050_RA_ACCEL_ZOUT_H
garfieldsg	0:662207e34fba	1829	*/
syundo0730	6:f38dfe62d74c	1830	int16_t MPU6050::getAccelerationZ() {
syundo0730	7:d5845b617139	1831	I2Cdev::readBytes(devAddr, MPU6050_RA_ACCEL_ZOUT_H, 2, buffer);
garfieldsg	0:662207e34fba	1832	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1833	}
garfieldsg	0:662207e34fba	1834
garfieldsg	0:662207e34fba	1835	// TEMP_OUT_* registers
garfieldsg	0:662207e34fba	1836
garfieldsg	0:662207e34fba	1837	/** Get current internal temperature.
garfieldsg	0:662207e34fba	1838	* @return Temperature reading in 16-bit 2's complement format
garfieldsg	0:662207e34fba	1839	* @see MPU6050_RA_TEMP_OUT_H
garfieldsg	0:662207e34fba	1840	*/
syundo0730	6:f38dfe62d74c	1841	int16_t MPU6050::getTemperature() {
syundo0730	7:d5845b617139	1842	I2Cdev::readBytes(devAddr, MPU6050_RA_TEMP_OUT_H, 2, buffer);
garfieldsg	0:662207e34fba	1843	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1844	}
garfieldsg	0:662207e34fba	1845
garfieldsg	0:662207e34fba	1846	// GYRO_OUT_ registers
garfieldsg	0:662207e34fba	1847
garfieldsg	0:662207e34fba	1848	/** Get 3-axis gyroscope readings.
garfieldsg	0:662207e34fba	1849	* These gyroscope measurement registers, along with the accelerometer
garfieldsg	0:662207e34fba	1850	* measurement registers, temperature measurement registers, and external sensor
garfieldsg	0:662207e34fba	1851	* data registers, are composed of two sets of registers: an internal register
garfieldsg	0:662207e34fba	1852	* set and a user-facing read register set.
garfieldsg	0:662207e34fba	1853	* The data within the gyroscope sensors' internal register set is always
garfieldsg	0:662207e34fba	1854	* updated at the Sample Rate. Meanwhile, the user-facing read register set
garfieldsg	0:662207e34fba	1855	* duplicates the internal register set's data values whenever the serial
garfieldsg	0:662207e34fba	1856	* interface is idle. This guarantees that a burst read of sensor registers will
garfieldsg	0:662207e34fba	1857	* read measurements from the same sampling instant. Note that if burst reads
garfieldsg	0:662207e34fba	1858	* are not used, the user is responsible for ensuring a set of single byte reads
garfieldsg	0:662207e34fba	1859	* correspond to a single sampling instant by checking the Data Ready interrupt.
garfieldsg	0:662207e34fba	1860	*
garfieldsg	0:662207e34fba	1861	* Each 16-bit gyroscope measurement has a full scale defined in FS_SEL
garfieldsg	0:662207e34fba	1862	* (Register 27). For each full scale setting, the gyroscopes' sensitivity per
garfieldsg	0:662207e34fba	1863	* LSB in GYRO_xOUT is shown in the table below:
garfieldsg	0:662207e34fba	1864	*
garfieldsg	0:662207e34fba	1865	* <pre>
garfieldsg	0:662207e34fba	1866	* FS_SEL \| Full Scale Range \| LSB Sensitivity
garfieldsg	0:662207e34fba	1867	* -------+--------------------+----------------
garfieldsg	0:662207e34fba	1868	* 0 \| +/- 250 degrees/s \| 131 LSB/deg/s
garfieldsg	0:662207e34fba	1869	* 1 \| +/- 500 degrees/s \| 65.5 LSB/deg/s
garfieldsg	0:662207e34fba	1870	* 2 \| +/- 1000 degrees/s \| 32.8 LSB/deg/s
garfieldsg	0:662207e34fba	1871	* 3 \| +/- 2000 degrees/s \| 16.4 LSB/deg/s
garfieldsg	0:662207e34fba	1872	* </pre>
garfieldsg	0:662207e34fba	1873	*
garfieldsg	0:662207e34fba	1874	* @param x 16-bit signed integer container for X-axis rotation
garfieldsg	0:662207e34fba	1875	* @param y 16-bit signed integer container for Y-axis rotation
garfieldsg	0:662207e34fba	1876	* @param z 16-bit signed integer container for Z-axis rotation
garfieldsg	0:662207e34fba	1877	* @see getMotion6()
garfieldsg	0:662207e34fba	1878	* @see MPU6050_RA_GYRO_XOUT_H
garfieldsg	0:662207e34fba	1879	*/
syundo0730	6:f38dfe62d74c	1880	void MPU6050::getRotation(int16_t* x, int16_t* y, int16_t* z) {
syundo0730	7:d5845b617139	1881	I2Cdev::readBytes(devAddr, MPU6050_RA_GYRO_XOUT_H, 6, buffer);
garfieldsg	0:662207e34fba	1882	*x = (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1883	*y = (((int16_t)buffer[2]) << 8) \| buffer[3];
garfieldsg	0:662207e34fba	1884	*z = (((int16_t)buffer[4]) << 8) \| buffer[5];
garfieldsg	0:662207e34fba	1885	}
garfieldsg	0:662207e34fba	1886	/** Get X-axis gyroscope reading.
garfieldsg	0:662207e34fba	1887	* @return X-axis rotation measurement in 16-bit 2's complement format
garfieldsg	0:662207e34fba	1888	* @see getMotion6()
garfieldsg	0:662207e34fba	1889	* @see MPU6050_RA_GYRO_XOUT_H
garfieldsg	0:662207e34fba	1890	*/
syundo0730	6:f38dfe62d74c	1891	int16_t MPU6050::getRotationX() {
syundo0730	7:d5845b617139	1892	I2Cdev::readBytes(devAddr, MPU6050_RA_GYRO_XOUT_H, 2, buffer);
garfieldsg	0:662207e34fba	1893	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1894	}
garfieldsg	0:662207e34fba	1895	/** Get Y-axis gyroscope reading.
garfieldsg	0:662207e34fba	1896	* @return Y-axis rotation measurement in 16-bit 2's complement format
garfieldsg	0:662207e34fba	1897	* @see getMotion6()
garfieldsg	0:662207e34fba	1898	* @see MPU6050_RA_GYRO_YOUT_H
garfieldsg	0:662207e34fba	1899	*/
syundo0730	6:f38dfe62d74c	1900	int16_t MPU6050::getRotationY() {
syundo0730	7:d5845b617139	1901	I2Cdev::readBytes(devAddr, MPU6050_RA_GYRO_YOUT_H, 2, buffer);
garfieldsg	0:662207e34fba	1902	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1903	}
garfieldsg	0:662207e34fba	1904	/** Get Z-axis gyroscope reading.
garfieldsg	0:662207e34fba	1905	* @return Z-axis rotation measurement in 16-bit 2's complement format
garfieldsg	0:662207e34fba	1906	* @see getMotion6()
garfieldsg	0:662207e34fba	1907	* @see MPU6050_RA_GYRO_ZOUT_H
garfieldsg	0:662207e34fba	1908	*/
syundo0730	6:f38dfe62d74c	1909	int16_t MPU6050::getRotationZ() {
syundo0730	7:d5845b617139	1910	I2Cdev::readBytes(devAddr, MPU6050_RA_GYRO_ZOUT_H, 2, buffer);
garfieldsg	0:662207e34fba	1911	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	1912	}
garfieldsg	0:662207e34fba	1913
garfieldsg	0:662207e34fba	1914	// EXT_SENS_DATA_* registers
garfieldsg	0:662207e34fba	1915
garfieldsg	0:662207e34fba	1916	/** Read single byte from external sensor data register.
garfieldsg	0:662207e34fba	1917	* These registers store data read from external sensors by the Slave 0, 1, 2,
garfieldsg	0:662207e34fba	1918	* and 3 on the auxiliary I2C interface. Data read by Slave 4 is stored in
garfieldsg	0:662207e34fba	1919	* I2C_SLV4_DI (Register 53).
garfieldsg	0:662207e34fba	1920	*
garfieldsg	0:662207e34fba	1921	* External sensor data is written to these registers at the Sample Rate as
garfieldsg	0:662207e34fba	1922	* defined in Register 25. This access rate can be reduced by using the Slave
garfieldsg	0:662207e34fba	1923	* Delay Enable registers (Register 103).
garfieldsg	0:662207e34fba	1924	*
garfieldsg	0:662207e34fba	1925	* External sensor data registers, along with the gyroscope measurement
garfieldsg	0:662207e34fba	1926	* registers, accelerometer measurement registers, and temperature measurement
garfieldsg	0:662207e34fba	1927	* registers, are composed of two sets of registers: an internal register set
garfieldsg	0:662207e34fba	1928	* and a user-facing read register set.
garfieldsg	0:662207e34fba	1929	*
garfieldsg	0:662207e34fba	1930	* The data within the external sensors' internal register set is always updated
garfieldsg	0:662207e34fba	1931	* at the Sample Rate (or the reduced access rate) whenever the serial interface
garfieldsg	0:662207e34fba	1932	* is idle. This guarantees that a burst read of sensor registers will read
garfieldsg	0:662207e34fba	1933	* measurements from the same sampling instant. Note that if burst reads are not
garfieldsg	0:662207e34fba	1934	* used, the user is responsible for ensuring a set of single byte reads
garfieldsg	0:662207e34fba	1935	* correspond to a single sampling instant by checking the Data Ready interrupt.
garfieldsg	0:662207e34fba	1936	*
garfieldsg	0:662207e34fba	1937	* Data is placed in these external sensor data registers according to
garfieldsg	0:662207e34fba	1938	* I2C_SLV0_CTRL, I2C_SLV1_CTRL, I2C_SLV2_CTRL, and I2C_SLV3_CTRL (Registers 39,
garfieldsg	0:662207e34fba	1939	* 42, 45, and 48). When more than zero bytes are read (I2C_SLVx_LEN > 0) from
garfieldsg	0:662207e34fba	1940	* an enabled slave (I2C_SLVx_EN = 1), the slave is read at the Sample Rate (as
garfieldsg	0:662207e34fba	1941	* defined in Register 25) or delayed rate (if specified in Register 52 and
garfieldsg	0:662207e34fba	1942	* 103). During each Sample cycle, slave reads are performed in order of Slave
garfieldsg	0:662207e34fba	1943	* number. If all slaves are enabled with more than zero bytes to be read, the
garfieldsg	0:662207e34fba	1944	* order will be Slave 0, followed by Slave 1, Slave 2, and Slave 3.
garfieldsg	0:662207e34fba	1945	*
garfieldsg	0:662207e34fba	1946	* Each enabled slave will have EXT_SENS_DATA registers associated with it by
garfieldsg	0:662207e34fba	1947	* number of bytes read (I2C_SLVx_LEN) in order of slave number, starting from
garfieldsg	0:662207e34fba	1948	* EXT_SENS_DATA_00. Note that this means enabling or disabling a slave may
garfieldsg	0:662207e34fba	1949	* change the higher numbered slaves' associated registers. Furthermore, if
garfieldsg	0:662207e34fba	1950	* fewer total bytes are being read from the external sensors as a result of
garfieldsg	0:662207e34fba	1951	* such a change, then the data remaining in the registers which no longer have
garfieldsg	0:662207e34fba	1952	* an associated slave device (i.e. high numbered registers) will remain in
garfieldsg	0:662207e34fba	1953	* these previously allocated registers unless reset.
garfieldsg	0:662207e34fba	1954	*
garfieldsg	0:662207e34fba	1955	* If the sum of the read lengths of all SLVx transactions exceed the number of
garfieldsg	0:662207e34fba	1956	* available EXT_SENS_DATA registers, the excess bytes will be dropped. There
garfieldsg	0:662207e34fba	1957	* are 24 EXT_SENS_DATA registers and hence the total read lengths between all
garfieldsg	0:662207e34fba	1958	* the slaves cannot be greater than 24 or some bytes will be lost.
garfieldsg	0:662207e34fba	1959	*
garfieldsg	0:662207e34fba	1960	* Note: Slave 4's behavior is distinct from that of Slaves 0-3. For further
garfieldsg	0:662207e34fba	1961	* information regarding the characteristics of Slave 4, please refer to
garfieldsg	0:662207e34fba	1962	* Registers 49 to 53.
garfieldsg	0:662207e34fba	1963	*
garfieldsg	0:662207e34fba	1964	* EXAMPLE:
garfieldsg	0:662207e34fba	1965	* Suppose that Slave 0 is enabled with 4 bytes to be read (I2C_SLV0_EN = 1 and
garfieldsg	0:662207e34fba	1966	* I2C_SLV0_LEN = 4) while Slave 1 is enabled with 2 bytes to be read so that
garfieldsg	0:662207e34fba	1967	* I2C_SLV1_EN = 1 and I2C_SLV1_LEN = 2. In such a situation, EXT_SENS_DATA _00
garfieldsg	0:662207e34fba	1968	* through _03 will be associated with Slave 0, while EXT_SENS_DATA _04 and 05
garfieldsg	0:662207e34fba	1969	* will be associated with Slave 1. If Slave 2 is enabled as well, registers
garfieldsg	0:662207e34fba	1970	* starting from EXT_SENS_DATA_06 will be allocated to Slave 2.
garfieldsg	0:662207e34fba	1971	*
garfieldsg	0:662207e34fba	1972	* If Slave 2 is disabled while Slave 3 is enabled in this same situation, then
garfieldsg	0:662207e34fba	1973	* registers starting from EXT_SENS_DATA_06 will be allocated to Slave 3
garfieldsg	0:662207e34fba	1974	* instead.
garfieldsg	0:662207e34fba	1975	*
garfieldsg	0:662207e34fba	1976	* REGISTER ALLOCATION FOR DYNAMIC DISABLE VS. NORMAL DISABLE:
garfieldsg	0:662207e34fba	1977	* If a slave is disabled at any time, the space initially allocated to the
garfieldsg	0:662207e34fba	1978	* slave in the EXT_SENS_DATA register, will remain associated with that slave.
garfieldsg	0:662207e34fba	1979	* This is to avoid dynamic adjustment of the register allocation.
garfieldsg	0:662207e34fba	1980	*
garfieldsg	0:662207e34fba	1981	* The allocation of the EXT_SENS_DATA registers is recomputed only when (1) all
garfieldsg	0:662207e34fba	1982	* slaves are disabled, or (2) the I2C_MST_RST bit is set (Register 106).
garfieldsg	0:662207e34fba	1983	*
garfieldsg	0:662207e34fba	1984	* This above is also true if one of the slaves gets NACKed and stops
garfieldsg	0:662207e34fba	1985	* functioning.
garfieldsg	0:662207e34fba	1986	*
garfieldsg	0:662207e34fba	1987	* @param position Starting position (0-23)
garfieldsg	0:662207e34fba	1988	* @return Byte read from register
garfieldsg	0:662207e34fba	1989	*/
syundo0730	6:f38dfe62d74c	1990	uint8_t MPU6050::getExternalSensorByte(int position) {
syundo0730	7:d5845b617139	1991	I2Cdev::readByte(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, buffer);
garfieldsg	0:662207e34fba	1992	return buffer[0];
garfieldsg	0:662207e34fba	1993	}
garfieldsg	0:662207e34fba	1994	/** Read word (2 bytes) from external sensor data registers.
garfieldsg	0:662207e34fba	1995	* @param position Starting position (0-21)
garfieldsg	0:662207e34fba	1996	* @return Word read from register
garfieldsg	0:662207e34fba	1997	* @see getExternalSensorByte()
garfieldsg	0:662207e34fba	1998	*/
syundo0730	6:f38dfe62d74c	1999	uint16_t MPU6050::getExternalSensorWord(int position) {
syundo0730	7:d5845b617139	2000	I2Cdev::readBytes(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, 2, buffer);
garfieldsg	0:662207e34fba	2001	return (((uint16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	2002	}
garfieldsg	0:662207e34fba	2003	/** Read double word (4 bytes) from external sensor data registers.
garfieldsg	0:662207e34fba	2004	* @param position Starting position (0-20)
garfieldsg	0:662207e34fba	2005	* @return Double word read from registers
garfieldsg	0:662207e34fba	2006	* @see getExternalSensorByte()
garfieldsg	0:662207e34fba	2007	*/
syundo0730	6:f38dfe62d74c	2008	uint32_t MPU6050::getExternalSensorDWord(int position) {
syundo0730	7:d5845b617139	2009	I2Cdev::readBytes(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, 4, buffer);
garfieldsg	0:662207e34fba	2010	return (((uint32_t)buffer[0]) << 24) \| (((uint32_t)buffer[1]) << 16) \| (((uint16_t)buffer[2]) << 8) \| buffer[3];
garfieldsg	0:662207e34fba	2011	}
garfieldsg	0:662207e34fba	2012
garfieldsg	0:662207e34fba	2013	// MOT_DETECT_STATUS register
garfieldsg	0:662207e34fba	2014
syundo0730	6:f38dfe62d74c	2015	/** Get full motion detection status register content (all bits).
syundo0730	6:f38dfe62d74c	2016	* @return Motion detection status byte
syundo0730	6:f38dfe62d74c	2017	* @see MPU6050_RA_MOT_DETECT_STATUS
syundo0730	6:f38dfe62d74c	2018	*/
syundo0730	6:f38dfe62d74c	2019	uint8_t MPU6050::getMotionStatus() {
syundo0730	7:d5845b617139	2020	I2Cdev::readByte(devAddr, MPU6050_RA_MOT_DETECT_STATUS, buffer);
syundo0730	6:f38dfe62d74c	2021	return buffer[0];
syundo0730	6:f38dfe62d74c	2022	}
garfieldsg	0:662207e34fba	2023	/** Get X-axis negative motion detection interrupt status.
garfieldsg	0:662207e34fba	2024	* @return Motion detection status
garfieldsg	0:662207e34fba	2025	* @see MPU6050_RA_MOT_DETECT_STATUS
garfieldsg	0:662207e34fba	2026	* @see MPU6050_MOTION_MOT_XNEG_BIT
garfieldsg	0:662207e34fba	2027	*/
syundo0730	6:f38dfe62d74c	2028	bool MPU6050::getXNegMotionDetected() {
syundo0730	7:d5845b617139	2029	I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_XNEG_BIT, buffer);
garfieldsg	0:662207e34fba	2030	return buffer[0];
garfieldsg	0:662207e34fba	2031	}
garfieldsg	0:662207e34fba	2032	/** Get X-axis positive motion detection interrupt status.
garfieldsg	0:662207e34fba	2033	* @return Motion detection status
garfieldsg	0:662207e34fba	2034	* @see MPU6050_RA_MOT_DETECT_STATUS
garfieldsg	0:662207e34fba	2035	* @see MPU6050_MOTION_MOT_XPOS_BIT
garfieldsg	0:662207e34fba	2036	*/
syundo0730	6:f38dfe62d74c	2037	bool MPU6050::getXPosMotionDetected() {
syundo0730	7:d5845b617139	2038	I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_XPOS_BIT, buffer);
garfieldsg	0:662207e34fba	2039	return buffer[0];
garfieldsg	0:662207e34fba	2040	}
garfieldsg	0:662207e34fba	2041	/** Get Y-axis negative motion detection interrupt status.
garfieldsg	0:662207e34fba	2042	* @return Motion detection status
garfieldsg	0:662207e34fba	2043	* @see MPU6050_RA_MOT_DETECT_STATUS
garfieldsg	0:662207e34fba	2044	* @see MPU6050_MOTION_MOT_YNEG_BIT
garfieldsg	0:662207e34fba	2045	*/
syundo0730	6:f38dfe62d74c	2046	bool MPU6050::getYNegMotionDetected() {
syundo0730	7:d5845b617139	2047	I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_YNEG_BIT, buffer);
garfieldsg	0:662207e34fba	2048	return buffer[0];
garfieldsg	0:662207e34fba	2049	}
garfieldsg	0:662207e34fba	2050	/** Get Y-axis positive motion detection interrupt status.
garfieldsg	0:662207e34fba	2051	* @return Motion detection status
garfieldsg	0:662207e34fba	2052	* @see MPU6050_RA_MOT_DETECT_STATUS
garfieldsg	0:662207e34fba	2053	* @see MPU6050_MOTION_MOT_YPOS_BIT
garfieldsg	0:662207e34fba	2054	*/
syundo0730	6:f38dfe62d74c	2055	bool MPU6050::getYPosMotionDetected() {
syundo0730	7:d5845b617139	2056	I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_YPOS_BIT, buffer);
garfieldsg	0:662207e34fba	2057	return buffer[0];
garfieldsg	0:662207e34fba	2058	}
garfieldsg	0:662207e34fba	2059	/** Get Z-axis negative motion detection interrupt status.
garfieldsg	0:662207e34fba	2060	* @return Motion detection status
garfieldsg	0:662207e34fba	2061	* @see MPU6050_RA_MOT_DETECT_STATUS
garfieldsg	0:662207e34fba	2062	* @see MPU6050_MOTION_MOT_ZNEG_BIT
garfieldsg	0:662207e34fba	2063	*/
syundo0730	6:f38dfe62d74c	2064	bool MPU6050::getZNegMotionDetected() {
syundo0730	7:d5845b617139	2065	I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZNEG_BIT, buffer);
garfieldsg	0:662207e34fba	2066	return buffer[0];
garfieldsg	0:662207e34fba	2067	}
garfieldsg	0:662207e34fba	2068	/** Get Z-axis positive motion detection interrupt status.
garfieldsg	0:662207e34fba	2069	* @return Motion detection status
garfieldsg	0:662207e34fba	2070	* @see MPU6050_RA_MOT_DETECT_STATUS
garfieldsg	0:662207e34fba	2071	* @see MPU6050_MOTION_MOT_ZPOS_BIT
garfieldsg	0:662207e34fba	2072	*/
syundo0730	6:f38dfe62d74c	2073	bool MPU6050::getZPosMotionDetected() {
syundo0730	7:d5845b617139	2074	I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZPOS_BIT, buffer);
garfieldsg	0:662207e34fba	2075	return buffer[0];
garfieldsg	0:662207e34fba	2076	}
garfieldsg	0:662207e34fba	2077	/** Get zero motion detection interrupt status.
garfieldsg	0:662207e34fba	2078	* @return Motion detection status
garfieldsg	0:662207e34fba	2079	* @see MPU6050_RA_MOT_DETECT_STATUS
garfieldsg	0:662207e34fba	2080	* @see MPU6050_MOTION_MOT_ZRMOT_BIT
garfieldsg	0:662207e34fba	2081	*/
syundo0730	6:f38dfe62d74c	2082	bool MPU6050::getZeroMotionDetected() {
syundo0730	7:d5845b617139	2083	I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZRMOT_BIT, buffer);
garfieldsg	0:662207e34fba	2084	return buffer[0];
garfieldsg	0:662207e34fba	2085	}
garfieldsg	0:662207e34fba	2086
garfieldsg	0:662207e34fba	2087	// I2C_SLV*_DO register
garfieldsg	0:662207e34fba	2088
garfieldsg	0:662207e34fba	2089	/** Write byte to Data Output container for specified slave.
garfieldsg	0:662207e34fba	2090	* This register holds the output data written into Slave when Slave is set to
garfieldsg	0:662207e34fba	2091	* write mode. For further information regarding Slave control, please
garfieldsg	0:662207e34fba	2092	* refer to Registers 37 to 39 and immediately following.
garfieldsg	0:662207e34fba	2093	* @param num Slave number (0-3)
garfieldsg	0:662207e34fba	2094	* @param data Byte to write
garfieldsg	0:662207e34fba	2095	* @see MPU6050_RA_I2C_SLV0_DO
garfieldsg	0:662207e34fba	2096	*/
syundo0730	6:f38dfe62d74c	2097	void MPU6050::setSlaveOutputByte(uint8_t num, uint8_t data) {
garfieldsg	0:662207e34fba	2098	if (num > 3) return;
syundo0730	7:d5845b617139	2099	I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV0_DO + num, data);
garfieldsg	0:662207e34fba	2100	}
garfieldsg	0:662207e34fba	2101
garfieldsg	0:662207e34fba	2102	// I2C_MST_DELAY_CTRL register
garfieldsg	0:662207e34fba	2103
garfieldsg	0:662207e34fba	2104	/** Get external data shadow delay enabled status.
garfieldsg	0:662207e34fba	2105	* This register is used to specify the timing of external sensor data
garfieldsg	0:662207e34fba	2106	* shadowing. When DELAY_ES_SHADOW is set to 1, shadowing of external
garfieldsg	0:662207e34fba	2107	* sensor data is delayed until all data has been received.
garfieldsg	0:662207e34fba	2108	* @return Current external data shadow delay enabled status.
garfieldsg	0:662207e34fba	2109	* @see MPU6050_RA_I2C_MST_DELAY_CTRL
garfieldsg	0:662207e34fba	2110	* @see MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT
garfieldsg	0:662207e34fba	2111	*/
syundo0730	6:f38dfe62d74c	2112	bool MPU6050::getExternalShadowDelayEnabled() {
syundo0730	7:d5845b617139	2113	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT, buffer);
garfieldsg	0:662207e34fba	2114	return buffer[0];
garfieldsg	0:662207e34fba	2115	}
garfieldsg	0:662207e34fba	2116	/** Set external data shadow delay enabled status.
garfieldsg	0:662207e34fba	2117	* @param enabled New external data shadow delay enabled status.
garfieldsg	0:662207e34fba	2118	* @see getExternalShadowDelayEnabled()
garfieldsg	0:662207e34fba	2119	* @see MPU6050_RA_I2C_MST_DELAY_CTRL
garfieldsg	0:662207e34fba	2120	* @see MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT
garfieldsg	0:662207e34fba	2121	*/
syundo0730	6:f38dfe62d74c	2122	void MPU6050::setExternalShadowDelayEnabled(bool enabled) {
syundo0730	7:d5845b617139	2123	I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT, enabled);
garfieldsg	0:662207e34fba	2124	}
garfieldsg	0:662207e34fba	2125	/** Get slave delay enabled status.
garfieldsg	0:662207e34fba	2126	* When a particular slave delay is enabled, the rate of access for the that
garfieldsg	0:662207e34fba	2127	* slave device is reduced. When a slave's access rate is decreased relative to
garfieldsg	0:662207e34fba	2128	* the Sample Rate, the slave is accessed every:
garfieldsg	0:662207e34fba	2129	*
garfieldsg	0:662207e34fba	2130	* 1 / (1 + I2C_MST_DLY) Samples
garfieldsg	0:662207e34fba	2131	*
garfieldsg	0:662207e34fba	2132	* This base Sample Rate in turn is determined by SMPLRT_DIV (register * 25)
garfieldsg	0:662207e34fba	2133	* and DLPF_CFG (register 26).
garfieldsg	0:662207e34fba	2134	*
garfieldsg	0:662207e34fba	2135	* For further information regarding I2C_MST_DLY, please refer to register 52.
garfieldsg	0:662207e34fba	2136	* For further information regarding the Sample Rate, please refer to register 25.
garfieldsg	0:662207e34fba	2137	*
garfieldsg	0:662207e34fba	2138	* @param num Slave number (0-4)
garfieldsg	0:662207e34fba	2139	* @return Current slave delay enabled status.
garfieldsg	0:662207e34fba	2140	* @see MPU6050_RA_I2C_MST_DELAY_CTRL
garfieldsg	0:662207e34fba	2141	* @see MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT
garfieldsg	0:662207e34fba	2142	*/
syundo0730	6:f38dfe62d74c	2143	bool MPU6050::getSlaveDelayEnabled(uint8_t num) {
garfieldsg	0:662207e34fba	2144	// MPU6050_DELAYCTRL_I2C_SLV4_DLY_EN_BIT is 4, SLV3 is 3, etc.
garfieldsg	0:662207e34fba	2145	if (num > 4) return 0;
syundo0730	7:d5845b617139	2146	I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, num, buffer);
garfieldsg	0:662207e34fba	2147	return buffer[0];
garfieldsg	0:662207e34fba	2148	}
garfieldsg	0:662207e34fba	2149	/** Set slave delay enabled status.
garfieldsg	0:662207e34fba	2150	* @param num Slave number (0-4)
garfieldsg	0:662207e34fba	2151	* @param enabled New slave delay enabled status.
garfieldsg	0:662207e34fba	2152	* @see MPU6050_RA_I2C_MST_DELAY_CTRL
garfieldsg	0:662207e34fba	2153	* @see MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT
garfieldsg	0:662207e34fba	2154	*/
syundo0730	6:f38dfe62d74c	2155	void MPU6050::setSlaveDelayEnabled(uint8_t num, bool enabled) {
syundo0730	7:d5845b617139	2156	I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, num, enabled);
garfieldsg	0:662207e34fba	2157	}
garfieldsg	0:662207e34fba	2158
garfieldsg	0:662207e34fba	2159	// SIGNAL_PATH_RESET register
garfieldsg	0:662207e34fba	2160
garfieldsg	0:662207e34fba	2161	/** Reset gyroscope signal path.
garfieldsg	0:662207e34fba	2162	* The reset will revert the signal path analog to digital converters and
garfieldsg	0:662207e34fba	2163	* filters to their power up configurations.
garfieldsg	0:662207e34fba	2164	* @see MPU6050_RA_SIGNAL_PATH_RESET
garfieldsg	0:662207e34fba	2165	* @see MPU6050_PATHRESET_GYRO_RESET_BIT
garfieldsg	0:662207e34fba	2166	*/
syundo0730	6:f38dfe62d74c	2167	void MPU6050::resetGyroscopePath() {
syundo0730	7:d5845b617139	2168	I2Cdev::writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_GYRO_RESET_BIT, true);
garfieldsg	0:662207e34fba	2169	}
garfieldsg	0:662207e34fba	2170	/** Reset accelerometer signal path.
garfieldsg	0:662207e34fba	2171	* The reset will revert the signal path analog to digital converters and
garfieldsg	0:662207e34fba	2172	* filters to their power up configurations.
garfieldsg	0:662207e34fba	2173	* @see MPU6050_RA_SIGNAL_PATH_RESET
garfieldsg	0:662207e34fba	2174	* @see MPU6050_PATHRESET_ACCEL_RESET_BIT
garfieldsg	0:662207e34fba	2175	*/
syundo0730	6:f38dfe62d74c	2176	void MPU6050::resetAccelerometerPath() {
syundo0730	7:d5845b617139	2177	I2Cdev::writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_ACCEL_RESET_BIT, true);
garfieldsg	0:662207e34fba	2178	}
garfieldsg	0:662207e34fba	2179	/** Reset temperature sensor signal path.
garfieldsg	0:662207e34fba	2180	* The reset will revert the signal path analog to digital converters and
garfieldsg	0:662207e34fba	2181	* filters to their power up configurations.
garfieldsg	0:662207e34fba	2182	* @see MPU6050_RA_SIGNAL_PATH_RESET
garfieldsg	0:662207e34fba	2183	* @see MPU6050_PATHRESET_TEMP_RESET_BIT
garfieldsg	0:662207e34fba	2184	*/
syundo0730	6:f38dfe62d74c	2185	void MPU6050::resetTemperaturePath() {
syundo0730	7:d5845b617139	2186	I2Cdev::writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_TEMP_RESET_BIT, true);
garfieldsg	0:662207e34fba	2187	}
garfieldsg	0:662207e34fba	2188
garfieldsg	0:662207e34fba	2189	// MOT_DETECT_CTRL register
garfieldsg	0:662207e34fba	2190
garfieldsg	0:662207e34fba	2191	/** Get accelerometer power-on delay.
garfieldsg	0:662207e34fba	2192	* The accelerometer data path provides samples to the sensor registers, Motion
garfieldsg	0:662207e34fba	2193	* detection, Zero Motion detection, and Free Fall detection modules. The
garfieldsg	0:662207e34fba	2194	* signal path contains filters which must be flushed on wake-up with new
garfieldsg	0:662207e34fba	2195	* samples before the detection modules begin operations. The default wake-up
garfieldsg	0:662207e34fba	2196	* delay, of 4ms can be lengthened by up to 3ms. This additional delay is
garfieldsg	0:662207e34fba	2197	* specified in ACCEL_ON_DELAY in units of 1 LSB = 1 ms. The user may select
garfieldsg	0:662207e34fba	2198	* any value above zero unless instructed otherwise by InvenSense. Please refer
garfieldsg	0:662207e34fba	2199	* to Section 8 of the MPU-6000/MPU-6050 Product Specification document for
garfieldsg	0:662207e34fba	2200	* further information regarding the detection modules.
garfieldsg	0:662207e34fba	2201	* @return Current accelerometer power-on delay
garfieldsg	0:662207e34fba	2202	* @see MPU6050_RA_MOT_DETECT_CTRL
garfieldsg	0:662207e34fba	2203	* @see MPU6050_DETECT_ACCEL_ON_DELAY_BIT
garfieldsg	0:662207e34fba	2204	*/
syundo0730	6:f38dfe62d74c	2205	uint8_t MPU6050::getAccelerometerPowerOnDelay() {
syundo0730	7:d5845b617139	2206	I2Cdev::readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_ACCEL_ON_DELAY_BIT, MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH, buffer);
garfieldsg	0:662207e34fba	2207	return buffer[0];
garfieldsg	0:662207e34fba	2208	}
garfieldsg	0:662207e34fba	2209	/** Set accelerometer power-on delay.
garfieldsg	0:662207e34fba	2210	* @param delay New accelerometer power-on delay (0-3)
garfieldsg	0:662207e34fba	2211	* @see getAccelerometerPowerOnDelay()
garfieldsg	0:662207e34fba	2212	* @see MPU6050_RA_MOT_DETECT_CTRL
garfieldsg	0:662207e34fba	2213	* @see MPU6050_DETECT_ACCEL_ON_DELAY_BIT
garfieldsg	0:662207e34fba	2214	*/
syundo0730	6:f38dfe62d74c	2215	void MPU6050::setAccelerometerPowerOnDelay(uint8_t delay) {
syundo0730	7:d5845b617139	2216	I2Cdev::writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_ACCEL_ON_DELAY_BIT, MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH, delay);
garfieldsg	0:662207e34fba	2217	}
garfieldsg	0:662207e34fba	2218	/** Get Free Fall detection counter decrement configuration.
garfieldsg	0:662207e34fba	2219	* Detection is registered by the Free Fall detection module after accelerometer
garfieldsg	0:662207e34fba	2220	* measurements meet their respective threshold conditions over a specified
garfieldsg	0:662207e34fba	2221	* number of samples. When the threshold conditions are met, the corresponding
garfieldsg	0:662207e34fba	2222	* detection counter increments by 1. The user may control the rate at which the
garfieldsg	0:662207e34fba	2223	* detection counter decrements when the threshold condition is not met by
garfieldsg	0:662207e34fba	2224	* configuring FF_COUNT. The decrement rate can be set according to the
garfieldsg	0:662207e34fba	2225	* following table:
garfieldsg	0:662207e34fba	2226	*
garfieldsg	0:662207e34fba	2227	* <pre>
garfieldsg	0:662207e34fba	2228	* FF_COUNT \| Counter Decrement
garfieldsg	0:662207e34fba	2229	* ---------+------------------
garfieldsg	0:662207e34fba	2230	* 0 \| Reset
garfieldsg	0:662207e34fba	2231	* 1 \| 1
garfieldsg	0:662207e34fba	2232	* 2 \| 2
garfieldsg	0:662207e34fba	2233	* 3 \| 4
garfieldsg	0:662207e34fba	2234	* </pre>
garfieldsg	0:662207e34fba	2235	*
garfieldsg	0:662207e34fba	2236	* When FF_COUNT is configured to 0 (reset), any non-qualifying sample will
garfieldsg	0:662207e34fba	2237	* reset the counter to 0. For further information on Free Fall detection,
garfieldsg	0:662207e34fba	2238	* please refer to Registers 29 to 32.
garfieldsg	0:662207e34fba	2239	*
garfieldsg	0:662207e34fba	2240	* @return Current decrement configuration
garfieldsg	0:662207e34fba	2241	* @see MPU6050_RA_MOT_DETECT_CTRL
garfieldsg	0:662207e34fba	2242	* @see MPU6050_DETECT_FF_COUNT_BIT
garfieldsg	0:662207e34fba	2243	*/
syundo0730	6:f38dfe62d74c	2244	uint8_t MPU6050::getFreefallDetectionCounterDecrement() {
syundo0730	7:d5845b617139	2245	I2Cdev::readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_FF_COUNT_BIT, MPU6050_DETECT_FF_COUNT_LENGTH, buffer);
garfieldsg	0:662207e34fba	2246	return buffer[0];
garfieldsg	0:662207e34fba	2247	}
garfieldsg	0:662207e34fba	2248	/** Set Free Fall detection counter decrement configuration.
garfieldsg	0:662207e34fba	2249	* @param decrement New decrement configuration value
garfieldsg	0:662207e34fba	2250	* @see getFreefallDetectionCounterDecrement()
garfieldsg	0:662207e34fba	2251	* @see MPU6050_RA_MOT_DETECT_CTRL
garfieldsg	0:662207e34fba	2252	* @see MPU6050_DETECT_FF_COUNT_BIT
garfieldsg	0:662207e34fba	2253	*/
syundo0730	6:f38dfe62d74c	2254	void MPU6050::setFreefallDetectionCounterDecrement(uint8_t decrement) {
syundo0730	7:d5845b617139	2255	I2Cdev::writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_FF_COUNT_BIT, MPU6050_DETECT_FF_COUNT_LENGTH, decrement);
garfieldsg	0:662207e34fba	2256	}
garfieldsg	0:662207e34fba	2257	/** Get Motion detection counter decrement configuration.
garfieldsg	0:662207e34fba	2258	* Detection is registered by the Motion detection module after accelerometer
garfieldsg	0:662207e34fba	2259	* measurements meet their respective threshold conditions over a specified
garfieldsg	0:662207e34fba	2260	* number of samples. When the threshold conditions are met, the corresponding
garfieldsg	0:662207e34fba	2261	* detection counter increments by 1. The user may control the rate at which the
garfieldsg	0:662207e34fba	2262	* detection counter decrements when the threshold condition is not met by
garfieldsg	0:662207e34fba	2263	* configuring MOT_COUNT. The decrement rate can be set according to the
garfieldsg	0:662207e34fba	2264	* following table:
garfieldsg	0:662207e34fba	2265	*
garfieldsg	0:662207e34fba	2266	* <pre>
garfieldsg	0:662207e34fba	2267	* MOT_COUNT \| Counter Decrement
garfieldsg	0:662207e34fba	2268	* ----------+------------------
garfieldsg	0:662207e34fba	2269	* 0 \| Reset
garfieldsg	0:662207e34fba	2270	* 1 \| 1
garfieldsg	0:662207e34fba	2271	* 2 \| 2
garfieldsg	0:662207e34fba	2272	* 3 \| 4
garfieldsg	0:662207e34fba	2273	* </pre>
garfieldsg	0:662207e34fba	2274	*
garfieldsg	0:662207e34fba	2275	* When MOT_COUNT is configured to 0 (reset), any non-qualifying sample will
garfieldsg	0:662207e34fba	2276	* reset the counter to 0. For further information on Motion detection,
garfieldsg	0:662207e34fba	2277	* please refer to Registers 29 to 32.
garfieldsg	0:662207e34fba	2278	*
garfieldsg	0:662207e34fba	2279	*/
syundo0730	6:f38dfe62d74c	2280	uint8_t MPU6050::getMotionDetectionCounterDecrement() {
syundo0730	7:d5845b617139	2281	I2Cdev::readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_MOT_COUNT_BIT, MPU6050_DETECT_MOT_COUNT_LENGTH, buffer);
garfieldsg	0:662207e34fba	2282	return buffer[0];
garfieldsg	0:662207e34fba	2283	}
garfieldsg	0:662207e34fba	2284	/** Set Motion detection counter decrement configuration.
garfieldsg	0:662207e34fba	2285	* @param decrement New decrement configuration value
garfieldsg	0:662207e34fba	2286	* @see getMotionDetectionCounterDecrement()
garfieldsg	0:662207e34fba	2287	* @see MPU6050_RA_MOT_DETECT_CTRL
garfieldsg	0:662207e34fba	2288	* @see MPU6050_DETECT_MOT_COUNT_BIT
garfieldsg	0:662207e34fba	2289	*/
syundo0730	6:f38dfe62d74c	2290	void MPU6050::setMotionDetectionCounterDecrement(uint8_t decrement) {
syundo0730	7:d5845b617139	2291	I2Cdev::writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_MOT_COUNT_BIT, MPU6050_DETECT_MOT_COUNT_LENGTH, decrement);
garfieldsg	0:662207e34fba	2292	}
garfieldsg	0:662207e34fba	2293
garfieldsg	0:662207e34fba	2294	// USER_CTRL register
garfieldsg	0:662207e34fba	2295
garfieldsg	0:662207e34fba	2296	/** Get FIFO enabled status.
garfieldsg	0:662207e34fba	2297	* When this bit is set to 0, the FIFO buffer is disabled. The FIFO buffer
garfieldsg	0:662207e34fba	2298	* cannot be written to or read from while disabled. The FIFO buffer's state
garfieldsg	0:662207e34fba	2299	* does not change unless the MPU-60X0 is power cycled.
garfieldsg	0:662207e34fba	2300	* @return Current FIFO enabled status
garfieldsg	0:662207e34fba	2301	* @see MPU6050_RA_USER_CTRL
garfieldsg	0:662207e34fba	2302	* @see MPU6050_USERCTRL_FIFO_EN_BIT
garfieldsg	0:662207e34fba	2303	*/
syundo0730	6:f38dfe62d74c	2304	bool MPU6050::getFIFOEnabled() {
syundo0730	7:d5845b617139	2305	I2Cdev::readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_EN_BIT, buffer);
garfieldsg	0:662207e34fba	2306	return buffer[0];
garfieldsg	0:662207e34fba	2307	}
garfieldsg	0:662207e34fba	2308	/** Set FIFO enabled status.
garfieldsg	0:662207e34fba	2309	* @param enabled New FIFO enabled status
garfieldsg	0:662207e34fba	2310	* @see getFIFOEnabled()
garfieldsg	0:662207e34fba	2311	* @see MPU6050_RA_USER_CTRL
garfieldsg	0:662207e34fba	2312	* @see MPU6050_USERCTRL_FIFO_EN_BIT
garfieldsg	0:662207e34fba	2313	*/
syundo0730	6:f38dfe62d74c	2314	void MPU6050::setFIFOEnabled(bool enabled) {
syundo0730	7:d5845b617139	2315	I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_EN_BIT, enabled);
garfieldsg	0:662207e34fba	2316	}
garfieldsg	0:662207e34fba	2317	/** Get I2C Master Mode enabled status.
garfieldsg	0:662207e34fba	2318	* When this mode is enabled, the MPU-60X0 acts as the I2C Master to the
garfieldsg	0:662207e34fba	2319	* external sensor slave devices on the auxiliary I2C bus. When this bit is
garfieldsg	0:662207e34fba	2320	* cleared to 0, the auxiliary I2C bus lines (AUX_DA and AUX_CL) are logically
garfieldsg	0:662207e34fba	2321	* driven by the primary I2C bus (SDA and SCL). This is a precondition to
garfieldsg	0:662207e34fba	2322	* enabling Bypass Mode. For further information regarding Bypass Mode, please
garfieldsg	0:662207e34fba	2323	* refer to Register 55.
garfieldsg	0:662207e34fba	2324	* @return Current I2C Master Mode enabled status
garfieldsg	0:662207e34fba	2325	* @see MPU6050_RA_USER_CTRL
garfieldsg	0:662207e34fba	2326	* @see MPU6050_USERCTRL_I2C_MST_EN_BIT
garfieldsg	0:662207e34fba	2327	*/
syundo0730	6:f38dfe62d74c	2328	bool MPU6050::getI2CMasterModeEnabled() {
syundo0730	7:d5845b617139	2329	I2Cdev::readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_EN_BIT, buffer);
garfieldsg	0:662207e34fba	2330	return buffer[0];
garfieldsg	0:662207e34fba	2331	}
garfieldsg	0:662207e34fba	2332	/** Set I2C Master Mode enabled status.
garfieldsg	0:662207e34fba	2333	* @param enabled New I2C Master Mode enabled status
garfieldsg	0:662207e34fba	2334	* @see getI2CMasterModeEnabled()
garfieldsg	0:662207e34fba	2335	* @see MPU6050_RA_USER_CTRL
garfieldsg	0:662207e34fba	2336	* @see MPU6050_USERCTRL_I2C_MST_EN_BIT
garfieldsg	0:662207e34fba	2337	*/
syundo0730	6:f38dfe62d74c	2338	void MPU6050::setI2CMasterModeEnabled(bool enabled) {
syundo0730	7:d5845b617139	2339	I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_EN_BIT, enabled);
garfieldsg	0:662207e34fba	2340	}
garfieldsg	0:662207e34fba	2341	/** Switch from I2C to SPI mode (MPU-6000 only)
garfieldsg	0:662207e34fba	2342	* If this is set, the primary SPI interface will be enabled in place of the
garfieldsg	0:662207e34fba	2343	* disabled primary I2C interface.
garfieldsg	0:662207e34fba	2344	*/
syundo0730	6:f38dfe62d74c	2345	void MPU6050::switchSPIEnabled(bool enabled) {
syundo0730	7:d5845b617139	2346	I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_IF_DIS_BIT, enabled);
garfieldsg	0:662207e34fba	2347	}
garfieldsg	0:662207e34fba	2348	/** Reset the FIFO.
garfieldsg	0:662207e34fba	2349	* This bit resets the FIFO buffer when set to 1 while FIFO_EN equals 0. This
garfieldsg	0:662207e34fba	2350	* bit automatically clears to 0 after the reset has been triggered.
garfieldsg	0:662207e34fba	2351	* @see MPU6050_RA_USER_CTRL
garfieldsg	0:662207e34fba	2352	* @see MPU6050_USERCTRL_FIFO_RESET_BIT
garfieldsg	0:662207e34fba	2353	*/
syundo0730	6:f38dfe62d74c	2354	void MPU6050::resetFIFO() {
syundo0730	7:d5845b617139	2355	I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_RESET_BIT, true);
garfieldsg	0:662207e34fba	2356	}
garfieldsg	0:662207e34fba	2357	/** Reset the I2C Master.
garfieldsg	0:662207e34fba	2358	* This bit resets the I2C Master when set to 1 while I2C_MST_EN equals 0.
garfieldsg	0:662207e34fba	2359	* This bit automatically clears to 0 after the reset has been triggered.
garfieldsg	0:662207e34fba	2360	* @see MPU6050_RA_USER_CTRL
garfieldsg	0:662207e34fba	2361	* @see MPU6050_USERCTRL_I2C_MST_RESET_BIT
garfieldsg	0:662207e34fba	2362	*/
syundo0730	6:f38dfe62d74c	2363	void MPU6050::resetI2CMaster() {
syundo0730	7:d5845b617139	2364	I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_RESET_BIT, true);
garfieldsg	0:662207e34fba	2365	}
garfieldsg	0:662207e34fba	2366	/** Reset all sensor registers and signal paths.
garfieldsg	0:662207e34fba	2367	* When set to 1, this bit resets the signal paths for all sensors (gyroscopes,
garfieldsg	0:662207e34fba	2368	* accelerometers, and temperature sensor). This operation will also clear the
garfieldsg	0:662207e34fba	2369	* sensor registers. This bit automatically clears to 0 after the reset has been
garfieldsg	0:662207e34fba	2370	* triggered.
garfieldsg	0:662207e34fba	2371	*
garfieldsg	0:662207e34fba	2372	* When resetting only the signal path (and not the sensor registers), please
garfieldsg	0:662207e34fba	2373	* use Register 104, SIGNAL_PATH_RESET.
garfieldsg	0:662207e34fba	2374	*
garfieldsg	0:662207e34fba	2375	* @see MPU6050_RA_USER_CTRL
garfieldsg	0:662207e34fba	2376	* @see MPU6050_USERCTRL_SIG_COND_RESET_BIT
garfieldsg	0:662207e34fba	2377	*/
syundo0730	6:f38dfe62d74c	2378	void MPU6050::resetSensors() {
syundo0730	7:d5845b617139	2379	I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_SIG_COND_RESET_BIT, true);
garfieldsg	0:662207e34fba	2380	}
garfieldsg	0:662207e34fba	2381
garfieldsg	0:662207e34fba	2382	// PWR_MGMT_1 register
garfieldsg	0:662207e34fba	2383
garfieldsg	0:662207e34fba	2384	/** Trigger a full device reset.
garfieldsg	0:662207e34fba	2385	* A small delay of ~50ms may be desirable after triggering a reset.
garfieldsg	0:662207e34fba	2386	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2387	* @see MPU6050_PWR1_DEVICE_RESET_BIT
garfieldsg	0:662207e34fba	2388	*/
syundo0730	6:f38dfe62d74c	2389	void MPU6050::reset() {
syundo0730	7:d5845b617139	2390	I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_DEVICE_RESET_BIT, true);
garfieldsg	0:662207e34fba	2391	}
garfieldsg	0:662207e34fba	2392	/** Get sleep mode status.
garfieldsg	0:662207e34fba	2393	* Setting the SLEEP bit in the register puts the device into very low power
garfieldsg	0:662207e34fba	2394	* sleep mode. In this mode, only the serial interface and internal registers
garfieldsg	0:662207e34fba	2395	* remain active, allowing for a very low standby current. Clearing this bit
garfieldsg	0:662207e34fba	2396	* puts the device back into normal mode. To save power, the individual standby
garfieldsg	0:662207e34fba	2397	* selections for each of the gyros should be used if any gyro axis is not used
garfieldsg	0:662207e34fba	2398	* by the application.
garfieldsg	0:662207e34fba	2399	* @return Current sleep mode enabled status
garfieldsg	0:662207e34fba	2400	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2401	* @see MPU6050_PWR1_SLEEP_BIT
garfieldsg	0:662207e34fba	2402	*/
syundo0730	6:f38dfe62d74c	2403	bool MPU6050::getSleepEnabled() {
syundo0730	7:d5845b617139	2404	I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_SLEEP_BIT, buffer);
garfieldsg	0:662207e34fba	2405	return buffer[0];
garfieldsg	0:662207e34fba	2406	}
garfieldsg	0:662207e34fba	2407	/** Set sleep mode status.
garfieldsg	0:662207e34fba	2408	* @param enabled New sleep mode enabled status
garfieldsg	0:662207e34fba	2409	* @see getSleepEnabled()
garfieldsg	0:662207e34fba	2410	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2411	* @see MPU6050_PWR1_SLEEP_BIT
garfieldsg	0:662207e34fba	2412	*/
syundo0730	6:f38dfe62d74c	2413	void MPU6050::setSleepEnabled(bool enabled) {
syundo0730	7:d5845b617139	2414	I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_SLEEP_BIT, enabled);
garfieldsg	0:662207e34fba	2415	}
garfieldsg	0:662207e34fba	2416	/** Get wake cycle enabled status.
garfieldsg	0:662207e34fba	2417	* When this bit is set to 1 and SLEEP is disabled, the MPU-60X0 will cycle
garfieldsg	0:662207e34fba	2418	* between sleep mode and waking up to take a single sample of data from active
garfieldsg	0:662207e34fba	2419	* sensors at a rate determined by LP_WAKE_CTRL (register 108).
garfieldsg	0:662207e34fba	2420	* @return Current sleep mode enabled status
garfieldsg	0:662207e34fba	2421	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2422	* @see MPU6050_PWR1_CYCLE_BIT
garfieldsg	0:662207e34fba	2423	*/
syundo0730	6:f38dfe62d74c	2424	bool MPU6050::getWakeCycleEnabled() {
syundo0730	7:d5845b617139	2425	I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CYCLE_BIT, buffer);
garfieldsg	0:662207e34fba	2426	return buffer[0];
garfieldsg	0:662207e34fba	2427	}
garfieldsg	0:662207e34fba	2428	/** Set wake cycle enabled status.
garfieldsg	0:662207e34fba	2429	* @param enabled New sleep mode enabled status
garfieldsg	0:662207e34fba	2430	* @see getWakeCycleEnabled()
garfieldsg	0:662207e34fba	2431	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2432	* @see MPU6050_PWR1_CYCLE_BIT
garfieldsg	0:662207e34fba	2433	*/
syundo0730	6:f38dfe62d74c	2434	void MPU6050::setWakeCycleEnabled(bool enabled) {
syundo0730	7:d5845b617139	2435	I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CYCLE_BIT, enabled);
garfieldsg	0:662207e34fba	2436	}
garfieldsg	0:662207e34fba	2437	/** Get temperature sensor enabled status.
garfieldsg	0:662207e34fba	2438	* Control the usage of the internal temperature sensor.
garfieldsg	0:662207e34fba	2439	*
garfieldsg	0:662207e34fba	2440	* Note: this register stores the disabled value, but for consistency with the
garfieldsg	0:662207e34fba	2441	* rest of the code, the function is named and used with standard true/false
garfieldsg	0:662207e34fba	2442	* values to indicate whether the sensor is enabled or disabled, respectively.
garfieldsg	0:662207e34fba	2443	*
garfieldsg	0:662207e34fba	2444	* @return Current temperature sensor enabled status
garfieldsg	0:662207e34fba	2445	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2446	* @see MPU6050_PWR1_TEMP_DIS_BIT
garfieldsg	0:662207e34fba	2447	*/
syundo0730	6:f38dfe62d74c	2448	bool MPU6050::getTempSensorEnabled() {
syundo0730	7:d5845b617139	2449	I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_TEMP_DIS_BIT, buffer);
garfieldsg	0:662207e34fba	2450	return buffer[0] == 0; // 1 is actually disabled here
garfieldsg	0:662207e34fba	2451	}
garfieldsg	0:662207e34fba	2452	/** Set temperature sensor enabled status.
garfieldsg	0:662207e34fba	2453	* Note: this register stores the disabled value, but for consistency with the
garfieldsg	0:662207e34fba	2454	* rest of the code, the function is named and used with standard true/false
garfieldsg	0:662207e34fba	2455	* values to indicate whether the sensor is enabled or disabled, respectively.
garfieldsg	0:662207e34fba	2456	*
garfieldsg	0:662207e34fba	2457	* @param enabled New temperature sensor enabled status
garfieldsg	0:662207e34fba	2458	* @see getTempSensorEnabled()
garfieldsg	0:662207e34fba	2459	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2460	* @see MPU6050_PWR1_TEMP_DIS_BIT
garfieldsg	0:662207e34fba	2461	*/
syundo0730	6:f38dfe62d74c	2462	void MPU6050::setTempSensorEnabled(bool enabled) {
garfieldsg	0:662207e34fba	2463	// 1 is actually disabled here
syundo0730	7:d5845b617139	2464	I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_TEMP_DIS_BIT, !enabled);
garfieldsg	0:662207e34fba	2465	}
garfieldsg	0:662207e34fba	2466	/** Get clock source setting.
garfieldsg	0:662207e34fba	2467	* @return Current clock source setting
garfieldsg	0:662207e34fba	2468	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2469	* @see MPU6050_PWR1_CLKSEL_BIT
garfieldsg	0:662207e34fba	2470	* @see MPU6050_PWR1_CLKSEL_LENGTH
garfieldsg	0:662207e34fba	2471	*/
syundo0730	6:f38dfe62d74c	2472	uint8_t MPU6050::getClockSource() {
syundo0730	7:d5845b617139	2473	I2Cdev::readBits(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CLKSEL_BIT, MPU6050_PWR1_CLKSEL_LENGTH, buffer);
garfieldsg	0:662207e34fba	2474	return buffer[0];
garfieldsg	0:662207e34fba	2475	}
garfieldsg	0:662207e34fba	2476	/** Set clock source setting.
garfieldsg	0:662207e34fba	2477	* An internal 8MHz oscillator, gyroscope based clock, or external sources can
garfieldsg	0:662207e34fba	2478	* be selected as the MPU-60X0 clock source. When the internal 8 MHz oscillator
garfieldsg	0:662207e34fba	2479	* or an external source is chosen as the clock source, the MPU-60X0 can operate
garfieldsg	0:662207e34fba	2480	* in low power modes with the gyroscopes disabled.
garfieldsg	0:662207e34fba	2481	*
garfieldsg	0:662207e34fba	2482	* Upon power up, the MPU-60X0 clock source defaults to the internal oscillator.
garfieldsg	0:662207e34fba	2483	* However, it is highly recommended that the device be configured to use one of
garfieldsg	0:662207e34fba	2484	* the gyroscopes (or an external clock source) as the clock reference for
garfieldsg	0:662207e34fba	2485	* improved stability. The clock source can be selected according to the following table:
garfieldsg	0:662207e34fba	2486	*
garfieldsg	0:662207e34fba	2487	* <pre>
garfieldsg	0:662207e34fba	2488	* CLK_SEL \| Clock Source
garfieldsg	0:662207e34fba	2489	* --------+--------------------------------------
garfieldsg	0:662207e34fba	2490	* 0 \| Internal oscillator
garfieldsg	0:662207e34fba	2491	* 1 \| PLL with X Gyro reference
garfieldsg	0:662207e34fba	2492	* 2 \| PLL with Y Gyro reference
garfieldsg	0:662207e34fba	2493	* 3 \| PLL with Z Gyro reference
garfieldsg	0:662207e34fba	2494	* 4 \| PLL with external 32.768kHz reference
garfieldsg	0:662207e34fba	2495	* 5 \| PLL with external 19.2MHz reference
garfieldsg	0:662207e34fba	2496	* 6 \| Reserved
garfieldsg	0:662207e34fba	2497	* 7 \| Stops the clock and keeps the timing generator in reset
garfieldsg	0:662207e34fba	2498	* </pre>
garfieldsg	0:662207e34fba	2499	*
garfieldsg	0:662207e34fba	2500	* @param source New clock source setting
garfieldsg	0:662207e34fba	2501	* @see getClockSource()
garfieldsg	0:662207e34fba	2502	* @see MPU6050_RA_PWR_MGMT_1
garfieldsg	0:662207e34fba	2503	* @see MPU6050_PWR1_CLKSEL_BIT
garfieldsg	0:662207e34fba	2504	* @see MPU6050_PWR1_CLKSEL_LENGTH
garfieldsg	0:662207e34fba	2505	*/
syundo0730	6:f38dfe62d74c	2506	void MPU6050::setClockSource(uint8_t source) {
syundo0730	7:d5845b617139	2507	I2Cdev::writeBits(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CLKSEL_BIT, MPU6050_PWR1_CLKSEL_LENGTH, source);
garfieldsg	0:662207e34fba	2508	}
garfieldsg	0:662207e34fba	2509
garfieldsg	0:662207e34fba	2510	// PWR_MGMT_2 register
garfieldsg	0:662207e34fba	2511
garfieldsg	0:662207e34fba	2512	/** Get wake frequency in Accel-Only Low Power Mode.
garfieldsg	0:662207e34fba	2513	* The MPU-60X0 can be put into Accerlerometer Only Low Power Mode by setting
garfieldsg	0:662207e34fba	2514	* PWRSEL to 1 in the Power Management 1 register (Register 107). In this mode,
garfieldsg	0:662207e34fba	2515	* the device will power off all devices except for the primary I2C interface,
garfieldsg	0:662207e34fba	2516	* waking only the accelerometer at fixed intervals to take a single
garfieldsg	0:662207e34fba	2517	* measurement. The frequency of wake-ups can be configured with LP_WAKE_CTRL
garfieldsg	0:662207e34fba	2518	* as shown below:
garfieldsg	0:662207e34fba	2519	*
garfieldsg	0:662207e34fba	2520	* <pre>
garfieldsg	0:662207e34fba	2521	* LP_WAKE_CTRL \| Wake-up Frequency
garfieldsg	0:662207e34fba	2522	* -------------+------------------
garfieldsg	0:662207e34fba	2523	* 0 \| 1.25 Hz
garfieldsg	0:662207e34fba	2524	* 1 \| 2.5 Hz
garfieldsg	0:662207e34fba	2525	* 2 \| 5 Hz
garfieldsg	0:662207e34fba	2526	* 3 \| 10 Hz
syundo0730	7:d5845b617139	2527	* </pre>
garfieldsg	0:662207e34fba	2528	*
garfieldsg	0:662207e34fba	2529	* For further information regarding the MPU-60X0's power modes, please refer to
garfieldsg	0:662207e34fba	2530	* Register 107.
garfieldsg	0:662207e34fba	2531	*
garfieldsg	0:662207e34fba	2532	* @return Current wake frequency
garfieldsg	0:662207e34fba	2533	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2534	*/
syundo0730	6:f38dfe62d74c	2535	uint8_t MPU6050::getWakeFrequency() {
syundo0730	7:d5845b617139	2536	I2Cdev::readBits(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_LP_WAKE_CTRL_BIT, MPU6050_PWR2_LP_WAKE_CTRL_LENGTH, buffer);
garfieldsg	0:662207e34fba	2537	return buffer[0];
garfieldsg	0:662207e34fba	2538	}
garfieldsg	0:662207e34fba	2539	/** Set wake frequency in Accel-Only Low Power Mode.
garfieldsg	0:662207e34fba	2540	* @param frequency New wake frequency
garfieldsg	0:662207e34fba	2541	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2542	*/
syundo0730	6:f38dfe62d74c	2543	void MPU6050::setWakeFrequency(uint8_t frequency) {
syundo0730	7:d5845b617139	2544	I2Cdev::writeBits(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_LP_WAKE_CTRL_BIT, MPU6050_PWR2_LP_WAKE_CTRL_LENGTH, frequency);
garfieldsg	0:662207e34fba	2545	}
garfieldsg	0:662207e34fba	2546
garfieldsg	0:662207e34fba	2547	/** Get X-axis accelerometer standby enabled status.
garfieldsg	0:662207e34fba	2548	* If enabled, the X-axis will not gather or report data (or use power).
garfieldsg	0:662207e34fba	2549	* @return Current X-axis standby enabled status
garfieldsg	0:662207e34fba	2550	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2551	* @see MPU6050_PWR2_STBY_XA_BIT
garfieldsg	0:662207e34fba	2552	*/
syundo0730	6:f38dfe62d74c	2553	bool MPU6050::getStandbyXAccelEnabled() {
syundo0730	7:d5845b617139	2554	I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XA_BIT, buffer);
garfieldsg	0:662207e34fba	2555	return buffer[0];
garfieldsg	0:662207e34fba	2556	}
garfieldsg	0:662207e34fba	2557	/** Set X-axis accelerometer standby enabled status.
garfieldsg	0:662207e34fba	2558	* @param New X-axis standby enabled status
garfieldsg	0:662207e34fba	2559	* @see getStandbyXAccelEnabled()
garfieldsg	0:662207e34fba	2560	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2561	* @see MPU6050_PWR2_STBY_XA_BIT
garfieldsg	0:662207e34fba	2562	*/
syundo0730	6:f38dfe62d74c	2563	void MPU6050::setStandbyXAccelEnabled(bool enabled) {
syundo0730	7:d5845b617139	2564	I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XA_BIT, enabled);
garfieldsg	0:662207e34fba	2565	}
garfieldsg	0:662207e34fba	2566	/** Get Y-axis accelerometer standby enabled status.
garfieldsg	0:662207e34fba	2567	* If enabled, the Y-axis will not gather or report data (or use power).
garfieldsg	0:662207e34fba	2568	* @return Current Y-axis standby enabled status
garfieldsg	0:662207e34fba	2569	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2570	* @see MPU6050_PWR2_STBY_YA_BIT
garfieldsg	0:662207e34fba	2571	*/
syundo0730	6:f38dfe62d74c	2572	bool MPU6050::getStandbyYAccelEnabled() {
syundo0730	7:d5845b617139	2573	I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YA_BIT, buffer);
garfieldsg	0:662207e34fba	2574	return buffer[0];
garfieldsg	0:662207e34fba	2575	}
garfieldsg	0:662207e34fba	2576	/** Set Y-axis accelerometer standby enabled status.
garfieldsg	0:662207e34fba	2577	* @param New Y-axis standby enabled status
garfieldsg	0:662207e34fba	2578	* @see getStandbyYAccelEnabled()
garfieldsg	0:662207e34fba	2579	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2580	* @see MPU6050_PWR2_STBY_YA_BIT
garfieldsg	0:662207e34fba	2581	*/
syundo0730	6:f38dfe62d74c	2582	void MPU6050::setStandbyYAccelEnabled(bool enabled) {
syundo0730	7:d5845b617139	2583	I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YA_BIT, enabled);
garfieldsg	0:662207e34fba	2584	}
garfieldsg	0:662207e34fba	2585	/** Get Z-axis accelerometer standby enabled status.
garfieldsg	0:662207e34fba	2586	* If enabled, the Z-axis will not gather or report data (or use power).
garfieldsg	0:662207e34fba	2587	* @return Current Z-axis standby enabled status
garfieldsg	0:662207e34fba	2588	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2589	* @see MPU6050_PWR2_STBY_ZA_BIT
garfieldsg	0:662207e34fba	2590	*/
syundo0730	6:f38dfe62d74c	2591	bool MPU6050::getStandbyZAccelEnabled() {
syundo0730	7:d5845b617139	2592	I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZA_BIT, buffer);
garfieldsg	0:662207e34fba	2593	return buffer[0];
garfieldsg	0:662207e34fba	2594	}
garfieldsg	0:662207e34fba	2595	/** Set Z-axis accelerometer standby enabled status.
garfieldsg	0:662207e34fba	2596	* @param New Z-axis standby enabled status
garfieldsg	0:662207e34fba	2597	* @see getStandbyZAccelEnabled()
garfieldsg	0:662207e34fba	2598	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2599	* @see MPU6050_PWR2_STBY_ZA_BIT
garfieldsg	0:662207e34fba	2600	*/
syundo0730	6:f38dfe62d74c	2601	void MPU6050::setStandbyZAccelEnabled(bool enabled) {
syundo0730	7:d5845b617139	2602	I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZA_BIT, enabled);
garfieldsg	0:662207e34fba	2603	}
garfieldsg	0:662207e34fba	2604	/** Get X-axis gyroscope standby enabled status.
garfieldsg	0:662207e34fba	2605	* If enabled, the X-axis will not gather or report data (or use power).
garfieldsg	0:662207e34fba	2606	* @return Current X-axis standby enabled status
garfieldsg	0:662207e34fba	2607	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2608	* @see MPU6050_PWR2_STBY_XG_BIT
garfieldsg	0:662207e34fba	2609	*/
syundo0730	6:f38dfe62d74c	2610	bool MPU6050::getStandbyXGyroEnabled() {
syundo0730	7:d5845b617139	2611	I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XG_BIT, buffer);
garfieldsg	0:662207e34fba	2612	return buffer[0];
garfieldsg	0:662207e34fba	2613	}
garfieldsg	0:662207e34fba	2614	/** Set X-axis gyroscope standby enabled status.
garfieldsg	0:662207e34fba	2615	* @param New X-axis standby enabled status
garfieldsg	0:662207e34fba	2616	* @see getStandbyXGyroEnabled()
garfieldsg	0:662207e34fba	2617	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2618	* @see MPU6050_PWR2_STBY_XG_BIT
garfieldsg	0:662207e34fba	2619	*/
syundo0730	6:f38dfe62d74c	2620	void MPU6050::setStandbyXGyroEnabled(bool enabled) {
syundo0730	7:d5845b617139	2621	I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XG_BIT, enabled);
garfieldsg	0:662207e34fba	2622	}
garfieldsg	0:662207e34fba	2623	/** Get Y-axis gyroscope standby enabled status.
garfieldsg	0:662207e34fba	2624	* If enabled, the Y-axis will not gather or report data (or use power).
garfieldsg	0:662207e34fba	2625	* @return Current Y-axis standby enabled status
garfieldsg	0:662207e34fba	2626	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2627	* @see MPU6050_PWR2_STBY_YG_BIT
garfieldsg	0:662207e34fba	2628	*/
syundo0730	6:f38dfe62d74c	2629	bool MPU6050::getStandbyYGyroEnabled() {
syundo0730	7:d5845b617139	2630	I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YG_BIT, buffer);
garfieldsg	0:662207e34fba	2631	return buffer[0];
garfieldsg	0:662207e34fba	2632	}
garfieldsg	0:662207e34fba	2633	/** Set Y-axis gyroscope standby enabled status.
garfieldsg	0:662207e34fba	2634	* @param New Y-axis standby enabled status
garfieldsg	0:662207e34fba	2635	* @see getStandbyYGyroEnabled()
garfieldsg	0:662207e34fba	2636	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2637	* @see MPU6050_PWR2_STBY_YG_BIT
garfieldsg	0:662207e34fba	2638	*/
syundo0730	6:f38dfe62d74c	2639	void MPU6050::setStandbyYGyroEnabled(bool enabled) {
syundo0730	7:d5845b617139	2640	I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YG_BIT, enabled);
garfieldsg	0:662207e34fba	2641	}
garfieldsg	0:662207e34fba	2642	/** Get Z-axis gyroscope standby enabled status.
garfieldsg	0:662207e34fba	2643	* If enabled, the Z-axis will not gather or report data (or use power).
garfieldsg	0:662207e34fba	2644	* @return Current Z-axis standby enabled status
garfieldsg	0:662207e34fba	2645	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2646	* @see MPU6050_PWR2_STBY_ZG_BIT
garfieldsg	0:662207e34fba	2647	*/
syundo0730	6:f38dfe62d74c	2648	bool MPU6050::getStandbyZGyroEnabled() {
syundo0730	7:d5845b617139	2649	I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZG_BIT, buffer);
garfieldsg	0:662207e34fba	2650	return buffer[0];
garfieldsg	0:662207e34fba	2651	}
garfieldsg	0:662207e34fba	2652	/** Set Z-axis gyroscope standby enabled status.
garfieldsg	0:662207e34fba	2653	* @param New Z-axis standby enabled status
garfieldsg	0:662207e34fba	2654	* @see getStandbyZGyroEnabled()
garfieldsg	0:662207e34fba	2655	* @see MPU6050_RA_PWR_MGMT_2
garfieldsg	0:662207e34fba	2656	* @see MPU6050_PWR2_STBY_ZG_BIT
garfieldsg	0:662207e34fba	2657	*/
syundo0730	6:f38dfe62d74c	2658	void MPU6050::setStandbyZGyroEnabled(bool enabled) {
syundo0730	7:d5845b617139	2659	I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZG_BIT, enabled);
garfieldsg	0:662207e34fba	2660	}
garfieldsg	0:662207e34fba	2661
garfieldsg	0:662207e34fba	2662	// FIFO_COUNT* registers
garfieldsg	0:662207e34fba	2663
garfieldsg	0:662207e34fba	2664	/** Get current FIFO buffer size.
garfieldsg	0:662207e34fba	2665	* This value indicates the number of bytes stored in the FIFO buffer. This
garfieldsg	0:662207e34fba	2666	* number is in turn the number of bytes that can be read from the FIFO buffer
garfieldsg	0:662207e34fba	2667	* and it is directly proportional to the number of samples available given the
garfieldsg	0:662207e34fba	2668	* set of sensor data bound to be stored in the FIFO (register 35 and 36).
garfieldsg	0:662207e34fba	2669	* @return Current FIFO buffer size
garfieldsg	0:662207e34fba	2670	*/
syundo0730	6:f38dfe62d74c	2671	uint16_t MPU6050::getFIFOCount() {
syundo0730	7:d5845b617139	2672	I2Cdev::readBytes(devAddr, MPU6050_RA_FIFO_COUNTH, 2, buffer);
garfieldsg	0:662207e34fba	2673	return (((uint16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	2674	}
garfieldsg	0:662207e34fba	2675
garfieldsg	0:662207e34fba	2676	// FIFO_R_W register
garfieldsg	0:662207e34fba	2677
garfieldsg	0:662207e34fba	2678	/** Get byte from FIFO buffer.
garfieldsg	0:662207e34fba	2679	* This register is used to read and write data from the FIFO buffer. Data is
garfieldsg	0:662207e34fba	2680	* written to the FIFO in order of register number (from lowest to highest). If
garfieldsg	0:662207e34fba	2681	* all the FIFO enable flags (see below) are enabled and all External Sensor
garfieldsg	0:662207e34fba	2682	* Data registers (Registers 73 to 96) are associated with a Slave device, the
garfieldsg	0:662207e34fba	2683	* contents of registers 59 through 96 will be written in order at the Sample
garfieldsg	0:662207e34fba	2684	* Rate.
garfieldsg	0:662207e34fba	2685	*
garfieldsg	0:662207e34fba	2686	* The contents of the sensor data registers (Registers 59 to 96) are written
garfieldsg	0:662207e34fba	2687	* into the FIFO buffer when their corresponding FIFO enable flags are set to 1
garfieldsg	0:662207e34fba	2688	* in FIFO_EN (Register 35). An additional flag for the sensor data registers
garfieldsg	0:662207e34fba	2689	* associated with I2C Slave 3 can be found in I2C_MST_CTRL (Register 36).
garfieldsg	0:662207e34fba	2690	*
garfieldsg	0:662207e34fba	2691	* If the FIFO buffer has overflowed, the status bit FIFO_OFLOW_INT is
garfieldsg	0:662207e34fba	2692	* automatically set to 1. This bit is located in INT_STATUS (Register 58).
garfieldsg	0:662207e34fba	2693	* When the FIFO buffer has overflowed, the oldest data will be lost and new
garfieldsg	0:662207e34fba	2694	* data will be written to the FIFO.
garfieldsg	0:662207e34fba	2695	*
garfieldsg	0:662207e34fba	2696	* If the FIFO buffer is empty, reading this register will return the last byte
garfieldsg	0:662207e34fba	2697	* that was previously read from the FIFO until new data is available. The user
garfieldsg	0:662207e34fba	2698	* should check FIFO_COUNT to ensure that the FIFO buffer is not read when
garfieldsg	0:662207e34fba	2699	* empty.
garfieldsg	0:662207e34fba	2700	*
garfieldsg	0:662207e34fba	2701	* @return Byte from FIFO buffer
garfieldsg	0:662207e34fba	2702	*/
syundo0730	6:f38dfe62d74c	2703	uint8_t MPU6050::getFIFOByte() {
syundo0730	7:d5845b617139	2704	I2Cdev::readByte(devAddr, MPU6050_RA_FIFO_R_W, buffer);
garfieldsg	0:662207e34fba	2705	return buffer[0];
garfieldsg	0:662207e34fba	2706	}
syundo0730	6:f38dfe62d74c	2707	void MPU6050::getFIFOBytes(uint8_t *data, uint8_t length) {
syundo0730	7:d5845b617139	2708	if(length > 0){
syundo0730	7:d5845b617139	2709	I2Cdev::readBytes(devAddr, MPU6050_RA_FIFO_R_W, length, data);
syundo0730	7:d5845b617139	2710	} else {
syundo0730	7:d5845b617139	2711	*data = 0;
syundo0730	7:d5845b617139	2712	}
garfieldsg	0:662207e34fba	2713	}
garfieldsg	0:662207e34fba	2714	/** Write byte to FIFO buffer.
garfieldsg	0:662207e34fba	2715	* @see getFIFOByte()
garfieldsg	0:662207e34fba	2716	* @see MPU6050_RA_FIFO_R_W
garfieldsg	0:662207e34fba	2717	*/
syundo0730	6:f38dfe62d74c	2718	void MPU6050::setFIFOByte(uint8_t data) {
syundo0730	7:d5845b617139	2719	I2Cdev::writeByte(devAddr, MPU6050_RA_FIFO_R_W, data);
garfieldsg	0:662207e34fba	2720	}
garfieldsg	0:662207e34fba	2721
garfieldsg	0:662207e34fba	2722	// WHO_AM_I register
garfieldsg	0:662207e34fba	2723
garfieldsg	0:662207e34fba	2724	/** Get Device ID.
garfieldsg	0:662207e34fba	2725	* This register is used to verify the identity of the device (0b110100, 0x34).
garfieldsg	0:662207e34fba	2726	* @return Device ID (6 bits only! should be 0x34)
garfieldsg	0:662207e34fba	2727	* @see MPU6050_RA_WHO_AM_I
garfieldsg	0:662207e34fba	2728	* @see MPU6050_WHO_AM_I_BIT
garfieldsg	0:662207e34fba	2729	* @see MPU6050_WHO_AM_I_LENGTH
garfieldsg	0:662207e34fba	2730	*/
syundo0730	6:f38dfe62d74c	2731	uint8_t MPU6050::getDeviceID() {
syundo0730	7:d5845b617139	2732	I2Cdev::readBits(devAddr, MPU6050_RA_WHO_AM_I, MPU6050_WHO_AM_I_BIT, MPU6050_WHO_AM_I_LENGTH, buffer);
garfieldsg	0:662207e34fba	2733	return buffer[0];
garfieldsg	0:662207e34fba	2734	}
garfieldsg	0:662207e34fba	2735	/** Set Device ID.
garfieldsg	0:662207e34fba	2736	* Write a new ID into the WHO_AM_I register (no idea why this should ever be
garfieldsg	0:662207e34fba	2737	* necessary though).
garfieldsg	0:662207e34fba	2738	* @param id New device ID to set.
garfieldsg	0:662207e34fba	2739	* @see getDeviceID()
garfieldsg	0:662207e34fba	2740	* @see MPU6050_RA_WHO_AM_I
garfieldsg	0:662207e34fba	2741	* @see MPU6050_WHO_AM_I_BIT
garfieldsg	0:662207e34fba	2742	* @see MPU6050_WHO_AM_I_LENGTH
garfieldsg	0:662207e34fba	2743	*/
syundo0730	6:f38dfe62d74c	2744	void MPU6050::setDeviceID(uint8_t id) {
syundo0730	7:d5845b617139	2745	I2Cdev::writeBits(devAddr, MPU6050_RA_WHO_AM_I, MPU6050_WHO_AM_I_BIT, MPU6050_WHO_AM_I_LENGTH, id);
garfieldsg	0:662207e34fba	2746	}
garfieldsg	0:662207e34fba	2747
garfieldsg	0:662207e34fba	2748	// ======== UNDOCUMENTED/DMP REGISTERS/METHODS ========
garfieldsg	0:662207e34fba	2749
garfieldsg	0:662207e34fba	2750	// XG_OFFS_TC register
garfieldsg	0:662207e34fba	2751
syundo0730	6:f38dfe62d74c	2752	uint8_t MPU6050::getOTPBankValid() {
syundo0730	7:d5845b617139	2753	I2Cdev::readBit(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OTP_BNK_VLD_BIT, buffer);
garfieldsg	0:662207e34fba	2754	return buffer[0];
garfieldsg	0:662207e34fba	2755	}
syundo0730	6:f38dfe62d74c	2756	void MPU6050::setOTPBankValid(bool enabled) {
syundo0730	7:d5845b617139	2757	I2Cdev::writeBit(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OTP_BNK_VLD_BIT, enabled);
garfieldsg	0:662207e34fba	2758	}
syundo0730	6:f38dfe62d74c	2759	int8_t MPU6050::getXGyroOffsetTC() {
syundo0730	7:d5845b617139	2760	I2Cdev::readBits(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer);
garfieldsg	0:662207e34fba	2761	return buffer[0];
garfieldsg	0:662207e34fba	2762	}
syundo0730	6:f38dfe62d74c	2763	void MPU6050::setXGyroOffsetTC(int8_t offset) {
syundo0730	7:d5845b617139	2764	I2Cdev::writeBits(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset);
garfieldsg	0:662207e34fba	2765	}
garfieldsg	0:662207e34fba	2766
garfieldsg	0:662207e34fba	2767	// YG_OFFS_TC register
garfieldsg	0:662207e34fba	2768
syundo0730	6:f38dfe62d74c	2769	int8_t MPU6050::getYGyroOffsetTC() {
syundo0730	7:d5845b617139	2770	I2Cdev::readBits(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer);
garfieldsg	0:662207e34fba	2771	return buffer[0];
garfieldsg	0:662207e34fba	2772	}
syundo0730	6:f38dfe62d74c	2773	void MPU6050::setYGyroOffsetTC(int8_t offset) {
syundo0730	7:d5845b617139	2774	I2Cdev::writeBits(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset);
garfieldsg	0:662207e34fba	2775	}
garfieldsg	0:662207e34fba	2776
garfieldsg	0:662207e34fba	2777	// ZG_OFFS_TC register
garfieldsg	0:662207e34fba	2778
syundo0730	6:f38dfe62d74c	2779	int8_t MPU6050::getZGyroOffsetTC() {
syundo0730	7:d5845b617139	2780	I2Cdev::readBits(devAddr, MPU6050_RA_ZG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer);
garfieldsg	0:662207e34fba	2781	return buffer[0];
garfieldsg	0:662207e34fba	2782	}
syundo0730	6:f38dfe62d74c	2783	void MPU6050::setZGyroOffsetTC(int8_t offset) {
syundo0730	7:d5845b617139	2784	I2Cdev::writeBits(devAddr, MPU6050_RA_ZG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset);
garfieldsg	0:662207e34fba	2785	}
garfieldsg	0:662207e34fba	2786
garfieldsg	0:662207e34fba	2787	// X_FINE_GAIN register
garfieldsg	0:662207e34fba	2788
syundo0730	6:f38dfe62d74c	2789	int8_t MPU6050::getXFineGain() {
syundo0730	7:d5845b617139	2790	I2Cdev::readByte(devAddr, MPU6050_RA_X_FINE_GAIN, buffer);
garfieldsg	0:662207e34fba	2791	return buffer[0];
garfieldsg	0:662207e34fba	2792	}
syundo0730	6:f38dfe62d74c	2793	void MPU6050::setXFineGain(int8_t gain) {
syundo0730	7:d5845b617139	2794	I2Cdev::writeByte(devAddr, MPU6050_RA_X_FINE_GAIN, gain);
garfieldsg	0:662207e34fba	2795	}
garfieldsg	0:662207e34fba	2796
garfieldsg	0:662207e34fba	2797	// Y_FINE_GAIN register
garfieldsg	0:662207e34fba	2798
syundo0730	6:f38dfe62d74c	2799	int8_t MPU6050::getYFineGain() {
syundo0730	7:d5845b617139	2800	I2Cdev::readByte(devAddr, MPU6050_RA_Y_FINE_GAIN, buffer);
garfieldsg	0:662207e34fba	2801	return buffer[0];
garfieldsg	0:662207e34fba	2802	}
syundo0730	6:f38dfe62d74c	2803	void MPU6050::setYFineGain(int8_t gain) {
syundo0730	7:d5845b617139	2804	I2Cdev::writeByte(devAddr, MPU6050_RA_Y_FINE_GAIN, gain);
garfieldsg	0:662207e34fba	2805	}
garfieldsg	0:662207e34fba	2806
garfieldsg	0:662207e34fba	2807	// Z_FINE_GAIN register
garfieldsg	0:662207e34fba	2808
syundo0730	6:f38dfe62d74c	2809	int8_t MPU6050::getZFineGain() {
syundo0730	7:d5845b617139	2810	I2Cdev::readByte(devAddr, MPU6050_RA_Z_FINE_GAIN, buffer);
garfieldsg	0:662207e34fba	2811	return buffer[0];
garfieldsg	0:662207e34fba	2812	}
syundo0730	6:f38dfe62d74c	2813	void MPU6050::setZFineGain(int8_t gain) {
syundo0730	7:d5845b617139	2814	I2Cdev::writeByte(devAddr, MPU6050_RA_Z_FINE_GAIN, gain);
garfieldsg	0:662207e34fba	2815	}
garfieldsg	0:662207e34fba	2816
garfieldsg	0:662207e34fba	2817	// XA_OFFS_* registers
garfieldsg	0:662207e34fba	2818
syundo0730	6:f38dfe62d74c	2819	int16_t MPU6050::getXAccelOffset() {
syundo0730	7:d5845b617139	2820	I2Cdev::readBytes(devAddr, MPU6050_RA_XA_OFFS_H, 2, buffer);
garfieldsg	0:662207e34fba	2821	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	2822	}
syundo0730	6:f38dfe62d74c	2823	void MPU6050::setXAccelOffset(int16_t offset) {
syundo0730	7:d5845b617139	2824	I2Cdev::writeWord(devAddr, MPU6050_RA_XA_OFFS_H, offset);
garfieldsg	0:662207e34fba	2825	}
garfieldsg	0:662207e34fba	2826
garfieldsg	0:662207e34fba	2827	// YA_OFFS_* register
garfieldsg	0:662207e34fba	2828
syundo0730	6:f38dfe62d74c	2829	int16_t MPU6050::getYAccelOffset() {
syundo0730	7:d5845b617139	2830	I2Cdev::readBytes(devAddr, MPU6050_RA_YA_OFFS_H, 2, buffer);
garfieldsg	0:662207e34fba	2831	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	2832	}
syundo0730	6:f38dfe62d74c	2833	void MPU6050::setYAccelOffset(int16_t offset) {
syundo0730	7:d5845b617139	2834	I2Cdev::writeWord(devAddr, MPU6050_RA_YA_OFFS_H, offset);
garfieldsg	0:662207e34fba	2835	}
garfieldsg	0:662207e34fba	2836
garfieldsg	0:662207e34fba	2837	// ZA_OFFS_* register
garfieldsg	0:662207e34fba	2838
syundo0730	6:f38dfe62d74c	2839	int16_t MPU6050::getZAccelOffset() {
syundo0730	7:d5845b617139	2840	I2Cdev::readBytes(devAddr, MPU6050_RA_ZA_OFFS_H, 2, buffer);
garfieldsg	0:662207e34fba	2841	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	2842	}
syundo0730	6:f38dfe62d74c	2843	void MPU6050::setZAccelOffset(int16_t offset) {
syundo0730	7:d5845b617139	2844	I2Cdev::writeWord(devAddr, MPU6050_RA_ZA_OFFS_H, offset);
garfieldsg	0:662207e34fba	2845	}
garfieldsg	0:662207e34fba	2846
garfieldsg	0:662207e34fba	2847	// XG_OFFS_USR* registers
garfieldsg	0:662207e34fba	2848
syundo0730	6:f38dfe62d74c	2849	int16_t MPU6050::getXGyroOffset() {
syundo0730	7:d5845b617139	2850	I2Cdev::readBytes(devAddr, MPU6050_RA_XG_OFFS_USRH, 2, buffer);
garfieldsg	0:662207e34fba	2851	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	2852	}
syundo0730	6:f38dfe62d74c	2853	void MPU6050::setXGyroOffset(int16_t offset) {
syundo0730	7:d5845b617139	2854	I2Cdev::writeWord(devAddr, MPU6050_RA_XG_OFFS_USRH, offset);
garfieldsg	0:662207e34fba	2855	}
garfieldsg	0:662207e34fba	2856
garfieldsg	0:662207e34fba	2857	// YG_OFFS_USR* register
garfieldsg	0:662207e34fba	2858
syundo0730	6:f38dfe62d74c	2859	int16_t MPU6050::getYGyroOffset() {
syundo0730	7:d5845b617139	2860	I2Cdev::readBytes(devAddr, MPU6050_RA_YG_OFFS_USRH, 2, buffer);
garfieldsg	0:662207e34fba	2861	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	2862	}
syundo0730	6:f38dfe62d74c	2863	void MPU6050::setYGyroOffset(int16_t offset) {
syundo0730	7:d5845b617139	2864	I2Cdev::writeWord(devAddr, MPU6050_RA_YG_OFFS_USRH, offset);
garfieldsg	0:662207e34fba	2865	}
garfieldsg	0:662207e34fba	2866
garfieldsg	0:662207e34fba	2867	// ZG_OFFS_USR* register
garfieldsg	0:662207e34fba	2868
syundo0730	6:f38dfe62d74c	2869	int16_t MPU6050::getZGyroOffset() {
syundo0730	7:d5845b617139	2870	I2Cdev::readBytes(devAddr, MPU6050_RA_ZG_OFFS_USRH, 2, buffer);
garfieldsg	0:662207e34fba	2871	return (((int16_t)buffer[0]) << 8) \| buffer[1];
garfieldsg	0:662207e34fba	2872	}
syundo0730	6:f38dfe62d74c	2873	void MPU6050::setZGyroOffset(int16_t offset) {
syundo0730	7:d5845b617139	2874	I2Cdev::writeWord(devAddr, MPU6050_RA_ZG_OFFS_USRH, offset);
garfieldsg	0:662207e34fba	2875	}
garfieldsg	0:662207e34fba	2876
garfieldsg	0:662207e34fba	2877	// INT_ENABLE register (DMP functions)
garfieldsg	0:662207e34fba	2878
syundo0730	6:f38dfe62d74c	2879	bool MPU6050::getIntPLLReadyEnabled() {
syundo0730	7:d5845b617139	2880	I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, buffer);
garfieldsg	0:662207e34fba	2881	return buffer[0];
garfieldsg	0:662207e34fba	2882	}
syundo0730	6:f38dfe62d74c	2883	void MPU6050::setIntPLLReadyEnabled(bool enabled) {
syundo0730	7:d5845b617139	2884	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, enabled);
garfieldsg	0:662207e34fba	2885	}
syundo0730	6:f38dfe62d74c	2886	bool MPU6050::getIntDMPEnabled() {
syundo0730	7:d5845b617139	2887	I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DMP_INT_BIT, buffer);
garfieldsg	0:662207e34fba	2888	return buffer[0];
garfieldsg	0:662207e34fba	2889	}
syundo0730	6:f38dfe62d74c	2890	void MPU6050::setIntDMPEnabled(bool enabled) {
syundo0730	7:d5845b617139	2891	I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DMP_INT_BIT, enabled);
garfieldsg	0:662207e34fba	2892	}
garfieldsg	0:662207e34fba	2893
garfieldsg	0:662207e34fba	2894	// DMP_INT_STATUS
garfieldsg	0:662207e34fba	2895
syundo0730	6:f38dfe62d74c	2896	bool MPU6050::getDMPInt5Status() {
syundo0730	7:d5845b617139	2897	I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_5_BIT, buffer);
garfieldsg	0:662207e34fba	2898	return buffer[0];
garfieldsg	0:662207e34fba	2899	}
syundo0730	6:f38dfe62d74c	2900	bool MPU6050::getDMPInt4Status() {
syundo0730	7:d5845b617139	2901	I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_4_BIT, buffer);
garfieldsg	0:662207e34fba	2902	return buffer[0];
garfieldsg	0:662207e34fba	2903	}
syundo0730	6:f38dfe62d74c	2904	bool MPU6050::getDMPInt3Status() {
syundo0730	7:d5845b617139	2905	I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_3_BIT, buffer);
garfieldsg	0:662207e34fba	2906	return buffer[0];
garfieldsg	0:662207e34fba	2907	}
syundo0730	6:f38dfe62d74c	2908	bool MPU6050::getDMPInt2Status() {
syundo0730	7:d5845b617139	2909	I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_2_BIT, buffer);
garfieldsg	0:662207e34fba	2910	return buffer[0];
garfieldsg	0:662207e34fba	2911	}
syundo0730	6:f38dfe62d74c	2912	bool MPU6050::getDMPInt1Status() {
syundo0730	7:d5845b617139	2913	I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_1_BIT, buffer);
garfieldsg	0:662207e34fba	2914	return buffer[0];
garfieldsg	0:662207e34fba	2915	}
syundo0730	6:f38dfe62d74c	2916	bool MPU6050::getDMPInt0Status() {
syundo0730	7:d5845b617139	2917	I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_0_BIT, buffer);
garfieldsg	0:662207e34fba	2918	return buffer[0];
garfieldsg	0:662207e34fba	2919	}
garfieldsg	0:662207e34fba	2920
garfieldsg	0:662207e34fba	2921	// INT_STATUS register (DMP functions)
garfieldsg	0:662207e34fba	2922
syundo0730	6:f38dfe62d74c	2923	bool MPU6050::getIntPLLReadyStatus() {
syundo0730	7:d5845b617139	2924	I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, buffer);
garfieldsg	0:662207e34fba	2925	return buffer[0];
garfieldsg	0:662207e34fba	2926	}
syundo0730	6:f38dfe62d74c	2927	bool MPU6050::getIntDMPStatus() {
syundo0730	7:d5845b617139	2928	I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_DMP_INT_BIT, buffer);
garfieldsg	0:662207e34fba	2929	return buffer[0];
garfieldsg	0:662207e34fba	2930	}
garfieldsg	0:662207e34fba	2931
garfieldsg	0:662207e34fba	2932	// USER_CTRL register (DMP functions)
garfieldsg	0:662207e34fba	2933
syundo0730	6:f38dfe62d74c	2934	bool MPU6050::getDMPEnabled() {
syundo0730	7:d5845b617139	2935	I2Cdev::readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_EN_BIT, buffer);
garfieldsg	0:662207e34fba	2936	return buffer[0];
garfieldsg	0:662207e34fba	2937	}
syundo0730	6:f38dfe62d74c	2938	void MPU6050::setDMPEnabled(bool enabled) {
syundo0730	7:d5845b617139	2939	I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_EN_BIT, enabled);
garfieldsg	0:662207e34fba	2940	}
syundo0730	6:f38dfe62d74c	2941	void MPU6050::resetDMP() {
syundo0730	7:d5845b617139	2942	I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_RESET_BIT, true);
garfieldsg	0:662207e34fba	2943	}
garfieldsg	0:662207e34fba	2944
garfieldsg	0:662207e34fba	2945	// BANK_SEL register
garfieldsg	0:662207e34fba	2946
syundo0730	6:f38dfe62d74c	2947	void MPU6050::setMemoryBank(uint8_t bank, bool prefetchEnabled, bool userBank) {
garfieldsg	0:662207e34fba	2948	bank &= 0x1F;
garfieldsg	0:662207e34fba	2949	if (userBank) bank \|= 0x20;
garfieldsg	0:662207e34fba	2950	if (prefetchEnabled) bank \|= 0x40;
syundo0730	7:d5845b617139	2951	I2Cdev::writeByte(devAddr, MPU6050_RA_BANK_SEL, bank);
garfieldsg	0:662207e34fba	2952	}
garfieldsg	0:662207e34fba	2953
garfieldsg	0:662207e34fba	2954	// MEM_START_ADDR register
garfieldsg	0:662207e34fba	2955
syundo0730	6:f38dfe62d74c	2956	void MPU6050::setMemoryStartAddress(uint8_t address) {
syundo0730	7:d5845b617139	2957	I2Cdev::writeByte(devAddr, MPU6050_RA_MEM_START_ADDR, address);
garfieldsg	0:662207e34fba	2958	}
garfieldsg	0:662207e34fba	2959
garfieldsg	0:662207e34fba	2960	// MEM_R_W register
garfieldsg	0:662207e34fba	2961
syundo0730	6:f38dfe62d74c	2962	uint8_t MPU6050::readMemoryByte() {
syundo0730	7:d5845b617139	2963	I2Cdev::readByte(devAddr, MPU6050_RA_MEM_R_W, buffer);
garfieldsg	0:662207e34fba	2964	return buffer[0];
garfieldsg	0:662207e34fba	2965	}
syundo0730	6:f38dfe62d74c	2966	void MPU6050::writeMemoryByte(uint8_t data) {
syundo0730	7:d5845b617139	2967	I2Cdev::writeByte(devAddr, MPU6050_RA_MEM_R_W, data);
garfieldsg	0:662207e34fba	2968	}
syundo0730	6:f38dfe62d74c	2969	void MPU6050::readMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address) {
garfieldsg	0:662207e34fba	2970	setMemoryBank(bank);
garfieldsg	0:662207e34fba	2971	setMemoryStartAddress(address);
garfieldsg	0:662207e34fba	2972	uint8_t chunkSize;
garfieldsg	0:662207e34fba	2973	for (uint16_t i = 0; i < dataSize;) {
garfieldsg	0:662207e34fba	2974	// determine correct chunk size according to bank position and data size
garfieldsg	0:662207e34fba	2975	chunkSize = MPU6050_DMP_MEMORY_CHUNK_SIZE;
garfieldsg	0:662207e34fba	2976
garfieldsg	0:662207e34fba	2977	// make sure we don't go past the data size
garfieldsg	0:662207e34fba	2978	if (i + chunkSize > dataSize) chunkSize = dataSize - i;
garfieldsg	0:662207e34fba	2979
garfieldsg	0:662207e34fba	2980	// make sure this chunk doesn't go past the bank boundary (256 bytes)
garfieldsg	0:662207e34fba	2981	if (chunkSize > 256 - address) chunkSize = 256 - address;
garfieldsg	0:662207e34fba	2982
garfieldsg	0:662207e34fba	2983	// read the chunk of data as specified
syundo0730	7:d5845b617139	2984	I2Cdev::readBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, data + i);
syundo0730	7:d5845b617139	2985
garfieldsg	0:662207e34fba	2986	// increase byte index by [chunkSize]
garfieldsg	0:662207e34fba	2987	i += chunkSize;
garfieldsg	0:662207e34fba	2988
garfieldsg	0:662207e34fba	2989	// uint8_t automatically wraps to 0 at 256
garfieldsg	0:662207e34fba	2990	address += chunkSize;
garfieldsg	0:662207e34fba	2991
garfieldsg	0:662207e34fba	2992	// if we aren't done, update bank (if necessary) and address
garfieldsg	0:662207e34fba	2993	if (i < dataSize) {
garfieldsg	0:662207e34fba	2994	if (address == 0) bank++;
garfieldsg	0:662207e34fba	2995	setMemoryBank(bank);
garfieldsg	0:662207e34fba	2996	setMemoryStartAddress(address);
garfieldsg	0:662207e34fba	2997	}
garfieldsg	0:662207e34fba	2998	}
garfieldsg	0:662207e34fba	2999	}
syundo0730	6:f38dfe62d74c	3000	bool MPU6050::writeMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify, bool useProgMem) {
garfieldsg	0:662207e34fba	3001	setMemoryBank(bank);
garfieldsg	0:662207e34fba	3002	setMemoryStartAddress(address);
garfieldsg	0:662207e34fba	3003	uint8_t chunkSize;
syundo0730	6:f38dfe62d74c	3004	uint8_t *verifyBuffer;
syundo0730	7:d5845b617139	3005	uint8_t *progBuffer=0;
garfieldsg	0:662207e34fba	3006	uint16_t i;
garfieldsg	0:662207e34fba	3007	uint8_t j;
garfieldsg	0:662207e34fba	3008	if (verify) verifyBuffer = (uint8_t *)malloc(MPU6050_DMP_MEMORY_CHUNK_SIZE);
garfieldsg	0:662207e34fba	3009	if (useProgMem) progBuffer = (uint8_t *)malloc(MPU6050_DMP_MEMORY_CHUNK_SIZE);
garfieldsg	0:662207e34fba	3010	for (i = 0; i < dataSize;) {
garfieldsg	0:662207e34fba	3011	// determine correct chunk size according to bank position and data size
garfieldsg	0:662207e34fba	3012	chunkSize = MPU6050_DMP_MEMORY_CHUNK_SIZE;
garfieldsg	0:662207e34fba	3013
garfieldsg	0:662207e34fba	3014	// make sure we don't go past the data size
garfieldsg	0:662207e34fba	3015	if (i + chunkSize > dataSize) chunkSize = dataSize - i;
garfieldsg	0:662207e34fba	3016
garfieldsg	0:662207e34fba	3017	// make sure this chunk doesn't go past the bank boundary (256 bytes)
garfieldsg	0:662207e34fba	3018	if (chunkSize > 256 - address) chunkSize = 256 - address;
syundo0730	7:d5845b617139	3019
garfieldsg	0:662207e34fba	3020	if (useProgMem) {
garfieldsg	0:662207e34fba	3021	// write the chunk of data as specified
garfieldsg	0:662207e34fba	3022	for (j = 0; j < chunkSize; j++) progBuffer[j] = pgm_read_byte(data + i + j);
garfieldsg	0:662207e34fba	3023	} else {
garfieldsg	0:662207e34fba	3024	// write the chunk of data as specified
garfieldsg	0:662207e34fba	3025	progBuffer = (uint8_t *)data + i;
garfieldsg	0:662207e34fba	3026	}
garfieldsg	0:662207e34fba	3027
syundo0730	7:d5845b617139	3028	I2Cdev::writeBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, progBuffer);
garfieldsg	0:662207e34fba	3029
garfieldsg	0:662207e34fba	3030	// verify data if needed
garfieldsg	0:662207e34fba	3031	if (verify && verifyBuffer) {
garfieldsg	0:662207e34fba	3032	setMemoryBank(bank);
garfieldsg	0:662207e34fba	3033	setMemoryStartAddress(address);
syundo0730	7:d5845b617139	3034	I2Cdev::readBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, verifyBuffer);
garfieldsg	0:662207e34fba	3035	if (memcmp(progBuffer, verifyBuffer, chunkSize) != 0) {
garfieldsg	0:662207e34fba	3036	/*Serial.print("Block write verification error, bank ");
garfieldsg	0:662207e34fba	3037	Serial.print(bank, DEC);
garfieldsg	0:662207e34fba	3038	Serial.print(", address ");
garfieldsg	0:662207e34fba	3039	Serial.print(address, DEC);
garfieldsg	0:662207e34fba	3040	Serial.print("!\nExpected:");
garfieldsg	0:662207e34fba	3041	for (j = 0; j < chunkSize; j++) {
garfieldsg	0:662207e34fba	3042	Serial.print(" 0x");
garfieldsg	0:662207e34fba	3043	if (progBuffer[j] < 16) Serial.print("0");
garfieldsg	0:662207e34fba	3044	Serial.print(progBuffer[j], HEX);
garfieldsg	0:662207e34fba	3045	}
garfieldsg	0:662207e34fba	3046	Serial.print("\nReceived:");
garfieldsg	0:662207e34fba	3047	for (uint8_t j = 0; j < chunkSize; j++) {
garfieldsg	0:662207e34fba	3048	Serial.print(" 0x");
garfieldsg	0:662207e34fba	3049	if (verifyBuffer[i + j] < 16) Serial.print("0");
garfieldsg	0:662207e34fba	3050	Serial.print(verifyBuffer[i + j], HEX);
garfieldsg	0:662207e34fba	3051	}
garfieldsg	0:662207e34fba	3052	Serial.print("\n");*/
garfieldsg	0:662207e34fba	3053	free(verifyBuffer);
garfieldsg	0:662207e34fba	3054	if (useProgMem) free(progBuffer);
garfieldsg	0:662207e34fba	3055	return false; // uh oh.
garfieldsg	0:662207e34fba	3056	}
garfieldsg	0:662207e34fba	3057	}
garfieldsg	0:662207e34fba	3058
garfieldsg	0:662207e34fba	3059	// increase byte index by [chunkSize]
garfieldsg	0:662207e34fba	3060	i += chunkSize;
garfieldsg	0:662207e34fba	3061
garfieldsg	0:662207e34fba	3062	// uint8_t automatically wraps to 0 at 256
garfieldsg	0:662207e34fba	3063	address += chunkSize;
garfieldsg	0:662207e34fba	3064
garfieldsg	0:662207e34fba	3065	// if we aren't done, update bank (if necessary) and address
garfieldsg	0:662207e34fba	3066	if (i < dataSize) {
garfieldsg	0:662207e34fba	3067	if (address == 0) bank++;
garfieldsg	0:662207e34fba	3068	setMemoryBank(bank);
garfieldsg	0:662207e34fba	3069	setMemoryStartAddress(address);
garfieldsg	0:662207e34fba	3070	}
garfieldsg	0:662207e34fba	3071	}
garfieldsg	0:662207e34fba	3072	if (verify) free(verifyBuffer);
garfieldsg	0:662207e34fba	3073	if (useProgMem) free(progBuffer);
garfieldsg	0:662207e34fba	3074	return true;
garfieldsg	0:662207e34fba	3075	}
syundo0730	6:f38dfe62d74c	3076	bool MPU6050::writeProgMemoryBlock(const uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify) {
garfieldsg	0:662207e34fba	3077	return writeMemoryBlock(data, dataSize, bank, address, verify, true);
garfieldsg	0:662207e34fba	3078	}
syundo0730	6:f38dfe62d74c	3079	bool MPU6050::writeDMPConfigurationSet(const uint8_t *data, uint16_t dataSize, bool useProgMem) {
syundo0730	7:d5845b617139	3080	uint8_t *progBuffer = 0;
syundo0730	7:d5845b617139	3081	uint8_t success, special;
garfieldsg	0:662207e34fba	3082	uint16_t i, j;
garfieldsg	0:662207e34fba	3083	if (useProgMem) {
garfieldsg	0:662207e34fba	3084	progBuffer = (uint8_t *)malloc(8); // assume 8-byte blocks, realloc later if necessary
garfieldsg	0:662207e34fba	3085	}
garfieldsg	0:662207e34fba	3086
garfieldsg	0:662207e34fba	3087	// config set data is a long string of blocks with the following structure:
garfieldsg	0:662207e34fba	3088	// [bank] [offset] [length] [byte[0], byte[1], ..., byte[length]]
garfieldsg	0:662207e34fba	3089	uint8_t bank, offset, length;
garfieldsg	0:662207e34fba	3090	for (i = 0; i < dataSize;) {
garfieldsg	0:662207e34fba	3091	if (useProgMem) {
garfieldsg	0:662207e34fba	3092	bank = pgm_read_byte(data + i++);
garfieldsg	0:662207e34fba	3093	offset = pgm_read_byte(data + i++);
garfieldsg	0:662207e34fba	3094	length = pgm_read_byte(data + i++);
garfieldsg	0:662207e34fba	3095	} else {
garfieldsg	0:662207e34fba	3096	bank = data[i++];
garfieldsg	0:662207e34fba	3097	offset = data[i++];
garfieldsg	0:662207e34fba	3098	length = data[i++];
garfieldsg	0:662207e34fba	3099	}
garfieldsg	0:662207e34fba	3100
garfieldsg	0:662207e34fba	3101	// write data or perform special action
garfieldsg	0:662207e34fba	3102	if (length > 0) {
garfieldsg	0:662207e34fba	3103	// regular block of data to write
garfieldsg	0:662207e34fba	3104	/*Serial.print("Writing config block to bank ");
garfieldsg	0:662207e34fba	3105	Serial.print(bank);
garfieldsg	0:662207e34fba	3106	Serial.print(", offset ");
garfieldsg	0:662207e34fba	3107	Serial.print(offset);
garfieldsg	0:662207e34fba	3108	Serial.print(", length=");
garfieldsg	0:662207e34fba	3109	Serial.println(length);*/
garfieldsg	0:662207e34fba	3110	if (useProgMem) {
garfieldsg	0:662207e34fba	3111	if (sizeof(progBuffer) < length) progBuffer = (uint8_t *)realloc(progBuffer, length);
garfieldsg	0:662207e34fba	3112	for (j = 0; j < length; j++) progBuffer[j] = pgm_read_byte(data + i + j);
garfieldsg	0:662207e34fba	3113	} else {
garfieldsg	0:662207e34fba	3114	progBuffer = (uint8_t *)data + i;
garfieldsg	0:662207e34fba	3115	}
garfieldsg	0:662207e34fba	3116	success = writeMemoryBlock(progBuffer, length, bank, offset, true);
garfieldsg	0:662207e34fba	3117	i += length;
garfieldsg	0:662207e34fba	3118	} else {
garfieldsg	0:662207e34fba	3119	// special instruction
garfieldsg	0:662207e34fba	3120	// NOTE: this kind of behavior (what and when to do certain things)
garfieldsg	0:662207e34fba	3121	// is totally undocumented. This code is in here based on observed
garfieldsg	0:662207e34fba	3122	// behavior only, and exactly why (or even whether) it has to be here
garfieldsg	0:662207e34fba	3123	// is anybody's guess for now.
garfieldsg	0:662207e34fba	3124	if (useProgMem) {
garfieldsg	0:662207e34fba	3125	special = pgm_read_byte(data + i++);
garfieldsg	0:662207e34fba	3126	} else {
garfieldsg	0:662207e34fba	3127	special = data[i++];
garfieldsg	0:662207e34fba	3128	}
garfieldsg	0:662207e34fba	3129	/*Serial.print("Special command code ");
garfieldsg	0:662207e34fba	3130	Serial.print(special, HEX);
garfieldsg	0:662207e34fba	3131	Serial.println(" found...");*/
garfieldsg	0:662207e34fba	3132	if (special == 0x01) {
garfieldsg	0:662207e34fba	3133	// enable DMP-related interrupts
syundo0730	7:d5845b617139	3134
garfieldsg	0:662207e34fba	3135	//setIntZeroMotionEnabled(true);
garfieldsg	0:662207e34fba	3136	//setIntFIFOBufferOverflowEnabled(true);
garfieldsg	0:662207e34fba	3137	//setIntDMPEnabled(true);
syundo0730	7:d5845b617139	3138	I2Cdev::writeByte(devAddr, MPU6050_RA_INT_ENABLE, 0x32); // single operation
garfieldsg	0:662207e34fba	3139
garfieldsg	0:662207e34fba	3140	success = true;
garfieldsg	0:662207e34fba	3141	} else {
garfieldsg	0:662207e34fba	3142	// unknown special command
garfieldsg	0:662207e34fba	3143	success = false;
garfieldsg	0:662207e34fba	3144	}
garfieldsg	0:662207e34fba	3145	}
syundo0730	7:d5845b617139	3146
garfieldsg	0:662207e34fba	3147	if (!success) {
garfieldsg	0:662207e34fba	3148	if (useProgMem) free(progBuffer);
garfieldsg	0:662207e34fba	3149	return false; // uh oh
garfieldsg	0:662207e34fba	3150	}
garfieldsg	0:662207e34fba	3151	}
garfieldsg	0:662207e34fba	3152	if (useProgMem) free(progBuffer);
garfieldsg	0:662207e34fba	3153	return true;
garfieldsg	0:662207e34fba	3154	}
syundo0730	6:f38dfe62d74c	3155	bool MPU6050::writeProgDMPConfigurationSet(const uint8_t *data, uint16_t dataSize) {
syundo0730	6:f38dfe62d74c	3156	return writeDMPConfigurationSet(data, dataSize, true);
garfieldsg	0:662207e34fba	3157	}
garfieldsg	0:662207e34fba	3158
garfieldsg	0:662207e34fba	3159	// DMP_CFG_1 register
garfieldsg	0:662207e34fba	3160
syundo0730	6:f38dfe62d74c	3161	uint8_t MPU6050::getDMPConfig1() {
syundo0730	7:d5845b617139	3162	I2Cdev::readByte(devAddr, MPU6050_RA_DMP_CFG_1, buffer);
garfieldsg	0:662207e34fba	3163	return buffer[0];
garfieldsg	0:662207e34fba	3164	}
syundo0730	6:f38dfe62d74c	3165	void MPU6050::setDMPConfig1(uint8_t config) {
syundo0730	7:d5845b617139	3166	I2Cdev::writeByte(devAddr, MPU6050_RA_DMP_CFG_1, config);
garfieldsg	0:662207e34fba	3167	}
garfieldsg	0:662207e34fba	3168
garfieldsg	0:662207e34fba	3169	// DMP_CFG_2 register
garfieldsg	0:662207e34fba	3170
syundo0730	6:f38dfe62d74c	3171	uint8_t MPU6050::getDMPConfig2() {
syundo0730	7:d5845b617139	3172	I2Cdev::readByte(devAddr, MPU6050_RA_DMP_CFG_2, buffer);
garfieldsg	0:662207e34fba	3173	return buffer[0];
garfieldsg	0:662207e34fba	3174	}
syundo0730	6:f38dfe62d74c	3175	void MPU6050::setDMPConfig2(uint8_t config) {
syundo0730	7:d5845b617139	3176	I2Cdev::writeByte(devAddr, MPU6050_RA_DMP_CFG_2, config);
syundo0730	7:d5845b617139	3177	}

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Type:	Library
Created:	11 Nov 2016
Imports:	2
Forks:	0
Commits:	13
Dependents:	1
Dependencies:	1
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MPU6050.cpp@12:67002f623f48, 2016-11-11 (annotated)

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