Diff: MMA8451Q.cpp

Revision:

9:2aa9b1668d14

Parent:

8:7e6013f11b10

Child:

10:fa532bf396fb

--- a/MMA8451Q.cpp	Tue May 28 17:18:30 2013 +0000
+++ b/MMA8451Q.cpp	Tue May 28 20:19:38 2013 +0000
@@ -55,6 +55,11 @@
 * 
 *   Orientation Detect -- MMA8451Q_Int1.fall --- Orientation_IRQ --- user1_fptr
 *
+*
+* :: The data ready use the IRQ2
+*
+*   Data Ready -- MMA8451Q_Int2.fall --- DataReady_IRQ --- usr2_fptr
+*
 */
 void (*user2_fptr)(void);               // Pointers to user function called after
 void (*user1_fptr)(void);               // IRQ assertion.
@@ -364,6 +369,52 @@
     return 0;
 }
 
+void MMA8451Q::DataReady( void(*fptr)(void), unsigned char ODR)
+{
+    // Soft Reset
+    Reset();
+    
+    // Step 1: Put the device into Standby Mode: Register 0x2A CTRL_REG1
+    // Set the device ODR value and Standby
+    unsigned char data[2] = {REG_CTRL_REG_1, ((ODR<<3) & 0xFE)};
+    writeRegs(data, 2);
+
+    // Step 2: Enable Data Ready Interrupt Function in the System (CTRL_REG4)
+    data[0] = REG_CTRL_REG_4;
+    data[1] = 0x01;
+    writeRegs(data, 2);
+    
+    // Step 6: Route the Data Ready Interrupt Function to INT2 hardware pin (CTRL_REG5)
+    data[0] = REG_CTRL_REG_5;
+    data[1] = 0x00;
+    writeRegs(data, 2);
+    
+    // Step 7: Put the device in Active Mode
+    data[0] = REG_CTRL_REG_1;
+    data[1] = ((ODR<<3) | 0x01);
+    writeRegs(data, 2);
+
+    user2_fptr = fptr;
+    MMA8451Q_Int2.fall( this, &MMA8451Q::DataReady_IRQ);
+
+}
+
+void MMA8451Q::DataReady_IRQ( void)
+{
+    unsigned char t;
+    
+    // Determine source of the interrupt by first reading the system interrupt
+    readRegs( REG_INT_SRC, &t, 1);
+    //
+    if ( (t & 0x01) == 0x01) {
+        // Read the DataReady_IRQ Function to clear the interrupt
+        readRegs( REG_FF_MT_SRC, &t, 1);
+        // Run the user supplied function
+        user2_fptr();
+    }
+}
+
+
 void MMA8451Q::Active( void)
 {
     unsigned char t;